diff options
| -rw-r--r-- | arch/arm/mach-s5pc100/include/mach/gpio-core.h | 21 | ||||
| -rw-r--r-- | arch/arm/mach-s5pc100/include/mach/gpio.h | 146 | ||||
| -rw-r--r-- | arch/arm/plat-s5pc1xx/setup-i2c0.c | 25 | ||||
| -rw-r--r-- | arch/arm/plat-s5pc1xx/setup-i2c1.c | 25 |
4 files changed, 217 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio-core.h b/arch/arm/mach-s5pc100/include/mach/gpio-core.h new file mode 100644 index 000000000000..ad28d8ec8a78 --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/gpio-core.h | |||
| @@ -0,0 +1,21 @@ | |||
| 1 | /* arch/arm/mach-s5pc100/include/mach/gpio-core.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC100 - GPIO core support | ||
| 7 | * | ||
| 8 | * Based on mach-s3c6400/include/mach/gpio-core.h | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __ASM_ARCH_GPIO_CORE_H | ||
| 16 | #define __ASM_ARCH_GPIO_CORE_H __FILE__ | ||
| 17 | |||
| 18 | /* currently we just include the platform support */ | ||
| 19 | #include <plat/gpio-core.h> | ||
| 20 | |||
| 21 | #endif /* __ASM_ARCH_GPIO_CORE_H */ | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h new file mode 100644 index 000000000000..c74fc93d7d15 --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/gpio.h | |||
| @@ -0,0 +1,146 @@ | |||
| 1 | /* arch/arm/mach-s5pc100/include/mach/gpio.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC100 - GPIO lib support | ||
| 7 | * | ||
| 8 | * Base on mach-s3c6400/include/mach/gpio.h | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #define gpio_get_value __gpio_get_value | ||
| 16 | #define gpio_set_value __gpio_set_value | ||
| 17 | #define gpio_cansleep __gpio_cansleep | ||
| 18 | #define gpio_to_irq __gpio_to_irq | ||
| 19 | |||
| 20 | /* GPIO bank sizes */ | ||
| 21 | #define S5PC1XX_GPIO_A0_NR (8) | ||
| 22 | #define S5PC1XX_GPIO_A1_NR (5) | ||
| 23 | #define S5PC1XX_GPIO_B_NR (8) | ||
| 24 | #define S5PC1XX_GPIO_C_NR (5) | ||
| 25 | #define S5PC1XX_GPIO_D_NR (7) | ||
| 26 | #define S5PC1XX_GPIO_E0_NR (8) | ||
| 27 | #define S5PC1XX_GPIO_E1_NR (6) | ||
| 28 | #define S5PC1XX_GPIO_F0_NR (8) | ||
| 29 | #define S5PC1XX_GPIO_F1_NR (8) | ||
| 30 | #define S5PC1XX_GPIO_F2_NR (8) | ||
| 31 | #define S5PC1XX_GPIO_F3_NR (4) | ||
| 32 | #define S5PC1XX_GPIO_G0_NR (8) | ||
| 33 | #define S5PC1XX_GPIO_G1_NR (3) | ||
| 34 | #define S5PC1XX_GPIO_G2_NR (7) | ||
| 35 | #define S5PC1XX_GPIO_G3_NR (7) | ||
| 36 | #define S5PC1XX_GPIO_H0_NR (8) | ||
| 37 | #define S5PC1XX_GPIO_H1_NR (8) | ||
| 38 | #define S5PC1XX_GPIO_H2_NR (8) | ||
| 39 | #define S5PC1XX_GPIO_H3_NR (8) | ||
| 40 | #define S5PC1XX_GPIO_I_NR (8) | ||
| 41 | #define S5PC1XX_GPIO_J0_NR (8) | ||
| 42 | #define S5PC1XX_GPIO_J1_NR (5) | ||
| 43 | #define S5PC1XX_GPIO_J2_NR (8) | ||
| 44 | #define S5PC1XX_GPIO_J3_NR (8) | ||
| 45 | #define S5PC1XX_GPIO_J4_NR (4) | ||
| 46 | #define S5PC1XX_GPIO_K0_NR (8) | ||
| 47 | #define S5PC1XX_GPIO_K1_NR (6) | ||
| 48 | #define S5PC1XX_GPIO_K2_NR (8) | ||
| 49 | #define S5PC1XX_GPIO_K3_NR (8) | ||
| 50 | #define S5PC1XX_GPIO_MP00_NR (8) | ||
| 51 | #define S5PC1XX_GPIO_MP01_NR (8) | ||
| 52 | #define S5PC1XX_GPIO_MP02_NR (8) | ||
| 53 | #define S5PC1XX_GPIO_MP03_NR (8) | ||
| 54 | #define S5PC1XX_GPIO_MP04_NR (5) | ||
| 55 | |||
| 56 | /* GPIO bank numbes */ | ||
| 57 | |||
| 58 | /* CONFIG_S3C_GPIO_SPACE allows the user to select extra | ||
| 59 | * space for debugging purposes so that any accidental | ||
| 60 | * change from one gpio bank to another can be caught. | ||
| 61 | */ | ||
| 62 | |||
| 63 | #define S5PC1XX_GPIO_NEXT(__gpio) \ | ||
| 64 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | ||
| 65 | |||
| 66 | enum s3c_gpio_number { | ||
| 67 | S5PC1XX_GPIO_A0_START = 0, | ||
| 68 | S5PC1XX_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A0), | ||
| 69 | S5PC1XX_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A1), | ||
| 70 | S5PC1XX_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_B), | ||
| 71 | S5PC1XX_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_C), | ||
| 72 | S5PC1XX_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_D), | ||
| 73 | S5PC1XX_GPIO_E1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E0), | ||
| 74 | S5PC1XX_GPIO_F0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E1), | ||
| 75 | S5PC1XX_GPIO_F1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F0), | ||
| 76 | S5PC1XX_GPIO_F2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F1), | ||
| 77 | S5PC1XX_GPIO_F3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F2), | ||
| 78 | S5PC1XX_GPIO_G0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F3), | ||
| 79 | S5PC1XX_GPIO_G1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G0), | ||
| 80 | S5PC1XX_GPIO_G2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G1), | ||
| 81 | S5PC1XX_GPIO_G3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G2), | ||
| 82 | S5PC1XX_GPIO_H0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G3), | ||
| 83 | S5PC1XX_GPIO_H1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H0), | ||
| 84 | S5PC1XX_GPIO_H2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H1), | ||
| 85 | S5PC1XX_GPIO_H3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H2), | ||
| 86 | S5PC1XX_GPIO_I_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H3), | ||
| 87 | S5PC1XX_GPIO_J0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_I), | ||
| 88 | S5PC1XX_GPIO_J1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J0), | ||
| 89 | S5PC1XX_GPIO_J2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J1), | ||
| 90 | S5PC1XX_GPIO_J3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J2), | ||
| 91 | S5PC1XX_GPIO_J4_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J3), | ||
| 92 | S5PC1XX_GPIO_K0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J4), | ||
| 93 | S5PC1XX_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K0), | ||
| 94 | S5PC1XX_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K1), | ||
| 95 | S5PC1XX_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K2), | ||
| 96 | S5PC1XX_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K3), | ||
| 97 | S5PC1XX_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP00), | ||
| 98 | S5PC1XX_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP01), | ||
| 99 | S5PC1XX_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP02), | ||
| 100 | S5PC1XX_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP03), | ||
| 101 | }; | ||
| 102 | |||
| 103 | /* S5PC1XX GPIO number definitions. */ | ||
| 104 | #define S5PC1XX_GPA0(_nr) (S5PC1XX_GPIO_A0_START + (_nr)) | ||
| 105 | #define S5PC1XX_GPA1(_nr) (S5PC1XX_GPIO_A1_START + (_nr)) | ||
| 106 | #define S5PC1XX_GPB(_nr) (S5PC1XX_GPIO_B_START + (_nr)) | ||
| 107 | #define S5PC1XX_GPC(_nr) (S5PC1XX_GPIO_C_START + (_nr)) | ||
| 108 | #define S5PC1XX_GPD(_nr) (S5PC1XX_GPIO_D_START + (_nr)) | ||
| 109 | #define S5PC1XX_GPE0(_nr) (S5PC1XX_GPIO_E0_START + (_nr)) | ||
| 110 | #define S5PC1XX_GPE1(_nr) (S5PC1XX_GPIO_E1_START + (_nr)) | ||
| 111 | #define S5PC1XX_GPF0(_nr) (S5PC1XX_GPIO_F0_START + (_nr)) | ||
| 112 | #define S5PC1XX_GPF1(_nr) (S5PC1XX_GPIO_F1_START + (_nr)) | ||
| 113 | #define S5PC1XX_GPF2(_nr) (S5PC1XX_GPIO_F2_START + (_nr)) | ||
| 114 | #define S5PC1XX_GPF3(_nr) (S5PC1XX_GPIO_F3_START + (_nr)) | ||
| 115 | #define S5PC1XX_GPG0(_nr) (S5PC1XX_GPIO_G0_START + (_nr)) | ||
| 116 | #define S5PC1XX_GPG1(_nr) (S5PC1XX_GPIO_G1_START + (_nr)) | ||
| 117 | #define S5PC1XX_GPG2(_nr) (S5PC1XX_GPIO_G2_START + (_nr)) | ||
| 118 | #define S5PC1XX_GPG3(_nr) (S5PC1XX_GPIO_G3_START + (_nr)) | ||
| 119 | #define S5PC1XX_GPH0(_nr) (S5PC1XX_GPIO_H0_START + (_nr)) | ||
| 120 | #define S5PC1XX_GPH1(_nr) (S5PC1XX_GPIO_H1_START + (_nr)) | ||
| 121 | #define S5PC1XX_GPH2(_nr) (S5PC1XX_GPIO_H2_START + (_nr)) | ||
| 122 | #define S5PC1XX_GPH3(_nr) (S5PC1XX_GPIO_H3_START + (_nr)) | ||
| 123 | #define S5PC1XX_GPI(_nr) (S5PC1XX_GPIO_I_START + (_nr)) | ||
| 124 | #define S5PC1XX_GPJ0(_nr) (S5PC1XX_GPIO_J0_START + (_nr)) | ||
| 125 | #define S5PC1XX_GPJ1(_nr) (S5PC1XX_GPIO_J1_START + (_nr)) | ||
| 126 | #define S5PC1XX_GPJ2(_nr) (S5PC1XX_GPIO_J2_START + (_nr)) | ||
| 127 | #define S5PC1XX_GPJ3(_nr) (S5PC1XX_GPIO_J3_START + (_nr)) | ||
| 128 | #define S5PC1XX_GPJ4(_nr) (S5PC1XX_GPIO_J4_START + (_nr)) | ||
| 129 | #define S5PC1XX_GPK0(_nr) (S5PC1XX_GPIO_K0_START + (_nr)) | ||
| 130 | #define S5PC1XX_GPK1(_nr) (S5PC1XX_GPIO_K1_START + (_nr)) | ||
| 131 | #define S5PC1XX_GPK2(_nr) (S5PC1XX_GPIO_K2_START + (_nr)) | ||
| 132 | #define S5PC1XX_GPK3(_nr) (S5PC1XX_GPIO_K3_START + (_nr)) | ||
| 133 | #define S5PC1XX_MP00(_nr) (S5PC1XX_GPIO_MP00_START + (_nr)) | ||
| 134 | #define S5PC1XX_MP01(_nr) (S5PC1XX_GPIO_MP01_START + (_nr)) | ||
| 135 | #define S5PC1XX_MP02(_nr) (S5PC1XX_GPIO_MP02_START + (_nr)) | ||
| 136 | #define S5PC1XX_MP03(_nr) (S5PC1XX_GPIO_MP03_START + (_nr)) | ||
| 137 | #define S5PC1XX_MP04(_nr) (S5PC1XX_GPIO_MP04_START + (_nr)) | ||
| 138 | |||
| 139 | /* the end of the S5PC1XX specific gpios */ | ||
| 140 | #define S5PC1XX_GPIO_END (S5PC1XX_MP04(S5PC1XX_GPIO_MP04_NR) + 1) | ||
| 141 | #define S3C_GPIO_END S5PC1XX_GPIO_END | ||
| 142 | |||
| 143 | /* define the number of gpios we need to the one after the MP04() range */ | ||
| 144 | #define ARCH_NR_GPIOS (S5PC1XX_MP04(S5PC1XX_GPIO_MP04_NR) + 1) | ||
| 145 | |||
| 146 | #include <asm-generic/gpio.h> | ||
diff --git a/arch/arm/plat-s5pc1xx/setup-i2c0.c b/arch/arm/plat-s5pc1xx/setup-i2c0.c new file mode 100644 index 000000000000..3d00c025fffb --- /dev/null +++ b/arch/arm/plat-s5pc1xx/setup-i2c0.c | |||
| @@ -0,0 +1,25 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/setup-i2c0.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * Base S5PC1XX I2C bus 0 gpio configuration | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/setup-i2c0.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/types.h> | ||
| 17 | |||
| 18 | struct platform_device; /* don't need the contents */ | ||
| 19 | |||
| 20 | #include <plat/iic.h> | ||
| 21 | |||
| 22 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | ||
| 23 | { | ||
| 24 | /* Pin configuration would be needed */ | ||
| 25 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/setup-i2c1.c b/arch/arm/plat-s5pc1xx/setup-i2c1.c new file mode 100644 index 000000000000..c8f3ca42f51d --- /dev/null +++ b/arch/arm/plat-s5pc1xx/setup-i2c1.c | |||
| @@ -0,0 +1,25 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c64xx/setup-i2c1.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * Base S5PC1XX I2C bus 1 gpio configuration | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/setup-i2c1.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/types.h> | ||
| 17 | |||
| 18 | struct platform_device; /* don't need the contents */ | ||
| 19 | |||
| 20 | #include <plat/iic.h> | ||
| 21 | |||
| 22 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) | ||
| 23 | { | ||
| 24 | /* Pin configuration would be needed */ | ||
| 25 | } | ||
