8 files changed, 159 insertions, 115 deletions

diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 54d73b1f00a0..d90c2fccc30c 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -119,6 +119,23 @@ struct mce_log {
 #define K8_MCE_THRESHOLD_BASE      (MCE_EXTENDED_BANK + 1)
 
 #ifdef __KERNEL__
+
+struct mca_config {
+        bool dont_log_ce;
+        bool cmci_disabled;
+        bool ignore_ce;
+        bool disabled;
+        bool ser;
+        bool bios_cmci_threshold;
+        u8 banks;
+        s8 bootlog;
+        int tolerant;
+        int monarch_timeout;
+        int panic_timeout;
+        u32 rip_msr;
+};
+
+extern struct mca_config mca_cfg;
 extern void mce_register_decode_chain(struct notifier_block *nb);
 extern void mce_unregister_decode_chain(struct notifier_block *nb);
 
@@ -126,7 +143,6 @@ extern void mce_unregister_decode_chain(struct notifier_block *nb);
 #include <linux/init.h>
 #include <linux/atomic.h>
 
-extern int mce_disabled;
 extern int mce_p5_enabled;
 
 #ifdef CONFIG_X86_MCE
@@ -159,9 +175,6 @@ DECLARE_PER_CPU(struct device *, mce_device);
 #define MAX_NR_BANKS 32
 
 #ifdef CONFIG_X86_MCE_INTEL
-extern int mce_cmci_disabled;
-extern int mce_ignore_ce;
-extern int mce_bios_cmci_threshold;
 void mce_intel_feature_init(struct cpuinfo_x86 *c);
 void cmci_clear(void);
 void cmci_reenable(void);
diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h b/arch/x86/kernel/cpu/mcheck/mce-internal.h
index 6a05c1d327a9..5b7d4fa5d3b7 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-internal.h
+++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h
@@ -24,8 +24,6 @@ struct mce_bank {
 int mce_severity(struct mce *a, int tolerant, char **msg);
 struct dentry *mce_get_debugfs_dir(void);
 
-extern int mce_ser;
-
 extern struct mce_bank *mce_banks;
 
 #ifdef CONFIG_X86_MCE_INTEL
diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c
index 13017626f9a8..beb1f1689e52 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-severity.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
@@ -193,9 +193,9 @@ int mce_severity(struct mce *m, int tolerant, char **msg)
                         continue;
                 if ((m->mcgstatus & s->mcgmask) != s->mcgres)
                         continue;
-                if (s->ser == SER_REQUIRED && !mce_ser)
+                if (s->ser == SER_REQUIRED && !mca_cfg.ser)
                         continue;
-                if (s->ser == NO_SER && mce_ser)
+                if (s->ser == NO_SER && mca_cfg.ser)
                         continue;
                 if (s->context && ctx != s->context)
                         continue;
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 46cbf8689692..80dbda84f1c3 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -58,34 +58,26 @@ static DEFINE_MUTEX(mce_chrdev_read_mutex);
 #define CREATE_TRACE_POINTS
 #include <trace/events/mce.h>
 
-int mce_disabled __read_mostly;
-
 #define SPINUNIT 100    /* 100ns */
 
 atomic_t mce_entry;
 
 DEFINE_PER_CPU(unsigned, mce_exception_count);
 
-/*
- * Tolerant levels:
- *   0: always panic on uncorrected errors, log corrected errors
- *   1: panic or SIGBUS on uncorrected errors, log corrected errors
- *   2: SIGBUS or log uncorrected errors (if possible), log corrected errors
- *   3: never panic or SIGBUS, log all errors (for testing only)
- */
-static int                      tolerant                __read_mostly = 1;
-static int                      banks                   __read_mostly;
-static int                      rip_msr                 __read_mostly;
-static int                      mce_bootlog             __read_mostly = -1;
-static int                      monarch_timeout         __read_mostly = -1;
-static int                      mce_panic_timeout       __read_mostly;
-static int                      mce_dont_log_ce         __read_mostly;
-int                             mce_cmci_disabled       __read_mostly;
-int                             mce_ignore_ce           __read_mostly;
-int                             mce_ser                 __read_mostly;
-int                             mce_bios_cmci_threshold __read_mostly;
-
-struct mce_bank                *mce_banks               __read_mostly;
+struct mce_bank *mce_banks __read_mostly;
+
+struct mca_config mca_cfg __read_mostly = {
+        .bootlog  = -1,
+        /*
+         * Tolerant levels:
+         * 0: always panic on uncorrected errors, log corrected errors
+         * 1: panic or SIGBUS on uncorrected errors, log corrected errors
+         * 2: SIGBUS or log uncorrected errors (if possible), log corr. errors
+         * 3: never panic or SIGBUS, log all errors (for testing only)
+         */
+        .tolerant = 1,
+        .monarch_timeout = -1
+};
 
 /* User mode helper program triggered by machine check event */
 static unsigned long            mce_need_notify;
@@ -302,7 +294,7 @@ static void wait_for_panic(void)
         while (timeout-- > 0)
                 udelay(1);
         if (panic_timeout == 0)
-                panic_timeout = mce_panic_timeout;
+                panic_timeout = mca_cfg.panic_timeout;
         panic("Panicing machine check CPU died");
 }
 
@@ -360,7 +352,7 @@ static void mce_panic(char *msg, struct mce *final, char *exp)
                 pr_emerg(HW_ERR "Machine check: %s\n", exp);
         if (!fake_panic) {
                 if (panic_timeout == 0)
-                        panic_timeout = mce_panic_timeout;
+                        panic_timeout = mca_cfg.panic_timeout;
                 panic(msg);
         } else
                 pr_emerg(HW_ERR "Fake kernel panic: %s\n", msg);
@@ -372,7 +364,7 @@ static int msr_to_offset(u32 msr)
 {
         unsigned bank = __this_cpu_read(injectm.bank);
 
-        if (msr == rip_msr)
+        if (msr == mca_cfg.rip_msr)
                 return offsetof(struct mce, ip);
         if (msr == MSR_IA32_MCx_STATUS(bank))
                 return offsetof(struct mce, status);
@@ -451,8 +443,8 @@ static inline void mce_gather_info(struct mce *m, struct pt_regs *regs)
                                 m->cs |= 3;
                 }
                 /* Use accurate RIP reporting if available. */
-                if (rip_msr)
-                        m->ip = mce_rdmsrl(rip_msr);
+                if (mca_cfg.rip_msr)
+                        m->ip = mce_rdmsrl(mca_cfg.rip_msr);
         }
 }
 
@@ -513,7 +505,7 @@ static int mce_ring_add(unsigned long pfn)
 
 int mce_available(struct cpuinfo_x86 *c)