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authorChristoffer Dall <christoffer.dall@linaro.org>2014-09-28 10:04:26 -0400
committerChristoffer Dall <christoffer.dall@linaro.org>2014-10-16 04:57:41 -0400
commit2df36a5dd6792870bef48f63bfca42055ea5b79c (patch)
treeef822d51fb8cd4adb030eab48c7dab131b632461 /virt
parent3d08c629244257473450a8ba17cb8184b91e68f8 (diff)
arm/arm64: KVM: Fix BE accesses to GICv2 EISR and ELRSR regs
The EIRSR and ELRSR registers are 32-bit registers on GICv2, and we store these as an array of two such registers on the vgic vcpu struct. However, we access them as a single 64-bit value or as a bitmap pointer in the generic vgic code, which breaks BE support. Instead, store them as u64 values on the vgic structure and do the word-swapping in the assembly code, which already handles the byte order for BE systems. Tested-by: Victor Kamensky <victor.kamensky@linaro.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'virt')
-rw-r--r--virt/kvm/arm/vgic-v2.c24
-rw-r--r--virt/kvm/arm/vgic.c18
2 files changed, 19 insertions, 23 deletions
diff --git a/virt/kvm/arm/vgic-v2.c b/virt/kvm/arm/vgic-v2.c
index 01124ef3690a..2935405ad22f 100644
--- a/virt/kvm/arm/vgic-v2.c
+++ b/virt/kvm/arm/vgic-v2.c
@@ -71,35 +71,17 @@ static void vgic_v2_sync_lr_elrsr(struct kvm_vcpu *vcpu, int lr,
71 struct vgic_lr lr_desc) 71 struct vgic_lr lr_desc)
72{ 72{
73 if (!(lr_desc.state & LR_STATE_MASK)) 73 if (!(lr_desc.state & LR_STATE_MASK))
74 set_bit(lr, (unsigned long *)vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr); 74 vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr |= (1ULL << lr);
75} 75}
76 76
77static u64 vgic_v2_get_elrsr(const struct kvm_vcpu *vcpu) 77static u64 vgic_v2_get_elrsr(const struct kvm_vcpu *vcpu)
78{ 78{
79 u64 val; 79 return vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr;
80
81#if BITS_PER_LONG == 64
82 val = vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr[1];
83 val <<= 32;
84 val |= vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr[0];
85#else
86 val = *(u64 *)vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr;
87#endif
88 return val;
89} 80}
90 81
91static u64 vgic_v2_get_eisr(const struct kvm_vcpu *vcpu) 82static u64 vgic_v2_get_eisr(const struct kvm_vcpu *vcpu)
92{ 83{
93 u64 val; 84 return vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr;
94
95#if BITS_PER_LONG == 64
96 val = vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr[1];
97 val <<= 32;
98 val |= vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr[0];
99#else
100 val = *(u64 *)vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr;
101#endif
102 return val;
103} 85}
104 86
105static u32 vgic_v2_get_interrupt_status(const struct kvm_vcpu *vcpu) 87static u32 vgic_v2_get_interrupt_status(const struct kvm_vcpu *vcpu)
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 382fb5a88b9c..3aaca49de325 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm/vgic.c
@@ -145,6 +145,20 @@ static void vgic_free_bitmap(struct vgic_bitmap *b)
145 b->shared = NULL; 145 b->shared = NULL;
146} 146}
147 147
148/*
149 * Call this function to convert a u64 value to an unsigned long * bitmask
150 * in a way that works on both 32-bit and 64-bit LE and BE platforms.
151 *
152 * Warning: Calling this function may modify *val.
153 */
154static unsigned long *u64_to_bitmask(u64 *val)
155{
156#if defined(CONFIG_CPU_BIG_ENDIAN) && BITS_PER_LONG == 32
157 *val = (*val >> 32) | (*val << 32);
158#endif
159 return (unsigned long *)val;
160}
161
148static u32 *vgic_bitmap_get_reg(struct vgic_bitmap *x, 162static u32 *vgic_bitmap_get_reg(struct vgic_bitmap *x,
149 int cpuid, u32 offset) 163 int cpuid, u32 offset)
150{ 164{
@@ -1442,7 +1456,7 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
1442 * active bit. 1456 * active bit.
1443 */ 1457 */
1444 u64 eisr = vgic_get_eisr(vcpu); 1458 u64 eisr = vgic_get_eisr(vcpu);
1445 unsigned long *eisr_ptr = (unsigned long *)&eisr; 1459 unsigned long *eisr_ptr = u64_to_bitmask(&eisr);
1446 int lr; 1460 int lr;
1447 1461
1448 for_each_set_bit(lr, eisr_ptr, vgic->nr_lr) { 1462 for_each_set_bit(lr, eisr_ptr, vgic->nr_lr) {
@@ -1505,7 +1519,7 @@ static void __kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
1505 1519
1506 level_pending = vgic_process_maintenance(vcpu); 1520 level_pending = vgic_process_maintenance(vcpu);
1507 elrsr = vgic_get_elrsr(vcpu); 1521 elrsr = vgic_get_elrsr(vcpu);
1508 elrsr_ptr = (unsigned long *)&elrsr; 1522 elrsr_ptr = u64_to_bitmask(&elrsr);
1509 1523
1510 /* Clear mappings for empty LRs */ 1524 /* Clear mappings for empty LRs */
1511 for_each_set_bit(lr, elrsr_ptr, vgic->nr_lr) { 1525 for_each_set_bit(lr, elrsr_ptr, vgic->nr_lr) {