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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2014-04-14 09:47:05 -0400
committerJason Cooper <jason@lakedaemon.net>2014-04-24 01:00:37 -0400
commit5ab5afd8ba837560f76f8ee527271d2e819bcaef (patch)
treee2c610986de4ce441f5e3d1b76e4cf7c0a542a49 /usr
parent77fa4b9ab0aafc0a06976814ad62aeff990dfd2c (diff)
ARM: mvebu: implement Armada 375 coherency workaround
The early revisions of Armada 375 SOCs (Z1 stepping) have a bug in the I/O coherency unit that prevents using the normal method for the I/O coherency barrier. The recommended workaround is to use a XOR memset transfer to act as the I/O coherency barrier. This involves "borrowing" a XOR engine, which gets disabled in the Device Tree so the normal XOR driver doesn't use it. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483228-25625-8-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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