diff options
author | Len Brown <len.brown@intel.com> | 2015-04-01 21:02:57 -0400 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2015-04-18 14:20:52 -0400 |
commit | 8a5bdf41d2c027c1e4ad62bc4f96f3fdf82070ba (patch) | |
tree | 50d4b76564cdb750b3b602dda3f35ef76a8a5cd7 /tools | |
parent | 40ee8e3b9dc8917e6077dde6a49c7a71d63b0231 (diff) |
tools/power turbostat: calculate TSC frequency from CPUID(0x15) on SKL
turbostat --debug
...
CPUID(0x15): eax_crystal: 2 ebx_tsc: 100 ecx_crystal_hz: 0
TSC: 1200 MHz (24000000 Hz * 100 / 2 / 1000000)
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools')
-rw-r--r-- | tools/power/x86/turbostat/turbostat.c | 39 |
1 files changed, 38 insertions, 1 deletions
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 064749de75b1..203d45d0a560 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c | |||
@@ -89,6 +89,8 @@ double rapl_joule_counter_range; | |||
89 | unsigned int do_core_perf_limit_reasons; | 89 | unsigned int do_core_perf_limit_reasons; |
90 | unsigned int do_gfx_perf_limit_reasons; | 90 | unsigned int do_gfx_perf_limit_reasons; |
91 | unsigned int do_ring_perf_limit_reasons; | 91 | unsigned int do_ring_perf_limit_reasons; |
92 | unsigned int crystal_hz; | ||
93 | unsigned long long tsc_hz; | ||
92 | 94 | ||
93 | #define RAPL_PKG (1 << 0) | 95 | #define RAPL_PKG (1 << 0) |
94 | /* 0x610 MSR_PKG_POWER_LIMIT */ | 96 | /* 0x610 MSR_PKG_POWER_LIMIT */ |
@@ -2496,6 +2498,41 @@ void process_cpuid() | |||
2496 | do_ptm ? "" : "No ", | 2498 | do_ptm ? "" : "No ", |
2497 | has_epb ? "" : "No "); | 2499 | has_epb ? "" : "No "); |
2498 | 2500 | ||
2501 | if (max_level > 0x15) { | ||
2502 | unsigned int eax_crystal; | ||
2503 | unsigned int ebx_tsc; | ||
2504 | |||
2505 | /* | ||
2506 | * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz | ||
2507 | */ | ||
2508 | eax_crystal = ebx_tsc = crystal_hz = edx = 0; | ||
2509 | __get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx); | ||
2510 | |||
2511 | if (ebx_tsc != 0) { | ||
2512 | |||
2513 | if (debug && (ebx != 0)) | ||
2514 | fprintf(stderr, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n", | ||
2515 | eax_crystal, ebx_tsc, crystal_hz); | ||
2516 | |||
2517 | if (crystal_hz == 0) | ||
2518 | switch(model) { | ||
2519 | case 0x4E: /* SKL */ | ||
2520 | case 0x5E: /* SKL */ | ||
2521 | crystal_hz = 24000000; /* 24 MHz */ | ||
2522 | break; | ||
2523 | default: | ||
2524 | crystal_hz = 0; | ||
2525 | } | ||
2526 | |||
2527 | if (crystal_hz) { | ||
2528 | tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal; | ||
2529 | if (debug) | ||
2530 | fprintf(stderr, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n", | ||
2531 | tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal); | ||
2532 | } | ||
2533 | } | ||
2534 | } | ||
2535 | |||
2499 | do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model); | 2536 | do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model); |
2500 | do_snb_cstates = has_snb_msrs(family, model); | 2537 | do_snb_cstates = has_snb_msrs(family, model); |
2501 | do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2); | 2538 | do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2); |
@@ -2834,7 +2871,7 @@ int get_and_dump_counters(void) | |||
2834 | } | 2871 | } |
2835 | 2872 | ||
2836 | void print_version() { | 2873 | void print_version() { |
2837 | fprintf(stderr, "turbostat version 4.3 24 Mar, 2015" | 2874 | fprintf(stderr, "turbostat version 4.4 2 Apr, 2015" |
2838 | " - Len Brown <lenb@kernel.org>\n"); | 2875 | " - Len Brown <lenb@kernel.org>\n"); |
2839 | } | 2876 | } |
2840 | 2877 | ||