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authorLen Brown <len.brown@intel.com>2014-02-06 00:55:19 -0500
committerLen Brown <len.brown@intel.com>2014-03-05 22:19:55 -0500
commitfc04cc67ea8f44124f048832a745a24bc2fa12fa (patch)
tree31959e42a8752f9a01814471565ed11799ec7838 /tools/power/x86/turbostat/turbostat.8
parent38dbfb59d1175ef458d006556061adeaa8751b72 (diff)
tools/power turbostat: simplify output, add Avg_MHz
Use 8 columns for each number ouput. We don't fit into 80 columns on most machines, so keep the format simple. Print frequency in MHz instead of GHz. We've got 8 columns now, so use them to show low frequency in a more natural unit. Many users didn't understand what %c0 meant, so re-name it to be %Busy. Add Avg_MHz column, which is the frequency that many users expect to see -- the total number of cycles executed over the measurement interval. People found the previous GHz to be confusing, since it was the speed only over the non-idle interval. That measurement has been re-named Bzy_MHz. Suggested-by: Dirk J. Brandewie Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools/power/x86/turbostat/turbostat.8')
-rw-r--r--tools/power/x86/turbostat/turbostat.8127
1 files changed, 48 insertions, 79 deletions
diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8
index b4ddb748356c..56bfb523c5bb 100644
--- a/tools/power/x86/turbostat/turbostat.8
+++ b/tools/power/x86/turbostat/turbostat.8
@@ -47,21 +47,22 @@ displays the statistics gathered since it was forked.
47.PP 47.PP
48.SH FIELD DESCRIPTIONS 48.SH FIELD DESCRIPTIONS
49.nf 49.nf
50\fBpk\fP processor package number. 50\fBPackage\fP processor package number.
51\fBcor\fP processor core number. 51\fBCore\fP processor core number.
52\fBCPU\fP Linux CPU (logical processor) number. 52\fBCPU\fP Linux CPU (logical processor) number.
53Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology. 53Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology.
54\fB%c0\fP percent of the interval that the CPU retired instructions. 54\fBAVG_MHz\fP number of cycles executed divided by time elapsed.
55\fBGHz\fP average clock rate while the CPU was in c0 state. 55\fB%Buzy\fP percent of the interval that the CPU retired instructions, aka. % of time in "C0" state.
56\fBTSC\fP average GHz that the TSC ran during the entire interval. 56\fBBzy_MHz\fP average clock rate while the CPU was busy (in "c0" state).
57\fB%c1, %c3, %c6, %c7\fP show the percentage residency in hardware core idle states. 57\fBTSC_MHz\fP average MHz that the TSC ran during the entire interval.
58\fBCTMP\fP Degrees Celsius reported by the per-core Digital Thermal Sensor. 58\fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states.
59\fBPTMP\fP Degrees Celsius reported by the per-package Package Thermal Monitor. 59\fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor.
60\fB%pc2, %pc3, %pc6, %pc7\fP percentage residency in hardware package idle states. 60\fBPkgTtmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor.
61\fBPkg_W\fP Watts consumed by the whole package. 61\fBPkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7\fP percentage residency in hardware package idle states.
62\fBCor_W\fP Watts consumed by the core part of the package. 62\fBPkgWatt\fP Watts consumed by the whole package.
63\fBGFX_W\fP Watts consumed by the Graphics part of the package -- available only on client processors. 63\fBCorWatt\fP Watts consumed by the core part of the package.
64\fBRAM_W\fP Watts consumed by the DRAM DIMMS -- available only on server processors. 64\fBGFXWatt\fP Watts consumed by the Graphics part of the package -- available only on client processors.
65\fBRAMWatt\fP Watts consumed by the DRAM DIMMS -- available only on server processors.
65\fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package. 66\fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package.
66\fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM. 67\fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM.
67.fi 68.fi
@@ -78,29 +79,17 @@ For Watts columns, the summary is a system total.
78Subsequent rows show per-CPU statistics. 79Subsequent rows show per-CPU statistics.
79 80
80.nf 81.nf
81[root@sandy]# ./turbostat 82[root@ivy]# ./turbostat
82cor CPU %c0 GHz TSC %c1 %c3 %c6 %c7 CTMP PTMP %pc2 %pc3 %pc6 %pc7 Pkg_W Cor_W GFX_W 83 Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
83 0.06 0.80 2.29 0.11 0.00 0.00 99.83 47 40 0.26 0.01 0.44 98.78 3.49 0.12 0.14 84 - - 6 0.36 1596 3492 0 0.59 0.01 99.04 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
84 0 0 0.07 0.80 2.29 0.07 0.00 0.00 99.86 40 40 0.26 0.01 0.44 98.78 3.49 0.12 0.14 85 0 0 9 0.58 1596 3492 0 0.28 0.01 99.13 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
85 0 4 0.03 0.80 2.29 0.12 86 0 4 1 0.07 1596 3492 0 0.79
86 1 1 0.04 0.80 2.29 0.25 0.01 0.00 99.71 40 87 1 1 10 0.65 1596 3492 0 0.59 0.00 98.76 0.00 23
87 1 5 0.16 0.80 2.29 0.13 88 1 5 5 0.28 1596 3492 0 0.95
88 2 2 0.05 0.80 2.29 0.06 0.01 0.00 99.88 40 89 2 2 10 0.66 1596 3492 0 0.41 0.01 98.92 0.00 23
89 2 6 0.03 0.80 2.29 0.08 90 2 6 2 0.10 1597 3492 0 0.97
90 3 3 0.05 0.80 2.29 0.08 0.00 0.00 99.87 47 91 3 3 3 0.20 1596 3492 0 0.44 0.00 99.37 0.00 23
91 3 7 0.04 0.84 2.29 0.09 92 3 7 5 0.31 1596 3492 0 0.33
92.fi
93.SH SUMMARY EXAMPLE
94The "-s" option prints the column headers just once,
95and then the one line system summary for each sample interval.
96
97.nf
98[root@wsm]# turbostat -S
99 %c0 GHz TSC %c1 %c3 %c6 CTMP %pc3 %pc6
100 1.40 2.81 3.38 10.78 43.47 44.35 42 13.67 2.09
101 1.34 2.90 3.38 11.48 58.96 28.23 41 19.89 0.15
102 1.55 2.72 3.38 26.73 37.66 34.07 42 2.53 2.80
103 1.37 2.83 3.38 16.95 60.05 21.63 42 5.76 0.20
104.fi 93.fi
105.SH VERBOSE EXAMPLE 94.SH VERBOSE EXAMPLE
106The "-v" option adds verbosity to the output: 95The "-v" option adds verbosity to the output:
@@ -154,55 +143,35 @@ eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
154until ^C while the other CPUs are mostly idle: 143until ^C while the other CPUs are mostly idle:
155 144
156.nf 145.nf
157[root@x980 lenb]# ./turbostat cat /dev/zero > /dev/null 146root@ivy: turbostat cat /dev/zero > /dev/null
158^C 147^C
159cor CPU %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6 148 Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
160 8.86 3.61 3.38 15.06 31.19 44.89 0.00 0.00 149 - - 496 12.75 3886 3492 0 13.16 0.04 74.04 0.00 36 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
161 0 0 1.46 3.22 3.38 16.84 29.48 52.22 0.00 0.00 150 0 0 22 0.57 3830 3492 0 0.83 0.02 98.59 0.00 27 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
162 0 6 0.21 3.06 3.38 18.09 151 0 4 9 0.24 3829 3492 0 1.15
163 1 2 0.53 3.33 3.38 2.80 46.40 50.27 152 1 1 4 0.09 3783 3492 0 99.91 0.00 0.00 0.00 36
164 1 8 0.89 3.47 3.38 2.44 153 1 5 3880 99.82 3888 3492 0 0.18
165 2 4 1.36 3.43 3.38 9.04 23.71 65.89 154 2 2 17 0.44 3813 3492 0 0.77 0.04 98.75 0.00 28
166 2 10 0.18 2.86 3.38 10.22 155 2 6 12 0.32 3823 3492 0 0.89
167 8 1 0.04 2.87 3.38 99.96 0.01 0.00 156 3 3 16 0.43 3844 3492 0 0.63 0.11 98.84 0.00 30
168 8 7 99.72 3.63 3.38 0.27 157 3 7 4 0.11 3827 3492 0 0.94
169 9 3 0.31 3.21 3.38 7.64 56.55 35.50 15830.372243 sec
170 9 9 0.08 2.95 3.38 7.88 159
171 10 5 1.42 3.43 3.38 2.14 30.99 65.44
172 10 11 0.16 2.88 3.38 3.40
173.fi 160.fi
174Above the cycle soaker drives cpu7 up its 3.6 GHz turbo limit 161Above the cycle soaker drives cpu5 up its 3.8 GHz turbo limit
175while the other processors are generally in various states of idle. 162while the other processors are generally in various states of idle.
176 163
177Note that cpu1 and cpu7 are HT siblings within core8. 164Note that cpu1 and cpu5 are HT siblings within core1.
178As cpu7 is very busy, it prevents its sibling, cpu1, 165As cpu5 is very busy, it prevents its sibling, cpu1,
179from entering a c-state deeper than c1. 166from entering a c-state deeper than c1.
180 167
181Note that turbostat reports average GHz of 3.63, while 168Note that the Avg_MHz column reflects the total number of cycles executed
182the arithmetic average of the GHz column above is lower. 169divided by the measurement interval. If the %Busy column is 100%,
183This is a weighted average, where the weight is %c0. ie. it is the total number of 170then the processor was running at that speed the entire interval.
184un-halted cycles elapsed per time divided by the number of CPUs. 171The Avg_MHz multiplied by the %Busy results in the Bzy_MHz --
185.SH SMI COUNTING EXAMPLE 172which is the average frequency while the processor was executing --
186On Intel Nehalem and newer processors, MSR 0x34 is a System Management Mode Interrupt (SMI) counter. 173not including any non-busy idle time.
187This counter is shown by default under the "SMI" column. 174
188.nf
189[root@x980 ~]# turbostat
190cor CPU %c0 GHz TSC SMI %c1 %c3 %c6 CTMP %pc3 %pc6
191 0.11 1.91 3.38 0 1.84 0.26 97.79 29 0.82 83.87
192 0 0 0.40 1.63 3.38 0 10.27 0.12 89.20 20 0.82 83.88
193 0 6 0.06 1.63 3.38 0 10.61
194 1 2 0.37 2.63 3.38 0 0.02 0.10 99.51 22
195 1 8 0.01 1.62 3.38 0 0.39
196 2 4 0.07 1.62 3.38 0 0.04 0.07 99.82 23
197 2 10 0.02 1.62 3.38 0 0.09
198 8 1 0.23 1.64 3.38 0 0.10 1.07 98.60 24
199 8 7 0.02 1.64 3.38 0 0.31
200 9 3 0.03 1.62 3.38 0 0.03 0.05 99.89 29
201 9 9 0.02 1.62 3.38 0 0.05
202 10 5 0.07 1.62 3.38 0 0.08 0.12 99.73 27
203 10 11 0.03 1.62 3.38 0 0.13
204^C
205.fi
206.SH NOTES 175.SH NOTES
207 176
208.B "turbostat " 177.B "turbostat "