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authorTony Prisk <linux@prisktech.co.nz>2013-05-17 05:30:05 -0400
committerTony Prisk <linux@prisktech.co.nz>2013-06-03 15:31:22 -0400
commite36572b64df358f0bc3a508e8761c81d7f3b8215 (patch)
treeaf553a9714e8e71e26f1d80431e3e5548234814e /tools/perf/scripts/python/syscall-counts.py
parent9e7b6d3eda8551912b0cf9507ca5f489a476d522 (diff)
dts: vt8500: Correct reference clock on WM8850 SoCs
WM8850 SoCs use a 24Mhz reference clock for the PLLs but the SoC file currently parents all PLLs to the 25Mhz reference clock. This patch corrects the PLL parent clock references. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
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