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| author | Tomasz Figa <t.figa@samsung.com> | 2013-10-15 13:41:17 -0400 |
|---|---|---|
| committer | Tomasz Figa <t.figa@samsung.com> | 2013-12-30 12:15:47 -0500 |
| commit | 796d1f4cd62500ee55a645f2649b546710b11bd1 (patch) | |
| tree | 89defc880d949726f721dac203c9bfcb2b989624 /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | 38ee37540f5a9dd946a9eaca3d48d178c72dbe15 (diff) | |
clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domain
This patch adds mout_aclk266_gscl_sub mux clock and adjusts definitions
of GSCL domain gate clocks to use it as their parent, as specified in
SoC documentation.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions