litmus-rt.git - The LITMUS^RT kernel.

The LITMUS^RT kernel.

Bjoern Brandenburg

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author	Ezequiel Garcia <ezequiel.garcia@free-electrons.com>	2013-08-13 10:43:10 -0400
committer	Daniel Lezcano <daniel.lezcano@linaro.org>	2013-09-02 15:40:05 -0400
commit	ad48bd618f3761922c53f08e05fe00f3c85ca275 (patch)
tree	593d78fd4b677b8a7fe3b3fe44e9a81cdb72b501 /tools/perf/scripts/python/sctop.py
parent	887708f0ac7641e7d5131409cedf6774f26f0cb6 (diff)

clocksource: armada-370-xp: Use BIT()

This is a purely cosmetic commit: we replace hardcoded values that representing bits by BIT(), which is slightly more readable. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch>

Diffstat (limited to 'tools/perf/scripts/python/sctop.py')

0 files changed, 0 insertions, 0 deletions

ble_irq()s without enable_irq()s) - flags indicating what we can do with this IRQ (valid, probe, noautounmask) as before - status of the IRQ (probing, enable, etc) - chip - per-IRQ handler - irqaction structure list The handler can be one of the 3 standard handlers - "level", "edge" and "simple", or your own specific handler if you need to do something special. The "level" handler is what we currently have - its pretty simple. "edge" knows about the brokenness of such IRQ implementations - that you need to leave the hardware IRQ enabled while processing it, and queueing further IRQ events should the IRQ happen again while processing. The "simple" handler is very basic, and does not perform any hardware manipulation, nor state tracking. This is useful for things like the SMC9196 and USAR above. So, what's changed? 1. Machine implementations must not write to the irqdesc array. 2. New functions to manipulate the irqdesc array. The first 4 are expected to be useful only to machine specific code. The last is recommended to only be used by machine specific code, but may be used in drivers if absolutely necessary. set_irq_chip(irq,chip) Set the mask/unmask methods for handling this IRQ set_irq_handler(irq,handler) Set the handler for this IRQ (level, edge, simple) set_irq_chained_handler(irq,handler) Set a "chained" handler for this IRQ - automatically enables this IRQ (eg, Neponset and SA1111 handlers). set_irq_flags(irq,flags) Set the valid/probe/noautoenable flags. set_irq_type(irq,type) Set active the IRQ edge(s)/level. This replaces the SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge() function. Type should be one of the following: #define IRQT_NOEDGE (0) #define IRQT_RISING (__IRQT_RISEDGE) #define IRQT_FALLING (__IRQT_FALEDGE) #define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE) #define IRQT_LOW (__IRQT_LOWLVL) #define IRQT_HIGH (__IRQT_HIGHLVL) 3. set_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type. 4. Direct access to SA1111 INTPOL is depreciated. Use set_irq_type instead. 5. A handler is expected to perform any necessary acknowledgement of the parent IRQ via the correct chip specific function. For instance, if the SA1111 is directly connected to a SA1110 GPIO, then you should acknowledge the SA1110 IRQ each time you re-read the SA1111 IRQ status. 6. For any child which doesn't have its own IRQ enable/disable controls (eg, SMC9196), the handler must mask or acknowledge the parent IRQ while the child handler is called, and the child handler should be the "simple" handler (not "edge" nor "level"). After the handler completes, the parent IRQ should be unmasked, and the status of all children must be re-checked for pending events. (see the Neponset IRQ handler for details). 7. fixup_irq() is gone, as is include/asm-arm/arch-*/irq.h Please note that this will not solve all problems - some of them are hardware based. Mixing level-based and edge-based IRQs on the same parent signal (eg neponset) is one such area where a software based solution can't provide the full answer to low IRQ latency.


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