diff options
| author | Jeffrey Deans <jeffrey.deans@imgtec.com> | 2014-07-17 04:20:59 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-08-01 18:06:41 -0400 |
| commit | c55b2851f901215fbfa46e4ea9cc04761c776815 (patch) | |
| tree | a743802f48557f7915c727abf59a451e083732a0 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 1c772b5664d9efa8d8d25b69b4ea8ae8996d6153 (diff) | |
MIPS: GIC: Fix GICBIS macro
The GICBIS macro could update the GIC registers incorrectly, depending
on the data value passed in:
* Bits were only OR'd into the register data, so register fields could
not be cleared.
* Bits were OR'd into the register data without masking the data to the
correct field width, corrupting adjacent bits.
Signed-off-by: Jeffrey Deans <jeffrey.deans@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7378/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions