diff options
author | Takashi Iwai <tiwai@suse.de> | 2009-08-03 02:37:17 -0400 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2009-08-03 02:37:17 -0400 |
commit | e44d4e4cee1ece7b6e6bf4db899b1a7766015306 (patch) | |
tree | 791adda61e8affa6f2cc39485cbc6b5e8d4d41ed /sound | |
parent | 559059b27f1768e89adc204f3ba2cb82882c15ca (diff) | |
parent | 4b35d2ca2307d40ccb6b3b6f9cc25ac9178b2a6c (diff) |
Merge branch 'fix/hda' into topic/hda
Diffstat (limited to 'sound')
-rw-r--r-- | sound/pci/hda/hda_codec.c | 2 | ||||
-rw-r--r-- | sound/pci/hda/hda_codec.h | 2 | ||||
-rw-r--r-- | sound/pci/hda/hda_intel.c | 103 | ||||
-rw-r--r-- | sound/pci/hda/patch_realtek.c | 8 | ||||
-rw-r--r-- | sound/pci/hda/patch_sigmatel.c | 9 |
5 files changed, 88 insertions, 36 deletions
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index a23c27d2fb2f..24401d5d3511 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c | |||
@@ -185,7 +185,7 @@ static int codec_exec_verb(struct hda_codec *codec, unsigned int cmd, | |||
185 | mutex_lock(&bus->cmd_mutex); | 185 | mutex_lock(&bus->cmd_mutex); |
186 | err = bus->ops.command(bus, cmd); | 186 | err = bus->ops.command(bus, cmd); |
187 | if (!err && res) | 187 | if (!err && res) |
188 | *res = bus->ops.get_response(bus); | 188 | *res = bus->ops.get_response(bus, codec->addr); |
189 | mutex_unlock(&bus->cmd_mutex); | 189 | mutex_unlock(&bus->cmd_mutex); |
190 | snd_hda_power_down(codec); | 190 | snd_hda_power_down(codec); |
191 | if (res && *res == -1 && bus->rirb_error) { | 191 | if (res && *res == -1 && bus->rirb_error) { |
diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h index 72c997592eed..99552fb5f756 100644 --- a/sound/pci/hda/hda_codec.h +++ b/sound/pci/hda/hda_codec.h | |||
@@ -568,7 +568,7 @@ struct hda_bus_ops { | |||
568 | /* send a single command */ | 568 | /* send a single command */ |
569 | int (*command)(struct hda_bus *bus, unsigned int cmd); | 569 | int (*command)(struct hda_bus *bus, unsigned int cmd); |
570 | /* get a response from the last command */ | 570 | /* get a response from the last command */ |
571 | unsigned int (*get_response)(struct hda_bus *bus); | 571 | unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr); |
572 | /* free the private data */ | 572 | /* free the private data */ |
573 | void (*private_free)(struct hda_bus *); | 573 | void (*private_free)(struct hda_bus *); |
574 | /* attach a PCM stream */ | 574 | /* attach a PCM stream */ |
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 4db854b43e6b..754de4f82013 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -260,7 +260,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; | |||
260 | 260 | ||
261 | /* STATESTS int mask: S3,SD2,SD1,SD0 */ | 261 | /* STATESTS int mask: S3,SD2,SD1,SD0 */ |
262 | #define AZX_MAX_CODECS 4 | 262 | #define AZX_MAX_CODECS 4 |
263 | #define STATESTS_INT_MASK 0x0f | 263 | #define STATESTS_INT_MASK ((1 << AZX_MAX_CODECS) - 1) |
264 | 264 | ||
265 | /* SD_CTL bits */ | 265 | /* SD_CTL bits */ |
266 | #define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */ | 266 | #define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */ |
@@ -368,8 +368,8 @@ struct azx_rb { | |||
368 | dma_addr_t addr; /* physical address of CORB/RIRB buffer */ | 368 | dma_addr_t addr; /* physical address of CORB/RIRB buffer */ |
369 | /* for RIRB */ | 369 | /* for RIRB */ |
370 | unsigned short rp, wp; /* read/write pointers */ | 370 | unsigned short rp, wp; /* read/write pointers */ |
371 | int cmds; /* number of pending requests */ | 371 | int cmds[AZX_MAX_CODECS]; /* number of pending requests */ |
372 | u32 res; /* last read value */ | 372 | u32 res[AZX_MAX_CODECS]; /* last read value */ |
373 | }; | 373 | }; |
374 | 374 | ||
375 | struct azx { | 375 | struct azx { |
@@ -425,7 +425,7 @@ struct azx { | |||
425 | unsigned int probing :1; /* codec probing phase */ | 425 | unsigned int probing :1; /* codec probing phase */ |
426 | 426 | ||
427 | /* for debugging */ | 427 | /* for debugging */ |
428 | unsigned int last_cmd; /* last issued command (to sync) */ | 428 | unsigned int last_cmd[AZX_MAX_CODECS]; |
429 | 429 | ||
430 | /* for pending irqs */ | 430 | /* for pending irqs */ |
431 | struct work_struct irq_pending_work; | 431 | struct work_struct irq_pending_work; |
@@ -520,6 +520,7 @@ static int azx_alloc_cmd_io(struct azx *chip) | |||
520 | 520 | ||
521 | static void azx_init_cmd_io(struct azx *chip) | 521 | static void azx_init_cmd_io(struct azx *chip) |
522 | { | 522 | { |
523 | spin_lock_irq(&chip->reg_lock); | ||
523 | /* CORB set up */ | 524 | /* CORB set up */ |
524 | chip->corb.addr = chip->rb.addr; | 525 | chip->corb.addr = chip->rb.addr; |
525 | chip->corb.buf = (u32 *)chip->rb.area; | 526 | chip->corb.buf = (u32 *)chip->rb.area; |
@@ -538,7 +539,8 @@ static void azx_init_cmd_io(struct azx *chip) | |||
538 | /* RIRB set up */ | 539 | /* RIRB set up */ |
539 | chip->rirb.addr = chip->rb.addr + 2048; | 540 | chip->rirb.addr = chip->rb.addr + 2048; |
540 | chip->rirb.buf = (u32 *)(chip->rb.area + 2048); | 541 | chip->rirb.buf = (u32 *)(chip->rb.area + 2048); |
541 | chip->rirb.wp = chip->rirb.rp = chip->rirb.cmds = 0; | 542 | chip->rirb.wp = chip->rirb.rp = 0; |
543 | memset(chip->rirb.cmds, 0, sizeof(chip->rirb.cmds)); | ||
542 | azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); | 544 | azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); |
543 | azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr)); | 545 | azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr)); |
544 | 546 | ||
@@ -550,30 +552,60 @@ static void azx_init_cmd_io(struct azx *chip) | |||
550 | azx_writew(chip, RINTCNT, 1); | 552 | azx_writew(chip, RINTCNT, 1); |
551 | /* enable rirb dma and response irq */ | 553 | /* enable rirb dma and response irq */ |
552 | azx_writeb(chip, RIRBCTL, ICH6_RBCTL_DMA_EN | ICH6_RBCTL_IRQ_EN); | 554 | azx_writeb(chip, RIRBCTL, ICH6_RBCTL_DMA_EN | ICH6_RBCTL_IRQ_EN); |
555 | spin_unlock_irq(&chip->reg_lock); | ||
553 | } | 556 | } |
554 | 557 | ||
555 | static void azx_free_cmd_io(struct azx *chip) | 558 | static void azx_free_cmd_io(struct azx *chip) |
556 | { | 559 | { |
560 | spin_lock_irq(&chip->reg_lock); | ||
557 | /* disable ringbuffer DMAs */ | 561 | /* disable ringbuffer DMAs */ |
558 | azx_writeb(chip, RIRBCTL, 0); | 562 | azx_writeb(chip, RIRBCTL, 0); |
559 | azx_writeb(chip, CORBCTL, 0); | 563 | azx_writeb(chip, CORBCTL, 0); |
564 | spin_unlock_irq(&chip->reg_lock); | ||
565 | } | ||
566 | |||
567 | static unsigned int azx_command_addr(u32 cmd) | ||
568 | { | ||
569 | unsigned int addr = cmd >> 28; | ||
570 | |||
571 | if (addr >= AZX_MAX_CODECS) { | ||
572 | snd_BUG(); | ||
573 | addr = 0; | ||
574 | } | ||
575 | |||
576 | return addr; | ||
577 | } | ||
578 | |||
579 | static unsigned int azx_response_addr(u32 res) | ||
580 | { | ||
581 | unsigned int addr = res & 0xf; | ||
582 | |||
583 | if (addr >= AZX_MAX_CODECS) { | ||
584 | snd_BUG(); | ||
585 | addr = 0; | ||
586 | } | ||
587 | |||
588 | return addr; | ||
560 | } | 589 | } |
561 | 590 | ||
562 | /* send a command */ | 591 | /* send a command */ |
563 | static int azx_corb_send_cmd(struct hda_bus *bus, u32 val) | 592 | static int azx_corb_send_cmd(struct hda_bus *bus, u32 val) |
564 | { | 593 | { |
565 | struct azx *chip = bus->private_data; | 594 | struct azx *chip = bus->private_data; |
595 | unsigned int addr = azx_command_addr(val); | ||
566 | unsigned int wp; | 596 | unsigned int wp; |
567 | 597 | ||
598 | spin_lock_irq(&chip->reg_lock); | ||
599 | |||
568 | /* add command to corb */ | 600 | /* add command to corb */ |
569 | wp = azx_readb(chip, CORBWP); | 601 | wp = azx_readb(chip, CORBWP); |
570 | wp++; | 602 | wp++; |
571 | wp %= ICH6_MAX_CORB_ENTRIES; | 603 | wp %= ICH6_MAX_CORB_ENTRIES; |
572 | 604 | ||
573 | spin_lock_irq(&chip->reg_lock); | 605 | chip->rirb.cmds[addr]++; |
574 | chip->rirb.cmds++; | ||
575 | chip->corb.buf[wp] = cpu_to_le32(val); | 606 | chip->corb.buf[wp] = cpu_to_le32(val); |
576 | azx_writel(chip, CORBWP, wp); | 607 | azx_writel(chip, CORBWP, wp); |
608 | |||
577 | spin_unlock_irq(&chip->reg_lock); | 609 | spin_unlock_irq(&chip->reg_lock); |
578 | 610 | ||
579 | return 0; | 611 | return 0; |
@@ -585,13 +617,14 @@ static int azx_corb_send_cmd(struct hda_bus *bus, u32 val) | |||
585 | static void azx_update_rirb(struct azx *chip) | 617 | static void azx_update_rirb(struct azx *chip) |
586 | { | 618 | { |
587 | unsigned int rp, wp; | 619 | unsigned int rp, wp; |
620 | unsigned int addr; | ||
588 | u32 res, res_ex; | 621 | u32 res, res_ex; |
589 | 622 | ||
590 | wp = azx_readb(chip, RIRBWP); | 623 | wp = azx_readb(chip, RIRBWP); |
591 | if (wp == chip->rirb.wp) | 624 | if (wp == chip->rirb.wp) |
592 | return; | 625 | return; |
593 | chip->rirb.wp = wp; | 626 | chip->rirb.wp = wp; |
594 | 627 | ||
595 | while (chip->rirb.rp != wp) { | 628 | while (chip->rirb.rp != wp) { |
596 | chip->rirb.rp++; | 629 | chip->rirb.rp++; |
597 | chip->rirb.rp %= ICH6_MAX_RIRB_ENTRIES; | 630 | chip->rirb.rp %= ICH6_MAX_RIRB_ENTRIES; |
@@ -599,18 +632,24 @@ static void azx_update_rirb(struct azx *chip) | |||
599 | rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ | 632 | rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ |
600 | res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); | 633 | res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); |
601 | res = le32_to_cpu(chip->rirb.buf[rp]); | 634 | res = le32_to_cpu(chip->rirb.buf[rp]); |
635 | addr = azx_response_addr(res_ex); | ||
602 | if (res_ex & ICH6_RIRB_EX_UNSOL_EV) | 636 | if (res_ex & ICH6_RIRB_EX_UNSOL_EV) |
603 | snd_hda_queue_unsol_event(chip->bus, res, res_ex); | 637 | snd_hda_queue_unsol_event(chip->bus, res, res_ex); |
604 | else if (chip->rirb.cmds) { | 638 | else if (chip->rirb.cmds[addr]) { |
605 | chip->rirb.res = res; | 639 | chip->rirb.res[addr] = res; |
606 | smp_wmb(); | 640 | smp_wmb(); |
607 | chip->rirb.cmds--; | 641 | chip->rirb.cmds[addr]--; |
608 | } | 642 | } else |
643 | snd_printk(KERN_ERR SFX "spurious response %#x:%#x, " | ||
644 | "last cmd=%#08x\n", | ||
645 | res, res_ex, | ||
646 | chip->last_cmd[addr]); | ||
609 | } | 647 | } |
610 | } | 648 | } |
611 | 649 | ||
612 | /* receive a response */ | 650 | /* receive a response */ |
613 | static unsigned int azx_rirb_get_response(struct hda_bus *bus) | 651 | static unsigned int azx_rirb_get_response(struct hda_bus *bus, |
652 | unsigned int addr) | ||
614 | { | 653 | { |
615 | struct azx *chip = bus->private_data; | 654 | struct azx *chip = bus->private_data; |
616 | unsigned long timeout; | 655 | unsigned long timeout; |
@@ -623,10 +662,10 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus) | |||
623 | azx_update_rirb(chip); | 662 | azx_update_rirb(chip); |
624 | spin_unlock_irq(&chip->reg_lock); | 663 | spin_unlock_irq(&chip->reg_lock); |
625 | } | 664 | } |
626 | if (!chip->rirb.cmds) { | 665 | if (!chip->rirb.cmds[addr]) { |
627 | smp_rmb(); | 666 | smp_rmb(); |
628 | bus->rirb_error = 0; | 667 | bus->rirb_error = 0; |
629 | return chip->rirb.res; /* the last value */ | 668 | return chip->rirb.res[addr]; /* the last value */ |
630 | } | 669 | } |
631 | if (time_after(jiffies, timeout)) | 670 | if (time_after(jiffies, timeout)) |
632 | break; | 671 | break; |
@@ -640,7 +679,8 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus) | |||
640 | 679 | ||
641 | if (chip->msi) { | 680 | if (chip->msi) { |
642 | snd_printk(KERN_WARNING SFX "No response from codec, " | 681 | snd_printk(KERN_WARNING SFX "No response from codec, " |
643 | "disabling MSI: last cmd=0x%08x\n", chip->last_cmd); | 682 | "disabling MSI: last cmd=0x%08x\n", |
683 | chip->last_cmd[addr]); | ||
644 | free_irq(chip->irq, chip); | 684 | free_irq(chip->irq, chip); |
645 | chip->irq = -1; | 685 | chip->irq = -1; |
646 | pci_disable_msi(chip->pci); | 686 | pci_disable_msi(chip->pci); |
@@ -655,7 +695,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus) | |||
655 | if (!chip->polling_mode) { | 695 | if (!chip->polling_mode) { |
656 | snd_printk(KERN_WARNING SFX "azx_get_response timeout, " | 696 | snd_printk(KERN_WARNING SFX "azx_get_response timeout, " |
657 | "switching to polling mode: last cmd=0x%08x\n", | 697 | "switching to polling mode: last cmd=0x%08x\n", |
658 | chip->last_cmd); | 698 | chip->last_cmd[addr]); |
659 | chip->polling_mode = 1; | 699 | chip->polling_mode = 1; |
660 | goto again; | 700 | goto again; |
661 | } | 701 | } |
@@ -679,7 +719,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus) | |||
679 | 719 | ||
680 | snd_printk(KERN_ERR "hda_intel: azx_get_response timeout, " | 720 | snd_printk(KERN_ERR "hda_intel: azx_get_response timeout, " |
681 | "switching to single_cmd mode: last cmd=0x%08x\n", | 721 | "switching to single_cmd mode: last cmd=0x%08x\n", |
682 | chip->last_cmd); | 722 | chip->last_cmd[addr]); |
683 | chip->single_cmd = 1; | 723 | chip->single_cmd = 1; |
684 | bus->response_reset = 0; | 724 | bus->response_reset = 0; |
685 | /* re-initialize CORB/RIRB */ | 725 | /* re-initialize CORB/RIRB */ |
@@ -699,7 +739,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus) | |||
699 | */ | 739 | */ |
700 | 740 | ||
701 | /* receive a response */ | 741 | /* receive a response */ |
702 | static int azx_single_wait_for_response(struct azx *chip) | 742 | static int azx_single_wait_for_response(struct azx *chip, unsigned int addr) |
703 | { | 743 | { |
704 | int timeout = 50; | 744 | int timeout = 50; |
705 | 745 | ||
@@ -707,7 +747,7 @@ static int azx_single_wait_for_response(struct azx *chip) | |||
707 | /* check IRV busy bit */ | 747 | /* check IRV busy bit */ |
708 | if (azx_readw(chip, IRS) & ICH6_IRS_VALID) { | 748 | if (azx_readw(chip, IRS) & ICH6_IRS_VALID) { |
709 | /* reuse rirb.res as the response return value */ | 749 | /* reuse rirb.res as the response return value */ |
710 | chip->rirb.res = azx_readl(chip, IR); | 750 | chip->rirb.res[addr] = azx_readl(chip, IR); |
711 | return 0; | 751 | return 0; |
712 | } | 752 | } |
713 | udelay(1); | 753 | udelay(1); |
@@ -715,7 +755,7 @@ static int azx_single_wait_for_response(struct azx *chip) | |||
715 | if (printk_ratelimit()) | 755 | if (printk_ratelimit()) |
716 | snd_printd(SFX "get_response timeout: IRS=0x%x\n", | 756 | snd_printd(SFX "get_response timeout: IRS=0x%x\n", |
717 | azx_readw(chip, IRS)); | 757 | azx_readw(chip, IRS)); |
718 | chip->rirb.res = -1; | 758 | chip->rirb.res[addr] = -1; |
719 | return -EIO; | 759 | return -EIO; |
720 | } | 760 | } |
721 | 761 | ||
@@ -723,6 +763,7 @@ static int azx_single_wait_for_response(struct azx *chip) | |||
723 | static int azx_single_send_cmd(struct hda_bus *bus, u32 val) | 763 | static int azx_single_send_cmd(struct hda_bus *bus, u32 val) |
724 | { | 764 | { |
725 | struct azx *chip = bus->private_data; | 765 | struct azx *chip = bus->private_data; |
766 | unsigned int addr = azx_command_addr(val); | ||
726 | int timeout = 50; | 767 | int timeout = 50; |
727 | 768 | ||
728 | bus->rirb_error = 0; | 769 | bus->rirb_error = 0; |
@@ -735,7 +776,7 @@ static int azx_single_send_cmd(struct hda_bus *bus, u32 val) | |||
735 | azx_writel(chip, IC, val); | 776 | azx_writel(chip, IC, val); |
736 | azx_writew(chip, IRS, azx_readw(chip, IRS) | | 777 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
737 | ICH6_IRS_BUSY); | 778 | ICH6_IRS_BUSY); |
738 | return azx_single_wait_for_response(chip); | 779 | return azx_single_wait_for_response(chip, addr); |
739 | } | 780 | } |
740 | udelay(1); | 781 | udelay(1); |
741 | } | 782 | } |
@@ -746,10 +787,11 @@ static int azx_single_send_cmd(struct hda_bus *bus, u32 val) | |||
746 | } | 787 | } |
747 | 788 | ||
748 | /* receive a response */ | 789 | /* receive a response */ |
749 | static unsigned int azx_single_get_response(struct hda_bus *bus) | 790 | static unsigned int azx_single_get_response(struct hda_bus *bus, |
791 | unsigned int addr) | ||
750 | { | 792 | { |
751 | struct azx *chip = bus->private_data; | 793 | struct azx *chip = bus->private_data; |
752 | return chip->rirb.res; | 794 | return chip->rirb.res[addr]; |
753 | } | 795 | } |
754 | 796 | ||
755 | /* | 797 | /* |
@@ -764,7 +806,7 @@ static int azx_send_cmd(struct hda_bus *bus, unsigned int val) | |||
764 | { | 806 | { |
765 | struct azx *chip = bus->private_data; | 807 | struct azx *chip = bus->private_data; |
766 | 808 | ||
767 | chip->last_cmd = val; | 809 | chip->last_cmd[azx_command_addr(val)] = val; |
768 | if (chip->single_cmd) | 810 | if (chip->single_cmd) |
769 | return azx_single_send_cmd(bus, val); | 811 | return azx_single_send_cmd(bus, val); |
770 | else | 812 | else |
@@ -772,13 +814,14 @@ static int azx_send_cmd(struct hda_bus *bus, unsigned int val) | |||
772 | } | 814 | } |
773 | 815 | ||
774 | /* get a response */ | 816 | /* get a response */ |
775 | static unsigned int azx_get_response(struct hda_bus *bus) | 817 | static unsigned int azx_get_response(struct hda_bus *bus, |
818 | unsigned int addr) | ||
776 | { | 819 | { |
777 | struct azx *chip = bus->private_data; | 820 | struct azx *chip = bus->private_data; |
778 | if (chip->single_cmd) | 821 | if (chip->single_cmd) |
779 | return azx_single_get_response(bus); | 822 | return azx_single_get_response(bus, addr); |
780 | else | 823 | else |
781 | return azx_rirb_get_response(bus); | 824 | return azx_rirb_get_response(bus, addr); |
782 | } | 825 | } |
783 | 826 | ||
784 | #ifdef CONFIG_SND_HDA_POWER_SAVE | 827 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
@@ -1250,10 +1293,12 @@ static int probe_codec(struct azx *chip, int addr) | |||
1250 | (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID; | 1293 | (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID; |
1251 | unsigned int res; | 1294 | unsigned int res; |
1252 | 1295 | ||
1296 | mutex_lock(&chip->bus->cmd_mutex); | ||
1253 | chip->probing = 1; | 1297 | chip->probing = 1; |
1254 | azx_send_cmd(chip->bus, cmd); | 1298 | azx_send_cmd(chip->bus, cmd); |
1255 | res = azx_get_response(chip->bus); | 1299 | res = azx_get_response(chip->bus, addr); |
1256 | chip->probing = 0; | 1300 | chip->probing = 0; |
1301 | mutex_unlock(&chip->bus->cmd_mutex); | ||
1257 | if (res == -1) | 1302 | if (res == -1) |
1258 | return -EIO; | 1303 | return -EIO; |
1259 | snd_printdd(SFX "codec #%d probed OK\n", addr); | 1304 | snd_printdd(SFX "codec #%d probed OK\n", addr); |
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 587d94f869be..8e9b6e9f193a 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c | |||
@@ -271,13 +271,13 @@ struct alc_spec { | |||
271 | */ | 271 | */ |
272 | unsigned int num_init_verbs; | 272 | unsigned int num_init_verbs; |
273 | 273 | ||
274 | char stream_name_analog[16]; /* analog PCM stream */ | 274 | char stream_name_analog[32]; /* analog PCM stream */ |
275 | struct hda_pcm_stream *stream_analog_playback; | 275 | struct hda_pcm_stream *stream_analog_playback; |
276 | struct hda_pcm_stream *stream_analog_capture; | 276 | struct hda_pcm_stream *stream_analog_capture; |
277 | struct hda_pcm_stream *stream_analog_alt_playback; | 277 | struct hda_pcm_stream *stream_analog_alt_playback; |
278 | struct hda_pcm_stream *stream_analog_alt_capture; | 278 | struct hda_pcm_stream *stream_analog_alt_capture; |
279 | 279 | ||
280 | char stream_name_digital[16]; /* digital PCM stream */ | 280 | char stream_name_digital[32]; /* digital PCM stream */ |
281 | struct hda_pcm_stream *stream_digital_playback; | 281 | struct hda_pcm_stream *stream_digital_playback; |
282 | struct hda_pcm_stream *stream_digital_capture; | 282 | struct hda_pcm_stream *stream_digital_capture; |
283 | 283 | ||
@@ -557,7 +557,7 @@ static int alc_pin_mode_get(struct snd_kcontrol *kcontrol, | |||
557 | 557 | ||
558 | /* Find enumerated value for current pinctl setting */ | 558 | /* Find enumerated value for current pinctl setting */ |
559 | i = alc_pin_mode_min(dir); | 559 | i = alc_pin_mode_min(dir); |
560 | while (alc_pin_mode_values[i] != pinctl && i <= alc_pin_mode_max(dir)) | 560 | while (i <= alc_pin_mode_max(dir) && alc_pin_mode_values[i] != pinctl) |
561 | i++; | 561 | i++; |
562 | *valp = i <= alc_pin_mode_max(dir) ? i: alc_pin_mode_min(dir); | 562 | *valp = i <= alc_pin_mode_max(dir) ? i: alc_pin_mode_min(dir); |
563 | return 0; | 563 | return 0; |
@@ -15018,7 +15018,7 @@ static struct snd_pci_quirk alc861vd_cfg_tbl[] = { | |||
15018 | SND_PCI_QUIRK(0x10de, 0x03f0, "Realtek ALC660 demo", ALC660VD_3ST), | 15018 | SND_PCI_QUIRK(0x10de, 0x03f0, "Realtek ALC660 demo", ALC660VD_3ST), |
15019 | SND_PCI_QUIRK(0x1179, 0xff00, "Toshiba A135", ALC861VD_LENOVO), | 15019 | SND_PCI_QUIRK(0x1179, 0xff00, "Toshiba A135", ALC861VD_LENOVO), |
15020 | /*SND_PCI_QUIRK(0x1179, 0xff00, "DALLAS", ALC861VD_DALLAS),*/ /*lenovo*/ | 15020 | /*SND_PCI_QUIRK(0x1179, 0xff00, "DALLAS", ALC861VD_DALLAS),*/ /*lenovo*/ |
15021 | SND_PCI_QUIRK(0x1179, 0xff01, "DALLAS", ALC861VD_DALLAS), | 15021 | SND_PCI_QUIRK(0x1179, 0xff01, "Toshiba A135", ALC861VD_LENOVO), |
15022 | SND_PCI_QUIRK(0x1179, 0xff03, "Toshiba P205", ALC861VD_LENOVO), | 15022 | SND_PCI_QUIRK(0x1179, 0xff03, "Toshiba P205", ALC861VD_LENOVO), |
15023 | SND_PCI_QUIRK(0x1179, 0xff31, "Toshiba L30-149", ALC861VD_DALLAS), | 15023 | SND_PCI_QUIRK(0x1179, 0xff31, "Toshiba L30-149", ALC861VD_DALLAS), |
15024 | SND_PCI_QUIRK(0x1565, 0x820d, "Biostar NF61S SE", ALC861VD_6ST_DIG), | 15024 | SND_PCI_QUIRK(0x1565, 0x820d, "Biostar NF61S SE", ALC861VD_6ST_DIG), |
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index e5fbec37ffdd..b3c53f7a668b 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c | |||
@@ -2251,7 +2251,7 @@ static struct snd_pci_quirk stac927x_cfg_tbl[] = { | |||
2251 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), | 2251 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), |
2252 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), | 2252 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), |
2253 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS), | 2253 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS), |
2254 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST), | 2254 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS), |
2255 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), | 2255 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), |
2256 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), | 2256 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), |
2257 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), | 2257 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), |
@@ -5870,6 +5870,13 @@ static int patch_stac927x(struct hda_codec *codec) | |||
5870 | /* GPIO2 High = Enable EAPD */ | 5870 | /* GPIO2 High = Enable EAPD */ |
5871 | spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04; | 5871 | spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04; |
5872 | spec->gpio_data = 0x04; | 5872 | spec->gpio_data = 0x04; |
5873 | switch (codec->subsystem_id) { | ||
5874 | case 0x1028022f: | ||
5875 | /* correct EAPD to be GPIO0 */ | ||
5876 | spec->eapd_mask = spec->gpio_mask = 0x01; | ||
5877 | spec->gpio_dir = spec->gpio_data = 0x01; | ||
5878 | break; | ||
5879 | }; | ||
5873 | spec->dmic_nids = stac927x_dmic_nids; | 5880 | spec->dmic_nids = stac927x_dmic_nids; |
5874 | spec->num_dmics = STAC927X_NUM_DMICS; | 5881 | spec->num_dmics = STAC927X_NUM_DMICS; |
5875 | 5882 | ||