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authorAndreas Mohr <andi@lisas.de>2006-06-26 12:35:02 -0400
committerAdrian Bunk <bunk@stusta.de>2006-06-26 12:35:02 -0400
commitd6e05edc59ecd79e8badf440c0d295a979bdfa3e (patch)
tree50362161f69317242ab603c51a18a818a4c93285 /sound
parentf18190bd3407554ba6df30a1927e07e6cba93e56 (diff)
spelling fixes
acquired (aquired) contiguous (contigious) successful (succesful, succesfull) surprise (suprise) whether (weather) some other misspellings Signed-off-by: Andreas Mohr <andi@lisas.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'sound')
-rw-r--r--sound/core/seq/seq_memory.h2
-rw-r--r--sound/oss/sb_ess.c28
-rw-r--r--sound/pci/cs5535audio/cs5535audio_pcm.c2
3 files changed, 16 insertions, 16 deletions
diff --git a/sound/core/seq/seq_memory.h b/sound/core/seq/seq_memory.h
index 39c60d9e1efc..63e91431a29f 100644
--- a/sound/core/seq/seq_memory.h
+++ b/sound/core/seq/seq_memory.h
@@ -31,7 +31,7 @@ struct snd_seq_event_cell {
31 struct snd_seq_event_cell *next; /* next cell */ 31 struct snd_seq_event_cell *next; /* next cell */
32}; 32};
33 33
34/* design note: the pool is a contigious block of memory, if we dynamicly 34/* design note: the pool is a contiguous block of memory, if we dynamicly
35 want to add additional cells to the pool be better store this in another 35 want to add additional cells to the pool be better store this in another
36 pool as we need to know the base address of the pool when releasing 36 pool as we need to know the base address of the pool when releasing
37 memory. */ 37 memory. */
diff --git a/sound/oss/sb_ess.c b/sound/oss/sb_ess.c
index fae05fe3de43..180e95c87e3e 100644
--- a/sound/oss/sb_ess.c
+++ b/sound/oss/sb_ess.c
@@ -97,19 +97,19 @@
97 * 97 *
98 * The documentation is an adventure: it's close but not fully accurate. I 98 * The documentation is an adventure: it's close but not fully accurate. I
99 * found out that after a reset some registers are *NOT* reset, though the 99 * found out that after a reset some registers are *NOT* reset, though the
100 * docs say the would be. Interresting ones are 0x7f, 0x7d and 0x7a. They are 100 * docs say the would be. Interesting ones are 0x7f, 0x7d and 0x7a. They are
101 * related to the Audio 2 channel. I also was suprised about the consequenses 101 * related to the Audio 2 channel. I also was surprised about the consequences
102 * of writing 0x00 to 0x7f (which should be done by reset): The ES1887 moves 102 * of writing 0x00 to 0x7f (which should be done by reset): The ES1887 moves
103 * into ES1888 mode. This means that it claims IRQ 11, which happens to be my 103 * into ES1888 mode. This means that it claims IRQ 11, which happens to be my
104 * ISDN adapter. Needless to say it no longer worked. I now understand why 104 * ISDN adapter. Needless to say it no longer worked. I now understand why
105 * after rebooting 0x7f already was 0x05, the value of my choice: the BIOS 105 * after rebooting 0x7f already was 0x05, the value of my choice: the BIOS
106 * did it. 106 * did it.
107 * 107 *
108 * Oh, and this is another trap: in ES1887 docs mixer register 0x70 is decribed 108 * Oh, and this is another trap: in ES1887 docs mixer register 0x70 is
109 * as if it's exactly the same as register 0xa1. This is *NOT* true. The 109 * described as if it's exactly the same as register 0xa1. This is *NOT* true.
110 * description of 0x70 in ES1869 docs is accurate however. 110 * The description of 0x70 in ES1869 docs is accurate however.
111 * Well, the assumption about ES1869 was wrong: register 0x70 is very much 111 * Well, the assumption about ES1869 was wrong: register 0x70 is very much
112 * like register 0xa1, except that bit 7 is allways 1, whatever you want 112 * like register 0xa1, except that bit 7 is always 1, whatever you want
113 * it to be. 113 * it to be.
114 * 114 *
115 * When using audio 2 mixer register 0x72 seems te be meaningless. Only 0xa2 115 * When using audio 2 mixer register 0x72 seems te be meaningless. Only 0xa2
@@ -117,10 +117,10 @@
117 * 117 *
118 * Software reset not being able to reset all registers is great! Especially 118 * Software reset not being able to reset all registers is great! Especially
119 * the fact that register 0x78 isn't reset is great when you wanna change back 119 * the fact that register 0x78 isn't reset is great when you wanna change back
120 * to single dma operation (simplex): audio 2 is still operation, and uses the 120 * to single dma operation (simplex): audio 2 is still operational, and uses
121 * same dma as audio 1: your ess changes into a funny echo machine. 121 * the same dma as audio 1: your ess changes into a funny echo machine.
122 * 122 *
123 * Received the new that ES1688 is detected as a ES1788. Did some thinking: 123 * Received the news that ES1688 is detected as a ES1788. Did some thinking:
124 * the ES1887 detection scheme suggests in step 2 to try if bit 3 of register 124 * the ES1887 detection scheme suggests in step 2 to try if bit 3 of register
125 * 0x64 can be changed. This is inaccurate, first I inverted the * check: "If 125 * 0x64 can be changed. This is inaccurate, first I inverted the * check: "If
126 * can be modified, it's a 1688", which lead to a correct detection 126 * can be modified, it's a 1688", which lead to a correct detection
@@ -135,7 +135,7 @@
135 * About recognition of ESS chips 135 * About recognition of ESS chips
136 * 136 *
137 * The distinction of ES688, ES1688, ES1788, ES1887 and ES1888 is described in 137 * The distinction of ES688, ES1688, ES1788, ES1887 and ES1888 is described in
138 * a (preliminary ??) datasheet on ES1887. It's aim is to identify ES1887, but 138 * a (preliminary ??) datasheet on ES1887. Its aim is to identify ES1887, but
139 * during detection the text claims that "this chip may be ..." when a step 139 * during detection the text claims that "this chip may be ..." when a step
140 * fails. This scheme is used to distinct between the above chips. 140 * fails. This scheme is used to distinct between the above chips.
141 * It appears however that some PnP chips like ES1868 are recognized as ES1788 141 * It appears however that some PnP chips like ES1868 are recognized as ES1788
@@ -156,9 +156,9 @@
156 * 156 *
157 * The existing ES1688 support didn't take care of the ES1688+ recording 157 * The existing ES1688 support didn't take care of the ES1688+ recording
158 * levels very well. Whenever a device was selected (recmask) for recording 158 * levels very well. Whenever a device was selected (recmask) for recording
159 * it's recording level was loud, and it couldn't be changed. The fact that 159 * its recording level was loud, and it couldn't be changed. The fact that
160 * internal register 0xb4 could take care of RECLEV, didn't work meaning until 160 * internal register 0xb4 could take care of RECLEV, didn't work meaning until
161 * it's value was restored every time the chip was reset; this reset the 161 * its value was restored every time the chip was reset; this reset the
162 * value of 0xb4 too. I guess that's what 4front also had (have?) trouble with. 162 * value of 0xb4 too. I guess that's what 4front also had (have?) trouble with.
163 * 163 *
164 * About ES1887 support: 164 * About ES1887 support:
@@ -169,9 +169,9 @@
169 * the latter case the recording volumes are 0. 169 * the latter case the recording volumes are 0.
170 * Now recording levels of inputs can be controlled, by changing the playback 170 * Now recording levels of inputs can be controlled, by changing the playback
171 * levels. Futhermore several devices can be recorded together (which is not 171 * levels. Futhermore several devices can be recorded together (which is not
172 * possible with the ES1688. 172 * possible with the ES1688).
173 * Besides the separate recording level control for each input, the common 173 * Besides the separate recording level control for each input, the common
174 * recordig level can also be controlled by RECLEV as described above. 174 * recording level can also be controlled by RECLEV as described above.
175 * 175 *
176 * Not only ES1887 have this recording mixer. I know the following from the 176 * Not only ES1887 have this recording mixer. I know the following from the
177 * documentation: 177 * documentation:
diff --git a/sound/pci/cs5535audio/cs5535audio_pcm.c b/sound/pci/cs5535audio/cs5535audio_pcm.c
index f0a48693d687..5450a9e8f133 100644
--- a/sound/pci/cs5535audio/cs5535audio_pcm.c
+++ b/sound/pci/cs5535audio/cs5535audio_pcm.c
@@ -143,7 +143,7 @@ static int cs5535audio_build_dma_packets(struct cs5535audio *cs5535au,
143 if (dma->periods == periods && dma->period_bytes == period_bytes) 143 if (dma->periods == periods && dma->period_bytes == period_bytes)
144 return 0; 144 return 0;
145 145
146 /* the u32 cast is okay because in snd*create we succesfully told 146 /* the u32 cast is okay because in snd*create we successfully told
147 pci alloc that we're only 32 bit capable so the uppper will be 0 */ 147 pci alloc that we're only 32 bit capable so the uppper will be 0 */
148 addr = (u32) substream->runtime->dma_addr; 148 addr = (u32) substream->runtime->dma_addr;
149 desc_addr = (u32) dma->desc_buf.addr; 149 desc_addr = (u32) dma->desc_buf.addr;