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authorJarkko Nikula <jhnikula@gmail.com>2009-08-28 08:35:35 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2009-08-28 13:36:43 -0400
commitd2c0bdaa9362c4b2ab7416420d034a0a2d1ec979 (patch)
tree3ae18b92e3b59f0313f8a7492567a18fbf0f8d46 /sound
parentf4890b5c04b6301ef9c3c44ecbfe9955efdbaa17 (diff)
ASoC: OMAP: Add functionality to set CLKR and FSR sources in McBSP DAI
The McBSP1 port in OMAP3 processors (I believe OMAP2 too but I don't have specifications to check it) have additional CLKR and FSR pins for McBSP1 receiver. Reset default is that receiver is using bit clock and frame sync signal from those pins but it is possible to configure to use also CLKX and FSX pins as well. In fact, other McBSP ports are doing that internally that transmitter and receiver share the CLKX and FSX. Add functionaly that machine drivers can set the CLKR and FSR sources by using the snd_soc_dai_set_sysclk. Thanks to "Aggarwal, Anuj" <anuj.aggarwal@ti.com> for reporting the issue. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/omap/omap-mcbsp.c41
-rw-r--r--sound/soc/omap/omap-mcbsp.h4
2 files changed, 45 insertions, 0 deletions
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index 0e173e7e0c3a..3341f49402ca 100644
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -512,6 +512,40 @@ static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data,
512 return 0; 512 return 0;
513} 513}
514 514
515static int omap_mcbsp_dai_set_rcvr_src(struct omap_mcbsp_data *mcbsp_data,
516 int clk_id)
517{
518 int sel_bit, set = 0;
519 u16 reg = OMAP2_CONTROL_DEVCONF0;
520
521 if (cpu_class_is_omap1())
522 return -EINVAL; /* TODO: Can this be implemented for OMAP1? */
523 if (mcbsp_data->bus_id != 0)
524 return -EINVAL;
525
526 switch (clk_id) {
527 case OMAP_MCBSP_CLKR_SRC_CLKX:
528 set = 1;
529 case OMAP_MCBSP_CLKR_SRC_CLKR:
530 sel_bit = 3;
531 break;
532 case OMAP_MCBSP_FSR_SRC_FSX:
533 set = 1;
534 case OMAP_MCBSP_FSR_SRC_FSR:
535 sel_bit = 4;
536 break;
537 default:
538 return -EINVAL;
539 }
540
541 if (set)
542 omap_ctrl_writel(omap_ctrl_readl(reg) | (1 << sel_bit), reg);
543 else
544 omap_ctrl_writel(omap_ctrl_readl(reg) & ~(1 << sel_bit), reg);
545
546 return 0;
547}
548
515static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, 549static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
516 int clk_id, unsigned int freq, 550 int clk_id, unsigned int freq,
517 int dir) 551 int dir)
@@ -534,6 +568,13 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
534 case OMAP_MCBSP_SYSCLK_CLKR_EXT: 568 case OMAP_MCBSP_SYSCLK_CLKR_EXT:
535 regs->pcr0 |= SCLKME; 569 regs->pcr0 |= SCLKME;
536 break; 570 break;
571
572 case OMAP_MCBSP_CLKR_SRC_CLKR:
573 case OMAP_MCBSP_CLKR_SRC_CLKX:
574 case OMAP_MCBSP_FSR_SRC_FSR:
575 case OMAP_MCBSP_FSR_SRC_FSX:
576 err = omap_mcbsp_dai_set_rcvr_src(mcbsp_data, clk_id);
577 break;
537 default: 578 default:
538 err = -ENODEV; 579 err = -ENODEV;
539 } 580 }
diff --git a/sound/soc/omap/omap-mcbsp.h b/sound/soc/omap/omap-mcbsp.h
index c8147aace813..647d2f981ab0 100644
--- a/sound/soc/omap/omap-mcbsp.h
+++ b/sound/soc/omap/omap-mcbsp.h
@@ -32,6 +32,10 @@ enum omap_mcbsp_clksrg_clk {
32 OMAP_MCBSP_SYSCLK_CLK, /* Internal ICLK */ 32 OMAP_MCBSP_SYSCLK_CLK, /* Internal ICLK */
33 OMAP_MCBSP_SYSCLK_CLKX_EXT, /* External CLKX pin */ 33 OMAP_MCBSP_SYSCLK_CLKX_EXT, /* External CLKX pin */
34 OMAP_MCBSP_SYSCLK_CLKR_EXT, /* External CLKR pin */ 34 OMAP_MCBSP_SYSCLK_CLKR_EXT, /* External CLKR pin */
35 OMAP_MCBSP_CLKR_SRC_CLKR, /* CLKR from CLKR pin */
36 OMAP_MCBSP_CLKR_SRC_CLKX, /* CLKR from CLKX pin */
37 OMAP_MCBSP_FSR_SRC_FSR, /* FSR from FSR pin */
38 OMAP_MCBSP_FSR_SRC_FSX, /* FSR from FSX pin */
35}; 39};
36 40
37/* McBSP dividers */ 41/* McBSP dividers */