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authorDylan Reid <dgreid@chromium.org>2014-03-18 01:08:49 -0400
committerMark Brown <broonie@linaro.org>2014-03-19 19:09:45 -0400
commit591d14f00796a4250d800d316e3db1fea8a57e20 (patch)
treed4dd85a397ed441ae610a50aef5ae7223955b56d /sound
parent38dbfb59d1175ef458d006556061adeaa8751b72 (diff)
ASoC: tegra: Use flat regcache
When using an rbtree cache, there can be allocations the first time a register is accessed. This can cause an attempt to schedule while atomic in the case that the regmap is using a spinlock. This could be fixed by either initializing all the registers or using a flat cache. The register maps for tegra30_ahub and tegra30_i2s are dense and don't save much from using a tree so convert them to flat. Tegra30 changes tested on Norrin, Tegra20 changes compile. Signed-off-by: Dylan Reid <dgreid@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/tegra/tegra20_ac97.c2
-rw-r--r--sound/soc/tegra/tegra20_das.c2
-rw-r--r--sound/soc/tegra/tegra20_i2s.c2
-rw-r--r--sound/soc/tegra/tegra20_spdif.c2
-rw-r--r--sound/soc/tegra/tegra30_ahub.c4
-rw-r--r--sound/soc/tegra/tegra30_i2s.c2
6 files changed, 7 insertions, 7 deletions
diff --git a/sound/soc/tegra/tegra20_ac97.c b/sound/soc/tegra/tegra20_ac97.c
index cf5e1cfe818d..0a59e2383ef3 100644
--- a/sound/soc/tegra/tegra20_ac97.c
+++ b/sound/soc/tegra/tegra20_ac97.c
@@ -306,7 +306,7 @@ static const struct regmap_config tegra20_ac97_regmap_config = {
306 .readable_reg = tegra20_ac97_wr_rd_reg, 306 .readable_reg = tegra20_ac97_wr_rd_reg,
307 .volatile_reg = tegra20_ac97_volatile_reg, 307 .volatile_reg = tegra20_ac97_volatile_reg,
308 .precious_reg = tegra20_ac97_precious_reg, 308 .precious_reg = tegra20_ac97_precious_reg,
309 .cache_type = REGCACHE_RBTREE, 309 .cache_type = REGCACHE_FLAT,
310}; 310};
311 311
312static int tegra20_ac97_platform_probe(struct platform_device *pdev) 312static int tegra20_ac97_platform_probe(struct platform_device *pdev)
diff --git a/sound/soc/tegra/tegra20_das.c b/sound/soc/tegra/tegra20_das.c
index e72392927bd2..a634f13b3ffc 100644
--- a/sound/soc/tegra/tegra20_das.c
+++ b/sound/soc/tegra/tegra20_das.c
@@ -128,7 +128,7 @@ static const struct regmap_config tegra20_das_regmap_config = {
128 .max_register = LAST_REG(DAC_INPUT_DATA_CLK_SEL), 128 .max_register = LAST_REG(DAC_INPUT_DATA_CLK_SEL),
129 .writeable_reg = tegra20_das_wr_rd_reg, 129 .writeable_reg = tegra20_das_wr_rd_reg,
130 .readable_reg = tegra20_das_wr_rd_reg, 130 .readable_reg = tegra20_das_wr_rd_reg,
131 .cache_type = REGCACHE_RBTREE, 131 .cache_type = REGCACHE_FLAT,
132}; 132};
133 133
134static int tegra20_das_probe(struct platform_device *pdev) 134static int tegra20_das_probe(struct platform_device *pdev)
diff --git a/sound/soc/tegra/tegra20_i2s.c b/sound/soc/tegra/tegra20_i2s.c
index 42c1f6bfaf2e..79a9932ffe6e 100644
--- a/sound/soc/tegra/tegra20_i2s.c
+++ b/sound/soc/tegra/tegra20_i2s.c
@@ -333,7 +333,7 @@ static const struct regmap_config tegra20_i2s_regmap_config = {
333 .readable_reg = tegra20_i2s_wr_rd_reg, 333 .readable_reg = tegra20_i2s_wr_rd_reg,
334 .volatile_reg = tegra20_i2s_volatile_reg, 334 .volatile_reg = tegra20_i2s_volatile_reg,
335 .precious_reg = tegra20_i2s_precious_reg, 335 .precious_reg = tegra20_i2s_precious_reg,
336 .cache_type = REGCACHE_RBTREE, 336 .cache_type = REGCACHE_FLAT,
337}; 337};
338 338
339static int tegra20_i2s_platform_probe(struct platform_device *pdev) 339static int tegra20_i2s_platform_probe(struct platform_device *pdev)
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c
index 8c7c1028e579..a0ce92400faf 100644
--- a/sound/soc/tegra/tegra20_spdif.c
+++ b/sound/soc/tegra/tegra20_spdif.c
@@ -259,7 +259,7 @@ static const struct regmap_config tegra20_spdif_regmap_config = {
259 .readable_reg = tegra20_spdif_wr_rd_reg, 259 .readable_reg = tegra20_spdif_wr_rd_reg,
260 .volatile_reg = tegra20_spdif_volatile_reg, 260 .volatile_reg = tegra20_spdif_volatile_reg,
261 .precious_reg = tegra20_spdif_precious_reg, 261 .precious_reg = tegra20_spdif_precious_reg,
262 .cache_type = REGCACHE_RBTREE, 262 .cache_type = REGCACHE_FLAT,
263}; 263};
264 264
265static int tegra20_spdif_platform_probe(struct platform_device *pdev) 265static int tegra20_spdif_platform_probe(struct platform_device *pdev)
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
index d6f4c9940e0c..0db68f49f4d9 100644
--- a/sound/soc/tegra/tegra30_ahub.c
+++ b/sound/soc/tegra/tegra30_ahub.c
@@ -471,7 +471,7 @@ static const struct regmap_config tegra30_ahub_apbif_regmap_config = {
471 .readable_reg = tegra30_ahub_apbif_wr_rd_reg, 471 .readable_reg = tegra30_ahub_apbif_wr_rd_reg,
472 .volatile_reg = tegra30_ahub_apbif_volatile_reg, 472 .volatile_reg = tegra30_ahub_apbif_volatile_reg,
473 .precious_reg = tegra30_ahub_apbif_precious_reg, 473 .precious_reg = tegra30_ahub_apbif_precious_reg,
474 .cache_type = REGCACHE_RBTREE, 474 .cache_type = REGCACHE_FLAT,
475}; 475};
476 476
477static bool tegra30_ahub_ahub_wr_rd_reg(struct device *dev, unsigned int reg) 477static bool tegra30_ahub_ahub_wr_rd_reg(struct device *dev, unsigned int reg)
@@ -490,7 +490,7 @@ static const struct regmap_config tegra30_ahub_ahub_regmap_config = {
490 .max_register = LAST_REG(AUDIO_RX), 490 .max_register = LAST_REG(AUDIO_RX),
491 .writeable_reg = tegra30_ahub_ahub_wr_rd_reg, 491 .writeable_reg = tegra30_ahub_ahub_wr_rd_reg,
492 .readable_reg = tegra30_ahub_ahub_wr_rd_reg, 492 .readable_reg = tegra30_ahub_ahub_wr_rd_reg,
493 .cache_type = REGCACHE_RBTREE, 493 .cache_type = REGCACHE_FLAT,
494}; 494};
495 495
496static struct tegra30_ahub_soc_data soc_data_tegra30 = { 496static struct tegra30_ahub_soc_data soc_data_tegra30 = {
diff --git a/sound/soc/tegra/tegra30_i2s.c b/sound/soc/tegra/tegra30_i2s.c
index 49ad9366add8..f146c41dd3ec 100644
--- a/sound/soc/tegra/tegra30_i2s.c
+++ b/sound/soc/tegra/tegra30_i2s.c
@@ -357,7 +357,7 @@ static const struct regmap_config tegra30_i2s_regmap_config = {
357 .writeable_reg = tegra30_i2s_wr_rd_reg, 357 .writeable_reg = tegra30_i2s_wr_rd_reg,
358 .readable_reg = tegra30_i2s_wr_rd_reg, 358 .readable_reg = tegra30_i2s_wr_rd_reg,
359 .volatile_reg = tegra30_i2s_volatile_reg, 359 .volatile_reg = tegra30_i2s_volatile_reg,
360 .cache_type = REGCACHE_RBTREE, 360 .cache_type = REGCACHE_FLAT,
361}; 361};
362 362
363static const struct tegra30_i2s_soc_data tegra30_i2s_config = { 363static const struct tegra30_i2s_soc_data tegra30_i2s_config = {