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authorKrzysztof Helt <krzysztof.h1@wp.pl>2006-08-17 10:58:45 -0400
committerJaroslav Kysela <perex@suse.cz>2006-09-23 04:41:23 -0400
commit5fc3a2b250716b34ca7c0128475bbedf795f1ac2 (patch)
tree399590c917ec6cccfb19666bd78ff16b86caeb3e /sound/sparc/dbri.c
parent7cf0a95310f21f3c986288a483801b1d5694dee1 (diff)
[ALSA] sparc dbri: removal of unused struct members
It removes unused or rarely used members of defined structures. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'sound/sparc/dbri.c')
-rw-r--r--sound/sparc/dbri.c35
1 files changed, 6 insertions, 29 deletions
diff --git a/sound/sparc/dbri.c b/sound/sparc/dbri.c
index 4651ff513513..66b4d45cf8bf 100644
--- a/sound/sparc/dbri.c
+++ b/sound/sparc/dbri.c
@@ -34,7 +34,7 @@
34 * (the second one is a monitor/tee pipe, valid only for serial input). 34 * (the second one is a monitor/tee pipe, valid only for serial input).
35 * 35 *
36 * The mmcodec is connected via the CHI bus and needs the data & some 36 * The mmcodec is connected via the CHI bus and needs the data & some
37 * parameters (volume, balance, output selection) timemultiplexed in 8 byte 37 * parameters (volume, output selection) timemultiplexed in 8 byte
38 * chunks. It also has a control mode, which serves for audio format setting. 38 * chunks. It also has a control mode, which serves for audio format setting.
39 * 39 *
40 * Looking at the CS4215 data sheet it is easy to set up 2 or 4 codecs on 40 * Looking at the CS4215 data sheet it is easy to set up 2 or 4 codecs on
@@ -274,9 +274,7 @@ enum in_or_out { PIPEinput, PIPEoutput };
274 274
275struct dbri_pipe { 275struct dbri_pipe {
276 u32 sdp; /* SDP command word */ 276 u32 sdp; /* SDP command word */
277 enum in_or_out direction;
278 int nextpipe; /* Next pipe in linked list */ 277 int nextpipe; /* Next pipe in linked list */
279 int prevpipe;
280 int cycle; /* Offset of timeslot (bits) */ 278 int cycle; /* Offset of timeslot (bits) */
281 int length; /* Length of timeslot (bits) */ 279 int length; /* Length of timeslot (bits) */
282 int first_desc; /* Index of first descriptor */ 280 int first_desc; /* Index of first descriptor */
@@ -300,13 +298,11 @@ struct dbri_streaminfo {
300 int pipe; /* Data pipe used */ 298 int pipe; /* Data pipe used */
301 int left_gain; /* mixer elements */ 299 int left_gain; /* mixer elements */
302 int right_gain; 300 int right_gain;
303 int balance;
304}; 301};
305 302
306/* This structure holds the information for both chips (DBRI & CS4215) */ 303/* This structure holds the information for both chips (DBRI & CS4215) */
307struct snd_dbri { 304struct snd_dbri {
308 struct snd_card *card; /* ALSA card */ 305 struct snd_card *card; /* ALSA card */
309 struct snd_pcm *pcm;
310 306
311 int regs_size, irq; /* Needed for unload */ 307 int regs_size, irq; /* Needed for unload */
312 struct sbus_dev *sdev; /* SBUS device info */ 308 struct sbus_dev *sdev; /* SBUS device info */
@@ -316,7 +312,6 @@ struct snd_dbri {
316 u32 dma_dvma; /* DBRI visible DMA address */ 312 u32 dma_dvma; /* DBRI visible DMA address */
317 313
318 void __iomem *regs; /* dbri HW regs */ 314 void __iomem *regs; /* dbri HW regs */
319 int dbri_version; /* 'e' and up is OK */
320 int dbri_irqp; /* intr queue pointer */ 315 int dbri_irqp; /* intr queue pointer */
321 int wait_send; /* sequence of command buffers send */ 316 int wait_send; /* sequence of command buffers send */
322 int wait_ackd; /* sequence of command buffers acknowledged */ 317 int wait_ackd; /* sequence of command buffers acknowledged */
@@ -337,8 +332,6 @@ struct snd_dbri {
337 332
338#define DBRI_MAX_VOLUME 63 /* Output volume */ 333#define DBRI_MAX_VOLUME 63 /* Output volume */
339#define DBRI_MAX_GAIN 15 /* Input gain */ 334#define DBRI_MAX_GAIN 15 /* Input gain */
340#define DBRI_RIGHT_BALANCE 255
341#define DBRI_MID_BALANCE (DBRI_RIGHT_BALANCE >> 1)
342 335
343/* DBRI Reg0 - Status Control Register - defines. (Page 17) */ 336/* DBRI Reg0 - Status Control Register - defines. (Page 17) */
344#define D_P (1<<15) /* Program command & queue pointer valid */ 337#define D_P (1<<15) /* Program command & queue pointer valid */
@@ -841,10 +834,6 @@ static void setup_pipe(struct snd_dbri * dbri, int pipe, int sdp)
841 dbri->pipes[pipe].sdp = sdp; 834 dbri->pipes[pipe].sdp = sdp;
842 dbri->pipes[pipe].desc = -1; 835 dbri->pipes[pipe].desc = -1;
843 dbri->pipes[pipe].first_desc = -1; 836 dbri->pipes[pipe].first_desc = -1;
844 if (sdp & D_SDP_TO_SER)
845 dbri->pipes[pipe].direction = PIPEoutput;
846 else
847 dbri->pipes[pipe].direction = PIPEinput;
848 837
849 reset_pipe(dbri, pipe); 838 reset_pipe(dbri, pipe);
850} 839}
@@ -1363,14 +1352,6 @@ static void cs4215_setdata(struct snd_dbri * dbri, int muted)
1363 int left_gain = info->left_gain % 64; 1352 int left_gain = info->left_gain % 64;
1364 int right_gain = info->right_gain % 64; 1353 int right_gain = info->right_gain % 64;
1365 1354
1366 if (info->balance < DBRI_MID_BALANCE) {
1367 right_gain *= info->balance;
1368 right_gain /= DBRI_MID_BALANCE;
1369 } else {
1370 left_gain *= DBRI_RIGHT_BALANCE - info->balance;
1371 left_gain /= DBRI_MID_BALANCE;
1372 }
1373
1374 dbri->mm.data[0] &= ~0x3f; /* Reset the volume bits */ 1355 dbri->mm.data[0] &= ~0x3f; /* Reset the volume bits */
1375 dbri->mm.data[1] &= ~0x3f; 1356 dbri->mm.data[1] &= ~0x3f;
1376 dbri->mm.data[0] |= (DBRI_MAX_VOLUME - left_gain); 1357 dbri->mm.data[0] |= (DBRI_MAX_VOLUME - left_gain);
@@ -2233,7 +2214,6 @@ static int __devinit snd_dbri_pcm(struct snd_dbri * dbri)
2233 pcm->private_data = dbri; 2214 pcm->private_data = dbri;
2234 pcm->info_flags = 0; 2215 pcm->info_flags = 0;
2235 strcpy(pcm->name, dbri->card->shortname); 2216 strcpy(pcm->name, dbri->card->shortname);
2236 dbri->pcm = pcm;
2237 2217
2238 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, 2218 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm,
2239 SNDRV_DMA_TYPE_CONTINUOUS, 2219 SNDRV_DMA_TYPE_CONTINUOUS,
@@ -2452,7 +2432,6 @@ static int __init snd_dbri_mixer(struct snd_dbri * dbri)
2452 for (idx = DBRI_REC; idx < DBRI_NO_STREAMS; idx++) { 2432 for (idx = DBRI_REC; idx < DBRI_NO_STREAMS; idx++) {
2453 dbri->stream_info[idx].left_gain = 0; 2433 dbri->stream_info[idx].left_gain = 0;
2454 dbri->stream_info[idx].right_gain = 0; 2434 dbri->stream_info[idx].right_gain = 0;
2455 dbri->stream_info[idx].balance = DBRI_MID_BALANCE;
2456 } 2435 }
2457 2436
2458 return 0; 2437 return 0;
@@ -2484,12 +2463,11 @@ static void dbri_debug_read(struct snd_info_entry * entry,
2484 struct dbri_pipe *pptr = &dbri->pipes[pipe]; 2463 struct dbri_pipe *pptr = &dbri->pipes[pipe];
2485 snd_iprintf(buffer, 2464 snd_iprintf(buffer,
2486 "Pipe %d: %s SDP=0x%x desc=%d, " 2465 "Pipe %d: %s SDP=0x%x desc=%d, "
2487 "len=%d @ %d prev: %d next %d\n", 2466 "len=%d @ %d next %d\n",
2488 pipe, 2467 pipe,
2489 (pptr->direction == 2468 ((pptr->sdp & D_SDP_TO_SER) ? "output" : "input"),
2490 PIPEinput ? "input" : "output"), pptr->sdp, 2469 pptr->sdp, pptr->desc,
2491 pptr->desc, pptr->length, pptr->cycle, 2470 pptr->length, pptr->cycle, pptr->nextpipe);
2492 pptr->prevpipe, pptr->nextpipe);
2493 } 2471 }
2494 } 2472 }
2495} 2473}
@@ -2528,7 +2506,6 @@ static int __init snd_dbri_create(struct snd_card *card,
2528 dbri->card = card; 2506 dbri->card = card;
2529 dbri->sdev = sdev; 2507 dbri->sdev = sdev;
2530 dbri->irq = irq->pri; 2508 dbri->irq = irq->pri;
2531 dbri->dbri_version = sdev->prom_name[9];
2532 2509
2533 dbri->dma = sbus_alloc_consistent(sdev, sizeof(struct dbri_dma), 2510 dbri->dma = sbus_alloc_consistent(sdev, sizeof(struct dbri_dma),
2534 &dbri->dma_dvma); 2511 &dbri->dma_dvma);
@@ -2648,7 +2625,7 @@ static int __init dbri_attach(int prom_node, struct sbus_dev *sdev)
2648 2625
2649 printk(KERN_INFO "audio%d at %p (irq %d) is DBRI(%c)+CS4215(%d)\n", 2626 printk(KERN_INFO "audio%d at %p (irq %d) is DBRI(%c)+CS4215(%d)\n",
2650 dev, dbri->regs, 2627 dev, dbri->regs,
2651 dbri->irq, dbri->dbri_version, dbri->mm.version); 2628 dbri->irq, sdev->prom_name[9], dbri->mm.version);
2652 dev++; 2629 dev++;
2653 2630
2654 return 0; 2631 return 0;