ASoC: tlv320aic32x4: Fix MICPGA input configuration

Currently the Negative Terminal Input Routing Configuration is only set
when there is a special routing configuration. If we don't use one of
the inputs IN1 or IN2 as negative terminal input, the PGA and recording
does not work.

This patch adds a route from CM1L/CM1R to the PGA as negative input by
default. With this configuration the PGA can amplify all input signals
and line-in/mic works again.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>

2 files changed, 8 insertions, 4 deletions

diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c
index ee9ad05f9137..688151ba309a 100644
--- a/sound/soc/codecs/tlv320aic32x4.c
+++ b/sound/soc/codecs/tlv320aic32x4.c
@@ -618,12 +618,14 @@ static int aic32x4_probe(struct snd_soc_codec *codec)
         snd_soc_write(codec, AIC32X4_CMMODE, tmp_reg);
 
         /* Mic PGA routing */
-        if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) {
+        if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K)
                 snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_IN2R_10K);
-        }
-        if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) {
+        else
+                snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_CM1L_10K);
+        if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K)
                 snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_IN1L_10K);
-        }
+        else
+                snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_CM1R_10K);
 
         aic32x4_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 
diff --git a/sound/soc/codecs/tlv320aic32x4.h b/sound/soc/codecs/tlv320aic32x4.h
index 83795af8c75f..995f033a855d 100644
--- a/sound/soc/codecs/tlv320aic32x4.h
+++ b/sound/soc/codecs/tlv320aic32x4.h
@@ -120,7 +120,9 @@
 #define AIC32X4_MICBIAS_2075V           0x60
 
 #define AIC32X4_LMICPGANIN_IN2R_10K     0x10
+#define AIC32X4_LMICPGANIN_CM1L_10K     0x40
 #define AIC32X4_RMICPGANIN_IN1L_10K     0x10
+#define AIC32X4_RMICPGANIN_CM1R_10K     0x40
 
 #define AIC32X4_LMICPGAVOL_NOGAIN       0x80
 #define AIC32X4_RMICPGAVOL_NOGAIN       0x80