aboutsummaryrefslogtreecommitdiffstats
path: root/sound/soc/davinci/davinci-mcasp.c
diff options
context:
space:
mode:
authorTakashi Iwai <tiwai@suse.de>2015-03-23 08:14:02 -0400
committerTakashi Iwai <tiwai@suse.de>2015-03-23 08:14:02 -0400
commit3372dbdd8ca11f51be8c6a30b2bc79eb04c4a902 (patch)
treed4499bf5a5665b4820ffaf96bce55bf6b895195e /sound/soc/davinci/davinci-mcasp.c
parentbc465aa9d045feb0e13b4a8f32cc33c1943f62d6 (diff)
parent967b1307b69b8ada8b331e01046ad1ef83742e99 (diff)
Merge branch 'for-next' into topic/hda-core
Diffstat (limited to 'sound/soc/davinci/davinci-mcasp.c')
-rw-r--r--sound/soc/davinci/davinci-mcasp.c99
1 files changed, 31 insertions, 68 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index de3b155a5011..0c882995a357 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -26,6 +26,7 @@
26#include <linux/of.h> 26#include <linux/of.h>
27#include <linux/of_platform.h> 27#include <linux/of_platform.h>
28#include <linux/of_device.h> 28#include <linux/of_device.h>
29#include <linux/platform_data/davinci_asp.h>
29 30
30#include <sound/asoundef.h> 31#include <sound/asoundef.h>
31#include <sound/core.h> 32#include <sound/core.h>
@@ -36,7 +37,6 @@
36#include <sound/dmaengine_pcm.h> 37#include <sound/dmaengine_pcm.h>
37#include <sound/omap-pcm.h> 38#include <sound/omap-pcm.h>
38 39
39#include "davinci-pcm.h"
40#include "edma-pcm.h" 40#include "edma-pcm.h"
41#include "davinci-mcasp.h" 41#include "davinci-mcasp.h"
42 42
@@ -65,7 +65,6 @@ struct davinci_mcasp_context {
65}; 65};
66 66
67struct davinci_mcasp { 67struct davinci_mcasp {
68 struct davinci_pcm_dma_params dma_params[2];
69 struct snd_dmaengine_dai_dma_data dma_data[2]; 68 struct snd_dmaengine_dai_dma_data dma_data[2];
70 void __iomem *base; 69 void __iomem *base;
71 u32 fifo_base; 70 u32 fifo_base;
@@ -82,6 +81,7 @@ struct davinci_mcasp {
82 u16 bclk_lrclk_ratio; 81 u16 bclk_lrclk_ratio;
83 int streams; 82 int streams;
84 u32 irq_request[2]; 83 u32 irq_request[2];
84 int dma_request[2];
85 85
86 int sysclk_freq; 86 int sysclk_freq;
87 bool bclk_master; 87 bool bclk_master;
@@ -441,6 +441,18 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
441 mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR); 441 mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR);
442 mcasp->bclk_master = 1; 442 mcasp->bclk_master = 1;
443 break; 443 break;
444 case SND_SOC_DAIFMT_CBS_CFM:
445 /* codec is clock slave and frame master */
446 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
447 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);
448
449 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
450 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);
451
452 mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, ACLKX | ACLKR);
453 mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR);
454 mcasp->bclk_master = 1;
455 break;
444 case SND_SOC_DAIFMT_CBM_CFS: 456 case SND_SOC_DAIFMT_CBM_CFS:
445 /* codec is clock master and frame slave */ 457 /* codec is clock master and frame slave */
446 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); 458 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
@@ -631,7 +643,6 @@ static int davinci_config_channel_size(struct davinci_mcasp *mcasp,
631static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream, 643static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream,
632 int period_words, int channels) 644 int period_words, int channels)
633{ 645{
634 struct davinci_pcm_dma_params *dma_params = &mcasp->dma_params[stream];
635 struct snd_dmaengine_dai_dma_data *dma_data = &mcasp->dma_data[stream]; 646 struct snd_dmaengine_dai_dma_data *dma_data = &mcasp->dma_data[stream];
636 int i; 647 int i;
637 u8 tx_ser = 0; 648 u8 tx_ser = 0;
@@ -699,10 +710,8 @@ static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream,
699 * For example if three serializers are enabled the DMA 710 * For example if three serializers are enabled the DMA
700 * need to transfer three words per DMA request. 711 * need to transfer three words per DMA request.
701 */ 712 */
702 dma_params->fifo_level = active_serializers;
703 dma_data->maxburst = active_serializers; 713 dma_data->maxburst = active_serializers;
704 } else { 714 } else {
705 dma_params->fifo_level = 0;
706 dma_data->maxburst = 0; 715 dma_data->maxburst = 0;
707 } 716 }
708 return 0; 717 return 0;
@@ -734,7 +743,6 @@ static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream,
734 /* Configure the burst size for platform drivers */ 743 /* Configure the burst size for platform drivers */
735 if (numevt == 1) 744 if (numevt == 1)
736 numevt = 0; 745 numevt = 0;
737 dma_params->fifo_level = numevt;
738 dma_data->maxburst = numevt; 746 dma_data->maxburst = numevt;
739 747
740 return 0; 748 return 0;
@@ -860,8 +868,6 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
860 struct snd_soc_dai *cpu_dai) 868 struct snd_soc_dai *cpu_dai)
861{ 869{
862 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); 870 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai);
863 struct davinci_pcm_dma_params *dma_params =
864 &mcasp->dma_params[substream->stream];
865 int word_length; 871 int word_length;
866 int channels = params_channels(params); 872 int channels = params_channels(params);
867 int period_size = params_period_size(params); 873 int period_size = params_period_size(params);
@@ -902,31 +908,26 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
902 switch (params_format(params)) { 908 switch (params_format(params)) {
903 case SNDRV_PCM_FORMAT_U8: 909 case SNDRV_PCM_FORMAT_U8:
904 case SNDRV_PCM_FORMAT_S8: 910 case SNDRV_PCM_FORMAT_S8:
905 dma_params->data_type = 1;
906 word_length = 8; 911 word_length = 8;
907 break; 912 break;
908 913
909 case SNDRV_PCM_FORMAT_U16_LE: 914 case SNDRV_PCM_FORMAT_U16_LE:
910 case SNDRV_PCM_FORMAT_S16_LE: 915 case SNDRV_PCM_FORMAT_S16_LE:
911 dma_params->data_type = 2;
912 word_length = 16; 916 word_length = 16;
913 break; 917 break;
914 918
915 case SNDRV_PCM_FORMAT_U24_3LE: 919 case SNDRV_PCM_FORMAT_U24_3LE:
916 case SNDRV_PCM_FORMAT_S24_3LE: 920 case SNDRV_PCM_FORMAT_S24_3LE:
917 dma_params->data_type = 3;
918 word_length = 24; 921 word_length = 24;
919 break; 922 break;
920 923
921 case SNDRV_PCM_FORMAT_U24_LE: 924 case SNDRV_PCM_FORMAT_U24_LE:
922 case SNDRV_PCM_FORMAT_S24_LE: 925 case SNDRV_PCM_FORMAT_S24_LE:
923 dma_params->data_type = 4;
924 word_length = 24; 926 word_length = 24;
925 break; 927 break;
926 928
927 case SNDRV_PCM_FORMAT_U32_LE: 929 case SNDRV_PCM_FORMAT_U32_LE:
928 case SNDRV_PCM_FORMAT_S32_LE: 930 case SNDRV_PCM_FORMAT_S32_LE:
929 dma_params->data_type = 4;
930 word_length = 32; 931 word_length = 32;
931 break; 932 break;
932 933
@@ -935,11 +936,6 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
935 return -EINVAL; 936 return -EINVAL;
936 } 937 }
937 938
938 if (mcasp->version == MCASP_VERSION_2 && !dma_params->fifo_level)
939 dma_params->acnt = 4;
940 else
941 dma_params->acnt = dma_params->data_type;
942
943 davinci_config_channel_size(mcasp, word_length); 939 davinci_config_channel_size(mcasp, word_length);
944 940
945 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) 941 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE)
@@ -1043,17 +1039,8 @@ static int davinci_mcasp_dai_probe(struct snd_soc_dai *dai)
1043{ 1039{
1044 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); 1040 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai);
1045 1041
1046 if (mcasp->version >= MCASP_VERSION_3) { 1042 dai->playback_dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
1047 /* Using dmaengine PCM */ 1043 dai->capture_dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE];
1048 dai->playback_dma_data =
1049 &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
1050 dai->capture_dma_data =
1051 &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE];
1052 } else {
1053 /* Using davinci-pcm */
1054 dai->playback_dma_data = mcasp->dma_params;
1055 dai->capture_dma_data = mcasp->dma_params;
1056 }
1057 1044
1058 return 0; 1045 return 0;
1059} 1046}
@@ -1172,28 +1159,24 @@ static const struct snd_soc_component_driver davinci_mcasp_component = {
1172static struct davinci_mcasp_pdata dm646x_mcasp_pdata = { 1159static struct davinci_mcasp_pdata dm646x_mcasp_pdata = {
1173 .tx_dma_offset = 0x400, 1160 .tx_dma_offset = 0x400,
1174 .rx_dma_offset = 0x400, 1161 .rx_dma_offset = 0x400,
1175 .asp_chan_q = EVENTQ_0,
1176 .version = MCASP_VERSION_1, 1162 .version = MCASP_VERSION_1,
1177}; 1163};
1178 1164
1179static struct davinci_mcasp_pdata da830_mcasp_pdata = { 1165static struct davinci_mcasp_pdata da830_mcasp_pdata = {
1180 .tx_dma_offset = 0x2000, 1166 .tx_dma_offset = 0x2000,
1181 .rx_dma_offset = 0x2000, 1167 .rx_dma_offset = 0x2000,
1182 .asp_chan_q = EVENTQ_0,
1183 .version = MCASP_VERSION_2, 1168 .version = MCASP_VERSION_2,
1184}; 1169};
1185 1170
1186static struct davinci_mcasp_pdata am33xx_mcasp_pdata = { 1171static struct davinci_mcasp_pdata am33xx_mcasp_pdata = {
1187 .tx_dma_offset = 0, 1172 .tx_dma_offset = 0,
1188 .rx_dma_offset = 0, 1173 .rx_dma_offset = 0,
1189 .asp_chan_q = EVENTQ_0,
1190 .version = MCASP_VERSION_3, 1174 .version = MCASP_VERSION_3,
1191}; 1175};
1192 1176
1193static struct davinci_mcasp_pdata dra7_mcasp_pdata = { 1177static struct davinci_mcasp_pdata dra7_mcasp_pdata = {
1194 .tx_dma_offset = 0x200, 1178 .tx_dma_offset = 0x200,
1195 .rx_dma_offset = 0x284, 1179 .rx_dma_offset = 0x284,
1196 .asp_chan_q = EVENTQ_0,
1197 .version = MCASP_VERSION_4, 1180 .version = MCASP_VERSION_4,
1198}; 1181};
1199 1182
@@ -1370,12 +1353,12 @@ nodata:
1370 1353
1371static int davinci_mcasp_probe(struct platform_device *pdev) 1354static int davinci_mcasp_probe(struct platform_device *pdev)
1372{ 1355{
1373 struct davinci_pcm_dma_params *dma_params;
1374 struct snd_dmaengine_dai_dma_data *dma_data; 1356 struct snd_dmaengine_dai_dma_data *dma_data;
1375 struct resource *mem, *ioarea, *res, *dat; 1357 struct resource *mem, *ioarea, *res, *dat;
1376 struct davinci_mcasp_pdata *pdata; 1358 struct davinci_mcasp_pdata *pdata;
1377 struct davinci_mcasp *mcasp; 1359 struct davinci_mcasp *mcasp;
1378 char *irq_name; 1360 char *irq_name;
1361 int *dma;
1379 int irq; 1362 int irq;
1380 int ret; 1363 int ret;
1381 1364
@@ -1509,59 +1492,45 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1509 if (dat) 1492 if (dat)
1510 mcasp->dat_port = true; 1493 mcasp->dat_port = true;
1511 1494
1512 dma_params = &mcasp->dma_params[SNDRV_PCM_STREAM_PLAYBACK];
1513 dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK]; 1495 dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
1514 dma_params->asp_chan_q = pdata->asp_chan_q;
1515 dma_params->ram_chan_q = pdata->ram_chan_q;
1516 dma_params->sram_pool = pdata->sram_pool;
1517 dma_params->sram_size = pdata->sram_size_playback;
1518 if (dat) 1496 if (dat)
1519 dma_params->dma_addr = dat->start; 1497 dma_data->addr = dat->start;
1520 else 1498 else
1521 dma_params->dma_addr = mem->start + pdata->tx_dma_offset; 1499 dma_data->addr = mem->start + pdata->tx_dma_offset;
1522
1523 /* Unconditional dmaengine stuff */
1524 dma_data->addr = dma_params->dma_addr;
1525 1500
1501 dma = &mcasp->dma_request[SNDRV_PCM_STREAM_PLAYBACK];
1526 res = platform_get_resource(pdev, IORESOURCE_DMA, 0); 1502 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1527 if (res) 1503 if (res)
1528 dma_params->channel = res->start; 1504 *dma = res->start;
1529 else 1505 else
1530 dma_params->channel = pdata->tx_dma_channel; 1506 *dma = pdata->tx_dma_channel;
1531 1507
1532 /* dmaengine filter data for DT and non-DT boot */ 1508 /* dmaengine filter data for DT and non-DT boot */
1533 if (pdev->dev.of_node) 1509 if (pdev->dev.of_node)
1534 dma_data->filter_data = "tx"; 1510 dma_data->filter_data = "tx";
1535 else 1511 else
1536 dma_data->filter_data = &dma_params->channel; 1512 dma_data->filter_data = dma;
1537 1513
1538 /* RX is not valid in DIT mode */ 1514 /* RX is not valid in DIT mode */
1539 if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) { 1515 if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) {
1540 dma_params = &mcasp->dma_params[SNDRV_PCM_STREAM_CAPTURE];
1541 dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE]; 1516 dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE];
1542 dma_params->asp_chan_q = pdata->asp_chan_q;
1543 dma_params->ram_chan_q = pdata->ram_chan_q;
1544 dma_params->sram_pool = pdata->sram_pool;
1545 dma_params->sram_size = pdata->sram_size_capture;
1546 if (dat) 1517 if (dat)
1547 dma_params->dma_addr = dat->start; 1518 dma_data->addr = dat->start;
1548 else 1519 else
1549 dma_params->dma_addr = mem->start + pdata->rx_dma_offset; 1520 dma_data->addr = mem->start + pdata->rx_dma_offset;
1550
1551 /* Unconditional dmaengine stuff */
1552 dma_data->addr = dma_params->dma_addr;
1553 1521
1522 dma = &mcasp->dma_request[SNDRV_PCM_STREAM_CAPTURE];
1554 res = platform_get_resource(pdev, IORESOURCE_DMA, 1); 1523 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1555 if (res) 1524 if (res)
1556 dma_params->channel = res->start; 1525 *dma = res->start;
1557 else 1526 else
1558 dma_params->channel = pdata->rx_dma_channel; 1527 *dma = pdata->rx_dma_channel;
1559 1528
1560 /* dmaengine filter data for DT and non-DT boot */ 1529 /* dmaengine filter data for DT and non-DT boot */
1561 if (pdev->dev.of_node) 1530 if (pdev->dev.of_node)
1562 dma_data->filter_data = "rx"; 1531 dma_data->filter_data = "rx";
1563 else 1532 else
1564 dma_data->filter_data = &dma_params->channel; 1533 dma_data->filter_data = dma;
1565 } 1534 }
1566 1535
1567 if (mcasp->version < MCASP_VERSION_3) { 1536 if (mcasp->version < MCASP_VERSION_3) {
@@ -1584,17 +1553,11 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1584 goto err; 1553 goto err;
1585 1554
1586 switch (mcasp->version) { 1555 switch (mcasp->version) {
1587#if IS_BUILTIN(CONFIG_SND_DAVINCI_SOC) || \
1588 (IS_MODULE(CONFIG_SND_DAVINCI_SOC_MCASP) && \
1589 IS_MODULE(CONFIG_SND_DAVINCI_SOC))
1590 case MCASP_VERSION_1:
1591 case MCASP_VERSION_2:
1592 ret = davinci_soc_platform_register(&pdev->dev);
1593 break;
1594#endif
1595#if IS_BUILTIN(CONFIG_SND_EDMA_SOC) || \ 1556#if IS_BUILTIN(CONFIG_SND_EDMA_SOC) || \
1596 (IS_MODULE(CONFIG_SND_DAVINCI_SOC_MCASP) && \ 1557 (IS_MODULE(CONFIG_SND_DAVINCI_SOC_MCASP) && \
1597 IS_MODULE(CONFIG_SND_EDMA_SOC)) 1558 IS_MODULE(CONFIG_SND_EDMA_SOC))
1559 case MCASP_VERSION_1:
1560 case MCASP_VERSION_2:
1598 case MCASP_VERSION_3: 1561 case MCASP_VERSION_3:
1599 ret = edma_pcm_platform_register(&pdev->dev); 1562 ret = edma_pcm_platform_register(&pdev->dev);
1600 break; 1563 break;