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authorJorge Eduardo Candelaria <jorge.candelaria@ti.com>2010-12-10 22:06:13 -0500
committerLiam Girdwood <lrg@slimlogic.co.uk>2010-12-14 15:36:58 -0500
commitf1f489a6aa89993892cd7b4d08f67e7e110492cb (patch)
treecc9ce94861b0ba081446c7a092d46e399d9efa0b /sound/soc/codecs
parent99903ea23655a43ce4f75b64fef69e341fd0b7df (diff)
ASoC: twl6040: Clear interrupt status at boot time
On Phoenix 1.1, the INTID register default value is an invalid one, causing the interrupt handler to think the phoenix power on sequence is ready before it actually finishes. This causes some i2c errors when trying to configure twl. Signed-off-by: Jorge Eduardo Candelaria <jorge.candelaria@ti.com> Signed-off-by: Margarita Olaya Cabrera <magi.olaya@ti.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'sound/soc/codecs')
-rw-r--r--sound/soc/codecs/twl6040.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c
index c54350445d0c..f5d5f89a2216 100644
--- a/sound/soc/codecs/twl6040.c
+++ b/sound/soc/codecs/twl6040.c
@@ -1152,6 +1152,17 @@ static int twl6040_probe(struct snd_soc_codec *codec)
1152 goto gpio2_err; 1152 goto gpio2_err;
1153 1153
1154 priv->codec_powered = 0; 1154 priv->codec_powered = 0;
1155
1156 /* enable only codec ready interrupt */
1157 twl6040_write(codec, TWL6040_REG_INTMR,
1158 ~TWL6040_READYMSK & TWL6040_ALLINT_MSK);
1159
1160 /* reset interrupt status to allow correct power up sequence */
1161 twl6040_read_reg_volatile(codec, TWL6040_REG_INTID);
1162 } else {
1163 /* no interrupts at all */
1164 twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
1165 TWL6040_ALLINT_MSK);
1155 } 1166 }
1156 1167
1157 if (naudint) { 1168 if (naudint) {
@@ -1162,16 +1173,6 @@ static int twl6040_probe(struct snd_soc_codec *codec)
1162 "twl6040_codec", codec); 1173 "twl6040_codec", codec);
1163 if (ret) 1174 if (ret)
1164 goto gpio2_err; 1175 goto gpio2_err;
1165 } else {
1166 if (gpio_is_valid(audpwron)) {
1167 /* enable only codec ready interrupt */
1168 twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
1169 ~TWL6040_READYMSK & TWL6040_ALLINT_MSK);
1170 } else {
1171 /* no interrupts at all */
1172 twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
1173 TWL6040_ALLINT_MSK);
1174 }
1175 } 1176 }
1176 1177
1177 /* init vio registers */ 1178 /* init vio registers */