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authorXiubo Li <Li.Xiubo@freescale.com>2014-03-11 00:43:20 -0400
committerMark Brown <broonie@linaro.org>2014-03-11 05:59:05 -0400
commit5d6be5aa6becc750c5c2aa0ef8f7209ce19aa328 (patch)
tree332783c28f3fe037cdaaa86f9b30072904be6ddd /sound/soc/codecs/wm8978.c
parentdb5a5ee7c7b20a1780f90c6f2b8de322844b6fe9 (diff)
ASoC: codec: Simplify ASoC probe code.
For some CODEC drivers like who act as the MFDs children are ignored by this patch. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/codecs/wm8978.c')
-rw-r--r--sound/soc/codecs/wm8978.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/sound/soc/codecs/wm8978.c b/sound/soc/codecs/wm8978.c
index d8fc531c0e59..13de3688e86f 100644
--- a/sound/soc/codecs/wm8978.c
+++ b/sound/soc/codecs/wm8978.c
@@ -975,19 +975,13 @@ static const int update_reg[] = {
975static int wm8978_probe(struct snd_soc_codec *codec) 975static int wm8978_probe(struct snd_soc_codec *codec)
976{ 976{
977 struct wm8978_priv *wm8978 = snd_soc_codec_get_drvdata(codec); 977 struct wm8978_priv *wm8978 = snd_soc_codec_get_drvdata(codec);
978 int ret = 0, i; 978 int i;
979 979
980 /* 980 /*
981 * Set default system clock to PLL, it is more precise, this is also the 981 * Set default system clock to PLL, it is more precise, this is also the
982 * default hardware setting 982 * default hardware setting
983 */ 983 */
984 wm8978->sysclk = WM8978_PLL; 984 wm8978->sysclk = WM8978_PLL;
985 codec->control_data = wm8978->regmap;
986 ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
987 if (ret < 0) {
988 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
989 return ret;
990 }
991 985
992 /* 986 /*
993 * Set the update bit in all registers, that have one. This way all 987 * Set the update bit in all registers, that have one. This way all