Merge branch 'topic/asoc' into for-linus

* topic/asoc: (226 commits)
  ASoC: au1x: PSC-AC97 bugfixes
  ASoC: Fix WM835x Out4 capture enumeration
  ASoC: Remove unuused hw_read_t
  ASoC: fix pxa2xx-ac97.c breakage
  ASoC: Fully specify DC servo bits to update in wm_hubs
  ASoC: Debugged improper setting of PLL fields in WM8580 driver
  ASoC: new board driver to connect bfin-5xx with ad1836 codec
  ASoC: OMAP: Add functionality to set CLKR and FSR sources in McBSP DAI
  ASoC: davinci: i2c device creation moved into board files
  ASoC: Don't reconfigure WM8350 FLL if not needed
  ASoC: Fix s3c-i2s-v2 build
  ASoC: Make platform data optional for TLV320AIC3x
  ASoC: Add S3C24xx dependencies for Simtec machines
  ASoC: SDP3430: Fix TWL GPIO6 pin mux request
  ASoC: S3C platform: Fix s3c2410_dma_started() called at improper time
  ARM: OMAP: McBSP: Merge two functions into omap_mcbsp_start/_stop
  ASoC: OMAP: Fix setup of XCCR and RCCR registers in McBSP DAI
  OMAP: McBSP: Use textual values in DMA operating mode sysfs files
  ARM: OMAP: DMA: Add support for DMA channel self linking on OMAP1510
  ASoC: Select core DMA when building for S3C64xx
  ...

1 files changed, 143 insertions, 202 deletions

diff --git a/sound/soc/codecs/wm8900.c b/sound/soc/codecs/wm8900.c
index 3c78945244b8..5e9c855c0036 100644
--- a/sound/soc/codecs/wm8900.c
+++ b/sound/soc/codecs/wm8900.c
@@ -116,6 +116,7 @@
 #define WM8900_REG_CLOCKING2_DAC_CLKDIV 0x1c
 
 #define WM8900_REG_DACCTRL_MUTE          0x004
+#define WM8900_REG_DACCTRL_DAC_SB_FILT   0x100
 #define WM8900_REG_DACCTRL_AIF_LRCLKRATE 0x400
 
 #define WM8900_REG_AUDIO3_ADCLRC_DIR    0x0800
@@ -182,111 +183,20 @@ static const u16 wm8900_reg_defaults[WM8900_MAXREG] = {
         /* Remaining registers all zero */
 };
 
-/*
- * read wm8900 register cache
- */
-static inline unsigned int wm8900_read_reg_cache(struct snd_soc_codec *codec,
-        unsigned int reg)
-{
-        u16 *cache = codec->reg_cache;
-
-        BUG_ON(reg >= WM8900_MAXREG);
-
-        if (reg == WM8900_REG_ID)
-                return 0;
-
-        return cache[reg];
-}
-
-/*
- * write wm8900 register cache
- */
-static inline void wm8900_write_reg_cache(struct snd_soc_codec *codec,
-        u16 reg, unsigned int value)
-{
-        u16 *cache = codec->reg_cache;
-
-        BUG_ON(reg >= WM8900_MAXREG);
-
-        cache[reg] = value;
-}
-
-/*
- * write to the WM8900 register space
- */
-static int wm8900_write(struct snd_soc_codec *codec, unsigned int reg,
-                        unsigned int value)
-{
-        u8 data[3];
-
-        if (value == wm8900_read_reg_cache(codec, reg))
-                return 0;
-
-        /* data is
-         *   D15..D9 WM8900 register offset
-         *   D8...D0 register data
-         */
-        data[0] = reg;
-        data[1] = value >> 8;
-        data[2] = value & 0x00ff;
-
-        wm8900_write_reg_cache(codec, reg, value);
-        if (codec->hw_write(codec->control_data, data, 3) == 3)
-                return 0;
-        else
-                return -EIO;
-}
-
-/*
- * Read from the wm8900.
- */
-static unsigned int wm8900_chip_read(struct snd_soc_codec *codec, u8 reg)
-{
-        struct i2c_msg xfer[2];
-        u16 data;
-        int ret;
-        struct i2c_client *client = codec->control_data;
-
-        BUG_ON(reg != WM8900_REG_ID && reg != WM8900_REG_POWER1);
-
-        /* Write register */
-        xfer[0].addr = client->addr;
-        xfer[0].flags = 0;
-        xfer[0].len = 1;
-        xfer[0].buf = ®
-
-        /* Read data */
-        xfer[1].addr = client->addr;
-        xfer[1].flags = I2C_M_RD;
-        xfer[1].len = 2;
-        xfer[1].buf = (u8 *)&data;
-
-        ret = i2c_transfer(client->adapter, xfer, 2);
-        if (ret != 2) {
-                printk(KERN_CRIT "i2c_transfer returned %d\n", ret);
-                return 0;
-        }
-
-        return (data >> 8) | ((data & 0xff) << 8);
-}
-
-/*
- * Read from the WM8900 register space.  Most registers can't be read
- * and are therefore supplied from cache.
- */
-static unsigned int wm8900_read(struct snd_soc_codec *codec, unsigned int reg)
+static int wm8900_volatile_register(unsigned int reg)
 {
         switch (reg) {
         case WM8900_REG_ID:
-                return wm8900_chip_read(codec, reg);
+        case WM8900_REG_POWER1:
+                return 1;
         default:
-                return wm8900_read_reg_cache(codec, reg);
+                return 0;
         }
 }
 
 static void wm8900_reset(struct snd_soc_codec *codec)
 {
-        wm8900_write(codec, WM8900_REG_RESET, 0);
+        snd_soc_write(codec, WM8900_REG_RESET, 0);
 
         memcpy(codec->reg_cache, wm8900_reg_defaults,
                sizeof(codec->reg_cache));
@@ -296,14 +206,14 @@ static int wm8900_hp_event(struct snd_soc_dapm_widget *w,
                            struct snd_kcontrol *kcontrol, int event)
 {
         struct snd_soc_codec *codec = w->codec;
-        u16 hpctl1 = wm8900_read(codec, WM8900_REG_HPCTL1);
+        u16 hpctl1 = snd_soc_read(codec, WM8900_REG_HPCTL1);
 
         switch (event) {
         case SND_SOC_DAPM_PRE_PMU:
                 /* Clamp headphone outputs */
                 hpctl1 = WM8900_REG_HPCTL1_HP_CLAMP_IP |
                         WM8900_REG_HPCTL1_HP_CLAMP_OP;
-                wm8900_write(codec, WM8900_REG_HPCTL1, hpctl1);
+                snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
                 break;
 
         case SND_SOC_DAPM_POST_PMU:
@@ -312,41 +222,41 @@ static int wm8900_hp_event(struct snd_soc_dapm_widget *w,
                 hpctl1 |= WM8900_REG_HPCTL1_HP_SHORT |
                         WM8900_REG_HPCTL1_HP_SHORT2 |
                         WM8900_REG_HPCTL1_HP_IPSTAGE_ENA;
-                wm8900_write(codec, WM8900_REG_HPCTL1, hpctl1);
+                snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
 
                 msleep(400);
 
                 /* Enable the output stage */
                 hpctl1 &= ~WM8900_REG_HPCTL1_HP_CLAMP_OP;
                 hpctl1 |= WM8900_REG_HPCTL1_HP_OPSTAGE_ENA;
-                wm8900_write(codec, WM8900_REG_HPCTL1, hpctl1);
+                snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
 
                 /* Remove the shorts */
                 hpctl1 &= ~WM8900_REG_HPCTL1_HP_SHORT2;
-                wm8900_write(codec, WM8900_REG_HPCTL1, hpctl1);
+                snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
                 hpctl1 &= ~WM8900_REG_HPCTL1_HP_SHORT;
-                wm8900_write(codec, WM8900_REG_HPCTL1, hpctl1);
+                snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
                 break;
 
         case SND_SOC_DAPM_PRE_PMD:
                 /* Short the output */
                 hpctl1 |= WM8900_REG_HPCTL1_HP_SHORT;
-                wm8900_write(codec, WM8900_REG_HPCTL1, hpctl1);
+                snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
 
                 /* Disable the output stage */
                 hpctl1 &= ~WM8900_REG_HPCTL1_HP_OPSTAGE_ENA;
-                wm8900_write(codec, WM8900_REG_HPCTL1, hpctl1);
+                snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
 
                 /* Clamp the outputs and power down input */
                 hpctl1 |= WM8900_REG_HPCTL1_HP_CLAMP_IP |
                         WM8900_REG_HPCTL1_HP_CLAMP_OP;
                 hpctl1 &= ~WM8900_REG_HPCTL1_HP_IPSTAGE_ENA;
-                wm8900_write(codec, WM8900_REG_HPCTL1, hpctl1);
+                snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
                 break;
 
         case SND_SOC_DAPM_POST_PMD:
                 /* Disable everything */
-                wm8900_write(codec, WM8900_REG_HPCTL1, 0);
+                snd_soc_write(codec, WM8900_REG_HPCTL1, 0);
                 break;
 
         default:
@@ -439,7 +349,6 @@ SOC_SINGLE("DAC Soft Mute Switch", WM8900_REG_DACCTRL, 6, 1, 1),
 SOC_ENUM("DAC Mute Rate", dac_mute_rate),
 SOC_SINGLE("DAC Mono Switch", WM8900_REG_DACCTRL, 9, 1, 0),
 SOC_ENUM("DAC Deemphasis", dac_deemphasis),
-SOC_SINGLE("DAC Sloping Stopband Filter Switch", WM8900_REG_DACCTRL, 8, 1, 0),
 SOC_SINGLE("DAC Sigma-Delta Modulator Clock Switch", WM8900_REG_DACCTRL,
            12, 1, 0),
 
@@ -723,7 +632,7 @@ static int wm8900_hw_params(struct snd_pcm_substream *substream,
         struct snd_soc_codec *codec = socdev->card->codec;
         u16 reg;
 
-        reg = wm8900_read(codec, WM8900_REG_AUDIO1) & ~0x60;
+        reg = snd_soc_read(codec, WM8900_REG_AUDIO1) & ~0x60;
 
         switch (params_format(params)) {
         case SNDRV_PCM_FORMAT_S16_LE:
@@ -741,7 +650,18 @@ static int wm8900_hw_params(struct snd_pcm_substream *substream,
                 return -EINVAL;
         }
 
-        wm8900_write(codec, WM8900_REG_AUDIO1, reg);
+        snd_soc_write(codec, WM8900_REG_AUDIO1, reg);
+
+        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+                reg = snd_soc_read(codec, WM8900_REG_DACCTRL);
+
+                if (params_rate(params) <= 24000)
+                        reg |= WM8900_REG_DACCTRL_DAC_SB_FILT;
+                else
+                        reg &= ~WM8900_REG_DACCTRL_DAC_SB_FILT;
+
+                snd_soc_write(codec, WM8900_REG_DACCTRL, reg);
+        }
 
         return 0;
 }
@@ -834,18 +754,18 @@ static int wm8900_set_fll(struct snd_soc_codec *codec,
                 return 0;
 
         /* The digital side should be disabled during any change. */
-        reg = wm8900_read(codec, WM8900_REG_POWER1);
-        wm8900_write(codec, WM8900_REG_POWER1,
+        reg = snd_soc_read(codec, WM8900_REG_POWER1);
+        snd_soc_write(codec, WM8900_REG_POWER1,
                      reg & (~WM8900_REG_POWER1_FLL_ENA));
 
         /* Disable the FLL? */
         if (!freq_in || !freq_out) {
-                reg = wm8900_read(codec, WM8900_REG_CLOCKING1);
-                wm8900_write(codec, WM8900_REG_CLOCKING1,
+                reg = snd_soc_read(codec, WM8900_REG_CLOCKING1);
+                snd_soc_write(codec, WM8900_REG_CLOCKING1,
                              reg & (~WM8900_REG_CLOCKING1_MCLK_SRC));
 
-                reg = wm8900_read(codec, WM8900_REG_FLLCTL1);
-                wm8900_write(codec, WM8900_REG_FLLCTL1,
+                reg = snd_soc_read(codec, WM8900_REG_FLLCTL1);
+                snd_soc_write(codec, WM8900_REG_FLLCTL1,
                              reg & (~WM8900_REG_FLLCTL1_OSC_ENA));
 
                 wm8900->fll_in = freq_in;
@@ -862,33 +782,33 @@ static int wm8900_set_fll(struct snd_soc_codec *codec,
 
         /* The osclilator *MUST* be enabled before we enable the
          * digital circuit. */
-        wm8900_write(codec, WM8900_REG_FLLCTL1,
+        snd_soc_write(codec, WM8900_REG_FLLCTL1,
                      fll_div.fll_ratio | WM8900_REG_FLLCTL1_OSC_ENA);
 
-        wm8900_write(codec, WM8900_REG_FLLCTL4, fll_div.n >> 5);
-        wm8900_write(codec, WM8900_REG_FLLCTL5,
+        snd_soc_write(codec, WM8900_REG_FLLCTL4, fll_div.n >> 5);
+        snd_soc_write(codec, WM8900_REG_FLLCTL5,
                      (fll_div.fllclk_div << 6) | (fll_div.n & 0x1f));
 
         if (fll_div.k) {
-                wm8900_write(codec, WM8900_REG_FLLCTL2,
+                snd_soc_write(codec, WM8900_REG_FLLCTL2,
                              (fll_div.k >> 8) | 0x100);
-                wm8900_write(codec, WM8900_REG_FLLCTL3, fll_div.k & 0xff);
+                snd_soc_write(codec, WM8900_REG_FLLCTL3, fll_div.k & 0xff);
         } else
-                wm8900_write(codec, WM8900_REG_FLLCTL2, 0);
+                snd_soc_write(codec, WM8900_REG_FLLCTL2, 0);
 
         if (fll_div.fll_slow_lock_ref)
-                wm8900_write(codec, WM8900_REG_FLLCTL6,
+                snd_soc_write(codec, WM8900_REG_FLLCTL6,
                              WM8900_REG_FLLCTL6_FLL_SLOW_LOCK_REF);
         else
-                wm8900_write(codec, WM8900_REG_FLLCTL6, 0);
+                snd_soc_write(codec, WM8900_REG_FLLCTL6, 0);
 
-        reg = wm8900_read(codec, WM8900_REG_POWER1);
-        wm8900_write(codec, WM8900_REG_POWER1,
+        reg = snd_soc_read(codec, WM8900_REG_POWER1);
+        snd_soc_write(codec, WM8900_REG_POWER1,
                      reg | WM8900_REG_POWER1_FLL_ENA);
 
 reenable:
-        reg = wm8900_read(codec, WM8900_REG_CLOCKING1);
-        wm8900_write(codec, WM8900_REG_CLOCKING1,
+        reg = snd_soc_read(codec, WM8900_REG_CLOCKING1);
+        snd_soc_write(codec, WM8900_REG_CLOCKING1,
                      reg | WM8900_REG_CLOCKING1_MCLK_SRC);
 
         return 0;
@@ -908,38 +828,38 @@ static int wm8900_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
 
         switch (div_id) {
         case WM8900_BCLK_DIV:
-                reg = wm8900_read(codec, WM8900_REG_CLOCKING1);
-                wm8900_write(codec, WM8900_REG_CLOCKING1,
+                reg = snd_soc_read(codec, WM8900_REG_CLOCKING1);
+                snd_soc_write(codec, WM8900_REG_CLOCKING1,
                              div | (reg & WM8900_REG_CLOCKING1_BCLK_MASK));
                 break;
         case WM8900_OPCLK_DIV:
-                reg = wm8900_read(codec, WM8900_REG_CLOCKING1);
-                wm8900_write(codec, WM8900_REG_CLOCKING1,
+                reg = snd_soc_read(codec, WM8900_REG_CLOCKING1);
+                snd_soc_write(codec, WM8900_REG_CLOCKING1,
                              div | (reg & WM8900_REG_CLOCKING1_OPCLK_MASK));
                 break;
         case WM8900_DAC_LRCLK:
-                reg = wm8900_read(codec, WM8900_REG_AUDIO4);
-                wm8900_write(codec, WM8900_REG_AUDIO4,
+                reg = snd_soc_read(codec, WM8900_REG_AUDIO4);
+                snd_soc_write(codec, WM8900_REG_AUDIO4,
                              div | (reg & WM8900_LRC_MASK));
                 break;
         case WM8900_ADC_LRCLK:
-                reg = wm8900_read(codec, WM8900_REG_AUDIO3);
-                wm8900_write(codec, WM8900_REG_AUDIO3,
+                reg = snd_soc_read(codec, WM8900_REG_AUDIO3);
+                snd_soc_write(codec, WM8900_REG_AUDIO3,
                              div | (reg & WM8900_LRC_MASK));
                 break;
         case WM8900_DAC_CLKDIV:
-                reg = wm8900_read(codec, WM8900_REG_CLOCKING2);
-                wm8900_write(codec, WM8900_REG_CLOCKING2,
+                reg = snd_soc_read(codec, WM8900_REG_CLOCKING2);
+                snd_soc_write(codec, WM8900_REG_CLOCKING2,
                              div | (reg & WM8900_REG_CLOCKING2_DAC_CLKDIV));
                 break;
         case WM8900_ADC_CLKDIV:
-                reg = wm8900_read(codec, WM8900_REG_CLOCKING2);
-                wm8900_write(codec, WM8900_REG_CLOCKING2,
+                reg = snd_soc_read(codec, WM8900_REG_CLOCKING2);
+                snd_soc_write(codec, WM8900_REG_CLOCKING2,
                              div | (reg & WM8900_REG_CLOCKING2_ADC_CLKDIV));
                 break;
         case WM8900_LRCLK_MODE:
-                reg = wm8900_read(codec, WM8900_REG_DACCTRL);
-                wm8900_write(codec, WM8900_REG_DACCTRL,
+                reg = snd_soc_read(codec, WM8900_REG_DACCTRL);
+                snd_soc_write(codec, WM8900_REG_DACCTRL,
                              div | (reg & WM8900_REG_DACCTRL_AIF_LRCLKRATE));
                 break;
         default:
@@ -956,10 +876,10 @@ static int wm8900_set_dai_fmt(struct snd_soc_dai *codec_dai,
         struct snd_soc_codec *codec = codec_dai->codec;
         unsigned int clocking1, aif1, aif3, aif4;
 
-        clocking1 = wm8900_read(codec, WM8900_REG_CLOCKING1);
-        aif1 = wm8900_read(codec, WM8900_REG_AUDIO1);
-        aif3 = wm8900_read(codec, WM8900_REG_AUDIO3);
-        aif4 = wm8900_read(codec, WM8900_REG_AUDIO4);
+        clocking1 = snd_soc_read(codec, WM8900_REG_CLOCKING1);
+        aif1 = snd_soc_read(codec, WM8900_REG_AUDIO1);
+        aif3 = snd_soc_read(codec, WM8900_REG_AUDIO3);
+        aif4 = snd_soc_read(codec, WM8900_REG_AUDIO4);
 
         /* set master/slave audio interface */
         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@@ -1055,10 +975,10 @@ static int wm8900_set_dai_fmt(struct snd_soc_dai *codec_dai,
                 return -EINVAL;
         }
 
-        wm8900_write(codec, WM8900_REG_CLOCKING1, clocking1);
-        wm8900_write(codec, WM8900_REG_AUDIO1, aif1);
-        wm8900_write(codec, WM8900_REG_AUDIO3, aif3);
-        wm8900_write(codec, WM8900_REG_AUDIO4, aif4);
+        snd_soc_write(codec, WM8900_REG_CLOCKING1, clocking1);
+        snd_soc_write(codec, WM8900_REG_AUDIO1, aif1);
+        snd_soc_write(codec, WM8900_REG_AUDIO3, aif3);
+        snd_soc_write(codec, WM8900_REG_AUDIO4, aif4);
 
         return 0;
 }
@@ -1068,14 +988,14 @@ static int wm8900_digital_mute(struct snd_soc_dai *codec_dai, int mute)
         struct snd_soc_codec *codec = codec_dai->codec;
         u16 reg;
 
-        reg = wm8900_read(codec, WM8900_REG_DACCTRL);
+        reg = snd_soc_read(codec, WM8900_REG_DACCTRL);
 
         if (mute)
                 reg |= WM8900_REG_DACCTRL_MUTE;
         else
                 reg &= ~WM8900_REG_DACCTRL_MUTE;
 
-        wm8900_write(codec, WM8900_REG_DACCTRL, reg);
+        snd_soc_write(codec, WM8900_REG_DACCTRL, reg);
 
         return 0;
 }
@@ -1124,11 +1044,11 @@ static int wm8900_set_bias_level(struct snd_soc_codec *codec,
         switch (level) {
         case SND_SOC_BIAS_ON:
                 /* Enable thermal shutdown */
-                reg = wm8900_read(codec, WM8900_REG_GPIO);
-                wm8900_write(codec, WM8900_REG_GPIO,
+                reg = snd_soc_read(codec, WM8900_REG_GPIO);
+                snd_soc_write(codec, WM8900_REG_GPIO,
                              reg | WM8900_REG_GPIO_TEMP_ENA);
-                reg = wm8900_read(codec, WM8900_REG_ADDCTL);
-                wm8900_write(codec, WM8900_REG_ADDCTL,
+                reg = snd_soc_read(codec, WM8900_REG_ADDCTL);
+                snd_soc_write(codec, WM8900_REG_ADDCTL,
                              reg | WM8900_REG_ADDCTL_TEMP_SD);
                 break;
 
@@ -1139,69 +1059,69 @@ static int wm8900_set_bias_level(struct snd_soc_codec *codec,
                 /* Charge capacitors if initial power up */
                 if (codec->bias_level == SND_SOC_BIAS_OFF) {
                         /* STARTUP_BIAS_ENA on */
-                        wm8900_write(codec, WM8900_REG_POWER1,
+                        snd_soc_write(codec, WM8900_REG_POWER1,
                                      WM8900_REG_POWER1_STARTUP_BIAS_ENA);
 
                         /* Startup bias mode */
-                        wm8900_write(codec, WM8900_REG_ADDCTL,
+                        snd_soc_write(codec, WM8900_REG_ADDCTL,
                                      WM8900_REG_ADDCTL_BIAS_SRC |
                                      WM8900_REG_ADDCTL_VMID_SOFTST);
 
                         /* VMID 2x50k */
-                        wm8900_write(codec, WM8900_REG_POWER1,
+                        snd_soc_write(codec, WM8900_REG_POWER1,
                                      WM8900_REG_POWER1_STARTUP_BIAS_ENA | 0x1);
 
                         /* Allow capacitors to charge */
                         schedule_timeout_interruptible(msecs_to_jiffies(400));
 
                         /* Enable bias */
-                        wm8900_write(codec, WM8900_REG_POWER1,
+                        snd_soc_write(codec, WM8900_REG_POWER1,
                                      WM8900_REG_POWER1_STARTUP_BIAS_ENA |
                                      WM8900_REG_POWER1_BIAS_ENA | 0x1);
 
-                        wm8900_write(codec, WM8900_REG_ADDCTL, 0);
+                        snd_soc_write(codec, WM8900_REG_ADDCTL, 0);
 
-                        wm8900_write(codec, WM8900_REG_POWER1,
+                        snd_soc_write(codec, WM8900_REG_POWER1,
                                      WM8900_REG_POWER1_BIAS_ENA | 0x1);
                 }
 
-                reg = wm8900_read(codec, WM8900_REG_POWER1);
-                wm8900_write(codec, WM8900_REG_POWER1,
+                reg = snd_soc_read(codec, WM8900_REG_POWER1);
+                snd_soc_write(codec, WM8900_REG_POWER1,
                              (reg & WM8900_REG_POWER1_FLL_ENA) |
                              WM8900_REG_POWER1_BIAS_ENA | 0x1);
-                wm8900_write(codec, WM8900_REG_POWER2,
+                snd_soc_write(codec, WM8900_REG_POWER2,
                              WM8900_REG_POWER2_SYSCLK_ENA);
-                wm8900_write(codec, WM8900_REG_POWER3, 0);
+                snd_soc_write(codec, WM8900_REG_POWER3, 0);
                 break;
 
         case SND_SOC_BIAS_OFF:
                 /* Startup bias enable */
-                reg = wm8900_read(codec, WM8900_REG_POWER1);
-                wm8900_write(codec, WM8900_REG_POWER1,
+                reg = snd_soc_read(codec, WM8900_REG_POWER1);
+                snd_soc_write(codec, WM8900_REG_POWER1,
                              reg & WM8900_REG_POWER1_STARTUP_BIAS_ENA);
-                wm8900_write(codec, WM8900_REG_ADDCTL,
+                snd_soc_write(codec, WM8900_REG_ADDCTL,
                              WM8900_REG_ADDCTL_BIAS_SRC |
                              WM8900_REG_ADDCTL_VMID_SOFTST);
 
                 /* Discharge caps */
-                wm8900_write(codec, WM8900_REG_POWER1,
+                snd_soc_write(codec, WM8900_REG_POWER1,
                              WM8900_REG_POWER1_STARTUP_BIAS_ENA);
                 schedule_timeout_interruptible(msecs_to_jiffies(500));
 
                 /* Remove clamp */
-                wm8900_write(codec, WM8900_REG_HPCTL1, 0);
+                snd_soc_write(codec, WM8900_REG_HPCTL1, 0);
 
                 /* Power down */
-                wm8900_write(codec, WM8900_REG_ADDCTL, 0);
-                wm8900_write(codec, WM8900_REG_POWER1, 0);
-                wm8900_write(codec, WM8900_REG_POWER2, 0);
-                wm8900_write(codec, WM8900_REG_POWER3, 0);
+                snd_soc_write(codec, WM8900_REG_ADDCTL, 0);
+                snd_soc_write(codec, WM8900_REG_POWER1, 0);
+                snd_soc_write(codec, WM8900_REG_POWER2, 0);
+                snd_soc_write(codec, WM8900_REG_POWER3, 0);
 
                 /* Need to let things settle before stopping the clock
                  * to ensure that restart works, see "Stopping the
                  * master clock" in the datasheet. */
                 schedule_timeout_interruptible(msecs_to_jiffies(1));
-                wm8900_write(codec, WM8900_REG_POWER2,
+                snd_soc_write(codec, WM8900_REG_POWER2,
                              WM8900_REG_POWER2_SYSCLK_ENA);
                 break;
         }
@@ -1264,7 +1184,7 @@ static int wm8900_resume(struct platform_device *pdev)
 
         if (cache) {
                 for (i = 0; i < WM8900_MAXREG; i++)
-                        wm8900_write(codec, i, cache[i]);
+                        snd_soc_write(codec, i, cache[i]);
                 kfree(cache);
         } else
                 dev_err(&pdev->dev, "Unable to allocate register cache\n");
@@ -1297,16 +1217,20 @@ static __devinit int wm8900_i2c_probe(struct i2c_client *i2c,
 
         codec->name = "WM8900";
         codec->owner = THIS_MODULE;
-        codec->read = wm8900_read;
-        codec->write = wm8900_write;
         codec->dai = &wm8900_dai;
         codec->num_dai = 1;
-        codec->hw_write = (hw_write_t)i2c_master_send;
         codec->control_data = i2c;
         codec->set_bias_level = wm8900_set_bias_level;
+        codec->volatile_register = wm8900_volatile_register;
         codec->dev = &i2c->dev;
 
-        reg = wm8900_read(codec, WM8900_REG_ID);
+        ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
+        if (ret != 0) {
+                dev_err(&i2c->dev, "Failed to set cache I/O: %d\n", ret);
+                goto err;
+        }
+
+        reg = snd_soc_read(codec, WM8900_REG_ID);
         if (reg != 0x8900) {
                 dev_err(&i2c->dev, "Device is not a WM8900 - ID %x\n", reg);
                 ret = -ENODEV;
@@ -1314,7 +1238,7 @@ static __devinit int wm8900_i2c_probe(struct i2c_client *i2c,
         }
 
         /* Read back from the chip */
-        reg = wm8900_chip_read(codec, WM8900_REG_POWER1);
+        reg = snd_soc_read(codec, WM8900_REG_POWER1);
         reg = (reg >> 12) & 0xf;
         dev_info(&i2c->dev, "WM8900 revision %d\n", reg);
 
@@ -1324,29 +1248,29 @@ static __devinit int wm8900_i2c_probe(struct i2c_client *i2c,
         wm8900_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 
         /* Latch the volume update bits */
-        wm8900_write(codec, WM8900_REG_LINVOL,
-                     wm8900_read(codec, WM8900_REG_LINVOL) | 0x100);
-        wm8900_write(codec, WM8900_REG_RINVOL,
-                     wm8900_read(codec, WM8900_REG_RINVOL) | 0x100);
-        wm8900_write(codec, WM8900_REG_LOUT1CTL,
-                     wm8900_read(codec, WM8900_REG_LOUT1CTL) | 0x100);
-        wm8900_write(codec, WM8900_REG_ROUT1CTL,
-                     wm8900_read(codec, WM8900_REG_ROUT1CTL) | 0x100);
-        wm8900_write(codec, WM8900_REG_LOUT2CTL,
-                     wm8900_read(codec, WM8900_REG_LOUT2CTL) | 0x100);
-        wm8900_write(codec, WM8900_REG_ROUT2CTL,
-                     wm8900_read(codec, WM8900_REG_ROUT2CTL) | 0x100);
-        wm8900_write(codec, WM8900_REG_LDAC_DV,
-                     wm8900_read(codec, WM8900_REG_LDAC_DV) | 0x100);
-        wm8900_write(codec, WM8900_REG_RDAC_DV,
-                     wm8900_read(codec, WM8900_REG_RDAC_DV) | 0x100);
-        wm8900_write(codec, WM8900_REG_LADC_DV,
-                     wm8900_read(codec, WM8900_REG_LADC_DV) | 0x100);
-        wm8900_write(codec, WM8900_REG_RADC_DV,
-                     wm8900_read(codec, WM8900_REG_RADC_DV) | 0x100);
+        snd_soc_write(codec, WM8900_REG_LINVOL,
+                      snd_soc_read(codec, WM8900_REG_LINVOL) | 0x100);
+        snd_soc_write(codec, WM8900_REG_RINVOL,
+                      snd_soc_read(codec, WM8900_REG_RINVOL) | 0x100);
+        snd_soc_write(codec, WM8900_REG_LOUT1CTL,
+                      snd_soc_read(codec, WM8900_REG_LOUT1CTL) | 0x100);
+        snd_soc_write(codec, WM8900_REG_ROUT1CTL,
+                      snd_soc_read(codec, WM8900_REG_ROUT1CTL) | 0x100);
+        snd_soc_write(codec, WM8900_REG_LOUT2CTL,
+                      snd_soc_read(codec, WM8900_REG_LOUT2CTL) | 0x100);
+        snd_soc_write(codec, WM8900_REG_ROUT2CTL,
+                      snd_soc_read(codec, WM8900_REG_ROUT2CTL) | 0x100);
+        snd_soc_write(codec, WM8900_REG_LDAC_DV,
+                      snd_soc_read(codec, WM8900_REG_LDAC_DV) | 0x100);
+        snd_soc_write(codec, WM8900_REG_RDAC_DV,
+                      snd_soc_read(codec, WM8900_REG_RDAC_DV) | 0x100);
+        snd_soc_write(codec, WM8900_REG_LADC_DV,
+                      snd_soc_read(codec, WM8900_REG_LADC_DV) | 0x100);
+        snd_soc_write(codec, WM8900_REG_RADC_DV,
+                      snd_soc_read(codec, WM8900_REG_RADC_DV) | 0x100);
 
         /* Set the DAC and mixer output bias */
-        wm8900_write(codec, WM8900_REG_OUTBIASCTL, 0x81);
+        snd_soc_write(codec, WM8900_REG_OUTBIASCTL, 0x81);
 
         wm8900_dai.dev = &i2c->dev;
 
@@ -1388,6 +1312,21 @@ static __devexit int wm8900_i2c_remove(struct i2c_client *client)
         return 0;
 }
 
+#ifdef CONFIG_PM
+static int wm8900_i2c_suspend(struct i2c_client *client, pm_message_t msg)
+{
+        return snd_soc_suspend_device(&client->dev);
+}
+
+static int wm8900_i2c_resume(struct i2c_client *client)
+{
+        return snd_soc_resume_device(&client->dev);
+}
+#else
+#define wm8900_i2c_suspend NULL
+#define wm8900_i2c_resume NULL
+#endif
+
 static const struct i2c_device_id wm8900_i2c_id[] = {
         { "wm8900", 0 },
         { }
@@ -1401,6 +1340,8 @@ static struct i2c_driver wm8900_i2c_driver = {
         },
         .probe = wm8900_i2c_probe,
         .remove = __devexit_p(wm8900_i2c_remove),
+        .suspend = wm8900_i2c_suspend,
+        .resume = wm8900_i2c_resume,
         .id_table = wm8900_i2c_id,
 };