ASoC: Ensure WM8731 register cache is synced when resuming from disabled

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org

1 files changed, 1 insertions, 0 deletions

diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index 7e5ec03f6f8d..a7c9ae17fc7e 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -453,6 +453,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
                 snd_soc_write(codec, WM8731_PWR, 0xffff);
                 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
                                        wm8731->supplies);
+                codec->cache_sync = 1;
                 break;
         }
         codec->dapm.bias_level = level;