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authorLopez Cruz, Misael <x0052729@ti.com>2009-06-22 20:34:07 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2009-06-23 05:57:38 -0400
commit30808ca751c3b8d81e948efb8fed7451a8321010 (patch)
treef731b114d0eabcad3bfa48c702611524de762b1f /sound/soc/codecs/twl4030.c
parent328d0a138e3d7761f4db53fabf82279b90ea66dd (diff)
ASoC: TWL4030: Correct bypass event for voice sidetone
Event for voice sidetone was being interpreted as an analog HiFi bypass event because VSTPGA register offset is less than ARXR2_APGA_CTL offset. Reordering the register checks allows to handle voice digital bypass event properly. Signed-off-by: Misael Lopez Cruz <x0052729@ti.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs/twl4030.c')
-rw-r--r--sound/soc/codecs/twl4030.c20
1 files changed, 13 insertions, 7 deletions
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c
index f916a9a46712..df42fa2abd91 100644
--- a/sound/soc/codecs/twl4030.c
+++ b/sound/soc/codecs/twl4030.c
@@ -712,7 +712,19 @@ static int bypass_event(struct snd_soc_dapm_widget *w,
712 712
713 reg = twl4030_read_reg_cache(w->codec, m->reg); 713 reg = twl4030_read_reg_cache(w->codec, m->reg);
714 714
715 if (m->reg <= TWL4030_REG_ARXR2_APGA_CTL) { 715 /*
716 * bypass_state[0:3] - analog HiFi bypass
717 * bypass_state[4] - analog voice bypass
718 * bypass_state[5] - digital voice bypass
719 * bypass_state[6:7] - digital HiFi bypass
720 */
721 if (m->reg == TWL4030_REG_VSTPGA) {
722 /* Voice digital bypass */
723 if (reg)
724 twl4030->bypass_state |= (1 << 5);
725 else
726 twl4030->bypass_state &= ~(1 << 5);
727 } else if (m->reg <= TWL4030_REG_ARXR2_APGA_CTL) {
716 /* Analog bypass */ 728 /* Analog bypass */
717 if (reg & (1 << m->shift)) 729 if (reg & (1 << m->shift))
718 twl4030->bypass_state |= 730 twl4030->bypass_state |=
@@ -726,12 +738,6 @@ static int bypass_event(struct snd_soc_dapm_widget *w,
726 twl4030->bypass_state |= (1 << 4); 738 twl4030->bypass_state |= (1 << 4);
727 else 739 else
728 twl4030->bypass_state &= ~(1 << 4); 740 twl4030->bypass_state &= ~(1 << 4);
729 } else if (m->reg == TWL4030_REG_VSTPGA) {
730 /* Voice digital bypass */
731 if (reg)
732 twl4030->bypass_state |= (1 << 5);
733 else
734 twl4030->bypass_state &= ~(1 << 5);
735 } else { 741 } else {
736 /* Digital bypass */ 742 /* Digital bypass */
737 if (reg & (0x7 << m->shift)) 743 if (reg & (0x7 << m->shift))