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authorCharles Keepax <ckeepax@opensource.wolfsonmicro.com>2014-07-09 12:41:49 -0400
committerMark Brown <broonie@linaro.org>2014-07-10 06:09:16 -0400
commitc8badda8eea6e9d142c8794519f6a57aa3ea3123 (patch)
treee0cbf76c5533dd3fc2c5461554d9715d8bc7c292 /sound/soc/codecs/arizona.c
parent5e39a50bf8c644f2ef348037d3e3efdc03fa65b2 (diff)
ASoC: arizona: Update handling for input change on an active FLL
Currently, the driver places no restrictions on changes that can be applied to an active FLL. However, it is only possible to change the input for an active FLL, to change the output the FLL should be stopped and then recofigured. This patch disallows changes in output frequency and adds some additional handling to ensure the output remains consistent across an input transition. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/codecs/arizona.c')
-rw-r--r--sound/soc/codecs/arizona.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c
index 7c362cb36b21..be3657ac52a4 100644
--- a/sound/soc/codecs/arizona.c
+++ b/sound/soc/codecs/arizona.c
@@ -1500,6 +1500,12 @@ static int arizona_validate_fll(struct arizona_fll *fll,
1500{ 1500{
1501 unsigned int Fvco_min; 1501 unsigned int Fvco_min;
1502 1502
1503 if (fll->fout && Fout != fll->fout) {
1504 arizona_fll_err(fll,
1505 "Can't change output on active FLL\n");
1506 return -EINVAL;
1507 }
1508
1503 if (Fref / ARIZONA_FLL_MAX_REFDIV > ARIZONA_FLL_MAX_FREF) { 1509 if (Fref / ARIZONA_FLL_MAX_REFDIV > ARIZONA_FLL_MAX_FREF) {
1504 arizona_fll_err(fll, 1510 arizona_fll_err(fll,
1505 "Can't scale %dMHz in to <=13.5MHz\n", 1511 "Can't scale %dMHz in to <=13.5MHz\n",
@@ -1743,6 +1749,15 @@ static int arizona_enable_fll(struct arizona_fll *fll)
1743 if (already_enabled < 0) 1749 if (already_enabled < 0)
1744 return already_enabled; 1750 return already_enabled;
1745 1751
1752 if (already_enabled) {
1753 /* Facilitate smooth refclk across the transition */
1754 regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x7,
1755 ARIZONA_FLL1_GAIN_MASK, 0);
1756 regmap_update_bits_async(fll->arizona->regmap, fll->base + 1,
1757 ARIZONA_FLL1_FREERUN,
1758 ARIZONA_FLL1_FREERUN);
1759 }
1760
1746 /* 1761 /*
1747 * If we have both REFCLK and SYNCCLK then enable both, 1762 * If we have both REFCLK and SYNCCLK then enable both,
1748 * otherwise apply the SYNCCLK settings to REFCLK. 1763 * otherwise apply the SYNCCLK settings to REFCLK.
@@ -1798,6 +1813,10 @@ static int arizona_enable_fll(struct arizona_fll *fll)
1798 ARIZONA_FLL1_SYNC_ENA, 1813 ARIZONA_FLL1_SYNC_ENA,
1799 ARIZONA_FLL1_SYNC_ENA); 1814 ARIZONA_FLL1_SYNC_ENA);
1800 1815
1816 if (already_enabled)
1817 regmap_update_bits_async(arizona->regmap, fll->base + 1,
1818 ARIZONA_FLL1_FREERUN, 0);
1819
1801 ret = wait_for_completion_timeout(&fll->ok, 1820 ret = wait_for_completion_timeout(&fll->ok,
1802 msecs_to_jiffies(250)); 1821 msecs_to_jiffies(250));
1803 if (ret == 0) 1822 if (ret == 0)