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authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-18 13:46:37 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-18 13:46:37 -0400
commitd3e458d78167102cc961237cfceef6fffc80c0b3 (patch)
treee9195c1294daf053614e63ac52b0b44a28479017 /sound/pci
parentf2e1fbb5f2177227f71c4fc0491e531dd7acd385 (diff)
parentd351cf4603edb2a5bfa9a48d06c425511c63f2a3 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6: (308 commits) ALSA: sound/pci/asihpi: check adapter index in hpi_ioctl ALSA: aloop - Fix possible IRQ lock inversion ALSA: sound/core: merge list_del()/list_add_tail() to list_move_tail() ALSA: ctxfi - use list_move() instead of list_del()/list_add() combination ALSA: firewire - msleep needs delay.h ALSA: firewire-lib, firewire-speakers: handle packet queueing errors ALSA: firewire-lib: allocate DMA buffer separately ALSA: firewire-lib: use no-info SYT for packets without SYT sample ALSA: add LaCie FireWire Speakers/Griffin FireWave Surround driver ALSA: hda - Remove an unused variable in patch_realtek.c ALSA: hda - pin-adc-mux-dmic auto-configuration of 92HD8X codecs ALSA: hda - fix digital mic selection in mixer on 92HD8X codecs ALSA: hda - Move default input-src selection to init part ALSA: hda - Initialize special cases for input src in init phase ALSA: ctxfi - Clear input settings before initialization ALSA: ctxfi - Fix SPDIF status retrieval ALSA: ctxfi - Fix incorrect SPDIF status bit mask ALSA: ctxfi - Fix microphone boost codes/comments ALSA: atiixp - Fix wrong time-out checks during ac-link reset ALSA: intel8x0m: append 'm' to "r_intel8x0" ...
Diffstat (limited to 'sound/pci')
-rw-r--r--sound/pci/Kconfig12
-rw-r--r--sound/pci/ac97/ac97_codec.c90
-rw-r--r--sound/pci/ac97/ac97_patch.c52
-rw-r--r--sound/pci/asihpi/asihpi.c774
-rw-r--r--sound/pci/asihpi/hpi.h1214
-rw-r--r--sound/pci/asihpi/hpi6000.c299
-rw-r--r--sound/pci/asihpi/hpi6205.c603
-rw-r--r--sound/pci/asihpi/hpi6205.h7
-rw-r--r--sound/pci/asihpi/hpi_internal.h1118
-rw-r--r--sound/pci/asihpi/hpicmn.c480
-rw-r--r--sound/pci/asihpi/hpicmn.h24
-rw-r--r--sound/pci/asihpi/hpidebug.c157
-rw-r--r--sound/pci/asihpi/hpidebug.h323
-rw-r--r--sound/pci/asihpi/hpidspcd.c37
-rw-r--r--sound/pci/asihpi/hpidspcd.h2
-rw-r--r--sound/pci/asihpi/hpifunc.c2498
-rw-r--r--sound/pci/asihpi/hpimsginit.c18
-rw-r--r--sound/pci/asihpi/hpimsginit.h12
-rw-r--r--sound/pci/asihpi/hpimsgx.c203
-rw-r--r--sound/pci/asihpi/hpioctl.c90
-rw-r--r--sound/pci/asihpi/hpios.h10
-rw-r--r--sound/pci/atiixp.c2
-rw-r--r--sound/pci/atiixp_modem.c2
-rw-r--r--sound/pci/au88x0/au88x0_eq.c3
-rw-r--r--sound/pci/azt3328.c450
-rw-r--r--sound/pci/ctxfi/ctatc.c2
-rw-r--r--sound/pci/ctxfi/ctdaio.c2
-rw-r--r--sound/pci/ctxfi/cthw20k2.c28
-rw-r--r--sound/pci/ctxfi/ctmixer.c19
-rw-r--r--sound/pci/ctxfi/ctvmem.c3
-rw-r--r--sound/pci/emu10k1/emu10k1_main.c2
-rw-r--r--sound/pci/hda/hda_codec.c105
-rw-r--r--sound/pci/hda/hda_codec.h5
-rw-r--r--sound/pci/hda/hda_intel.c7
-rw-r--r--sound/pci/hda/hda_local.h24
-rw-r--r--sound/pci/hda/patch_analog.c117
-rw-r--r--sound/pci/hda/patch_conexant.c124
-rw-r--r--sound/pci/hda/patch_hdmi.c22
-rw-r--r--sound/pci/hda/patch_realtek.c206
-rw-r--r--sound/pci/hda/patch_sigmatel.c318
-rw-r--r--sound/pci/intel8x0m.c107
-rw-r--r--sound/pci/rme9652/hdspm.c4466
42 files changed, 7287 insertions, 6750 deletions
diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig
index 9823d59d7ad7..389cd7931668 100644
--- a/sound/pci/Kconfig
+++ b/sound/pci/Kconfig
@@ -152,10 +152,16 @@ config SND_AZT3328
152 select SND_MPU401_UART 152 select SND_MPU401_UART
153 select SND_PCM 153 select SND_PCM
154 select SND_RAWMIDI 154 select SND_RAWMIDI
155 select SND_AC97_CODEC
155 help 156 help
156 Say Y here to include support for Aztech AZF3328 (PCI168) 157 Say Y here to include support for Aztech AZF3328 (PCI168)
157 soundcards. 158 soundcards.
158 159
160 Supported features: AC97-"conformant" mixer, MPU401/OPL3, analog I/O
161 (16bit/8bit, many sample rates [<= 66.2kHz], NO hardware mixing),
162 Digital Enhanced Game Port, 1.024MHz multimedia sequencer timer,
163 ext. codec (I2S port), onboard amp (4W/4Ohms/ch), suspend/resume.
164
159 To compile this driver as a module, choose M here: the module 165 To compile this driver as a module, choose M here: the module
160 will be called snd-azt3328. 166 will be called snd-azt3328.
161 167
@@ -572,13 +578,13 @@ comment "Don't forget to add built-in firmwares for HDSP driver"
572 depends on SND_HDSP=y 578 depends on SND_HDSP=y
573 579
574config SND_HDSPM 580config SND_HDSPM
575 tristate "RME Hammerfall DSP MADI" 581 tristate "RME Hammerfall DSP MADI/RayDAT/AIO"
576 select SND_HWDEP 582 select SND_HWDEP
577 select SND_RAWMIDI 583 select SND_RAWMIDI
578 select SND_PCM 584 select SND_PCM
579 help 585 help
580 Say Y here to include support for RME Hammerfall DSP MADI 586 Say Y here to include support for RME Hammerfall DSP MADI,
581 soundcards. 587 RayDAT and AIO soundcards.
582 588
583 To compile this driver as a module, choose M here: the module 589 To compile this driver as a module, choose M here: the module
584 will be called snd-hdspm. 590 will be called snd-hdspm.
diff --git a/sound/pci/ac97/ac97_codec.c b/sound/pci/ac97/ac97_codec.c
index cb62d178b3e0..7f4d619f4ddb 100644
--- a/sound/pci/ac97/ac97_codec.c
+++ b/sound/pci/ac97/ac97_codec.c
@@ -71,6 +71,12 @@ static const struct ac97_codec_id snd_ac97_codec_id_vendors[] = {
71{ 0x414b4d00, 0xffffff00, "Asahi Kasei", NULL, NULL }, 71{ 0x414b4d00, 0xffffff00, "Asahi Kasei", NULL, NULL },
72{ 0x414c4300, 0xffffff00, "Realtek", NULL, NULL }, 72{ 0x414c4300, 0xffffff00, "Realtek", NULL, NULL },
73{ 0x414c4700, 0xffffff00, "Realtek", NULL, NULL }, 73{ 0x414c4700, 0xffffff00, "Realtek", NULL, NULL },
74/*
75 * This is an _inofficial_ Aztech Labs entry
76 * (value might differ from unknown official Aztech ID),
77 * currently used by the AC97 emulation of the almost-AC97 PCI168 card.
78 */
79{ 0x415a5400, 0xffffff00, "Aztech Labs (emulated)", NULL, NULL },
74{ 0x434d4900, 0xffffff00, "C-Media Electronics", NULL, NULL }, 80{ 0x434d4900, 0xffffff00, "C-Media Electronics", NULL, NULL },
75{ 0x43525900, 0xffffff00, "Cirrus Logic", NULL, NULL }, 81{ 0x43525900, 0xffffff00, "Cirrus Logic", NULL, NULL },
76{ 0x43585400, 0xffffff00, "Conexant", NULL, NULL }, 82{ 0x43585400, 0xffffff00, "Conexant", NULL, NULL },
@@ -127,6 +133,7 @@ static const struct ac97_codec_id snd_ac97_codec_ids[] = {
127{ 0x414c4781, 0xffffffff, "ALC658D", NULL, NULL }, /* already patched */ 133{ 0x414c4781, 0xffffffff, "ALC658D", NULL, NULL }, /* already patched */
128{ 0x414c4780, 0xfffffff0, "ALC658", patch_alc655, NULL }, 134{ 0x414c4780, 0xfffffff0, "ALC658", patch_alc655, NULL },
129{ 0x414c4790, 0xfffffff0, "ALC850", patch_alc850, NULL }, 135{ 0x414c4790, 0xfffffff0, "ALC850", patch_alc850, NULL },
136{ 0x415a5401, 0xffffffff, "AZF3328", patch_aztech_azf3328, NULL },
130{ 0x434d4941, 0xffffffff, "CMI9738", patch_cm9738, NULL }, 137{ 0x434d4941, 0xffffffff, "CMI9738", patch_cm9738, NULL },
131{ 0x434d4961, 0xffffffff, "CMI9739", patch_cm9739, NULL }, 138{ 0x434d4961, 0xffffffff, "CMI9739", patch_cm9739, NULL },
132{ 0x434d4969, 0xffffffff, "CMI9780", patch_cm9780, NULL }, 139{ 0x434d4969, 0xffffffff, "CMI9780", patch_cm9780, NULL },
@@ -590,9 +597,9 @@ static int snd_ac97_put_volsw(struct snd_kcontrol *kcontrol,
590 snd_ac97_page_restore(ac97, page_save); 597 snd_ac97_page_restore(ac97, page_save);
591#ifdef CONFIG_SND_AC97_POWER_SAVE 598#ifdef CONFIG_SND_AC97_POWER_SAVE
592 /* check analog mixer power-down */ 599 /* check analog mixer power-down */
593 if ((val_mask & 0x8000) && 600 if ((val_mask & AC97_PD_EAPD) &&
594 (kcontrol->private_value & (1<<30))) { 601 (kcontrol->private_value & (1<<30))) {
595 if (val & 0x8000) 602 if (val & AC97_PD_EAPD)
596 ac97->power_up &= ~(1 << (reg>>1)); 603 ac97->power_up &= ~(1 << (reg>>1));
597 else 604 else
598 ac97->power_up |= 1 << (reg>>1); 605 ac97->power_up |= 1 << (reg>>1);
@@ -1035,20 +1042,20 @@ static int snd_ac97_dev_free(struct snd_device *device)
1035 1042
1036static int snd_ac97_try_volume_mix(struct snd_ac97 * ac97, int reg) 1043static int snd_ac97_try_volume_mix(struct snd_ac97 * ac97, int reg)
1037{ 1044{
1038 unsigned short val, mask = 0x8000; 1045 unsigned short val, mask = AC97_MUTE_MASK_MONO;
1039 1046
1040 if (! snd_ac97_valid_reg(ac97, reg)) 1047 if (! snd_ac97_valid_reg(ac97, reg))
1041 return 0; 1048 return 0;
1042 1049
1043 switch (reg) { 1050 switch (reg) {
1044 case AC97_MASTER_TONE: 1051 case AC97_MASTER_TONE:
1045 return ac97->caps & 0x04 ? 1 : 0; 1052 return ac97->caps & AC97_BC_BASS_TREBLE ? 1 : 0;
1046 case AC97_HEADPHONE: 1053 case AC97_HEADPHONE:
1047 return ac97->caps & 0x10 ? 1 : 0; 1054 return ac97->caps & AC97_BC_HEADPHONE ? 1 : 0;
1048 case AC97_REC_GAIN_MIC: 1055 case AC97_REC_GAIN_MIC:
1049 return ac97->caps & 0x01 ? 1 : 0; 1056 return ac97->caps & AC97_BC_DEDICATED_MIC ? 1 : 0;
1050 case AC97_3D_CONTROL: 1057 case AC97_3D_CONTROL:
1051 if (ac97->caps & 0x7c00) { 1058 if (ac97->caps & AC97_BC_3D_TECH_ID_MASK) {
1052 val = snd_ac97_read(ac97, reg); 1059 val = snd_ac97_read(ac97, reg);
1053 /* if nonzero - fixed and we can't set it */ 1060 /* if nonzero - fixed and we can't set it */
1054 return val == 0; 1061 return val == 0;
@@ -1104,7 +1111,10 @@ static void check_volume_resolution(struct snd_ac97 *ac97, int reg, unsigned cha
1104 *lo_max = *hi_max = 0; 1111 *lo_max = *hi_max = 0;
1105 for (i = 0 ; i < ARRAY_SIZE(cbit); i++) { 1112 for (i = 0 ; i < ARRAY_SIZE(cbit); i++) {
1106 unsigned short val; 1113 unsigned short val;
1107 snd_ac97_write(ac97, reg, 0x8080 | cbit[i] | (cbit[i] << 8)); 1114 snd_ac97_write(
1115 ac97, reg,
1116 AC97_MUTE_MASK_STEREO | cbit[i] | (cbit[i] << 8)
1117 );
1108 /* Do the read twice due to buffers on some ac97 codecs. 1118 /* Do the read twice due to buffers on some ac97 codecs.
1109 * e.g. The STAC9704 returns exactly what you wrote to the register 1119 * e.g. The STAC9704 returns exactly what you wrote to the register
1110 * if you read it immediately. This causes the detect routine to fail. 1120 * if you read it immediately. This causes the detect routine to fail.
@@ -1139,14 +1149,14 @@ static void snd_ac97_change_volume_params2(struct snd_ac97 * ac97, int reg, int
1139 unsigned short val, val1; 1149 unsigned short val, val1;
1140 1150
1141 *max = 63; 1151 *max = 63;
1142 val = 0x8080 | (0x20 << shift); 1152 val = AC97_MUTE_MASK_STEREO | (0x20 << shift);
1143 snd_ac97_write(ac97, reg, val); 1153 snd_ac97_write(ac97, reg, val);
1144 val1 = snd_ac97_read(ac97, reg); 1154 val1 = snd_ac97_read(ac97, reg);
1145 if (val != val1) { 1155 if (val != val1) {
1146 *max = 31; 1156 *max = 31;
1147 } 1157 }
1148 /* reset volume to zero */ 1158 /* reset volume to zero */
1149 snd_ac97_write_cache(ac97, reg, 0x8080); 1159 snd_ac97_write_cache(ac97, reg, AC97_MUTE_MASK_STEREO);
1150} 1160}
1151 1161
1152static inline int printable(unsigned int x) 1162static inline int printable(unsigned int x)
@@ -1183,16 +1193,16 @@ static int snd_ac97_cmute_new_stereo(struct snd_card *card, char *name, int reg,
1183 if (! snd_ac97_valid_reg(ac97, reg)) 1193 if (! snd_ac97_valid_reg(ac97, reg))
1184 return 0; 1194 return 0;
1185 1195
1186 mute_mask = 0x8000; 1196 mute_mask = AC97_MUTE_MASK_MONO;
1187 val = snd_ac97_read(ac97, reg); 1197 val = snd_ac97_read(ac97, reg);
1188 if (check_stereo || (ac97->flags & AC97_STEREO_MUTES)) { 1198 if (check_stereo || (ac97->flags & AC97_STEREO_MUTES)) {
1189 /* check whether both mute bits work */ 1199 /* check whether both mute bits work */
1190 val1 = val | 0x8080; 1200 val1 = val | AC97_MUTE_MASK_STEREO;
1191 snd_ac97_write(ac97, reg, val1); 1201 snd_ac97_write(ac97, reg, val1);
1192 if (val1 == snd_ac97_read(ac97, reg)) 1202 if (val1 == snd_ac97_read(ac97, reg))
1193 mute_mask = 0x8080; 1203 mute_mask = AC97_MUTE_MASK_STEREO;
1194 } 1204 }
1195 if (mute_mask == 0x8080) { 1205 if (mute_mask == AC97_MUTE_MASK_STEREO) {
1196 struct snd_kcontrol_new tmp = AC97_DOUBLE(name, reg, 15, 7, 1, 1); 1206 struct snd_kcontrol_new tmp = AC97_DOUBLE(name, reg, 15, 7, 1, 1);
1197 if (check_amix) 1207 if (check_amix)
1198 tmp.private_value |= (1 << 30); 1208 tmp.private_value |= (1 << 30);
@@ -1268,9 +1278,11 @@ static int snd_ac97_cvol_new(struct snd_card *card, char *name, int reg, unsigne
1268 err = snd_ctl_add(card, kctl); 1278 err = snd_ctl_add(card, kctl);
1269 if (err < 0) 1279 if (err < 0)
1270 return err; 1280 return err;
1271 snd_ac97_write_cache(ac97, reg, 1281 snd_ac97_write_cache(
1272 (snd_ac97_read(ac97, reg) & 0x8080) | 1282 ac97, reg,
1273 lo_max | (hi_max << 8)); 1283 (snd_ac97_read(ac97, reg) & AC97_MUTE_MASK_STEREO)
1284 | lo_max | (hi_max << 8)
1285 );
1274 return 0; 1286 return 0;
1275} 1287}
1276 1288
@@ -1332,7 +1344,7 @@ static int snd_ac97_mixer_build(struct snd_ac97 * ac97)
1332 return err; 1344 return err;
1333 } 1345 }
1334 1346
1335 ac97->regs[AC97_CENTER_LFE_MASTER] = 0x8080; 1347 ac97->regs[AC97_CENTER_LFE_MASTER] = AC97_MUTE_MASK_STEREO;
1336 1348
1337 /* build center controls */ 1349 /* build center controls */
1338 if ((snd_ac97_try_volume_mix(ac97, AC97_CENTER_LFE_MASTER)) 1350 if ((snd_ac97_try_volume_mix(ac97, AC97_CENTER_LFE_MASTER))
@@ -1410,8 +1422,12 @@ static int snd_ac97_mixer_build(struct snd_ac97 * ac97)
1410 if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_pc_beep[idx], ac97))) < 0) 1422 if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_pc_beep[idx], ac97))) < 0)
1411 return err; 1423 return err;
1412 set_tlv_db_scale(kctl, db_scale_4bit); 1424 set_tlv_db_scale(kctl, db_scale_4bit);
1413 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 1425 snd_ac97_write_cache(
1414 snd_ac97_read(ac97, AC97_PC_BEEP) | 0x801e); 1426 ac97,
1427 AC97_PC_BEEP,
1428 (snd_ac97_read(ac97, AC97_PC_BEEP)
1429 | AC97_MUTE_MASK_MONO | 0x001e)
1430 );
1415 } 1431 }
1416 1432
1417 /* build Phone controls */ 1433 /* build Phone controls */
@@ -1545,7 +1561,7 @@ static int snd_ac97_mixer_build(struct snd_ac97 * ac97)
1545 } 1561 }
1546 1562
1547 /* build Simulated Stereo Enhancement control */ 1563 /* build Simulated Stereo Enhancement control */
1548 if (ac97->caps & 0x0008) { 1564 if (ac97->caps & AC97_BC_SIM_STEREO) {
1549 if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_STEREO_ENHANCEMENT], ac97))) < 0) 1565 if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_STEREO_ENHANCEMENT], ac97))) < 0)
1550 return err; 1566 return err;
1551 } 1567 }
@@ -1557,7 +1573,7 @@ static int snd_ac97_mixer_build(struct snd_ac97 * ac97)
1557 } 1573 }
1558 1574
1559 /* build Loudness control */ 1575 /* build Loudness control */
1560 if (ac97->caps & 0x0020) { 1576 if (ac97->caps & AC97_BC_LOUDNESS) {
1561 if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_LOUDNESS], ac97))) < 0) 1577 if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_LOUDNESS], ac97))) < 0)
1562 return err; 1578 return err;
1563 } 1579 }
@@ -2542,8 +2558,8 @@ void snd_ac97_resume(struct snd_ac97 *ac97)
2542 schedule_timeout_uninterruptible(1); 2558 schedule_timeout_uninterruptible(1);
2543 } while (time_after_eq(end_time, jiffies)); 2559 } while (time_after_eq(end_time, jiffies));
2544 /* FIXME: extra delay */ 2560 /* FIXME: extra delay */
2545 ac97->bus->ops->write(ac97, AC97_MASTER, 0x8000); 2561 ac97->bus->ops->write(ac97, AC97_MASTER, AC97_MUTE_MASK_MONO);
2546 if (snd_ac97_read(ac97, AC97_MASTER) != 0x8000) 2562 if (snd_ac97_read(ac97, AC97_MASTER) != AC97_MUTE_MASK_MONO)
2547 msleep(250); 2563 msleep(250);
2548 } else { 2564 } else {
2549 end_time = jiffies + msecs_to_jiffies(100); 2565 end_time = jiffies + msecs_to_jiffies(100);
@@ -2747,12 +2763,12 @@ static int master_mute_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem
2747 int rshift = (kcontrol->private_value >> 12) & 0x0f; 2763 int rshift = (kcontrol->private_value >> 12) & 0x0f;
2748 unsigned short mask; 2764 unsigned short mask;
2749 if (shift != rshift) 2765 if (shift != rshift)
2750 mask = 0x8080; 2766 mask = AC97_MUTE_MASK_STEREO;
2751 else 2767 else
2752 mask = 0x8000; 2768 mask = AC97_MUTE_MASK_MONO;
2753 snd_ac97_update_bits(ac97, AC97_POWERDOWN, 0x8000, 2769 snd_ac97_update_bits(ac97, AC97_POWERDOWN, AC97_PD_EAPD,
2754 (ac97->regs[AC97_MASTER] & mask) == mask ? 2770 (ac97->regs[AC97_MASTER] & mask) == mask ?
2755 0x8000 : 0); 2771 AC97_PD_EAPD : 0);
2756 } 2772 }
2757 return err; 2773 return err;
2758} 2774}
@@ -2765,7 +2781,10 @@ static int tune_mute_led(struct snd_ac97 *ac97)
2765 return -ENOENT; 2781 return -ENOENT;
2766 msw->put = master_mute_sw_put; 2782 msw->put = master_mute_sw_put;
2767 snd_ac97_remove_ctl(ac97, "External Amplifier", NULL); 2783 snd_ac97_remove_ctl(ac97, "External Amplifier", NULL);
2768 snd_ac97_update_bits(ac97, AC97_POWERDOWN, 0x8000, 0x8000); /* mute LED on */ 2784 snd_ac97_update_bits(
2785 ac97, AC97_POWERDOWN,
2786 AC97_PD_EAPD, AC97_PD_EAPD /* mute LED on */
2787 );
2769 ac97->scaps |= AC97_SCAP_EAPD_LED; 2788 ac97->scaps |= AC97_SCAP_EAPD_LED;
2770 return 0; 2789 return 0;
2771} 2790}
@@ -2780,12 +2799,12 @@ static int hp_master_mute_sw_put(struct snd_kcontrol *kcontrol,
2780 int rshift = (kcontrol->private_value >> 12) & 0x0f; 2799 int rshift = (kcontrol->private_value >> 12) & 0x0f;
2781 unsigned short mask; 2800 unsigned short mask;
2782 if (shift != rshift) 2801 if (shift != rshift)
2783 mask = 0x8080; 2802 mask = AC97_MUTE_MASK_STEREO;
2784 else 2803 else
2785 mask = 0x8000; 2804 mask = AC97_MUTE_MASK_MONO;
2786 snd_ac97_update_bits(ac97, AC97_POWERDOWN, 0x8000, 2805 snd_ac97_update_bits(ac97, AC97_POWERDOWN, AC97_PD_EAPD,
2787 (ac97->regs[AC97_MASTER] & mask) == mask ? 2806 (ac97->regs[AC97_MASTER] & mask) == mask ?
2788 0x8000 : 0); 2807 AC97_PD_EAPD : 0);
2789 } 2808 }
2790 return err; 2809 return err;
2791} 2810}
@@ -2801,7 +2820,10 @@ static int tune_hp_mute_led(struct snd_ac97 *ac97)
2801 snd_ac97_remove_ctl(ac97, "External Amplifier", NULL); 2820 snd_ac97_remove_ctl(ac97, "External Amplifier", NULL);
2802 snd_ac97_remove_ctl(ac97, "Headphone Playback", "Switch"); 2821 snd_ac97_remove_ctl(ac97, "Headphone Playback", "Switch");
2803 snd_ac97_remove_ctl(ac97, "Headphone Playback", "Volume"); 2822 snd_ac97_remove_ctl(ac97, "Headphone Playback", "Volume");
2804 snd_ac97_update_bits(ac97, AC97_POWERDOWN, 0x8000, 0x8000); /* mute LED on */ 2823 snd_ac97_update_bits(
2824 ac97, AC97_POWERDOWN,
2825 AC97_PD_EAPD, AC97_PD_EAPD /* mute LED on */
2826 );
2805 return 0; 2827 return 0;
2806} 2828}
2807 2829
diff --git a/sound/pci/ac97/ac97_patch.c b/sound/pci/ac97/ac97_patch.c
index bf47574ca1f0..200c9a1d48b7 100644
--- a/sound/pci/ac97/ac97_patch.c
+++ b/sound/pci/ac97/ac97_patch.c
@@ -27,6 +27,15 @@
27#include "ac97_patch.h" 27#include "ac97_patch.h"
28 28
29/* 29/*
30 * Forward declarations
31 */
32
33static struct snd_kcontrol *snd_ac97_find_mixer_ctl(struct snd_ac97 *ac97,
34 const char *name);
35static int snd_ac97_add_vmaster(struct snd_ac97 *ac97, char *name,
36 const unsigned int *tlv, const char **slaves);
37
38/*
30 * Chip specific initialization 39 * Chip specific initialization
31 */ 40 */
32 41
@@ -2940,6 +2949,49 @@ static int patch_alc850(struct snd_ac97 *ac97)
2940 return 0; 2949 return 0;
2941} 2950}
2942 2951
2952static int patch_aztech_azf3328_specific(struct snd_ac97 *ac97)
2953{
2954 struct snd_kcontrol *kctl_3d_center =
2955 snd_ac97_find_mixer_ctl(ac97, "3D Control - Center");
2956 struct snd_kcontrol *kctl_3d_depth =
2957 snd_ac97_find_mixer_ctl(ac97, "3D Control - Depth");
2958
2959 /*
2960 * 3D register is different from AC97 standard layout
2961 * (also do some renaming, to resemble Windows driver naming)
2962 */
2963 if (kctl_3d_center) {
2964 kctl_3d_center->private_value =
2965 AC97_SINGLE_VALUE(AC97_3D_CONTROL, 1, 0x07, 0);
2966 snd_ac97_rename_vol_ctl(ac97,
2967 "3D Control - Center", "3D Control - Width"
2968 );
2969 }
2970 if (kctl_3d_depth)
2971 kctl_3d_depth->private_value =
2972 AC97_SINGLE_VALUE(AC97_3D_CONTROL, 8, 0x03, 0);
2973
2974 /* Aztech Windows driver calls the
2975 equivalent control "Modem Playback", thus rename it: */
2976 snd_ac97_rename_vol_ctl(ac97,
2977 "Master Mono Playback", "Modem Playback"
2978 );
2979 snd_ac97_rename_vol_ctl(ac97,
2980 "Headphone Playback", "FM Synth Playback"
2981 );
2982
2983 return 0;
2984}
2985
2986static const struct snd_ac97_build_ops patch_aztech_azf3328_ops = {
2987 .build_specific = patch_aztech_azf3328_specific
2988};
2989
2990static int patch_aztech_azf3328(struct snd_ac97 *ac97)
2991{
2992 ac97->build_ops = &patch_aztech_azf3328_ops;
2993 return 0;
2994}
2943 2995
2944/* 2996/*
2945 * C-Media CM97xx codecs 2997 * C-Media CM97xx codecs
diff --git a/sound/pci/asihpi/asihpi.c b/sound/pci/asihpi/asihpi.c
index c80b0b863c54..0ac1f98d91a1 100644
--- a/sound/pci/asihpi/asihpi.c
+++ b/sound/pci/asihpi/asihpi.c
@@ -21,6 +21,7 @@
21 * would appreciate it if you grant us the right to use those modifications 21 * would appreciate it if you grant us the right to use those modifications
22 * for any purpose including commercial applications. 22 * for any purpose including commercial applications.
23 */ 23 */
24
24/* >0: print Hw params, timer vars. >1: print stream write/copy sizes */ 25/* >0: print Hw params, timer vars. >1: print stream write/copy sizes */
25#define REALLY_VERBOSE_LOGGING 0 26#define REALLY_VERBOSE_LOGGING 0
26 27
@@ -36,16 +37,12 @@
36#define VPRINTK2(...) 37#define VPRINTK2(...)
37#endif 38#endif
38 39
39#ifndef ASI_STYLE_NAMES
40/* not sure how ALSA style name should look */
41#define ASI_STYLE_NAMES 1
42#endif
43
44#include "hpi_internal.h" 40#include "hpi_internal.h"
45#include "hpimsginit.h" 41#include "hpimsginit.h"
46#include "hpioctl.h" 42#include "hpioctl.h"
47 43
48#include <linux/pci.h> 44#include <linux/pci.h>
45#include <linux/version.h>
49#include <linux/init.h> 46#include <linux/init.h>
50#include <linux/jiffies.h> 47#include <linux/jiffies.h>
51#include <linux/slab.h> 48#include <linux/slab.h>
@@ -85,11 +82,11 @@ MODULE_PARM_DESC(enable_hpi_hwdep,
85 82
86/* identify driver */ 83/* identify driver */
87#ifdef KERNEL_ALSA_BUILD 84#ifdef KERNEL_ALSA_BUILD
88static char *build_info = "built using headers from kernel source"; 85static char *build_info = "Built using headers from kernel source";
89module_param(build_info, charp, S_IRUGO); 86module_param(build_info, charp, S_IRUGO);
90MODULE_PARM_DESC(build_info, "built using headers from kernel source"); 87MODULE_PARM_DESC(build_info, "built using headers from kernel source");
91#else 88#else
92static char *build_info = "built within ALSA source"; 89static char *build_info = "Built within ALSA source";
93module_param(build_info, charp, S_IRUGO); 90module_param(build_info, charp, S_IRUGO);
94MODULE_PARM_DESC(build_info, "built within ALSA source"); 91MODULE_PARM_DESC(build_info, "built within ALSA source");
95#endif 92#endif
@@ -100,13 +97,14 @@ static const int mixer_dump;
100#define DEFAULT_SAMPLERATE 44100 97#define DEFAULT_SAMPLERATE 44100
101static int adapter_fs = DEFAULT_SAMPLERATE; 98static int adapter_fs = DEFAULT_SAMPLERATE;
102 99
103static struct hpi_hsubsys *ss; /* handle to HPI audio subsystem */
104
105/* defaults */ 100/* defaults */
106#define PERIODS_MIN 2 101#define PERIODS_MIN 2
107#define PERIOD_BYTES_MIN 2304 102#define PERIOD_BYTES_MIN 2048
108#define BUFFER_BYTES_MAX (512 * 1024) 103#define BUFFER_BYTES_MAX (512 * 1024)
109 104
105/* convert stream to character */
106#define SCHR(s) ((s == SNDRV_PCM_STREAM_PLAYBACK) ? 'P' : 'C')
107
110/*#define TIMER_MILLISECONDS 20 108/*#define TIMER_MILLISECONDS 20
111#define FORCE_TIMER_JIFFIES ((TIMER_MILLISECONDS * HZ + 999)/1000) 109#define FORCE_TIMER_JIFFIES ((TIMER_MILLISECONDS * HZ + 999)/1000)
112*/ 110*/
@@ -152,11 +150,12 @@ struct snd_card_asihpi_pcm {
152 struct timer_list timer; 150 struct timer_list timer;
153 unsigned int respawn_timer; 151 unsigned int respawn_timer;
154 unsigned int hpi_buffer_attached; 152 unsigned int hpi_buffer_attached;
155 unsigned int pcm_size; 153 unsigned int buffer_bytes;
156 unsigned int pcm_count; 154 unsigned int period_bytes;
157 unsigned int bytes_per_sec; 155 unsigned int bytes_per_sec;
158 unsigned int pcm_irq_pos; /* IRQ position */ 156 unsigned int pcm_buf_host_rw_ofs; /* Host R/W pos */
159 unsigned int pcm_buf_pos; /* position in buffer */ 157 unsigned int pcm_buf_dma_ofs; /* DMA R/W offset in buffer */
158 unsigned int pcm_buf_elapsed_dma_ofs; /* DMA R/W offset in buffer */
160 struct snd_pcm_substream *substream; 159 struct snd_pcm_substream *substream;
161 u32 h_stream; 160 u32 h_stream;
162 struct hpi_format format; 161 struct hpi_format format;
@@ -167,7 +166,6 @@ struct snd_card_asihpi_pcm {
167/* Functions to allow driver to give a buffer to HPI for busmastering */ 166/* Functions to allow driver to give a buffer to HPI for busmastering */
168 167
169static u16 hpi_stream_host_buffer_attach( 168static u16 hpi_stream_host_buffer_attach(
170 struct hpi_hsubsys *hS,
171 u32 h_stream, /* handle to outstream. */ 169 u32 h_stream, /* handle to outstream. */
172 u32 size_in_bytes, /* size in bytes of bus mastering buffer */ 170 u32 size_in_bytes, /* size in bytes of bus mastering buffer */
173 u32 pci_address 171 u32 pci_address
@@ -194,10 +192,7 @@ static u16 hpi_stream_host_buffer_attach(
194 return hr.error; 192 return hr.error;
195} 193}
196 194
197static u16 hpi_stream_host_buffer_detach( 195static u16 hpi_stream_host_buffer_detach(u32 h_stream)
198 struct hpi_hsubsys *hS,
199 u32 h_stream
200)
201{ 196{
202 struct hpi_message hm; 197 struct hpi_message hm;
203 struct hpi_response hr; 198 struct hpi_response hr;
@@ -218,24 +213,23 @@ static u16 hpi_stream_host_buffer_detach(
218 return hr.error; 213 return hr.error;
219} 214}
220 215
221static inline u16 hpi_stream_start(struct hpi_hsubsys *hS, u32 h_stream) 216static inline u16 hpi_stream_start(u32 h_stream)
222{ 217{
223 if (hpi_handle_object(h_stream) == HPI_OBJ_OSTREAM) 218 if (hpi_handle_object(h_stream) == HPI_OBJ_OSTREAM)
224 return hpi_outstream_start(hS, h_stream); 219 return hpi_outstream_start(h_stream);
225 else 220 else
226 return hpi_instream_start(hS, h_stream); 221 return hpi_instream_start(h_stream);
227} 222}
228 223
229static inline u16 hpi_stream_stop(struct hpi_hsubsys *hS, u32 h_stream) 224static inline u16 hpi_stream_stop(u32 h_stream)
230{ 225{
231 if (hpi_handle_object(h_stream) == HPI_OBJ_OSTREAM) 226 if (hpi_handle_object(h_stream) == HPI_OBJ_OSTREAM)
232 return hpi_outstream_stop(hS, h_stream); 227 return hpi_outstream_stop(h_stream);
233 else 228 else
234 return hpi_instream_stop(hS, h_stream); 229 return hpi_instream_stop(h_stream);
235} 230}
236 231
237static inline u16 hpi_stream_get_info_ex( 232static inline u16 hpi_stream_get_info_ex(
238 struct hpi_hsubsys *hS,
239 u32 h_stream, 233 u32 h_stream,
240 u16 *pw_state, 234 u16 *pw_state,
241 u32 *pbuffer_size, 235 u32 *pbuffer_size,
@@ -244,42 +238,43 @@ static inline u16 hpi_stream_get_info_ex(
244 u32 *pauxiliary_data 238 u32 *pauxiliary_data
245) 239)
246{ 240{
241 u16 e;
247 if (hpi_handle_object(h_stream) == HPI_OBJ_OSTREAM) 242 if (hpi_handle_object(h_stream) == HPI_OBJ_OSTREAM)
248 return hpi_outstream_get_info_ex(hS, h_stream, pw_state, 243 e = hpi_outstream_get_info_ex(h_stream, pw_state,
249 pbuffer_size, pdata_in_buffer, 244 pbuffer_size, pdata_in_buffer,
250 psample_count, pauxiliary_data); 245 psample_count, pauxiliary_data);
251 else 246 else
252 return hpi_instream_get_info_ex(hS, h_stream, pw_state, 247 e = hpi_instream_get_info_ex(h_stream, pw_state,
253 pbuffer_size, pdata_in_buffer, 248 pbuffer_size, pdata_in_buffer,
254 psample_count, pauxiliary_data); 249 psample_count, pauxiliary_data);
250 return e;
255} 251}
256 252
257static inline u16 hpi_stream_group_add(struct hpi_hsubsys *hS, 253static inline u16 hpi_stream_group_add(
258 u32 h_master, 254 u32 h_master,
259 u32 h_stream) 255 u32 h_stream)
260{ 256{
261 if (hpi_handle_object(h_master) == HPI_OBJ_OSTREAM) 257 if (hpi_handle_object(h_master) == HPI_OBJ_OSTREAM)
262 return hpi_outstream_group_add(hS, h_master, h_stream); 258 return hpi_outstream_group_add(h_master, h_stream);
263 else 259 else
264 return hpi_instream_group_add(hS, h_master, h_stream); 260 return hpi_instream_group_add(h_master, h_stream);
265} 261}
266 262
267static inline u16 hpi_stream_group_reset(struct hpi_hsubsys *hS, 263static inline u16 hpi_stream_group_reset(u32 h_stream)
268 u32 h_stream)
269{ 264{
270 if (hpi_handle_object(h_stream) == HPI_OBJ_OSTREAM) 265 if (hpi_handle_object(h_stream) == HPI_OBJ_OSTREAM)
271 return hpi_outstream_group_reset(hS, h_stream); 266 return hpi_outstream_group_reset(h_stream);
272 else 267 else
273 return hpi_instream_group_reset(hS, h_stream); 268 return hpi_instream_group_reset(h_stream);
274} 269}
275 270
276static inline u16 hpi_stream_group_get_map(struct hpi_hsubsys *hS, 271static inline u16 hpi_stream_group_get_map(
277 u32 h_stream, u32 *mo, u32 *mi) 272 u32 h_stream, u32 *mo, u32 *mi)
278{ 273{
279 if (hpi_handle_object(h_stream) == HPI_OBJ_OSTREAM) 274 if (hpi_handle_object(h_stream) == HPI_OBJ_OSTREAM)
280 return hpi_outstream_group_get_map(hS, h_stream, mo, mi); 275 return hpi_outstream_group_get_map(h_stream, mo, mi);
281 else 276 else
282 return hpi_instream_group_get_map(hS, h_stream, mo, mi); 277 return hpi_instream_group_get_map(h_stream, mo, mi);
283} 278}
284 279
285static u16 handle_error(u16 err, int line, char *filename) 280static u16 handle_error(u16 err, int line, char *filename)
@@ -299,11 +294,11 @@ static void print_hwparams(struct snd_pcm_hw_params *p)
299{ 294{
300 snd_printd("HWPARAMS \n"); 295 snd_printd("HWPARAMS \n");
301 snd_printd("samplerate %d \n", params_rate(p)); 296 snd_printd("samplerate %d \n", params_rate(p));
302 snd_printd("channels %d \n", params_channels(p)); 297 snd_printd("Channels %d \n", params_channels(p));
303 snd_printd("format %d \n", params_format(p)); 298 snd_printd("Format %d \n", params_format(p));
304 snd_printd("subformat %d \n", params_subformat(p)); 299 snd_printd("subformat %d \n", params_subformat(p));
305 snd_printd("buffer bytes %d \n", params_buffer_bytes(p)); 300 snd_printd("Buffer bytes %d \n", params_buffer_bytes(p));
306 snd_printd("period bytes %d \n", params_period_bytes(p)); 301 snd_printd("Period bytes %d \n", params_period_bytes(p));
307 snd_printd("access %d \n", params_access(p)); 302 snd_printd("access %d \n", params_access(p));
308 snd_printd("period_size %d \n", params_period_size(p)); 303 snd_printd("period_size %d \n", params_period_size(p));
309 snd_printd("periods %d \n", params_periods(p)); 304 snd_printd("periods %d \n", params_periods(p));
@@ -335,7 +330,7 @@ static snd_pcm_format_t hpi_to_alsa_formats[] = {
335 */ 330 */
336 -1 331 -1
337#else 332#else
338 /* SNDRV_PCM_FORMAT_S24_3LE */ /* { HPI_FORMAT_PCM24_SIGNED 15 */ 333 /* SNDRV_PCM_FORMAT_S24_3LE */ /* HPI_FORMAT_PCM24_SIGNED 15 */
339#endif 334#endif
340}; 335};
341 336
@@ -378,20 +373,20 @@ static void snd_card_asihpi_pcm_samplerates(struct snd_card_asihpi *asihpi,
378 } else { 373 } else {
379 /* on cards without SRC, 374 /* on cards without SRC,
380 valid rates are determined by sampleclock */ 375 valid rates are determined by sampleclock */
381 err = hpi_mixer_get_control(ss, asihpi->h_mixer, 376 err = hpi_mixer_get_control(asihpi->h_mixer,
382 HPI_SOURCENODE_CLOCK_SOURCE, 0, 0, 0, 377 HPI_SOURCENODE_CLOCK_SOURCE, 0, 0, 0,
383 HPI_CONTROL_SAMPLECLOCK, &h_control); 378 HPI_CONTROL_SAMPLECLOCK, &h_control);
384 if (err) { 379 if (err) {
385 snd_printk(KERN_ERR 380 snd_printk(KERN_ERR
386 "no local sampleclock, err %d\n", err); 381 "No local sampleclock, err %d\n", err);
387 } 382 }
388 383
389 for (idx = 0; idx < 100; idx++) { 384 for (idx = 0; idx < 100; idx++) {
390 if (hpi_sample_clock_query_local_rate(ss, 385 if (hpi_sample_clock_query_local_rate(
391 h_control, idx, &sample_rate)) { 386 h_control, idx, &sample_rate)) {
392 if (!idx) 387 if (!idx)
393 snd_printk(KERN_ERR 388 snd_printk(KERN_ERR
394 "local rate query failed\n"); 389 "Local rate query failed\n");
395 390
396 break; 391 break;
397 } 392 }
@@ -480,10 +475,10 @@ static int snd_card_asihpi_pcm_hw_params(struct snd_pcm_substream *substream,
480 format, params_rate(params), 0, 0)); 475 format, params_rate(params), 0, 0));
481 476
482 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { 477 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
483 if (hpi_instream_reset(ss, dpcm->h_stream) != 0) 478 if (hpi_instream_reset(dpcm->h_stream) != 0)
484 return -EINVAL; 479 return -EINVAL;
485 480
486 if (hpi_instream_set_format(ss, 481 if (hpi_instream_set_format(
487 dpcm->h_stream, &dpcm->format) != 0) 482 dpcm->h_stream, &dpcm->format) != 0)
488 return -EINVAL; 483 return -EINVAL;
489 } 484 }
@@ -491,10 +486,10 @@ static int snd_card_asihpi_pcm_hw_params(struct snd_pcm_substream *substream,
491 dpcm->hpi_buffer_attached = 0; 486 dpcm->hpi_buffer_attached = 0;
492 if (card->support_mmap) { 487 if (card->support_mmap) {
493 488
494 err = hpi_stream_host_buffer_attach(ss, dpcm->h_stream, 489 err = hpi_stream_host_buffer_attach(dpcm->h_stream,
495 params_buffer_bytes(params), runtime->dma_addr); 490 params_buffer_bytes(params), runtime->dma_addr);
496 if (err == 0) { 491 if (err == 0) {
497 snd_printd(KERN_INFO 492 VPRINTK1(KERN_INFO
498 "stream_host_buffer_attach succeeded %u %lu\n", 493 "stream_host_buffer_attach succeeded %u %lu\n",
499 params_buffer_bytes(params), 494 params_buffer_bytes(params),
500 (unsigned long)runtime->dma_addr); 495 (unsigned long)runtime->dma_addr);
@@ -505,11 +500,11 @@ static int snd_card_asihpi_pcm_hw_params(struct snd_pcm_substream *substream,
505 return -ENOMEM; 500 return -ENOMEM;
506 } 501 }
507 502
508 err = hpi_stream_get_info_ex(ss, dpcm->h_stream, NULL, 503 err = hpi_stream_get_info_ex(dpcm->h_stream, NULL,
509 &dpcm->hpi_buffer_attached, 504 &dpcm->hpi_buffer_attached,
510 NULL, NULL, NULL); 505 NULL, NULL, NULL);
511 506
512 snd_printd(KERN_INFO "stream_host_buffer_attach status 0x%x\n", 507 VPRINTK1(KERN_INFO "stream_host_buffer_attach status 0x%x\n",
513 dpcm->hpi_buffer_attached); 508 dpcm->hpi_buffer_attached);
514 } 509 }
515 bytes_per_sec = params_rate(params) * params_channels(params); 510 bytes_per_sec = params_rate(params) * params_channels(params);
@@ -520,16 +515,32 @@ static int snd_card_asihpi_pcm_hw_params(struct snd_pcm_substream *substream,
520 return -EINVAL; 515 return -EINVAL;
521 516
522 dpcm->bytes_per_sec = bytes_per_sec; 517 dpcm->bytes_per_sec = bytes_per_sec;
523 dpcm->pcm_size = params_buffer_bytes(params); 518 dpcm->buffer_bytes = params_buffer_bytes(params);
524 dpcm->pcm_count = params_period_bytes(params); 519 dpcm->period_bytes = params_period_bytes(params);
525 snd_printd(KERN_INFO "pcm_size=%d, pcm_count=%d, bps=%d\n", 520 VPRINTK1(KERN_INFO "buffer_bytes=%d, period_bytes=%d, bps=%d\n",
526 dpcm->pcm_size, dpcm->pcm_count, bytes_per_sec); 521 dpcm->buffer_bytes, dpcm->period_bytes, bytes_per_sec);
527 522
528 dpcm->pcm_irq_pos = 0;
529 dpcm->pcm_buf_pos = 0;
530 return 0; 523 return 0;
531} 524}
532 525
526static int
527snd_card_asihpi_hw_free(struct snd_pcm_substream *substream)
528{
529 struct snd_pcm_runtime *runtime = substream->runtime;
530 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
531 if (dpcm->hpi_buffer_attached)
532 hpi_stream_host_buffer_detach(dpcm->h_stream);
533
534 snd_pcm_lib_free_pages(substream);
535 return 0;
536}
537
538static void snd_card_asihpi_runtime_free(struct snd_pcm_runtime *runtime)
539{
540 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
541 kfree(dpcm);
542}
543
533static void snd_card_asihpi_pcm_timer_start(struct snd_pcm_substream * 544static void snd_card_asihpi_pcm_timer_start(struct snd_pcm_substream *
534 substream) 545 substream)
535{ 546{
@@ -537,9 +548,9 @@ static void snd_card_asihpi_pcm_timer_start(struct snd_pcm_substream *
537 struct snd_card_asihpi_pcm *dpcm = runtime->private_data; 548 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
538 int expiry; 549 int expiry;
539 550
540 expiry = (dpcm->pcm_count * HZ / dpcm->bytes_per_sec); 551 expiry = HZ / 200;
541 /* wait longer the first time, for samples to propagate */ 552 /*? (dpcm->period_bytes * HZ / dpcm->bytes_per_sec); */
542 expiry = max(expiry, 20); 553 expiry = max(expiry, 1); /* don't let it be zero! */
543 dpcm->timer.expires = jiffies + expiry; 554 dpcm->timer.expires = jiffies + expiry;
544 dpcm->respawn_timer = 1; 555 dpcm->respawn_timer = 1;
545 add_timer(&dpcm->timer); 556 add_timer(&dpcm->timer);
@@ -562,37 +573,44 @@ static int snd_card_asihpi_trigger(struct snd_pcm_substream *substream,
562 struct snd_pcm_substream *s; 573 struct snd_pcm_substream *s;
563 u16 e; 574 u16 e;
564 575
565 snd_printd("trigger %dstream %d\n", 576 VPRINTK1(KERN_INFO "%c%d trigger\n",
566 substream->stream, substream->number); 577 SCHR(substream->stream), substream->number);
567 switch (cmd) { 578 switch (cmd) {
568 case SNDRV_PCM_TRIGGER_START: 579 case SNDRV_PCM_TRIGGER_START:
569 snd_pcm_group_for_each_entry(s, substream) { 580 snd_pcm_group_for_each_entry(s, substream) {
570 struct snd_card_asihpi_pcm *ds; 581 struct snd_pcm_runtime *runtime = s->runtime;
571 ds = s->runtime->private_data; 582 struct snd_card_asihpi_pcm *ds = runtime->private_data;
572 583
573 if (snd_pcm_substream_chip(s) != card) 584 if (snd_pcm_substream_chip(s) != card)
574 continue; 585 continue;
575 586
587 /* don't link Cap and Play */
588 if (substream->stream != s->stream)
589 continue;
590
576 if ((s->stream == SNDRV_PCM_STREAM_PLAYBACK) && 591 if ((s->stream == SNDRV_PCM_STREAM_PLAYBACK) &&
577 (card->support_mmap)) { 592 (card->support_mmap)) {
578 /* How do I know how much valid data is present 593 /* How do I know how much valid data is present
579 * in buffer? Just guessing 2 periods, but if 594 * in buffer? Must be at least one period!
595 * Guessing 2 periods, but if
580 * buffer is bigger it may contain even more 596 * buffer is bigger it may contain even more
581 * data?? 597 * data??
582 */ 598 */
583 unsigned int preload = ds->pcm_count * 2; 599 unsigned int preload = ds->period_bytes * 1;
584 VPRINTK2("preload %d\n", preload); 600 VPRINTK2(KERN_INFO "%d preload x%x\n", s->number, preload);
585 hpi_handle_error(hpi_outstream_write_buf( 601 hpi_handle_error(hpi_outstream_write_buf(
586 ss, ds->h_stream, 602 ds->h_stream,
587 &s->runtime->dma_area[0], 603 &runtime->dma_area[0],
588 preload, 604 preload,
589 &ds->format)); 605 &ds->format));
606 ds->pcm_buf_host_rw_ofs = preload;
590 } 607 }
591 608
592 if (card->support_grouping) { 609 if (card->support_grouping) {
593 VPRINTK1("\t_group %dstream %d\n", s->stream, 610 VPRINTK1(KERN_INFO "\t%c%d group\n",
611 SCHR(s->stream),
594 s->number); 612 s->number);
595 e = hpi_stream_group_add(ss, 613 e = hpi_stream_group_add(
596 dpcm->h_stream, 614 dpcm->h_stream,
597 ds->h_stream); 615 ds->h_stream);
598 if (!e) { 616 if (!e) {
@@ -604,10 +622,12 @@ static int snd_card_asihpi_trigger(struct snd_pcm_substream *substream,
604 } else 622 } else
605 break; 623 break;
606 } 624 }
607 snd_printd("start\n"); 625 VPRINTK1(KERN_INFO "start\n");
608 /* start the master stream */ 626 /* start the master stream */
609 snd_card_asihpi_pcm_timer_start(substream); 627 snd_card_asihpi_pcm_timer_start(substream);
610 hpi_handle_error(hpi_stream_start(ss, dpcm->h_stream)); 628 if ((substream->stream == SNDRV_PCM_STREAM_CAPTURE) ||
629 !card->support_mmap)
630 hpi_handle_error(hpi_stream_start(dpcm->h_stream));
611 break; 631 break;
612 632
613 case SNDRV_PCM_TRIGGER_STOP: 633 case SNDRV_PCM_TRIGGER_STOP:
@@ -615,88 +635,73 @@ static int snd_card_asihpi_trigger(struct snd_pcm_substream *substream,
615 snd_pcm_group_for_each_entry(s, substream) { 635 snd_pcm_group_for_each_entry(s, substream) {
616 if (snd_pcm_substream_chip(s) != card) 636 if (snd_pcm_substream_chip(s) != card)
617 continue; 637 continue;
638 /* don't link Cap and Play */
639 if (substream->stream != s->stream)
640 continue;
618 641
619 /*? workaround linked streams don't 642 /*? workaround linked streams don't
620 transition to SETUP 20070706*/ 643 transition to SETUP 20070706*/
621 s->runtime->status->state = SNDRV_PCM_STATE_SETUP; 644 s->runtime->status->state = SNDRV_PCM_STATE_SETUP;
622 645
623 if (card->support_grouping) { 646 if (card->support_grouping) {
624 VPRINTK1("\t_group %dstream %d\n", s->stream, 647 VPRINTK1(KERN_INFO "\t%c%d group\n",
648 SCHR(s->stream),
625 s->number); 649 s->number);
626 snd_pcm_trigger_done(s, substream); 650 snd_pcm_trigger_done(s, substream);
627 } else 651 } else
628 break; 652 break;
629 } 653 }
630 snd_printd("stop\n"); 654 VPRINTK1(KERN_INFO "stop\n");
631 655
632 /* _prepare and _hwparams reset the stream */ 656 /* _prepare and _hwparams reset the stream */
633 hpi_handle_error(hpi_stream_stop(ss, dpcm->h_stream)); 657 hpi_handle_error(hpi_stream_stop(dpcm->h_stream));
634 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 658 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
635 hpi_handle_error( 659 hpi_handle_error(
636 hpi_outstream_reset(ss, dpcm->h_stream)); 660 hpi_outstream_reset(dpcm->h_stream));
637 661
638 if (card->support_grouping) 662 if (card->support_grouping)
639 hpi_handle_error(hpi_stream_group_reset(ss, 663 hpi_handle_error(hpi_stream_group_reset(dpcm->h_stream));
640 dpcm->h_stream));
641 break; 664 break;
642 665
643 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 666 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
644 snd_printd("pause release\n"); 667 VPRINTK1(KERN_INFO "pause release\n");
645 hpi_handle_error(hpi_stream_start(ss, dpcm->h_stream)); 668 hpi_handle_error(hpi_stream_start(dpcm->h_stream));
646 snd_card_asihpi_pcm_timer_start(substream); 669 snd_card_asihpi_pcm_timer_start(substream);
647 break; 670 break;
648 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 671 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
649 snd_printd("pause\n"); 672 VPRINTK1(KERN_INFO "pause\n");
650 snd_card_asihpi_pcm_timer_stop(substream); 673 snd_card_asihpi_pcm_timer_stop(substream);
651 hpi_handle_error(hpi_stream_stop(ss, dpcm->h_stream)); 674 hpi_handle_error(hpi_stream_stop(dpcm->h_stream));
652 break; 675 break;
653 default: 676 default:
654 snd_printd("\tINVALID\n"); 677 snd_printd(KERN_ERR "\tINVALID\n");
655 return -EINVAL; 678 return -EINVAL;
656 } 679 }
657 680
658 return 0; 681 return 0;
659} 682}
660 683
661static int
662snd_card_asihpi_hw_free(struct snd_pcm_substream *substream)
663{
664 struct snd_pcm_runtime *runtime = substream->runtime;
665 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
666 if (dpcm->hpi_buffer_attached)
667 hpi_stream_host_buffer_detach(ss, dpcm->h_stream);
668
669 snd_pcm_lib_free_pages(substream);
670 return 0;
671}
672
673static void snd_card_asihpi_runtime_free(struct snd_pcm_runtime *runtime)
674{
675 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
676 kfree(dpcm);
677}
678
679/*algorithm outline 684/*algorithm outline
680 Without linking degenerates to getting single stream pos etc 685 Without linking degenerates to getting single stream pos etc
681 Without mmap 2nd loop degenerates to snd_pcm_period_elapsed 686 Without mmap 2nd loop degenerates to snd_pcm_period_elapsed
682*/ 687*/
683/* 688/*
684buf_pos=get_buf_pos(s); 689pcm_buf_dma_ofs=get_buf_pos(s);
685for_each_linked_stream(s) { 690for_each_linked_stream(s) {
686 buf_pos=get_buf_pos(s); 691 pcm_buf_dma_ofs=get_buf_pos(s);
687 min_buf_pos = modulo_min(min_buf_pos, buf_pos, pcm_size) 692 min_buf_pos = modulo_min(min_buf_pos, pcm_buf_dma_ofs, buffer_bytes)
688 new_data = min(new_data, calc_new_data(buf_pos,irq_pos) 693 new_data = min(new_data, calc_new_data(pcm_buf_dma_ofs,irq_pos)
689} 694}
690timer.expires = jiffies + predict_next_period_ready(min_buf_pos); 695timer.expires = jiffies + predict_next_period_ready(min_buf_pos);
691for_each_linked_stream(s) { 696for_each_linked_stream(s) {
692 s->buf_pos = min_buf_pos; 697 s->pcm_buf_dma_ofs = min_buf_pos;
693 if (new_data > pcm_count) { 698 if (new_data > period_bytes) {
694 if (mmap) { 699 if (mmap) {
695 irq_pos = (irq_pos + pcm_count) % pcm_size; 700 irq_pos = (irq_pos + period_bytes) % buffer_bytes;
696 if (playback) { 701 if (playback) {
697 write(pcm_count); 702 write(period_bytes);
698 } else { 703 } else {
699 read(pcm_count); 704 read(period_bytes);
700 } 705 }
701 } 706 }
702 snd_pcm_period_elapsed(s); 707 snd_pcm_period_elapsed(s);
@@ -724,105 +729,136 @@ static inline unsigned int modulo_min(unsigned int a, unsigned int b,
724static void snd_card_asihpi_timer_function(unsigned long data) 729static void snd_card_asihpi_timer_function(unsigned long data)
725{ 730{
726 struct snd_card_asihpi_pcm *dpcm = (struct snd_card_asihpi_pcm *)data; 731 struct snd_card_asihpi_pcm *dpcm = (struct snd_card_asihpi_pcm *)data;
727 struct snd_card_asihpi *card = snd_pcm_substream_chip(dpcm->substream); 732 struct snd_pcm_substream *substream = dpcm->substream;
733 struct snd_card_asihpi *card = snd_pcm_substream_chip(substream);
728 struct snd_pcm_runtime *runtime; 734 struct snd_pcm_runtime *runtime;
729 struct snd_pcm_substream *s; 735 struct snd_pcm_substream *s;
730 unsigned int newdata = 0; 736 unsigned int newdata = 0;
731 unsigned int buf_pos, min_buf_pos = 0; 737 unsigned int pcm_buf_dma_ofs, min_buf_pos = 0;
732 unsigned int remdata, xfercount, next_jiffies; 738 unsigned int remdata, xfercount, next_jiffies;
733 int first = 1; 739 int first = 1;
740 int loops = 0;
734 u16 state; 741 u16 state;
735 u32 buffer_size, data_avail, samples_played, aux; 742 u32 buffer_size, bytes_avail, samples_played, on_card_bytes;
743
744 VPRINTK1(KERN_INFO "%c%d snd_card_asihpi_timer_function\n",
745 SCHR(substream->stream), substream->number);
736 746
737 /* find minimum newdata and buffer pos in group */ 747 /* find minimum newdata and buffer pos in group */
738 snd_pcm_group_for_each_entry(s, dpcm->substream) { 748 snd_pcm_group_for_each_entry(s, substream) {
739 struct snd_card_asihpi_pcm *ds = s->runtime->private_data; 749 struct snd_card_asihpi_pcm *ds = s->runtime->private_data;
740 runtime = s->runtime; 750 runtime = s->runtime;
741 751
742 if (snd_pcm_substream_chip(s) != card) 752 if (snd_pcm_substream_chip(s) != card)
743 continue; 753 continue;
744 754
745 hpi_handle_error(hpi_stream_get_info_ex(ss, 755 /* don't link Cap and Play */
756 if (substream->stream != s->stream)
757 continue;
758
759 hpi_handle_error(hpi_stream_get_info_ex(
746 ds->h_stream, &state, 760 ds->h_stream, &state,
747 &buffer_size, &data_avail, 761 &buffer_size, &bytes_avail,
748 &samples_played, &aux)); 762 &samples_played, &on_card_bytes));
749 763
750 /* number of bytes in on-card buffer */ 764 /* number of bytes in on-card buffer */
751 runtime->delay = aux; 765 runtime->delay = on_card_bytes;
752
753 if (state == HPI_STATE_DRAINED) {
754 snd_printd(KERN_WARNING "outstream %d drained\n",
755 s->number);
756 snd_pcm_stop(s, SNDRV_PCM_STATE_XRUN);
757 return;
758 }
759 766
760 if (s->stream == SNDRV_PCM_STREAM_PLAYBACK) { 767 if (s->stream == SNDRV_PCM_STREAM_PLAYBACK) {
761 buf_pos = frames_to_bytes(runtime, samples_played); 768 pcm_buf_dma_ofs = ds->pcm_buf_host_rw_ofs - bytes_avail;
762 } else { 769 if (state == HPI_STATE_STOPPED) {
763 buf_pos = data_avail + ds->pcm_irq_pos; 770 if ((bytes_avail == 0) &&
764 } 771 (on_card_bytes < ds->pcm_buf_host_rw_ofs)) {
772 hpi_handle_error(hpi_stream_start(ds->h_stream));
773 VPRINTK1(KERN_INFO "P%d start\n", s->number);
774 }
775 } else if (state == HPI_STATE_DRAINED) {
776 VPRINTK1(KERN_WARNING "P%d drained\n",
777 s->number);
778 /*snd_pcm_stop(s, SNDRV_PCM_STATE_XRUN);
779 continue; */
780 }
781 } else
782 pcm_buf_dma_ofs = bytes_avail + ds->pcm_buf_host_rw_ofs;
765 783
766 if (first) { 784 if (first) {
767 /* can't statically init min when wrap is involved */ 785 /* can't statically init min when wrap is involved */
768 min_buf_pos = buf_pos; 786 min_buf_pos = pcm_buf_dma_ofs;
769 newdata = (buf_pos - ds->pcm_irq_pos) % ds->pcm_size; 787 newdata = (pcm_buf_dma_ofs - ds->pcm_buf_elapsed_dma_ofs) % ds->buffer_bytes;
770 first = 0; 788 first = 0;
771 } else { 789 } else {
772 min_buf_pos = 790 min_buf_pos =
773 modulo_min(min_buf_pos, buf_pos, UINT_MAX+1L); 791 modulo_min(min_buf_pos, pcm_buf_dma_ofs, UINT_MAX+1L);
774 newdata = min( 792 newdata = min(
775 (buf_pos - ds->pcm_irq_pos) % ds->pcm_size, 793 (pcm_buf_dma_ofs - ds->pcm_buf_elapsed_dma_ofs) % ds->buffer_bytes,
776 newdata); 794 newdata);
777 } 795 }
778 796
779 VPRINTK1("PB timer hw_ptr x%04lX, appl_ptr x%04lX\n", 797 VPRINTK1(KERN_INFO "PB timer hw_ptr x%04lX, appl_ptr x%04lX\n",
780 (unsigned long)frames_to_bytes(runtime, 798 (unsigned long)frames_to_bytes(runtime,
781 runtime->status->hw_ptr), 799 runtime->status->hw_ptr),
782 (unsigned long)frames_to_bytes(runtime, 800 (unsigned long)frames_to_bytes(runtime,
783 runtime->control->appl_ptr)); 801 runtime->control->appl_ptr));
784 VPRINTK1("%d S=%d, irq=%04X, pos=x%04X, left=x%04X," 802
785 " aux=x%04X space=x%04X\n", s->number, 803 VPRINTK1(KERN_INFO "%d %c%d S=%d, rw=%04X, dma=x%04X, left=x%04X,"
786 state, ds->pcm_irq_pos, buf_pos, (int)data_avail, 804 " aux=x%04X space=x%04X\n",
787 (int)aux, buffer_size-data_avail); 805 loops, SCHR(s->stream), s->number,
806 state, ds->pcm_buf_host_rw_ofs, pcm_buf_dma_ofs, (int)bytes_avail,
807 (int)on_card_bytes, buffer_size-bytes_avail);
808 loops++;
788 } 809 }
810 pcm_buf_dma_ofs = min_buf_pos;
789 811
790 remdata = newdata % dpcm->pcm_count; 812 remdata = newdata % dpcm->period_bytes;
791 xfercount = newdata - remdata; /* a multiple of pcm_count */ 813 xfercount = newdata - remdata; /* a multiple of period_bytes */
792 next_jiffies = ((dpcm->pcm_count-remdata) * HZ / dpcm->bytes_per_sec)+1; 814 /* come back when on_card_bytes has decreased enough to allow
793 next_jiffies = max(next_jiffies, 2U * HZ / 1000U); 815 write to happen, or when data has been consumed to make another
816 period
817 */
818 if (xfercount && (on_card_bytes > dpcm->period_bytes))
819 next_jiffies = ((on_card_bytes - dpcm->period_bytes) * HZ / dpcm->bytes_per_sec);
820 else
821 next_jiffies = ((dpcm->period_bytes - remdata) * HZ / dpcm->bytes_per_sec);
822
823 next_jiffies = max(next_jiffies, 1U);
794 dpcm->timer.expires = jiffies + next_jiffies; 824 dpcm->timer.expires = jiffies + next_jiffies;
795 VPRINTK1("jif %d buf pos x%04X newdata x%04X xc x%04X\n", 825 VPRINTK1(KERN_INFO "jif %d buf pos x%04X newdata x%04X xfer x%04X\n",
796 next_jiffies, min_buf_pos, newdata, xfercount); 826 next_jiffies, pcm_buf_dma_ofs, newdata, xfercount);
797 827
798 snd_pcm_group_for_each_entry(s, dpcm->substream) { 828 snd_pcm_group_for_each_entry(s, substream) {
799 struct snd_card_asihpi_pcm *ds = s->runtime->private_data; 829 struct snd_card_asihpi_pcm *ds = s->runtime->private_data;
800 ds->pcm_buf_pos = min_buf_pos;
801 830
802 if (xfercount) { 831 /* don't link Cap and Play */
832 if (substream->stream != s->stream)
833 continue;
834
835 ds->pcm_buf_dma_ofs = pcm_buf_dma_ofs;
836
837 if (xfercount && (on_card_bytes <= ds->period_bytes)) {
803 if (card->support_mmap) { 838 if (card->support_mmap) {
804 ds->pcm_irq_pos = ds->pcm_irq_pos + xfercount;
805 if (s->stream == SNDRV_PCM_STREAM_PLAYBACK) { 839 if (s->stream == SNDRV_PCM_STREAM_PLAYBACK) {
806 VPRINTK2("write OS%d x%04x\n", 840 VPRINTK2(KERN_INFO "P%d write x%04x\n",
807 s->number, 841 s->number,
808 ds->pcm_count); 842 ds->period_bytes);
809 hpi_handle_error( 843 hpi_handle_error(
810 hpi_outstream_write_buf( 844 hpi_outstream_write_buf(
811 ss, ds->h_stream, 845 ds->h_stream,
812 &s->runtime-> 846 &s->runtime->
813 dma_area[0], 847 dma_area[0],
814 xfercount, 848 xfercount,
815 &ds->format)); 849 &ds->format));
816 } else { 850 } else {
817 VPRINTK2("read IS%d x%04x\n", 851 VPRINTK2(KERN_INFO "C%d read x%04x\n",
818 s->number, 852 s->number,
819 dpcm->pcm_count); 853 xfercount);
820 hpi_handle_error( 854 hpi_handle_error(
821 hpi_instream_read_buf( 855 hpi_instream_read_buf(
822 ss, ds->h_stream, 856 ds->h_stream,
823 NULL, xfercount)); 857 NULL, xfercount));
824 } 858 }
859 ds->pcm_buf_host_rw_ofs = ds->pcm_buf_host_rw_ofs + xfercount;
825 } /* else R/W will be handled by read/write callbacks */ 860 } /* else R/W will be handled by read/write callbacks */
861 ds->pcm_buf_elapsed_dma_ofs = pcm_buf_dma_ofs;
826 snd_pcm_period_elapsed(s); 862 snd_pcm_period_elapsed(s);
827 } 863 }
828 } 864 }
@@ -845,12 +881,12 @@ static int snd_card_asihpi_playback_prepare(struct snd_pcm_substream *
845 struct snd_pcm_runtime *runtime = substream->runtime; 881 struct snd_pcm_runtime *runtime = substream->runtime;
846 struct snd_card_asihpi_pcm *dpcm = runtime->private_data; 882 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
847 883
848 snd_printd(KERN_INFO "playback prepare %d\n", substream->number); 884 VPRINTK1(KERN_INFO "playback prepare %d\n", substream->number);
849
850 hpi_handle_error(hpi_outstream_reset(ss, dpcm->h_stream));
851 dpcm->pcm_irq_pos = 0;
852 dpcm->pcm_buf_pos = 0;
853 885
886 hpi_handle_error(hpi_outstream_reset(dpcm->h_stream));
887 dpcm->pcm_buf_host_rw_ofs = 0;
888 dpcm->pcm_buf_dma_ofs = 0;
889 dpcm->pcm_buf_elapsed_dma_ofs = 0;
854 return 0; 890 return 0;
855} 891}
856 892
@@ -861,27 +897,8 @@ snd_card_asihpi_playback_pointer(struct snd_pcm_substream *substream)
861 struct snd_card_asihpi_pcm *dpcm = runtime->private_data; 897 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
862 snd_pcm_uframes_t ptr; 898 snd_pcm_uframes_t ptr;
863 899
864 u32 samples_played; 900 ptr = bytes_to_frames(runtime, dpcm->pcm_buf_dma_ofs % dpcm->buffer_bytes);
865 u16 err; 901 /* VPRINTK2(KERN_INFO "playback_pointer=x%04lx\n", (unsigned long)ptr); */
866
867 if (!snd_pcm_stream_linked(substream)) {
868 /* NOTE, can use samples played for playback position here and
869 * in timer fn because it LAGS the actual read pointer, and is a
870 * better representation of actual playout position
871 */
872 err = hpi_outstream_get_info_ex(ss, dpcm->h_stream, NULL,
873 NULL, NULL,
874 &samples_played, NULL);
875 hpi_handle_error(err);
876
877 dpcm->pcm_buf_pos = frames_to_bytes(runtime, samples_played);
878 }
879 /* else must return most conservative value found in timer func
880 * by looping over all streams
881 */
882
883 ptr = bytes_to_frames(runtime, dpcm->pcm_buf_pos % dpcm->pcm_size);
884 VPRINTK2("playback_pointer=%04ld\n", (unsigned long)ptr);
885 return ptr; 902 return ptr;
886} 903}
887 904
@@ -898,12 +915,12 @@ static void snd_card_asihpi_playback_format(struct snd_card_asihpi *asihpi,
898 /* on cards without SRC, must query at valid rate, 915 /* on cards without SRC, must query at valid rate,
899 * maybe set by external sync 916 * maybe set by external sync
900 */ 917 */
901 err = hpi_mixer_get_control(ss, asihpi->h_mixer, 918 err = hpi_mixer_get_control(asihpi->h_mixer,
902 HPI_SOURCENODE_CLOCK_SOURCE, 0, 0, 0, 919 HPI_SOURCENODE_CLOCK_SOURCE, 0, 0, 0,
903 HPI_CONTROL_SAMPLECLOCK, &h_control); 920 HPI_CONTROL_SAMPLECLOCK, &h_control);
904 921
905 if (!err) 922 if (!err)
906 err = hpi_sample_clock_get_sample_rate(ss, h_control, 923 err = hpi_sample_clock_get_sample_rate(h_control,
907 &sample_rate); 924 &sample_rate);
908 925
909 for (format = HPI_FORMAT_PCM8_UNSIGNED; 926 for (format = HPI_FORMAT_PCM8_UNSIGNED;
@@ -911,7 +928,7 @@ static void snd_card_asihpi_playback_format(struct snd_card_asihpi *asihpi,
911 err = hpi_format_create(&hpi_format, 928 err = hpi_format_create(&hpi_format,
912 2, format, sample_rate, 128000, 0); 929 2, format, sample_rate, 128000, 0);
913 if (!err) 930 if (!err)
914 err = hpi_outstream_query_format(ss, h_stream, 931 err = hpi_outstream_query_format(h_stream,
915 &hpi_format); 932 &hpi_format);
916 if (!err && (hpi_to_alsa_formats[format] != -1)) 933 if (!err && (hpi_to_alsa_formats[format] != -1))
917 pcmhw->formats |= 934 pcmhw->formats |=
@@ -942,7 +959,7 @@ static int snd_card_asihpi_playback_open(struct snd_pcm_substream *substream)
942 return -ENOMEM; 959 return -ENOMEM;
943 960
944 err = 961 err =
945 hpi_outstream_open(ss, card->adapter_index, 962 hpi_outstream_open(card->adapter_index,
946 substream->number, &dpcm->h_stream); 963 substream->number, &dpcm->h_stream);
947 hpi_handle_error(err); 964 hpi_handle_error(err);
948 if (err) 965 if (err)
@@ -998,11 +1015,11 @@ static int snd_card_asihpi_playback_open(struct snd_pcm_substream *substream)
998 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 1015 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
999 card->update_interval_frames); 1016 card->update_interval_frames);
1000 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 1017 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
1001 card->update_interval_frames * 4, UINT_MAX); 1018 card->update_interval_frames * 2, UINT_MAX);
1002 1019
1003 snd_pcm_set_sync(substream); 1020 snd_pcm_set_sync(substream);
1004 1021
1005 snd_printd(KERN_INFO "playback open\n"); 1022 VPRINTK1(KERN_INFO "playback open\n");
1006 1023
1007 return 0; 1024 return 0;
1008} 1025}
@@ -1012,8 +1029,8 @@ static int snd_card_asihpi_playback_close(struct snd_pcm_substream *substream)
1012 struct snd_pcm_runtime *runtime = substream->runtime; 1029 struct snd_pcm_runtime *runtime = substream->runtime;
1013 struct snd_card_asihpi_pcm *dpcm = runtime->private_data; 1030 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
1014 1031
1015 hpi_handle_error(hpi_outstream_close(ss, dpcm->h_stream)); 1032 hpi_handle_error(hpi_outstream_close(dpcm->h_stream));
1016 snd_printd(KERN_INFO "playback close\n"); 1033 VPRINTK1(KERN_INFO "playback close\n");
1017 1034
1018 return 0; 1035 return 0;
1019} 1036}
@@ -1036,9 +1053,11 @@ static int snd_card_asihpi_playback_copy(struct snd_pcm_substream *substream,
1036 VPRINTK2(KERN_DEBUG "playback copy%d %u bytes\n", 1053 VPRINTK2(KERN_DEBUG "playback copy%d %u bytes\n",
1037 substream->number, len); 1054 substream->number, len);
1038 1055
1039 hpi_handle_error(hpi_outstream_write_buf(ss, dpcm->h_stream, 1056 hpi_handle_error(hpi_outstream_write_buf(dpcm->h_stream,
1040 runtime->dma_area, len, &dpcm->format)); 1057 runtime->dma_area, len, &dpcm->format));
1041 1058
1059 dpcm->pcm_buf_host_rw_ofs = dpcm->pcm_buf_host_rw_ofs + len;
1060
1042 return 0; 1061 return 0;
1043} 1062}
1044 1063
@@ -1052,10 +1071,10 @@ static int snd_card_asihpi_playback_silence(struct snd_pcm_substream *
1052 struct snd_card_asihpi_pcm *dpcm = runtime->private_data; 1071 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
1053 1072
1054 len = frames_to_bytes(runtime, count); 1073 len = frames_to_bytes(runtime, count);
1055 snd_printd(KERN_INFO "playback silence %u bytes\n", len); 1074 VPRINTK1(KERN_INFO "playback silence %u bytes\n", len);
1056 1075
1057 memset(runtime->dma_area, 0, len); 1076 memset(runtime->dma_area, 0, len);
1058 hpi_handle_error(hpi_outstream_write_buf(ss, dpcm->h_stream, 1077 hpi_handle_error(hpi_outstream_write_buf(dpcm->h_stream,
1059 runtime->dma_area, len, &dpcm->format)); 1078 runtime->dma_area, len, &dpcm->format));
1060 return 0; 1079 return 0;
1061} 1080}
@@ -1091,13 +1110,13 @@ snd_card_asihpi_capture_pointer(struct snd_pcm_substream *substream)
1091 struct snd_pcm_runtime *runtime = substream->runtime; 1110 struct snd_pcm_runtime *runtime = substream->runtime;
1092 struct snd_card_asihpi_pcm *dpcm = runtime->private_data; 1111 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
1093 1112
1094 VPRINTK2("capture pointer %d=%d\n", 1113 VPRINTK2(KERN_INFO "capture pointer %d=%d\n",
1095 substream->number, dpcm->pcm_buf_pos); 1114 substream->number, dpcm->pcm_buf_dma_ofs);
1096 /* NOTE Unlike playback can't use actual dwSamplesPlayed 1115 /* NOTE Unlike playback can't use actual samples_played
1097 for the capture position, because those samples aren't yet in 1116 for the capture position, because those samples aren't yet in
1098 the local buffer available for reading. 1117 the local buffer available for reading.
1099 */ 1118 */
1100 return bytes_to_frames(runtime, dpcm->pcm_buf_pos % dpcm->pcm_size); 1119 return bytes_to_frames(runtime, dpcm->pcm_buf_dma_ofs % dpcm->buffer_bytes);
1101} 1120}
1102 1121
1103static int snd_card_asihpi_capture_ioctl(struct snd_pcm_substream *substream, 1122static int snd_card_asihpi_capture_ioctl(struct snd_pcm_substream *substream,
@@ -1111,11 +1130,12 @@ static int snd_card_asihpi_capture_prepare(struct snd_pcm_substream *substream)
1111 struct snd_pcm_runtime *runtime = substream->runtime; 1130 struct snd_pcm_runtime *runtime = substream->runtime;
1112 struct snd_card_asihpi_pcm *dpcm = runtime->private_data; 1131 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
1113 1132
1114 hpi_handle_error(hpi_instream_reset(ss, dpcm->h_stream)); 1133 hpi_handle_error(hpi_instream_reset(dpcm->h_stream));
1115 dpcm->pcm_irq_pos = 0; 1134 dpcm->pcm_buf_host_rw_ofs = 0;
1116 dpcm->pcm_buf_pos = 0; 1135 dpcm->pcm_buf_dma_ofs = 0;
1136 dpcm->pcm_buf_elapsed_dma_ofs = 0;
1117 1137
1118 snd_printd("capture prepare %d\n", substream->number); 1138 VPRINTK1("Capture Prepare %d\n", substream->number);
1119 return 0; 1139 return 0;
1120} 1140}
1121 1141
@@ -1133,12 +1153,12 @@ static void snd_card_asihpi_capture_format(struct snd_card_asihpi *asihpi,
1133 1153
1134 /* on cards without SRC, must query at valid rate, 1154 /* on cards without SRC, must query at valid rate,
1135 maybe set by external sync */ 1155 maybe set by external sync */
1136 err = hpi_mixer_get_control(ss, asihpi->h_mixer, 1156 err = hpi_mixer_get_control(asihpi->h_mixer,
1137 HPI_SOURCENODE_CLOCK_SOURCE, 0, 0, 0, 1157 HPI_SOURCENODE_CLOCK_SOURCE, 0, 0, 0,
1138 HPI_CONTROL_SAMPLECLOCK, &h_control); 1158 HPI_CONTROL_SAMPLECLOCK, &h_control);
1139 1159
1140 if (!err) 1160 if (!err)
1141 err = hpi_sample_clock_get_sample_rate(ss, h_control, 1161 err = hpi_sample_clock_get_sample_rate(h_control,
1142 &sample_rate); 1162 &sample_rate);
1143 1163
1144 for (format = HPI_FORMAT_PCM8_UNSIGNED; 1164 for (format = HPI_FORMAT_PCM8_UNSIGNED;
@@ -1147,7 +1167,7 @@ static void snd_card_asihpi_capture_format(struct snd_card_asihpi *asihpi,
1147 err = hpi_format_create(&hpi_format, 2, format, 1167 err = hpi_format_create(&hpi_format, 2, format,
1148 sample_rate, 128000, 0); 1168 sample_rate, 128000, 0);
1149 if (!err) 1169 if (!err)
1150 err = hpi_instream_query_format(ss, h_stream, 1170 err = hpi_instream_query_format(h_stream,
1151 &hpi_format); 1171 &hpi_format);
1152 if (!err) 1172 if (!err)
1153 pcmhw->formats |= 1173 pcmhw->formats |=
@@ -1178,11 +1198,11 @@ static int snd_card_asihpi_capture_open(struct snd_pcm_substream *substream)
1178 if (dpcm == NULL) 1198 if (dpcm == NULL)
1179 return -ENOMEM; 1199 return -ENOMEM;
1180 1200
1181 snd_printd("hpi_instream_open adapter %d stream %d\n", 1201 VPRINTK1("hpi_instream_open adapter %d stream %d\n",
1182 card->adapter_index, substream->number); 1202 card->adapter_index, substream->number);
1183 1203
1184 err = hpi_handle_error( 1204 err = hpi_handle_error(
1185 hpi_instream_open(ss, card->adapter_index, 1205 hpi_instream_open(card->adapter_index,
1186 substream->number, &dpcm->h_stream)); 1206 substream->number, &dpcm->h_stream));
1187 if (err) 1207 if (err)
1188 kfree(dpcm); 1208 kfree(dpcm);
@@ -1209,6 +1229,9 @@ static int snd_card_asihpi_capture_open(struct snd_pcm_substream *substream)
1209 snd_card_asihpi_capture.info |= SNDRV_PCM_INFO_MMAP | 1229 snd_card_asihpi_capture.info |= SNDRV_PCM_INFO_MMAP |
1210 SNDRV_PCM_INFO_MMAP_VALID; 1230 SNDRV_PCM_INFO_MMAP_VALID;
1211 1231
1232 if (card->support_grouping)
1233 snd_card_asihpi_capture.info |= SNDRV_PCM_INFO_SYNC_START;
1234
1212 runtime->hw = snd_card_asihpi_capture; 1235 runtime->hw = snd_card_asihpi_capture;
1213 1236
1214 if (card->support_mmap) 1237 if (card->support_mmap)
@@ -1231,7 +1254,7 @@ static int snd_card_asihpi_capture_close(struct snd_pcm_substream *substream)
1231{ 1254{
1232 struct snd_card_asihpi_pcm *dpcm = substream->runtime->private_data; 1255 struct snd_card_asihpi_pcm *dpcm = substream->runtime->private_data;
1233 1256
1234 hpi_handle_error(hpi_instream_close(ss, dpcm->h_stream)); 1257 hpi_handle_error(hpi_instream_close(dpcm->h_stream));
1235 return 0; 1258 return 0;
1236} 1259}
1237 1260
@@ -1241,18 +1264,17 @@ static int snd_card_asihpi_capture_copy(struct snd_pcm_substream *substream,
1241{ 1264{
1242 struct snd_pcm_runtime *runtime = substream->runtime; 1265 struct snd_pcm_runtime *runtime = substream->runtime;
1243 struct snd_card_asihpi_pcm *dpcm = runtime->private_data; 1266 struct snd_card_asihpi_pcm *dpcm = runtime->private_data;
1244 u32 data_size; 1267 u32 len;
1245 1268
1246 data_size = frames_to_bytes(runtime, count); 1269 len = frames_to_bytes(runtime, count);
1247 1270
1248 VPRINTK2("capture copy%d %d bytes\n", substream->number, data_size); 1271 VPRINTK2(KERN_INFO "capture copy%d %d bytes\n", substream->number, len);
1249 hpi_handle_error(hpi_instream_read_buf(ss, dpcm->h_stream, 1272 hpi_handle_error(hpi_instream_read_buf(dpcm->h_stream,
1250 runtime->dma_area, data_size)); 1273 runtime->dma_area, len));
1251 1274
1252 /* Used by capture_pointer */ 1275 dpcm->pcm_buf_host_rw_ofs = dpcm->pcm_buf_host_rw_ofs + len;
1253 dpcm->pcm_irq_pos = dpcm->pcm_irq_pos + data_size;
1254 1276
1255 if (copy_to_user(dst, runtime->dma_area, data_size)) 1277 if (copy_to_user(dst, runtime->dma_area, len))
1256 return -EFAULT; 1278 return -EFAULT;
1257 1279
1258 return 0; 1280 return 0;
@@ -1287,7 +1309,7 @@ static int __devinit snd_card_asihpi_pcm_new(struct snd_card_asihpi *asihpi,
1287 struct snd_pcm *pcm; 1309 struct snd_pcm *pcm;
1288 int err; 1310 int err;
1289 1311
1290 err = snd_pcm_new(asihpi->card, "asihpi PCM", device, 1312 err = snd_pcm_new(asihpi->card, "Asihpi PCM", device,
1291 asihpi->num_outstreams, asihpi->num_instreams, 1313 asihpi->num_outstreams, asihpi->num_instreams,
1292 &pcm); 1314 &pcm);
1293 if (err < 0) 1315 if (err < 0)
@@ -1307,7 +1329,7 @@ static int __devinit snd_card_asihpi_pcm_new(struct snd_card_asihpi *asihpi,
1307 1329
1308 pcm->private_data = asihpi; 1330 pcm->private_data = asihpi;
1309 pcm->info_flags = 0; 1331 pcm->info_flags = 0;
1310 strcpy(pcm->name, "asihpi PCM"); 1332 strcpy(pcm->name, "Asihpi PCM");
1311 1333
1312 /*? do we want to emulate MMAP for non-BBM cards? 1334 /*? do we want to emulate MMAP for non-BBM cards?
1313 Jack doesn't work with ALSAs MMAP emulation - WHY NOT? */ 1335 Jack doesn't work with ALSAs MMAP emulation - WHY NOT? */
@@ -1330,8 +1352,7 @@ struct hpi_control {
1330 char name[44]; /* copied to snd_ctl_elem_id.name[44]; */ 1352 char name[44]; /* copied to snd_ctl_elem_id.name[44]; */
1331}; 1353};
1332 1354
1333static char *asihpi_tuner_band_names[] = 1355static const char * const asihpi_tuner_band_names[] = {
1334{
1335 "invalid", 1356 "invalid",
1336 "AM", 1357 "AM",
1337 "FM mono", 1358 "FM mono",
@@ -1349,70 +1370,36 @@ compile_time_assert(
1349 (HPI_TUNER_BAND_LAST+1)), 1370 (HPI_TUNER_BAND_LAST+1)),
1350 assert_tuner_band_names_size); 1371 assert_tuner_band_names_size);
1351 1372
1352#if ASI_STYLE_NAMES 1373static const char * const asihpi_src_names[] = {
1353static char *asihpi_src_names[] =
1354{
1355 "no source", 1374 "no source",
1356 "outstream", 1375 "PCM",
1357 "line_in", 1376 "Line",
1358 "aes_in", 1377 "Digital",
1359 "tuner", 1378 "Tuner",
1360 "RF", 1379 "RF",
1361 "clock", 1380 "Clock",
1362 "bitstr", 1381 "Bitstream",
1363 "mic", 1382 "Microphone",
1364 "cobranet", 1383 "Cobranet",
1365 "analog_in", 1384 "Analog",
1366 "adapter", 1385 "Adapter",
1367}; 1386};
1368#else
1369static char *asihpi_src_names[] =
1370{
1371 "no source",
1372 "PCM playback",
1373 "line in",
1374 "digital in",
1375 "tuner",
1376 "RF",
1377 "clock",
1378 "bitstream",
1379 "mic",
1380 "cobranet in",
1381 "analog in",
1382 "adapter",
1383};
1384#endif
1385 1387
1386compile_time_assert( 1388compile_time_assert(
1387 (ARRAY_SIZE(asihpi_src_names) == 1389 (ARRAY_SIZE(asihpi_src_names) ==
1388 (HPI_SOURCENODE_LAST_INDEX-HPI_SOURCENODE_NONE+1)), 1390 (HPI_SOURCENODE_LAST_INDEX-HPI_SOURCENODE_NONE+1)),
1389 assert_src_names_size); 1391 assert_src_names_size);
1390 1392
1391#if ASI_STYLE_NAMES 1393static const char * const asihpi_dst_names[] = {
1392static char *asihpi_dst_names[] =
1393{
1394 "no destination",
1395 "instream",
1396 "line_out",
1397 "aes_out",
1398 "RF",
1399 "speaker" ,
1400 "cobranet",
1401 "analog_out",
1402};
1403#else
1404static char *asihpi_dst_names[] =
1405{
1406 "no destination", 1394 "no destination",
1407 "PCM capture", 1395 "PCM",
1408 "line out", 1396 "Line",
1409 "digital out", 1397 "Digital",
1410 "RF", 1398 "RF",
1411 "speaker", 1399 "Speaker",
1412 "cobranet out", 1400 "Cobranet Out",
1413 "analog out" 1401 "Analog"
1414}; 1402};
1415#endif
1416 1403
1417compile_time_assert( 1404compile_time_assert(
1418 (ARRAY_SIZE(asihpi_dst_names) == 1405 (ARRAY_SIZE(asihpi_dst_names) ==
@@ -1438,30 +1425,45 @@ static void asihpi_ctl_init(struct snd_kcontrol_new *snd_control,
1438 struct hpi_control *hpi_ctl, 1425 struct hpi_control *hpi_ctl,
1439 char *name) 1426 char *name)
1440{ 1427{
1428 char *dir = "";
1441 memset(snd_control, 0, sizeof(*snd_control)); 1429 memset(snd_control, 0, sizeof(*snd_control));
1442 snd_control->name = hpi_ctl->name; 1430 snd_control->name = hpi_ctl->name;
1443 snd_control->private_value = hpi_ctl->h_control; 1431 snd_control->private_value = hpi_ctl->h_control;
1444 snd_control->iface = SNDRV_CTL_ELEM_IFACE_MIXER; 1432 snd_control->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
1445 snd_control->index = 0; 1433 snd_control->index = 0;
1446 1434
1435 if (hpi_ctl->dst_node_type + HPI_DESTNODE_NONE == HPI_DESTNODE_ISTREAM)
1436 dir = "Capture "; /* On or towards a PCM capture destination*/
1437 else if ((hpi_ctl->src_node_type + HPI_SOURCENODE_NONE != HPI_SOURCENODE_OSTREAM) &&
1438 (!hpi_ctl->dst_node_type))
1439 dir = "Capture "; /* On a source node that is not PCM playback */
1440 else if (hpi_ctl->src_node_type &&
1441 (hpi_ctl->src_node_type + HPI_SOURCENODE_NONE != HPI_SOURCENODE_OSTREAM) &&
1442 (hpi_ctl->dst_node_type))
1443 dir = "Monitor Playback "; /* Between an input and an output */
1444 else
1445 dir = "Playback "; /* PCM Playback source, or output node */
1446
1447 if (hpi_ctl->src_node_type && hpi_ctl->dst_node_type) 1447 if (hpi_ctl->src_node_type && hpi_ctl->dst_node_type)
1448 sprintf(hpi_ctl->name, "%s%d to %s%d %s", 1448 sprintf(hpi_ctl->name, "%s%d %s%d %s%s",
1449 asihpi_src_names[hpi_ctl->src_node_type], 1449 asihpi_src_names[hpi_ctl->src_node_type],
1450 hpi_ctl->src_node_index, 1450 hpi_ctl->src_node_index,
1451 asihpi_dst_names[hpi_ctl->dst_node_type], 1451 asihpi_dst_names[hpi_ctl->dst_node_type],
1452 hpi_ctl->dst_node_index, 1452 hpi_ctl->dst_node_index,
1453 name); 1453 dir, name);
1454 else if (hpi_ctl->dst_node_type) { 1454 else if (hpi_ctl->dst_node_type) {
1455 sprintf(hpi_ctl->name, "%s%d %s", 1455 sprintf(hpi_ctl->name, "%s %d %s%s",
1456 asihpi_dst_names[hpi_ctl->dst_node_type], 1456 asihpi_dst_names[hpi_ctl->dst_node_type],
1457 hpi_ctl->dst_node_index, 1457 hpi_ctl->dst_node_index,
1458 name); 1458 dir, name);
1459 } else { 1459 } else {
1460 sprintf(hpi_ctl->name, "%s%d %s", 1460 sprintf(hpi_ctl->name, "%s %d %s%s",
1461 asihpi_src_names[hpi_ctl->src_node_type], 1461 asihpi_src_names[hpi_ctl->src_node_type],
1462 hpi_ctl->src_node_index, 1462 hpi_ctl->src_node_index,
1463 name); 1463 dir, name);
1464 } 1464 }
1465 /* printk(KERN_INFO "Adding %s %d to %d ", hpi_ctl->name,
1466 hpi_ctl->wSrcNodeType, hpi_ctl->wDstNodeType); */
1465} 1467}
1466 1468
1467/*------------------------------------------------------------ 1469/*------------------------------------------------------------
@@ -1478,7 +1480,7 @@ static int snd_asihpi_volume_info(struct snd_kcontrol *kcontrol,
1478 short max_gain_mB; 1480 short max_gain_mB;
1479 short step_gain_mB; 1481 short step_gain_mB;
1480 1482
1481 err = hpi_volume_query_range(ss, h_control, 1483 err = hpi_volume_query_range(h_control,
1482 &min_gain_mB, &max_gain_mB, &step_gain_mB); 1484 &min_gain_mB, &max_gain_mB, &step_gain_mB);
1483 if (err) { 1485 if (err) {
1484 max_gain_mB = 0; 1486 max_gain_mB = 0;
@@ -1500,7 +1502,7 @@ static int snd_asihpi_volume_get(struct snd_kcontrol *kcontrol,
1500 u32 h_control = kcontrol->private_value; 1502 u32 h_control = kcontrol->private_value;
1501 short an_gain_mB[HPI_MAX_CHANNELS]; 1503 short an_gain_mB[HPI_MAX_CHANNELS];
1502 1504
1503 hpi_handle_error(hpi_volume_get_gain(ss, h_control, an_gain_mB)); 1505 hpi_handle_error(hpi_volume_get_gain(h_control, an_gain_mB));
1504 ucontrol->value.integer.value[0] = an_gain_mB[0] / VOL_STEP_mB; 1506 ucontrol->value.integer.value[0] = an_gain_mB[0] / VOL_STEP_mB;
1505 ucontrol->value.integer.value[1] = an_gain_mB[1] / VOL_STEP_mB; 1507 ucontrol->value.integer.value[1] = an_gain_mB[1] / VOL_STEP_mB;
1506 1508
@@ -1522,7 +1524,7 @@ static int snd_asihpi_volume_put(struct snd_kcontrol *kcontrol,
1522 asihpi->mixer_volume[addr][1] != right; 1524 asihpi->mixer_volume[addr][1] != right;
1523 */ 1525 */
1524 change = 1; 1526 change = 1;
1525 hpi_handle_error(hpi_volume_set_gain(ss, h_control, an_gain_mB)); 1527 hpi_handle_error(hpi_volume_set_gain(h_control, an_gain_mB));
1526 return change; 1528 return change;
1527} 1529}
1528 1530
@@ -1534,7 +1536,7 @@ static int __devinit snd_asihpi_volume_add(struct snd_card_asihpi *asihpi,
1534 struct snd_card *card = asihpi->card; 1536 struct snd_card *card = asihpi->card;
1535 struct snd_kcontrol_new snd_control; 1537 struct snd_kcontrol_new snd_control;
1536 1538
1537 asihpi_ctl_init(&snd_control, hpi_ctl, "volume"); 1539 asihpi_ctl_init(&snd_control, hpi_ctl, "Volume");
1538 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1540 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1539 SNDRV_CTL_ELEM_ACCESS_TLV_READ; 1541 SNDRV_CTL_ELEM_ACCESS_TLV_READ;
1540 snd_control.info = snd_asihpi_volume_info; 1542 snd_control.info = snd_asihpi_volume_info;
@@ -1558,7 +1560,7 @@ static int snd_asihpi_level_info(struct snd_kcontrol *kcontrol,
1558 short step_gain_mB; 1560 short step_gain_mB;
1559 1561
1560 err = 1562 err =
1561 hpi_level_query_range(ss, h_control, &min_gain_mB, 1563 hpi_level_query_range(h_control, &min_gain_mB,
1562 &max_gain_mB, &step_gain_mB); 1564 &max_gain_mB, &step_gain_mB);
1563 if (err) { 1565 if (err) {
1564 max_gain_mB = 2400; 1566 max_gain_mB = 2400;
@@ -1580,7 +1582,7 @@ static int snd_asihpi_level_get(struct snd_kcontrol *kcontrol,
1580 u32 h_control = kcontrol->private_value; 1582 u32 h_control = kcontrol->private_value;
1581 short an_gain_mB[HPI_MAX_CHANNELS]; 1583 short an_gain_mB[HPI_MAX_CHANNELS];
1582 1584
1583 hpi_handle_error(hpi_level_get_gain(ss, h_control, an_gain_mB)); 1585 hpi_handle_error(hpi_level_get_gain(h_control, an_gain_mB));
1584 ucontrol->value.integer.value[0] = 1586 ucontrol->value.integer.value[0] =
1585 an_gain_mB[0] / HPI_UNITS_PER_dB; 1587 an_gain_mB[0] / HPI_UNITS_PER_dB;
1586 ucontrol->value.integer.value[1] = 1588 ucontrol->value.integer.value[1] =
@@ -1604,7 +1606,7 @@ static int snd_asihpi_level_put(struct snd_kcontrol *kcontrol,
1604 asihpi->mixer_level[addr][1] != right; 1606 asihpi->mixer_level[addr][1] != right;
1605 */ 1607 */
1606 change = 1; 1608 change = 1;
1607 hpi_handle_error(hpi_level_set_gain(ss, h_control, an_gain_mB)); 1609 hpi_handle_error(hpi_level_set_gain(h_control, an_gain_mB));
1608 return change; 1610 return change;
1609} 1611}
1610 1612
@@ -1617,7 +1619,7 @@ static int __devinit snd_asihpi_level_add(struct snd_card_asihpi *asihpi,
1617 struct snd_kcontrol_new snd_control; 1619 struct snd_kcontrol_new snd_control;
1618 1620
1619 /* can't use 'volume' cos some nodes have volume as well */ 1621 /* can't use 'volume' cos some nodes have volume as well */
1620 asihpi_ctl_init(&snd_control, hpi_ctl, "level"); 1622 asihpi_ctl_init(&snd_control, hpi_ctl, "Level");
1621 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1623 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1622 SNDRV_CTL_ELEM_ACCESS_TLV_READ; 1624 SNDRV_CTL_ELEM_ACCESS_TLV_READ;
1623 snd_control.info = snd_asihpi_level_info; 1625 snd_control.info = snd_asihpi_level_info;
@@ -1633,12 +1635,8 @@ static int __devinit snd_asihpi_level_add(struct snd_card_asihpi *asihpi,
1633 ------------------------------------------------------------*/ 1635 ------------------------------------------------------------*/
1634 1636
1635/* AESEBU format */ 1637/* AESEBU format */
1636static char *asihpi_aesebu_format_names[] = 1638static const char * const asihpi_aesebu_format_names[] = {
1637{ 1639 "N/A", "S/PDIF", "AES/EBU" };
1638 "N/A",
1639 "S/PDIF",
1640 "AES/EBU",
1641};
1642 1640
1643static int snd_asihpi_aesebu_format_info(struct snd_kcontrol *kcontrol, 1641static int snd_asihpi_aesebu_format_info(struct snd_kcontrol *kcontrol,
1644 struct snd_ctl_elem_info *uinfo) 1642 struct snd_ctl_elem_info *uinfo)
@@ -1659,12 +1657,12 @@ static int snd_asihpi_aesebu_format_info(struct snd_kcontrol *kcontrol,
1659 1657
1660static int snd_asihpi_aesebu_format_get(struct snd_kcontrol *kcontrol, 1658static int snd_asihpi_aesebu_format_get(struct snd_kcontrol *kcontrol,
1661 struct snd_ctl_elem_value *ucontrol, 1659 struct snd_ctl_elem_value *ucontrol,
1662 u16 (*func)(const struct hpi_hsubsys *, u32, u16 *)) 1660 u16 (*func)(u32, u16 *))
1663{ 1661{
1664 u32 h_control = kcontrol->private_value; 1662 u32 h_control = kcontrol->private_value;
1665 u16 source, err; 1663 u16 source, err;
1666 1664
1667 err = func(ss, h_control, &source); 1665 err = func(h_control, &source);
1668 1666
1669 /* default to N/A */ 1667 /* default to N/A */
1670 ucontrol->value.enumerated.item[0] = 0; 1668 ucontrol->value.enumerated.item[0] = 0;
@@ -1681,7 +1679,7 @@ static int snd_asihpi_aesebu_format_get(struct snd_kcontrol *kcontrol,
1681 1679
1682static int snd_asihpi_aesebu_format_put(struct snd_kcontrol *kcontrol, 1680static int snd_asihpi_aesebu_format_put(struct snd_kcontrol *kcontrol,
1683 struct snd_ctl_elem_value *ucontrol, 1681 struct snd_ctl_elem_value *ucontrol,
1684 u16 (*func)(const struct hpi_hsubsys *, u32, u16)) 1682 u16 (*func)(u32, u16))
1685{ 1683{
1686 u32 h_control = kcontrol->private_value; 1684 u32 h_control = kcontrol->private_value;
1687 1685
@@ -1693,7 +1691,7 @@ static int snd_asihpi_aesebu_format_put(struct snd_kcontrol *kcontrol,
1693 if (ucontrol->value.enumerated.item[0] == 2) 1691 if (ucontrol->value.enumerated.item[0] == 2)
1694 source = HPI_AESEBU_FORMAT_AESEBU; 1692 source = HPI_AESEBU_FORMAT_AESEBU;
1695 1693
1696 if (func(ss, h_control, source) != 0) 1694 if (func(h_control, source) != 0)
1697 return -EINVAL; 1695 return -EINVAL;
1698 1696
1699 return 1; 1697 return 1;
@@ -1702,13 +1700,13 @@ static int snd_asihpi_aesebu_format_put(struct snd_kcontrol *kcontrol,
1702static int snd_asihpi_aesebu_rx_format_get(struct snd_kcontrol *kcontrol, 1700static int snd_asihpi_aesebu_rx_format_get(struct snd_kcontrol *kcontrol,
1703 struct snd_ctl_elem_value *ucontrol) { 1701 struct snd_ctl_elem_value *ucontrol) {
1704 return snd_asihpi_aesebu_format_get(kcontrol, ucontrol, 1702 return snd_asihpi_aesebu_format_get(kcontrol, ucontrol,
1705 HPI_AESEBU__receiver_get_format); 1703 hpi_aesebu_receiver_get_format);
1706} 1704}
1707 1705
1708static int snd_asihpi_aesebu_rx_format_put(struct snd_kcontrol *kcontrol, 1706static int snd_asihpi_aesebu_rx_format_put(struct snd_kcontrol *kcontrol,
1709 struct snd_ctl_elem_value *ucontrol) { 1707 struct snd_ctl_elem_value *ucontrol) {
1710 return snd_asihpi_aesebu_format_put(kcontrol, ucontrol, 1708 return snd_asihpi_aesebu_format_put(kcontrol, ucontrol,
1711 HPI_AESEBU__receiver_set_format); 1709 hpi_aesebu_receiver_set_format);
1712} 1710}
1713 1711
1714static int snd_asihpi_aesebu_rxstatus_info(struct snd_kcontrol *kcontrol, 1712static int snd_asihpi_aesebu_rxstatus_info(struct snd_kcontrol *kcontrol,
@@ -1730,8 +1728,8 @@ static int snd_asihpi_aesebu_rxstatus_get(struct snd_kcontrol *kcontrol,
1730 u32 h_control = kcontrol->private_value; 1728 u32 h_control = kcontrol->private_value;
1731 u16 status; 1729 u16 status;
1732 1730
1733 hpi_handle_error(HPI_AESEBU__receiver_get_error_status( 1731 hpi_handle_error(hpi_aesebu_receiver_get_error_status(
1734 ss, h_control, &status)); 1732 h_control, &status));
1735 ucontrol->value.integer.value[0] = status; 1733 ucontrol->value.integer.value[0] = status;
1736 return 0; 1734 return 0;
1737} 1735}
@@ -1742,7 +1740,7 @@ static int __devinit snd_asihpi_aesebu_rx_add(struct snd_card_asihpi *asihpi,
1742 struct snd_card *card = asihpi->card; 1740 struct snd_card *card = asihpi->card;
1743 struct snd_kcontrol_new snd_control; 1741 struct snd_kcontrol_new snd_control;
1744 1742
1745 asihpi_ctl_init(&snd_control, hpi_ctl, "format"); 1743 asihpi_ctl_init(&snd_control, hpi_ctl, "Format");
1746 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE; 1744 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
1747 snd_control.info = snd_asihpi_aesebu_format_info; 1745 snd_control.info = snd_asihpi_aesebu_format_info;
1748 snd_control.get = snd_asihpi_aesebu_rx_format_get; 1746 snd_control.get = snd_asihpi_aesebu_rx_format_get;
@@ -1752,7 +1750,7 @@ static int __devinit snd_asihpi_aesebu_rx_add(struct snd_card_asihpi *asihpi,
1752 if (ctl_add(card, &snd_control, asihpi) < 0) 1750 if (ctl_add(card, &snd_control, asihpi) < 0)
1753 return -EINVAL; 1751 return -EINVAL;
1754 1752
1755 asihpi_ctl_init(&snd_control, hpi_ctl, "status"); 1753 asihpi_ctl_init(&snd_control, hpi_ctl, "Status");
1756 snd_control.access = 1754 snd_control.access =
1757 SNDRV_CTL_ELEM_ACCESS_VOLATILE | SNDRV_CTL_ELEM_ACCESS_READ; 1755 SNDRV_CTL_ELEM_ACCESS_VOLATILE | SNDRV_CTL_ELEM_ACCESS_READ;
1758 snd_control.info = snd_asihpi_aesebu_rxstatus_info; 1756 snd_control.info = snd_asihpi_aesebu_rxstatus_info;
@@ -1764,13 +1762,13 @@ static int __devinit snd_asihpi_aesebu_rx_add(struct snd_card_asihpi *asihpi,
1764static int snd_asihpi_aesebu_tx_format_get(struct snd_kcontrol *kcontrol, 1762static int snd_asihpi_aesebu_tx_format_get(struct snd_kcontrol *kcontrol,
1765 struct snd_ctl_elem_value *ucontrol) { 1763 struct snd_ctl_elem_value *ucontrol) {
1766 return snd_asihpi_aesebu_format_get(kcontrol, ucontrol, 1764 return snd_asihpi_aesebu_format_get(kcontrol, ucontrol,
1767 HPI_AESEBU__transmitter_get_format); 1765 hpi_aesebu_transmitter_get_format);
1768} 1766}
1769 1767
1770static int snd_asihpi_aesebu_tx_format_put(struct snd_kcontrol *kcontrol, 1768static int snd_asihpi_aesebu_tx_format_put(struct snd_kcontrol *kcontrol,
1771 struct snd_ctl_elem_value *ucontrol) { 1769 struct snd_ctl_elem_value *ucontrol) {
1772 return snd_asihpi_aesebu_format_put(kcontrol, ucontrol, 1770 return snd_asihpi_aesebu_format_put(kcontrol, ucontrol,
1773 HPI_AESEBU__transmitter_set_format); 1771 hpi_aesebu_transmitter_set_format);
1774} 1772}
1775 1773
1776 1774
@@ -1780,7 +1778,7 @@ static int __devinit snd_asihpi_aesebu_tx_add(struct snd_card_asihpi *asihpi,
1780 struct snd_card *card = asihpi->card; 1778 struct snd_card *card = asihpi->card;
1781 struct snd_kcontrol_new snd_control; 1779 struct snd_kcontrol_new snd_control;
1782 1780
1783 asihpi_ctl_init(&snd_control, hpi_ctl, "format"); 1781 asihpi_ctl_init(&snd_control, hpi_ctl, "Format");
1784 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE; 1782 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
1785 snd_control.info = snd_asihpi_aesebu_format_info; 1783 snd_control.info = snd_asihpi_aesebu_format_info;
1786 snd_control.get = snd_asihpi_aesebu_tx_format_get; 1784 snd_control.get = snd_asihpi_aesebu_tx_format_get;
@@ -1804,7 +1802,7 @@ static int snd_asihpi_tuner_gain_info(struct snd_kcontrol *kcontrol,
1804 u16 gain_range[3]; 1802 u16 gain_range[3];
1805 1803
1806 for (idx = 0; idx < 3; idx++) { 1804 for (idx = 0; idx < 3; idx++) {
1807 err = hpi_tuner_query_gain(ss, h_control, 1805 err = hpi_tuner_query_gain(h_control,
1808 idx, &gain_range[idx]); 1806 idx, &gain_range[idx]);
1809 if (err != 0) 1807 if (err != 0)
1810 return err; 1808 return err;
@@ -1827,7 +1825,7 @@ static int snd_asihpi_tuner_gain_get(struct snd_kcontrol *kcontrol,
1827 u32 h_control = kcontrol->private_value; 1825 u32 h_control = kcontrol->private_value;
1828 short gain; 1826 short gain;
1829 1827
1830 hpi_handle_error(hpi_tuner_get_gain(ss, h_control, &gain)); 1828 hpi_handle_error(hpi_tuner_get_gain(h_control, &gain));
1831 ucontrol->value.integer.value[0] = gain / HPI_UNITS_PER_dB; 1829 ucontrol->value.integer.value[0] = gain / HPI_UNITS_PER_dB;
1832 1830
1833 return 0; 1831 return 0;
@@ -1843,7 +1841,7 @@ static int snd_asihpi_tuner_gain_put(struct snd_kcontrol *kcontrol,
1843 short gain; 1841 short gain;
1844 1842
1845 gain = (ucontrol->value.integer.value[0]) * HPI_UNITS_PER_dB; 1843 gain = (ucontrol->value.integer.value[0]) * HPI_UNITS_PER_dB;
1846 hpi_handle_error(hpi_tuner_set_gain(ss, h_control, gain)); 1844 hpi_handle_error(hpi_tuner_set_gain(h_control, gain));
1847 1845
1848 return 1; 1846 return 1;
1849} 1847}
@@ -1857,7 +1855,7 @@ static int asihpi_tuner_band_query(struct snd_kcontrol *kcontrol,
1857 u32 i; 1855 u32 i;
1858 1856
1859 for (i = 0; i < len; i++) { 1857 for (i = 0; i < len; i++) {
1860 err = hpi_tuner_query_band(ss, 1858 err = hpi_tuner_query_band(
1861 h_control, i, &band_list[i]); 1859 h_control, i, &band_list[i]);
1862 if (err != 0) 1860 if (err != 0)
1863 break; 1861 break;
@@ -1913,7 +1911,7 @@ static int snd_asihpi_tuner_band_get(struct snd_kcontrol *kcontrol,
1913 num_bands = asihpi_tuner_band_query(kcontrol, tuner_bands, 1911 num_bands = asihpi_tuner_band_query(kcontrol, tuner_bands,
1914 HPI_TUNER_BAND_LAST); 1912 HPI_TUNER_BAND_LAST);
1915 1913
1916 hpi_handle_error(hpi_tuner_get_band(ss, h_control, &band)); 1914 hpi_handle_error(hpi_tuner_get_band(h_control, &band));
1917 1915
1918 ucontrol->value.enumerated.item[0] = -1; 1916 ucontrol->value.enumerated.item[0] = -1;
1919 for (idx = 0; idx < HPI_TUNER_BAND_LAST; idx++) 1917 for (idx = 0; idx < HPI_TUNER_BAND_LAST; idx++)
@@ -1940,7 +1938,7 @@ static int snd_asihpi_tuner_band_put(struct snd_kcontrol *kcontrol,
1940 HPI_TUNER_BAND_LAST); 1938 HPI_TUNER_BAND_LAST);
1941 1939
1942 band = tuner_bands[ucontrol->value.enumerated.item[0]]; 1940 band = tuner_bands[ucontrol->value.enumerated.item[0]];
1943 hpi_handle_error(hpi_tuner_set_band(ss, h_control, band)); 1941 hpi_handle_error(hpi_tuner_set_band(h_control, band));
1944 1942
1945 return 1; 1943 return 1;
1946} 1944}
@@ -1965,7 +1963,7 @@ static int snd_asihpi_tuner_freq_info(struct snd_kcontrol *kcontrol,
1965 1963
1966 for (band_iter = 0; band_iter < num_bands; band_iter++) { 1964 for (band_iter = 0; band_iter < num_bands; band_iter++) {
1967 for (idx = 0; idx < 3; idx++) { 1965 for (idx = 0; idx < 3; idx++) {
1968 err = hpi_tuner_query_frequency(ss, h_control, 1966 err = hpi_tuner_query_frequency(h_control,
1969 idx, tuner_bands[band_iter], 1967 idx, tuner_bands[band_iter],
1970 &temp_freq_range[idx]); 1968 &temp_freq_range[idx]);
1971 if (err != 0) 1969 if (err != 0)
@@ -1998,7 +1996,7 @@ static int snd_asihpi_tuner_freq_get(struct snd_kcontrol *kcontrol,
1998 u32 h_control = kcontrol->private_value; 1996 u32 h_control = kcontrol->private_value;
1999 u32 freq; 1997 u32 freq;
2000 1998
2001 hpi_handle_error(hpi_tuner_get_frequency(ss, h_control, &freq)); 1999 hpi_handle_error(hpi_tuner_get_frequency(h_control, &freq));
2002 ucontrol->value.integer.value[0] = freq; 2000 ucontrol->value.integer.value[0] = freq;
2003 2001
2004 return 0; 2002 return 0;
@@ -2011,7 +2009,7 @@ static int snd_asihpi_tuner_freq_put(struct snd_kcontrol *kcontrol,
2011 u32 freq; 2009 u32 freq;
2012 2010
2013 freq = ucontrol->value.integer.value[0]; 2011 freq = ucontrol->value.integer.value[0];
2014 hpi_handle_error(hpi_tuner_set_frequency(ss, h_control, freq)); 2012 hpi_handle_error(hpi_tuner_set_frequency(h_control, freq));
2015 2013
2016 return 1; 2014 return 1;
2017} 2015}
@@ -2026,8 +2024,8 @@ static int __devinit snd_asihpi_tuner_add(struct snd_card_asihpi *asihpi,
2026 snd_control.private_value = hpi_ctl->h_control; 2024 snd_control.private_value = hpi_ctl->h_control;
2027 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE; 2025 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
2028 2026
2029 if (!hpi_tuner_get_gain(ss, hpi_ctl->h_control, NULL)) { 2027 if (!hpi_tuner_get_gain(hpi_ctl->h_control, NULL)) {
2030 asihpi_ctl_init(&snd_control, hpi_ctl, "gain"); 2028 asihpi_ctl_init(&snd_control, hpi_ctl, "Gain");
2031 snd_control.info = snd_asihpi_tuner_gain_info; 2029 snd_control.info = snd_asihpi_tuner_gain_info;
2032 snd_control.get = snd_asihpi_tuner_gain_get; 2030 snd_control.get = snd_asihpi_tuner_gain_get;
2033 snd_control.put = snd_asihpi_tuner_gain_put; 2031 snd_control.put = snd_asihpi_tuner_gain_put;
@@ -2036,7 +2034,7 @@ static int __devinit snd_asihpi_tuner_add(struct snd_card_asihpi *asihpi,
2036 return -EINVAL; 2034 return -EINVAL;
2037 } 2035 }
2038 2036
2039 asihpi_ctl_init(&snd_control, hpi_ctl, "band"); 2037 asihpi_ctl_init(&snd_control, hpi_ctl, "Band");
2040 snd_control.info = snd_asihpi_tuner_band_info; 2038 snd_control.info = snd_asihpi_tuner_band_info;
2041 snd_control.get = snd_asihpi_tuner_band_get; 2039 snd_control.get = snd_asihpi_tuner_band_get;
2042 snd_control.put = snd_asihpi_tuner_band_put; 2040 snd_control.put = snd_asihpi_tuner_band_put;
@@ -2044,7 +2042,7 @@ static int __devinit snd_asihpi_tuner_add(struct snd_card_asihpi *asihpi,
2044 if (ctl_add(card, &snd_control, asihpi) < 0) 2042 if (ctl_add(card, &snd_control, asihpi) < 0)
2045 return -EINVAL; 2043 return -EINVAL;
2046 2044
2047 asihpi_ctl_init(&snd_control, hpi_ctl, "freq"); 2045 asihpi_ctl_init(&snd_control, hpi_ctl, "Freq");
2048 snd_control.info = snd_asihpi_tuner_freq_info; 2046 snd_control.info = snd_asihpi_tuner_freq_info;
2049 snd_control.get = snd_asihpi_tuner_freq_get; 2047 snd_control.get = snd_asihpi_tuner_freq_get;
2050 snd_control.put = snd_asihpi_tuner_freq_put; 2048 snd_control.put = snd_asihpi_tuner_freq_put;
@@ -2095,7 +2093,7 @@ static int snd_asihpi_meter_get(struct snd_kcontrol *kcontrol,
2095 short an_gain_mB[HPI_MAX_CHANNELS], i; 2093 short an_gain_mB[HPI_MAX_CHANNELS], i;
2096 u16 err; 2094 u16 err;
2097 2095
2098 err = hpi_meter_get_peak(ss, h_control, an_gain_mB); 2096 err = hpi_meter_get_peak(h_control, an_gain_mB);
2099 2097
2100 for (i = 0; i < HPI_MAX_CHANNELS; i++) { 2098 for (i = 0; i < HPI_MAX_CHANNELS; i++) {
2101 if (err) { 2099 if (err) {
@@ -2120,7 +2118,7 @@ static int __devinit snd_asihpi_meter_add(struct snd_card_asihpi *asihpi,
2120 struct snd_card *card = asihpi->card; 2118 struct snd_card *card = asihpi->card;
2121 struct snd_kcontrol_new snd_control; 2119 struct snd_kcontrol_new snd_control;
2122 2120
2123 asihpi_ctl_init(&snd_control, hpi_ctl, "meter"); 2121 asihpi_ctl_init(&snd_control, hpi_ctl, "Meter");
2124 snd_control.access = 2122 snd_control.access =
2125 SNDRV_CTL_ELEM_ACCESS_VOLATILE | SNDRV_CTL_ELEM_ACCESS_READ; 2123 SNDRV_CTL_ELEM_ACCESS_VOLATILE | SNDRV_CTL_ELEM_ACCESS_READ;
2126 snd_control.info = snd_asihpi_meter_info; 2124 snd_control.info = snd_asihpi_meter_info;
@@ -2140,7 +2138,7 @@ static int snd_card_asihpi_mux_count_sources(struct snd_kcontrol *snd_control)
2140 struct hpi_control hpi_ctl; 2138 struct hpi_control hpi_ctl;
2141 int s, err; 2139 int s, err;
2142 for (s = 0; s < 32; s++) { 2140 for (s = 0; s < 32; s++) {
2143 err = hpi_multiplexer_query_source(ss, h_control, s, 2141 err = hpi_multiplexer_query_source(h_control, s,
2144 &hpi_ctl. 2142 &hpi_ctl.
2145 src_node_type, 2143 src_node_type,
2146 &hpi_ctl. 2144 &hpi_ctl.
@@ -2168,7 +2166,7 @@ static int snd_asihpi_mux_info(struct snd_kcontrol *kcontrol,
2168 uinfo->value.enumerated.items - 1; 2166 uinfo->value.enumerated.items - 1;
2169 2167
2170 err = 2168 err =
2171 hpi_multiplexer_query_source(ss, h_control, 2169 hpi_multiplexer_query_source(h_control,
2172 uinfo->value.enumerated.item, 2170 uinfo->value.enumerated.item,
2173 &src_node_type, &src_node_index); 2171 &src_node_type, &src_node_index);
2174 2172
@@ -2186,11 +2184,11 @@ static int snd_asihpi_mux_get(struct snd_kcontrol *kcontrol,
2186 u16 src_node_type, src_node_index; 2184 u16 src_node_type, src_node_index;
2187 int s; 2185 int s;
2188 2186
2189 hpi_handle_error(hpi_multiplexer_get_source(ss, h_control, 2187 hpi_handle_error(hpi_multiplexer_get_source(h_control,
2190 &source_type, &source_index)); 2188 &source_type, &source_index));
2191 /* Should cache this search result! */ 2189 /* Should cache this search result! */
2192 for (s = 0; s < 256; s++) { 2190 for (s = 0; s < 256; s++) {
2193 if (hpi_multiplexer_query_source(ss, h_control, s, 2191 if (hpi_multiplexer_query_source(h_control, s,
2194 &src_node_type, &src_node_index)) 2192 &src_node_type, &src_node_index))
2195 break; 2193 break;
2196 2194
@@ -2201,7 +2199,7 @@ static int snd_asihpi_mux_get(struct snd_kcontrol *kcontrol,
2201 } 2199 }
2202 } 2200 }
2203 snd_printd(KERN_WARNING 2201 snd_printd(KERN_WARNING
2204 "control %x failed to match mux source %hu %hu\n", 2202 "Control %x failed to match mux source %hu %hu\n",
2205 h_control, source_type, source_index); 2203 h_control, source_type, source_index);
2206 ucontrol->value.enumerated.item[0] = 0; 2204 ucontrol->value.enumerated.item[0] = 0;
2207 return 0; 2205 return 0;
@@ -2217,12 +2215,12 @@ static int snd_asihpi_mux_put(struct snd_kcontrol *kcontrol,
2217 2215
2218 change = 1; 2216 change = 1;
2219 2217
2220 e = hpi_multiplexer_query_source(ss, h_control, 2218 e = hpi_multiplexer_query_source(h_control,
2221 ucontrol->value.enumerated.item[0], 2219 ucontrol->value.enumerated.item[0],
2222 &source_type, &source_index); 2220 &source_type, &source_index);
2223 if (!e) 2221 if (!e)
2224 hpi_handle_error( 2222 hpi_handle_error(
2225 hpi_multiplexer_set_source(ss, h_control, 2223 hpi_multiplexer_set_source(h_control,
2226 source_type, source_index)); 2224 source_type, source_index));
2227 return change; 2225 return change;
2228} 2226}
@@ -2234,11 +2232,7 @@ static int __devinit snd_asihpi_mux_add(struct snd_card_asihpi *asihpi,
2234 struct snd_card *card = asihpi->card; 2232 struct snd_card *card = asihpi->card;
2235 struct snd_kcontrol_new snd_control; 2233 struct snd_kcontrol_new snd_control;
2236 2234
2237#if ASI_STYLE_NAMES 2235 asihpi_ctl_init(&snd_control, hpi_ctl, "Route");
2238 asihpi_ctl_init(&snd_control, hpi_ctl, "multiplexer");
2239#else
2240 asihpi_ctl_init(&snd_control, hpi_ctl, "route");
2241#endif
2242 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE; 2236 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
2243 snd_control.info = snd_asihpi_mux_info; 2237 snd_control.info = snd_asihpi_mux_info;
2244 snd_control.get = snd_asihpi_mux_get; 2238 snd_control.get = snd_asihpi_mux_get;
@@ -2254,33 +2248,38 @@ static int __devinit snd_asihpi_mux_add(struct snd_card_asihpi *asihpi,
2254static int snd_asihpi_cmode_info(struct snd_kcontrol *kcontrol, 2248static int snd_asihpi_cmode_info(struct snd_kcontrol *kcontrol,
2255 struct snd_ctl_elem_info *uinfo) 2249 struct snd_ctl_elem_info *uinfo)
2256{ 2250{
2257 static char *mode_names[HPI_CHANNEL_MODE_LAST] = { 2251 static const char * const mode_names[HPI_CHANNEL_MODE_LAST + 1] = {
2258 "normal", "swap", 2252 "invalid",
2259 "from_left", "from_right", 2253 "Normal", "Swap",
2260 "to_left", "to_right" 2254 "From Left", "From Right",
2255 "To Left", "To Right"
2261 }; 2256 };
2262 2257
2263 u32 h_control = kcontrol->private_value; 2258 u32 h_control = kcontrol->private_value;
2264 u16 mode; 2259 u16 mode;
2265 int i; 2260 int i;
2261 u16 mode_map[6];
2262 int valid_modes = 0;
2266 2263
2267 /* HPI channel mode values can be from 1 to 6 2264 /* HPI channel mode values can be from 1 to 6
2268 Some adapters only support a contiguous subset 2265 Some adapters only support a contiguous subset
2269 */ 2266 */
2270 for (i = 0; i < HPI_CHANNEL_MODE_LAST; i++) 2267 for (i = 0; i < HPI_CHANNEL_MODE_LAST; i++)
2271 if (hpi_channel_mode_query_mode( 2268 if (!hpi_channel_mode_query_mode(
2272 ss, h_control, i, &mode)) 2269 h_control, i, &mode)) {
2273 break; 2270 mode_map[valid_modes] = mode;
2271 valid_modes++;
2272 }
2274 2273
2275 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2274 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2276 uinfo->count = 1; 2275 uinfo->count = 1;
2277 uinfo->value.enumerated.items = i; 2276 uinfo->value.enumerated.items = valid_modes;
2278 2277
2279 if (uinfo->value.enumerated.item >= i) 2278 if (uinfo->value.enumerated.item >= valid_modes)
2280 uinfo->value.enumerated.item = i - 1; 2279 uinfo->value.enumerated.item = valid_modes - 1;
2281 2280
2282 strcpy(uinfo->value.enumerated.name, 2281 strcpy(uinfo->value.enumerated.name,
2283 mode_names[uinfo->value.enumerated.item]); 2282 mode_names[mode_map[uinfo->value.enumerated.item]]);
2284 2283
2285 return 0; 2284 return 0;
2286} 2285}
@@ -2291,7 +2290,7 @@ static int snd_asihpi_cmode_get(struct snd_kcontrol *kcontrol,
2291 u32 h_control = kcontrol->private_value; 2290 u32 h_control = kcontrol->private_value;
2292 u16 mode; 2291 u16 mode;
2293 2292
2294 if (hpi_channel_mode_get(ss, h_control, &mode)) 2293 if (hpi_channel_mode_get(h_control, &mode))
2295 mode = 1; 2294 mode = 1;
2296 2295
2297 ucontrol->value.enumerated.item[0] = mode - 1; 2296 ucontrol->value.enumerated.item[0] = mode - 1;
@@ -2307,7 +2306,7 @@ static int snd_asihpi_cmode_put(struct snd_kcontrol *kcontrol,
2307 2306
2308 change = 1; 2307 change = 1;
2309 2308
2310 hpi_handle_error(hpi_channel_mode_set(ss, h_control, 2309 hpi_handle_error(hpi_channel_mode_set(h_control,
2311 ucontrol->value.enumerated.item[0] + 1)); 2310 ucontrol->value.enumerated.item[0] + 1));
2312 return change; 2311 return change;
2313} 2312}
@@ -2319,7 +2318,7 @@ static int __devinit snd_asihpi_cmode_add(struct snd_card_asihpi *asihpi,
2319 struct snd_card *card = asihpi->card; 2318 struct snd_card *card = asihpi->card;
2320 struct snd_kcontrol_new snd_control; 2319 struct snd_kcontrol_new snd_control;
2321 2320
2322 asihpi_ctl_init(&snd_control, hpi_ctl, "channel mode"); 2321 asihpi_ctl_init(&snd_control, hpi_ctl, "Mode");
2323 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE; 2322 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
2324 snd_control.info = snd_asihpi_cmode_info; 2323 snd_control.info = snd_asihpi_cmode_info;
2325 snd_control.get = snd_asihpi_cmode_get; 2324 snd_control.get = snd_asihpi_cmode_get;
@@ -2331,15 +2330,12 @@ static int __devinit snd_asihpi_cmode_add(struct snd_card_asihpi *asihpi,
2331/*------------------------------------------------------------ 2330/*------------------------------------------------------------
2332 Sampleclock source controls 2331 Sampleclock source controls
2333 ------------------------------------------------------------*/ 2332 ------------------------------------------------------------*/
2334 2333static char *sampleclock_sources[MAX_CLOCKSOURCES] = {
2335static char *sampleclock_sources[MAX_CLOCKSOURCES] = 2334 "N/A", "Local PLL", "Digital Sync", "Word External", "Word Header",
2336 { "N/A", "local PLL", "AES/EBU sync", "word external", "word header", 2335 "SMPTE", "Digital1", "Auto", "Network", "Invalid",
2337 "SMPTE", "AES/EBU in1", "auto", "network", "invalid", 2336 "Prev Module",
2338 "prev module", 2337 "Digital2", "Digital3", "Digital4", "Digital5",
2339 "AES/EBU in2", "AES/EBU in3", "AES/EBU in4", "AES/EBU in5", 2338 "Digital6", "Digital7", "Digital8"};
2340 "AES/EBU in6", "AES/EBU in7", "AES/EBU in8"};
2341
2342
2343 2339
2344static int snd_asihpi_clksrc_info(struct snd_kcontrol *kcontrol, 2340static int snd_asihpi_clksrc_info(struct snd_kcontrol *kcontrol,
2345 struct snd_ctl_elem_info *uinfo) 2341 struct snd_ctl_elem_info *uinfo)
@@ -2371,11 +2367,11 @@ static int snd_asihpi_clksrc_get(struct snd_kcontrol *kcontrol,
2371 int i; 2367 int i;
2372 2368
2373 ucontrol->value.enumerated.item[0] = 0; 2369 ucontrol->value.enumerated.item[0] = 0;
2374 if (hpi_sample_clock_get_source(ss, h_control, &source)) 2370 if (hpi_sample_clock_get_source(h_control, &source))
2375 source = 0; 2371 source = 0;
2376 2372
2377 if (source == HPI_SAMPLECLOCK_SOURCE_AESEBU_INPUT) 2373 if (source == HPI_SAMPLECLOCK_SOURCE_AESEBU_INPUT)
2378 if (hpi_sample_clock_get_source_index(ss, h_control, &srcindex)) 2374 if (hpi_sample_clock_get_source_index(h_control, &srcindex))
2379 srcindex = 0; 2375 srcindex = 0;
2380 2376
2381 for (i = 0; i < clkcache->count; i++) 2377 for (i = 0; i < clkcache->count; i++)
@@ -2402,11 +2398,11 @@ static int snd_asihpi_clksrc_put(struct snd_kcontrol *kcontrol,
2402 if (item >= clkcache->count) 2398 if (item >= clkcache->count)
2403 item = clkcache->count-1; 2399 item = clkcache->count-1;
2404 2400
2405 hpi_handle_error(hpi_sample_clock_set_source(ss, 2401 hpi_handle_error(hpi_sample_clock_set_source(
2406 h_control, clkcache->s[item].source)); 2402 h_control, clkcache->s[item].source));
2407 2403
2408 if (clkcache->s[item].source == HPI_SAMPLECLOCK_SOURCE_AESEBU_INPUT) 2404 if (clkcache->s[item].source == HPI_SAMPLECLOCK_SOURCE_AESEBU_INPUT)
2409 hpi_handle_error(hpi_sample_clock_set_source_index(ss, 2405 hpi_handle_error(hpi_sample_clock_set_source_index(
2410 h_control, clkcache->s[item].index)); 2406 h_control, clkcache->s[item].index));
2411 return change; 2407 return change;
2412} 2408}
@@ -2434,7 +2430,7 @@ static int snd_asihpi_clklocal_get(struct snd_kcontrol *kcontrol,
2434 u32 rate; 2430 u32 rate;
2435 u16 e; 2431 u16 e;
2436 2432
2437 e = hpi_sample_clock_get_local_rate(ss, h_control, &rate); 2433 e = hpi_sample_clock_get_local_rate(h_control, &rate);
2438 if (!e) 2434 if (!e)
2439 ucontrol->value.integer.value[0] = rate; 2435 ucontrol->value.integer.value[0] = rate;
2440 else 2436 else
@@ -2452,7 +2448,7 @@ static int snd_asihpi_clklocal_put(struct snd_kcontrol *kcontrol,
2452 asihpi->mixer_clkrate[addr][1] != right; 2448 asihpi->mixer_clkrate[addr][1] != right;
2453 */ 2449 */
2454 change = 1; 2450 change = 1;
2455 hpi_handle_error(hpi_sample_clock_set_local_rate(ss, h_control, 2451 hpi_handle_error(hpi_sample_clock_set_local_rate(h_control,
2456 ucontrol->value.integer.value[0])); 2452 ucontrol->value.integer.value[0]));
2457 return change; 2453 return change;
2458} 2454}
@@ -2476,7 +2472,7 @@ static int snd_asihpi_clkrate_get(struct snd_kcontrol *kcontrol,
2476 u32 rate; 2472 u32 rate;
2477 u16 e; 2473 u16 e;
2478 2474
2479 e = hpi_sample_clock_get_sample_rate(ss, h_control, &rate); 2475 e = hpi_sample_clock_get_sample_rate(h_control, &rate);
2480 if (!e) 2476 if (!e)
2481 ucontrol->value.integer.value[0] = rate; 2477 ucontrol->value.integer.value[0] = rate;
2482 else 2478 else
@@ -2501,7 +2497,7 @@ static int __devinit snd_asihpi_sampleclock_add(struct snd_card_asihpi *asihpi,
2501 clkcache->has_local = 0; 2497 clkcache->has_local = 0;
2502 2498
2503 for (i = 0; i <= HPI_SAMPLECLOCK_SOURCE_LAST; i++) { 2499 for (i = 0; i <= HPI_SAMPLECLOCK_SOURCE_LAST; i++) {
2504 if (hpi_sample_clock_query_source(ss, hSC, 2500 if (hpi_sample_clock_query_source(hSC,
2505 i, &source)) 2501 i, &source))
2506 break; 2502 break;
2507 clkcache->s[i].source = source; 2503 clkcache->s[i].source = source;
@@ -2515,7 +2511,7 @@ static int __devinit snd_asihpi_sampleclock_add(struct snd_card_asihpi *asihpi,
2515 if (has_aes_in) 2511 if (has_aes_in)
2516 /* already will have picked up index 0 above */ 2512 /* already will have picked up index 0 above */
2517 for (j = 1; j < 8; j++) { 2513 for (j = 1; j < 8; j++) {
2518 if (hpi_sample_clock_query_source_index(ss, hSC, 2514 if (hpi_sample_clock_query_source_index(hSC,
2519 j, HPI_SAMPLECLOCK_SOURCE_AESEBU_INPUT, 2515 j, HPI_SAMPLECLOCK_SOURCE_AESEBU_INPUT,
2520 &source)) 2516 &source))
2521 break; 2517 break;
@@ -2528,7 +2524,7 @@ static int __devinit snd_asihpi_sampleclock_add(struct snd_card_asihpi *asihpi,
2528 } 2524 }
2529 clkcache->count = i; 2525 clkcache->count = i;
2530 2526
2531 asihpi_ctl_init(&snd_control, hpi_ctl, "source"); 2527 asihpi_ctl_init(&snd_control, hpi_ctl, "Source");
2532 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE ; 2528 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE ;
2533 snd_control.info = snd_asihpi_clksrc_info; 2529 snd_control.info = snd_asihpi_clksrc_info;
2534 snd_control.get = snd_asihpi_clksrc_get; 2530 snd_control.get = snd_asihpi_clksrc_get;
@@ -2538,7 +2534,7 @@ static int __devinit snd_asihpi_sampleclock_add(struct snd_card_asihpi *asihpi,
2538 2534
2539 2535
2540 if (clkcache->has_local) { 2536 if (clkcache->has_local) {
2541 asihpi_ctl_init(&snd_control, hpi_ctl, "local_rate"); 2537 asihpi_ctl_init(&snd_control, hpi_ctl, "Localrate");
2542 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE ; 2538 snd_control.access = SNDRV_CTL_ELEM_ACCESS_READWRITE ;
2543 snd_control.info = snd_asihpi_clklocal_info; 2539 snd_control.info = snd_asihpi_clklocal_info;
2544 snd_control.get = snd_asihpi_clklocal_get; 2540 snd_control.get = snd_asihpi_clklocal_get;
@@ -2549,7 +2545,7 @@ static int __devinit snd_asihpi_sampleclock_add(struct snd_card_asihpi *asihpi,
2549 return -EINVAL; 2545 return -EINVAL;
2550 } 2546 }
2551 2547
2552 asihpi_ctl_init(&snd_control, hpi_ctl, "rate"); 2548 asihpi_ctl_init(&snd_control, hpi_ctl, "Rate");
2553 snd_control.access = 2549 snd_control.access =
2554 SNDRV_CTL_ELEM_ACCESS_VOLATILE | SNDRV_CTL_ELEM_ACCESS_READ; 2550 SNDRV_CTL_ELEM_ACCESS_VOLATILE | SNDRV_CTL_ELEM_ACCESS_READ;
2555 snd_control.info = snd_asihpi_clkrate_info; 2551 snd_control.info = snd_asihpi_clkrate_info;
@@ -2571,10 +2567,10 @@ static int __devinit snd_card_asihpi_mixer_new(struct snd_card_asihpi *asihpi)
2571 2567
2572 if (snd_BUG_ON(!asihpi)) 2568 if (snd_BUG_ON(!asihpi))
2573 return -EINVAL; 2569 return -EINVAL;
2574 strcpy(card->mixername, "asihpi mixer"); 2570 strcpy(card->mixername, "Asihpi Mixer");
2575 2571
2576 err = 2572 err =
2577 hpi_mixer_open(ss, asihpi->adapter_index, 2573 hpi_mixer_open(asihpi->adapter_index,
2578 &asihpi->h_mixer); 2574 &asihpi->h_mixer);
2579 hpi_handle_error(err); 2575 hpi_handle_error(err);
2580 if (err) 2576 if (err)
@@ -2585,7 +2581,7 @@ static int __devinit snd_card_asihpi_mixer_new(struct snd_card_asihpi *asihpi)
2585 2581
2586 for (idx = 0; idx < 2000; idx++) { 2582 for (idx = 0; idx < 2000; idx++) {
2587 err = hpi_mixer_get_control_by_index( 2583 err = hpi_mixer_get_control_by_index(
2588 ss, asihpi->h_mixer, 2584 asihpi->h_mixer,
2589 idx, 2585 idx,
2590 &hpi_ctl.src_node_type, 2586 &hpi_ctl.src_node_type,
2591 &hpi_ctl.src_node_index, 2587 &hpi_ctl.src_node_index,
@@ -2597,7 +2593,7 @@ static int __devinit snd_card_asihpi_mixer_new(struct snd_card_asihpi *asihpi)
2597 if (err == HPI_ERROR_CONTROL_DISABLED) { 2593 if (err == HPI_ERROR_CONTROL_DISABLED) {
2598 if (mixer_dump) 2594 if (mixer_dump)
2599 snd_printk(KERN_INFO 2595 snd_printk(KERN_INFO
2600 "disabled HPI control(%d)\n", 2596 "Disabled HPI Control(%d)\n",
2601 idx); 2597 idx);
2602 continue; 2598 continue;
2603 } else 2599 } else
@@ -2662,7 +2658,7 @@ static int __devinit snd_card_asihpi_mixer_new(struct snd_card_asihpi *asihpi)
2662 default: 2658 default:
2663 if (mixer_dump) 2659 if (mixer_dump)
2664 snd_printk(KERN_INFO 2660 snd_printk(KERN_INFO
2665 "untranslated HPI control" 2661 "Untranslated HPI Control"
2666 "(%d) %d %d %d %d %d\n", 2662 "(%d) %d %d %d %d %d\n",
2667 idx, 2663 idx,
2668 hpi_ctl.control_type, 2664 hpi_ctl.control_type,
@@ -2712,14 +2708,14 @@ snd_asihpi_proc_read(struct snd_info_entry *entry,
2712 version & 0x7, 2708 version & 0x7,
2713 ((version >> 13) * 100) + ((version >> 7) & 0x3f)); 2709 ((version >> 13) * 100) + ((version >> 7) & 0x3f));
2714 2710
2715 err = hpi_mixer_get_control(ss, asihpi->h_mixer, 2711 err = hpi_mixer_get_control(asihpi->h_mixer,
2716 HPI_SOURCENODE_CLOCK_SOURCE, 0, 0, 0, 2712 HPI_SOURCENODE_CLOCK_SOURCE, 0, 0, 0,
2717 HPI_CONTROL_SAMPLECLOCK, &h_control); 2713 HPI_CONTROL_SAMPLECLOCK, &h_control);
2718 2714
2719 if (!err) { 2715 if (!err) {
2720 err = hpi_sample_clock_get_sample_rate(ss, 2716 err = hpi_sample_clock_get_sample_rate(
2721 h_control, &rate); 2717 h_control, &rate);
2722 err += hpi_sample_clock_get_source(ss, h_control, &source); 2718 err += hpi_sample_clock_get_source(h_control, &source);
2723 2719
2724 if (!err) 2720 if (!err)
2725 snd_iprintf(buffer, "sample_clock=%d_hz, source %s\n", 2721 snd_iprintf(buffer, "sample_clock=%d_hz, source %s\n",
@@ -2841,15 +2837,17 @@ static int __devinit snd_asihpi_probe(struct pci_dev *pci_dev,
2841 if (err < 0) 2837 if (err < 0)
2842 return err; 2838 return err;
2843 snd_printk(KERN_WARNING 2839 snd_printk(KERN_WARNING
2844 "**** WARNING **** adapter index %d->ALSA index %d\n", 2840 "**** WARNING **** Adapter index %d->ALSA index %d\n",
2845 hpi_card->index, card->number); 2841 hpi_card->index, card->number);
2846 } 2842 }
2847 2843
2844 snd_card_set_dev(card, &pci_dev->dev);
2845
2848 asihpi = (struct snd_card_asihpi *) card->private_data; 2846 asihpi = (struct snd_card_asihpi *) card->private_data;
2849 asihpi->card = card; 2847 asihpi->card = card;
2850 asihpi->pci = hpi_card->pci; 2848 asihpi->pci = pci_dev;
2851 asihpi->adapter_index = hpi_card->index; 2849 asihpi->adapter_index = hpi_card->index;
2852 hpi_handle_error(hpi_adapter_get_info(ss, 2850 hpi_handle_error(hpi_adapter_get_info(
2853 asihpi->adapter_index, 2851 asihpi->adapter_index,
2854 &asihpi->num_outstreams, 2852 &asihpi->num_outstreams,
2855 &asihpi->num_instreams, 2853 &asihpi->num_instreams,
@@ -2859,7 +2857,7 @@ static int __devinit snd_asihpi_probe(struct pci_dev *pci_dev,
2859 version = asihpi->version; 2857 version = asihpi->version;
2860 snd_printk(KERN_INFO "adapter ID=%4X index=%d num_outstreams=%d " 2858 snd_printk(KERN_INFO "adapter ID=%4X index=%d num_outstreams=%d "
2861 "num_instreams=%d S/N=%d\n" 2859 "num_instreams=%d S/N=%d\n"
2862 "hw version %c%d DSP code version %03d\n", 2860 "Hw Version %c%d DSP code version %03d\n",
2863 asihpi->type, asihpi->adapter_index, 2861 asihpi->type, asihpi->adapter_index,
2864 asihpi->num_outstreams, 2862 asihpi->num_outstreams,
2865 asihpi->num_instreams, asihpi->serial_number, 2863 asihpi->num_instreams, asihpi->serial_number,
@@ -2871,33 +2869,33 @@ static int __devinit snd_asihpi_probe(struct pci_dev *pci_dev,
2871 if (pcm_substreams < asihpi->num_instreams) 2869 if (pcm_substreams < asihpi->num_instreams)
2872 pcm_substreams = asihpi->num_instreams; 2870 pcm_substreams = asihpi->num_instreams;
2873 2871
2874 err = hpi_adapter_get_property(ss, asihpi->adapter_index, 2872 err = hpi_adapter_get_property(asihpi->adapter_index,
2875 HPI_ADAPTER_PROPERTY_CAPS1, 2873 HPI_ADAPTER_PROPERTY_CAPS1,
2876 NULL, &asihpi->support_grouping); 2874 NULL, &asihpi->support_grouping);
2877 if (err) 2875 if (err)
2878 asihpi->support_grouping = 0; 2876 asihpi->support_grouping = 0;
2879 2877
2880 err = hpi_adapter_get_property(ss, asihpi->adapter_index, 2878 err = hpi_adapter_get_property(asihpi->adapter_index,
2881 HPI_ADAPTER_PROPERTY_CAPS2, 2879 HPI_ADAPTER_PROPERTY_CAPS2,
2882 &asihpi->support_mrx, NULL); 2880 &asihpi->support_mrx, NULL);
2883 if (err) 2881 if (err)
2884 asihpi->support_mrx = 0; 2882 asihpi->support_mrx = 0;
2885 2883
2886 err = hpi_adapter_get_property(ss, asihpi->adapter_index, 2884 err = hpi_adapter_get_property(asihpi->adapter_index,
2887 HPI_ADAPTER_PROPERTY_INTERVAL, 2885 HPI_ADAPTER_PROPERTY_INTERVAL,
2888 NULL, &asihpi->update_interval_frames); 2886 NULL, &asihpi->update_interval_frames);
2889 if (err) 2887 if (err)
2890 asihpi->update_interval_frames = 512; 2888 asihpi->update_interval_frames = 512;
2891 2889
2892 hpi_handle_error(hpi_instream_open(ss, asihpi->adapter_index, 2890 hpi_handle_error(hpi_instream_open(asihpi->adapter_index,
2893 0, &h_stream)); 2891 0, &h_stream));
2894 2892
2895 err = hpi_instream_host_buffer_free(ss, h_stream); 2893 err = hpi_instream_host_buffer_free(h_stream);
2896 asihpi->support_mmap = (!err); 2894 asihpi->support_mmap = (!err);
2897 2895
2898 hpi_handle_error(hpi_instream_close(ss, h_stream)); 2896 hpi_handle_error(hpi_instream_close(h_stream));
2899 2897
2900 err = hpi_adapter_get_property(ss, asihpi->adapter_index, 2898 err = hpi_adapter_get_property(asihpi->adapter_index,
2901 HPI_ADAPTER_PROPERTY_CURCHANNELS, 2899 HPI_ADAPTER_PROPERTY_CURCHANNELS,
2902 &asihpi->in_max_chans, &asihpi->out_max_chans); 2900 &asihpi->in_max_chans, &asihpi->out_max_chans);
2903 if (err) { 2901 if (err) {
@@ -2923,13 +2921,13 @@ static int __devinit snd_asihpi_probe(struct pci_dev *pci_dev,
2923 goto __nodev; 2921 goto __nodev;
2924 } 2922 }
2925 2923
2926 err = hpi_mixer_get_control(ss, asihpi->h_mixer, 2924 err = hpi_mixer_get_control(asihpi->h_mixer,
2927 HPI_SOURCENODE_CLOCK_SOURCE, 0, 0, 0, 2925 HPI_SOURCENODE_CLOCK_SOURCE, 0, 0, 0,
2928 HPI_CONTROL_SAMPLECLOCK, &h_control); 2926 HPI_CONTROL_SAMPLECLOCK, &h_control);
2929 2927
2930 if (!err) 2928 if (!err)
2931 err = hpi_sample_clock_set_local_rate( 2929 err = hpi_sample_clock_set_local_rate(
2932 ss, h_control, adapter_fs); 2930 h_control, adapter_fs);
2933 2931
2934 snd_asihpi_proc_init(asihpi); 2932 snd_asihpi_proc_init(asihpi);
2935 2933
diff --git a/sound/pci/asihpi/hpi.h b/sound/pci/asihpi/hpi.h
index 23399d02f666..6fc025c448de 100644
--- a/sound/pci/asihpi/hpi.h
+++ b/sound/pci/asihpi/hpi.h
@@ -24,17 +24,10 @@
24 24
25 The HPI is a low-level hardware abstraction layer to all 25 The HPI is a low-level hardware abstraction layer to all
26 AudioScience digital audio adapters 26 AudioScience digital audio adapters
27*/
28/*
29 You must define one operating system that the HPI is to be compiled under
30 HPI_OS_WIN32_USER 32bit Windows
31 HPI_OS_DSP_C6000 DSP TI C6000 (automatically set)
32 HPI_OS_WDM Windows WDM kernel driver
33 HPI_OS_LINUX Linux userspace
34 HPI_OS_LINUX_KERNEL Linux kernel (automatically set)
35 27
36(C) Copyright AudioScience Inc. 1998-2010 28(C) Copyright AudioScience Inc. 1998-2010
37******************************************************************************/ 29*/
30
38#ifndef _HPI_H_ 31#ifndef _HPI_H_
39#define _HPI_H_ 32#define _HPI_H_
40/* HPI Version 33/* HPI Version
@@ -50,20 +43,20 @@ i.e 3.05.02 is a development version
50#define HPI_VER_RELEASE(v) ((int)(v & 0xFF)) 43#define HPI_VER_RELEASE(v) ((int)(v & 0xFF))
51 44
52/* Use single digits for versions less that 10 to avoid octal. */ 45/* Use single digits for versions less that 10 to avoid octal. */
53#define HPI_VER HPI_VERSION_CONSTRUCTOR(4L, 4, 1) 46#define HPI_VER HPI_VERSION_CONSTRUCTOR(4L, 6, 0)
54#define HPI_VER_STRING "4.04.01" 47#define HPI_VER_STRING "4.06.00"
55 48
56/* Library version as documented in hpi-api-versions.txt */ 49/* Library version as documented in hpi-api-versions.txt */
57#define HPI_LIB_VER HPI_VERSION_CONSTRUCTOR(9, 0, 0) 50#define HPI_LIB_VER HPI_VERSION_CONSTRUCTOR(9, 0, 0)
58 51
59#include <linux/types.h> 52#include <linux/types.h>
60#define HPI_EXCLUDE_DEPRECATED 53#define HPI_BUILD_EXCLUDE_DEPRECATED
54#define HPI_BUILD_KERNEL_MODE
61 55
62/******************************************************************************/ 56/******************************************************************************/
63/******************************************************************************/
64/******** HPI API DEFINITIONS *****/ 57/******** HPI API DEFINITIONS *****/
65/******************************************************************************/ 58/******************************************************************************/
66/******************************************************************************/ 59
67/*******************************************/ 60/*******************************************/
68/** Audio format types 61/** Audio format types
69\ingroup stream 62\ingroup stream
@@ -174,7 +167,6 @@ The range is +1.0 to -1.0, which corresponds to digital fullscale.
174 HPI_FORMAT_UNDEFINED = 0xffff 167 HPI_FORMAT_UNDEFINED = 0xffff
175}; 168};
176 169
177/******************************************* in/out Stream states */
178/*******************************************/ 170/*******************************************/
179/** Stream States 171/** Stream States
180\ingroup stream 172\ingroup stream
@@ -194,7 +186,7 @@ enum HPI_STREAM_STATES {
194 cards to be ready. */ 186 cards to be ready. */
195 HPI_STATE_WAIT = 6 187 HPI_STATE_WAIT = 6
196}; 188};
197/******************************************* mixer source node types */ 189/*******************************************/
198/** Source node types 190/** Source node types
199\ingroup mixer 191\ingroup mixer
200*/ 192*/
@@ -224,7 +216,7 @@ enum HPI_SOURCENODES {
224 /* AX6 max sourcenode types = 15 */ 216 /* AX6 max sourcenode types = 15 */
225}; 217};
226 218
227/******************************************* mixer dest node types */ 219/*******************************************/
228/** Destination node types 220/** Destination node types
229\ingroup mixer 221\ingroup mixer
230*/ 222*/
@@ -262,11 +254,11 @@ enum HPI_CONTROLS {
262 HPI_CONTROL_MUTE = 4, /*mute control - not used at present. */ 254 HPI_CONTROL_MUTE = 4, /*mute control - not used at present. */
263 HPI_CONTROL_MULTIPLEXER = 5, /**< multiplexer control. */ 255 HPI_CONTROL_MULTIPLEXER = 5, /**< multiplexer control. */
264 256
265 HPI_CONTROL_AESEBU_TRANSMITTER = 6, /**< AES/EBU transmitter control. */ 257 HPI_CONTROL_AESEBU_TRANSMITTER = 6, /**< AES/EBU transmitter control */
266 HPI_CONTROL_AESEBUTX = HPI_CONTROL_AESEBU_TRANSMITTER, 258 HPI_CONTROL_AESEBUTX = 6, /* HPI_CONTROL_AESEBU_TRANSMITTER */
267 259
268 HPI_CONTROL_AESEBU_RECEIVER = 7, /**< AES/EBU receiver control. */ 260 HPI_CONTROL_AESEBU_RECEIVER = 7, /**< AES/EBU receiver control. */
269 HPI_CONTROL_AESEBURX = HPI_CONTROL_AESEBU_RECEIVER, 261 HPI_CONTROL_AESEBURX = 7, /* HPI_CONTROL_AESEBU_RECEIVER */
270 262
271 HPI_CONTROL_LEVEL = 8, /**< level/trim control - works in d_bu. */ 263 HPI_CONTROL_LEVEL = 8, /**< level/trim control - works in d_bu. */
272 HPI_CONTROL_TUNER = 9, /**< tuner control. */ 264 HPI_CONTROL_TUNER = 9, /**< tuner control. */
@@ -281,7 +273,7 @@ enum HPI_CONTROLS {
281 HPI_CONTROL_SAMPLECLOCK = 17, /**< sample clock control. */ 273 HPI_CONTROL_SAMPLECLOCK = 17, /**< sample clock control. */
282 HPI_CONTROL_MICROPHONE = 18, /**< microphone control. */ 274 HPI_CONTROL_MICROPHONE = 18, /**< microphone control. */
283 HPI_CONTROL_PARAMETRIC_EQ = 19, /**< parametric EQ control. */ 275 HPI_CONTROL_PARAMETRIC_EQ = 19, /**< parametric EQ control. */
284 HPI_CONTROL_EQUALIZER = HPI_CONTROL_PARAMETRIC_EQ, 276 HPI_CONTROL_EQUALIZER = 19, /*HPI_CONTROL_PARAMETRIC_EQ */
285 277
286 HPI_CONTROL_COMPANDER = 20, /**< compander control. */ 278 HPI_CONTROL_COMPANDER = 20, /**< compander control. */
287 HPI_CONTROL_COBRANET = 21, /**< cobranet control. */ 279 HPI_CONTROL_COBRANET = 21, /**< cobranet control. */
@@ -296,10 +288,7 @@ enum HPI_CONTROLS {
296/* WARNING types 256 or greater impact bit packing in all AX6 DSP code */ 288/* WARNING types 256 or greater impact bit packing in all AX6 DSP code */
297}; 289};
298 290
299/* Shorthand names that match attribute names */ 291/*******************************************/
300
301/******************************************* ADAPTER ATTRIBUTES ****/
302
303/** Adapter properties 292/** Adapter properties
304These are used in HPI_AdapterSetProperty() and HPI_AdapterGetProperty() 293These are used in HPI_AdapterSetProperty() and HPI_AdapterGetProperty()
305\ingroup adapter 294\ingroup adapter
@@ -330,12 +319,21 @@ by the driver and is not passed on to the DSP at all.
330Indicates the state of the adapter's SSX2 setting. This setting is stored in 319Indicates the state of the adapter's SSX2 setting. This setting is stored in
331non-volatile memory on the adapter. A typical call sequence would be to use 320non-volatile memory on the adapter. A typical call sequence would be to use
332HPI_ADAPTER_PROPERTY_SSX2_SETTING to set SSX2 on the adapter and then to reload 321HPI_ADAPTER_PROPERTY_SSX2_SETTING to set SSX2 on the adapter and then to reload
333the driver. The driver would query HPI_ADAPTER_PROPERTY_SSX2_SETTING during startup 322the driver. The driver would query HPI_ADAPTER_PROPERTY_SSX2_SETTING during
334and if SSX2 is set, it would then call HPI_ADAPTER_PROPERTY_ENABLE_SSX2 to enable 323startup and if SSX2 is set, it would then call HPI_ADAPTER_PROPERTY_ENABLE_SSX2
335SSX2 stream mapping within the kernel level of the driver. 324to enable SSX2 stream mapping within the kernel level of the driver.
336*/ 325*/
337 HPI_ADAPTER_PROPERTY_SSX2_SETTING = 4, 326 HPI_ADAPTER_PROPERTY_SSX2_SETTING = 4,
338 327
328/** Enables/disables PCI(e) IRQ.
329A setting of 0 indicates that no interrupts are being generated. A DSP boot
330this property is set to 0. Setting to a non-zero value specifies the number
331of frames of audio that should be processed between interrupts. This property
332should be set to multiple of the mixer interval as read back from the
333HPI_ADAPTER_PROPERTY_INTERVAL property.
334*/
335 HPI_ADAPTER_PROPERTY_IRQ_RATE = 5,
336
339/** Base number for readonly properties */ 337/** Base number for readonly properties */
340 HPI_ADAPTER_PROPERTY_READONLYBASE = 256, 338 HPI_ADAPTER_PROPERTY_READONLYBASE = 256,
341 339
@@ -440,21 +438,30 @@ return value is true (1) or false (0). If the current adapter
440mode is MONO SSX2 is disabled, even though this property will 438mode is MONO SSX2 is disabled, even though this property will
441return true. 439return true.
442*/ 440*/
443 HPI_ADAPTER_PROPERTY_SUPPORTS_SSX2 = 271 441 HPI_ADAPTER_PROPERTY_SUPPORTS_SSX2 = 271,
442/** Readonly supports PCI(e) IRQ.
443Indicates that the adapter in it's current mode supports interrupts
444across the host bus. Note, this does not imply that interrupts are
445enabled. Instead it indicates that they can be enabled.
446*/
447 HPI_ADAPTER_PROPERTY_SUPPORTS_IRQ = 272
444}; 448};
445 449
446/** Adapter mode commands 450/** Adapter mode commands
447 451
448Used in wQueryOrSet field of HPI_AdapterSetModeEx(). 452Used in wQueryOrSet parameter of HPI_AdapterSetModeEx().
449\ingroup adapter 453\ingroup adapter
450*/ 454*/
451enum HPI_ADAPTER_MODE_CMDS { 455enum HPI_ADAPTER_MODE_CMDS {
456 /** Set the mode to the given parameter */
452 HPI_ADAPTER_MODE_SET = 0, 457 HPI_ADAPTER_MODE_SET = 0,
458 /** Return 0 or error depending whether mode is valid,
459 but don't set the mode */
453 HPI_ADAPTER_MODE_QUERY = 1 460 HPI_ADAPTER_MODE_QUERY = 1
454}; 461};
455 462
456/** Adapter Modes 463/** Adapter Modes
457 These are used by HPI_AdapterSetModeEx() 464 These are used by HPI_AdapterSetModeEx()
458 465
459\warning - more than 16 possible modes breaks 466\warning - more than 16 possible modes breaks
460a bitmask in the Windows WAVE DLL 467a bitmask in the Windows WAVE DLL
@@ -629,10 +636,13 @@ enum HPI_MIXER_STORE_COMMAND {
629 HPI_MIXER_STORE_SAVE_SINGLE = 6 636 HPI_MIXER_STORE_SAVE_SINGLE = 6
630}; 637};
631 638
632/************************************* CONTROL ATTRIBUTE VALUES ****/ 639/****************************/
640/* CONTROL ATTRIBUTE VALUES */
641/****************************/
642
633/** Used by mixer plugin enable functions 643/** Used by mixer plugin enable functions
634 644
635E.g. HPI_ParametricEQ_SetState() 645E.g. HPI_ParametricEq_SetState()
636\ingroup mixer 646\ingroup mixer
637*/ 647*/
638enum HPI_SWITCH_STATES { 648enum HPI_SWITCH_STATES {
@@ -641,6 +651,7 @@ enum HPI_SWITCH_STATES {
641}; 651};
642 652
643/* Volume control special gain values */ 653/* Volume control special gain values */
654
644/** volumes units are 100ths of a dB 655/** volumes units are 100ths of a dB
645\ingroup volume 656\ingroup volume
646*/ 657*/
@@ -650,6 +661,11 @@ enum HPI_SWITCH_STATES {
650*/ 661*/
651#define HPI_GAIN_OFF (-100 * HPI_UNITS_PER_dB) 662#define HPI_GAIN_OFF (-100 * HPI_UNITS_PER_dB)
652 663
664/** channel mask specifying all channels
665\ingroup volume
666*/
667#define HPI_BITMASK_ALL_CHANNELS (0xFFFFFFFF)
668
653/** value returned for no signal 669/** value returned for no signal
654\ingroup meter 670\ingroup meter
655*/ 671*/
@@ -667,7 +683,7 @@ enum HPI_VOLUME_AUTOFADES {
667 683
668/** The physical encoding format of the AESEBU I/O. 684/** The physical encoding format of the AESEBU I/O.
669 685
670Used in HPI_AESEBU_Transmitter_SetFormat(), HPI_AESEBU_Receiver_SetFormat() 686Used in HPI_Aesebu_Transmitter_SetFormat(), HPI_Aesebu_Receiver_SetFormat()
671along with related Get and Query functions 687along with related Get and Query functions
672\ingroup aestx 688\ingroup aestx
673*/ 689*/
@@ -680,7 +696,7 @@ enum HPI_AESEBU_FORMATS {
680 696
681/** AES/EBU error status bits 697/** AES/EBU error status bits
682 698
683Returned by HPI_AESEBU_Receiver_GetErrorStatus() 699Returned by HPI_Aesebu_Receiver_GetErrorStatus()
684\ingroup aesrx 700\ingroup aesrx
685*/ 701*/
686enum HPI_AESEBU_ERRORS { 702enum HPI_AESEBU_ERRORS {
@@ -767,14 +783,6 @@ enum HPI_TUNER_MODE_VALUES {
767 HPI_TUNER_MODE_RDS_RBDS = 2 /**< RDS - RBDS mode */ 783 HPI_TUNER_MODE_RDS_RBDS = 2 /**< RDS - RBDS mode */
768}; 784};
769 785
770/** Tuner Level settings
771\ingroup tuner
772*/
773enum HPI_TUNER_LEVEL {
774 HPI_TUNER_LEVEL_AVERAGE = 0,
775 HPI_TUNER_LEVEL_RAW = 1
776};
777
778/** Tuner Status Bits 786/** Tuner Status Bits
779 787
780These bitfield values are returned by a call to HPI_Tuner_GetStatus(). 788These bitfield values are returned by a call to HPI_Tuner_GetStatus().
@@ -783,13 +791,13 @@ Multiple fields are returned from a single call.
783*/ 791*/
784enum HPI_TUNER_STATUS_BITS { 792enum HPI_TUNER_STATUS_BITS {
785 HPI_TUNER_VIDEO_COLOR_PRESENT = 0x0001, /**< video color is present. */ 793 HPI_TUNER_VIDEO_COLOR_PRESENT = 0x0001, /**< video color is present. */
786 HPI_TUNER_VIDEO_IS_60HZ = 0x0020, /**< 60 hz video detected. */ 794 HPI_TUNER_VIDEO_IS_60HZ = 0x0020, /**< 60 hz video detected. */
787 HPI_TUNER_VIDEO_HORZ_SYNC_MISSING = 0x0040, /**< video HSYNC is missing. */ 795 HPI_TUNER_VIDEO_HORZ_SYNC_MISSING = 0x0040, /**< video HSYNC is missing. */
788 HPI_TUNER_VIDEO_STATUS_VALID = 0x0100, /**< video status is valid. */ 796 HPI_TUNER_VIDEO_STATUS_VALID = 0x0100, /**< video status is valid. */
789 HPI_TUNER_PLL_LOCKED = 0x1000, /**< the tuner's PLL is locked. */ 797 HPI_TUNER_DIGITAL = 0x0200, /**< tuner reports digital programming. */
790 HPI_TUNER_FM_STEREO = 0x2000, /**< tuner reports back FM stereo. */ 798 HPI_TUNER_MULTIPROGRAM = 0x0400, /**< tuner reports multiple programs. */
791 HPI_TUNER_DIGITAL = 0x0200, /**< tuner reports digital programming. */ 799 HPI_TUNER_PLL_LOCKED = 0x1000, /**< the tuner's PLL is locked. */
792 HPI_TUNER_MULTIPROGRAM = 0x0400 /**< tuner reports multiple programs. */ 800 HPI_TUNER_FM_STEREO = 0x2000 /**< tuner reports back FM stereo. */
793}; 801};
794 802
795/** Channel Modes 803/** Channel Modes
@@ -839,7 +847,7 @@ enum HPI_SAMPLECLOCK_SOURCES {
839 HPI_SAMPLECLOCK_SOURCE_LAST = 10 847 HPI_SAMPLECLOCK_SOURCE_LAST = 10
840}; 848};
841 849
842/** Equalizer filter types. Used by HPI_ParametricEQ_SetBand() 850/** Equalizer filter types. Used by HPI_ParametricEq_SetBand()
843\ingroup parmeq 851\ingroup parmeq
844*/ 852*/
845enum HPI_FILTER_TYPE { 853enum HPI_FILTER_TYPE {
@@ -882,7 +890,7 @@ enum HPI_ERROR_CODES {
882 HPI_ERROR_INVALID_OBJ = 101, 890 HPI_ERROR_INVALID_OBJ = 101,
883 /** Function does not exist. */ 891 /** Function does not exist. */
884 HPI_ERROR_INVALID_FUNC = 102, 892 HPI_ERROR_INVALID_FUNC = 102,
885 /** The specified object (adapter/Stream) does not exist. */ 893 /** The specified object does not exist. */
886 HPI_ERROR_INVALID_OBJ_INDEX = 103, 894 HPI_ERROR_INVALID_OBJ_INDEX = 103,
887 /** Trying to access an object that has not been opened yet. */ 895 /** Trying to access an object that has not been opened yet. */
888 HPI_ERROR_OBJ_NOT_OPEN = 104, 896 HPI_ERROR_OBJ_NOT_OPEN = 104,
@@ -890,8 +898,7 @@ enum HPI_ERROR_CODES {
890 HPI_ERROR_OBJ_ALREADY_OPEN = 105, 898 HPI_ERROR_OBJ_ALREADY_OPEN = 105,
891 /** PCI, ISA resource not valid. */ 899 /** PCI, ISA resource not valid. */
892 HPI_ERROR_INVALID_RESOURCE = 106, 900 HPI_ERROR_INVALID_RESOURCE = 106,
893 /** GetInfo call from SubSysFindAdapters failed. */ 901 /* HPI_ERROR_SUBSYSFINDADAPTERS_GETINFO= 107 */
894 HPI_ERROR_SUBSYSFINDADAPTERS_GETINFO = 107,
895 /** Default response was never updated with actual error code. */ 902 /** Default response was never updated with actual error code. */
896 HPI_ERROR_INVALID_RESPONSE = 108, 903 HPI_ERROR_INVALID_RESPONSE = 108,
897 /** wSize field of response was not updated, 904 /** wSize field of response was not updated,
@@ -899,38 +906,44 @@ enum HPI_ERROR_CODES {
899 HPI_ERROR_PROCESSING_MESSAGE = 109, 906 HPI_ERROR_PROCESSING_MESSAGE = 109,
900 /** The network did not respond in a timely manner. */ 907 /** The network did not respond in a timely manner. */
901 HPI_ERROR_NETWORK_TIMEOUT = 110, 908 HPI_ERROR_NETWORK_TIMEOUT = 110,
902 /** An HPI handle is invalid (uninitialised?). */ 909 /* An HPI handle is invalid (uninitialised?). */
903 HPI_ERROR_INVALID_HANDLE = 111, 910 HPI_ERROR_INVALID_HANDLE = 111,
904 /** A function or attribute has not been implemented yet. */ 911 /** A function or attribute has not been implemented yet. */
905 HPI_ERROR_UNIMPLEMENTED = 112, 912 HPI_ERROR_UNIMPLEMENTED = 112,
906 /** There are too many clients attempting to access a network resource. */ 913 /** There are too many clients attempting
914 to access a network resource. */
907 HPI_ERROR_NETWORK_TOO_MANY_CLIENTS = 113, 915 HPI_ERROR_NETWORK_TOO_MANY_CLIENTS = 113,
908 /** Response buffer passed to HPI_Message was smaller than returned response */ 916 /** Response buffer passed to HPI_Message
917 was smaller than returned response.
918 wSpecificError field of hpi response contains the required size.
919 */
909 HPI_ERROR_RESPONSE_BUFFER_TOO_SMALL = 114, 920 HPI_ERROR_RESPONSE_BUFFER_TOO_SMALL = 114,
910 /** The returned response did not match the sent message */ 921 /** The returned response did not match the sent message */
911 HPI_ERROR_RESPONSE_MISMATCH = 115, 922 HPI_ERROR_RESPONSE_MISMATCH = 115,
923 /** A control setting that should have been cached was not. */
924 HPI_ERROR_CONTROL_CACHING = 116,
925 /** A message buffer in the path to the adapter was smaller
926 than the message size.
927 wSpecificError field of hpi response contains the actual size.
928 */
929 HPI_ERROR_MESSAGE_BUFFER_TOO_SMALL = 117,
912 930
913 /** Too many adapters.*/ 931 /* HPI_ERROR_TOO_MANY_ADAPTERS= 200 */
914 HPI_ERROR_TOO_MANY_ADAPTERS = 200,
915 /** Bad adpater. */ 932 /** Bad adpater. */
916 HPI_ERROR_BAD_ADAPTER = 201, 933 HPI_ERROR_BAD_ADAPTER = 201,
917 /** Adapter number out of range or not set properly. */ 934 /** Adapter number out of range or not set properly. */
918 HPI_ERROR_BAD_ADAPTER_NUMBER = 202, 935 HPI_ERROR_BAD_ADAPTER_NUMBER = 202,
919 /** 2 adapters with the same adapter number. */ 936 /** 2 adapters with the same adapter number. */
920 HPI_DUPLICATE_ADAPTER_NUMBER = 203, 937 HPI_ERROR_DUPLICATE_ADAPTER_NUMBER = 203,
921 /** DSP code failed to bootload. */ 938 /** DSP code failed to bootload. (unused?) */
922 HPI_ERROR_DSP_BOOTLOAD = 204, 939 HPI_ERROR_DSP_BOOTLOAD = 204,
923 /** Adapter failed DSP code self test. */
924 HPI_ERROR_DSP_SELFTEST = 205,
925 /** Couldn't find or open the DSP code file. */ 940 /** Couldn't find or open the DSP code file. */
926 HPI_ERROR_DSP_FILE_NOT_FOUND = 206, 941 HPI_ERROR_DSP_FILE_NOT_FOUND = 206,
927 /** Internal DSP hardware error. */ 942 /** Internal DSP hardware error. */
928 HPI_ERROR_DSP_HARDWARE = 207, 943 HPI_ERROR_DSP_HARDWARE = 207,
929 /** Could not allocate memory in DOS. */
930 HPI_ERROR_DOS_MEMORY_ALLOC = 208,
931 /** Could not allocate memory */ 944 /** Could not allocate memory */
932 HPI_ERROR_MEMORY_ALLOC = 208, 945 HPI_ERROR_MEMORY_ALLOC = 208,
933 /** Failed to correctly load/config PLD .*/ 946 /** Failed to correctly load/config PLD. (unused) */
934 HPI_ERROR_PLD_LOAD = 209, 947 HPI_ERROR_PLD_LOAD = 209,
935 /** Unexpected end of file, block length too big etc. */ 948 /** Unexpected end of file, block length too big etc. */
936 HPI_ERROR_DSP_FILE_FORMAT = 210, 949 HPI_ERROR_DSP_FILE_FORMAT = 210,
@@ -939,8 +952,7 @@ enum HPI_ERROR_CODES {
939 HPI_ERROR_DSP_FILE_ACCESS_DENIED = 211, 952 HPI_ERROR_DSP_FILE_ACCESS_DENIED = 211,
940 /** First DSP code section header not found in DSP file. */ 953 /** First DSP code section header not found in DSP file. */
941 HPI_ERROR_DSP_FILE_NO_HEADER = 212, 954 HPI_ERROR_DSP_FILE_NO_HEADER = 212,
942 /** File read operation on DSP code file failed. */ 955 /* HPI_ERROR_DSP_FILE_READ_ERROR= 213, */
943 HPI_ERROR_DSP_FILE_READ_ERROR = 213,
944 /** DSP code for adapter family not found. */ 956 /** DSP code for adapter family not found. */
945 HPI_ERROR_DSP_SECTION_NOT_FOUND = 214, 957 HPI_ERROR_DSP_SECTION_NOT_FOUND = 214,
946 /** Other OS specific error opening DSP file. */ 958 /** Other OS specific error opening DSP file. */
@@ -950,23 +962,21 @@ enum HPI_ERROR_CODES {
950 /** DSP code section header had size == 0. */ 962 /** DSP code section header had size == 0. */
951 HPI_ERROR_DSP_FILE_NULL_HEADER = 217, 963 HPI_ERROR_DSP_FILE_NULL_HEADER = 217,
952 964
953 /** Base number for flash errors. */ 965 /* HPI_ERROR_FLASH = 220, */
954 HPI_ERROR_FLASH = 220,
955 966
956 /** Flash has bad checksum */ 967 /** Flash has bad checksum */
957 HPI_ERROR_BAD_CHECKSUM = (HPI_ERROR_FLASH + 1), 968 HPI_ERROR_BAD_CHECKSUM = 221,
958 HPI_ERROR_BAD_SEQUENCE = (HPI_ERROR_FLASH + 2), 969 HPI_ERROR_BAD_SEQUENCE = 222,
959 HPI_ERROR_FLASH_ERASE = (HPI_ERROR_FLASH + 3), 970 HPI_ERROR_FLASH_ERASE = 223,
960 HPI_ERROR_FLASH_PROGRAM = (HPI_ERROR_FLASH + 4), 971 HPI_ERROR_FLASH_PROGRAM = 224,
961 HPI_ERROR_FLASH_VERIFY = (HPI_ERROR_FLASH + 5), 972 HPI_ERROR_FLASH_VERIFY = 225,
962 HPI_ERROR_FLASH_TYPE = (HPI_ERROR_FLASH + 6), 973 HPI_ERROR_FLASH_TYPE = 226,
963 HPI_ERROR_FLASH_START = (HPI_ERROR_FLASH + 7), 974 HPI_ERROR_FLASH_START = 227,
964 975
965 /** Reserved for OEMs. */ 976 /** Reserved for OEMs. */
966 HPI_ERROR_RESERVED_1 = 290, 977 HPI_ERROR_RESERVED_1 = 290,
967 978
968 /** Stream does not exist. */ 979 /* HPI_ERROR_INVALID_STREAM = 300 use HPI_ERROR_INVALID_OBJ_INDEX */
969 HPI_ERROR_INVALID_STREAM = 300,
970 /** Invalid compression format. */ 980 /** Invalid compression format. */
971 HPI_ERROR_INVALID_FORMAT = 301, 981 HPI_ERROR_INVALID_FORMAT = 301,
972 /** Invalid format samplerate */ 982 /** Invalid format samplerate */
@@ -977,21 +987,19 @@ enum HPI_ERROR_CODES {
977 HPI_ERROR_INVALID_BITRATE = 304, 987 HPI_ERROR_INVALID_BITRATE = 304,
978 /** Invalid datasize used for stream read/write. */ 988 /** Invalid datasize used for stream read/write. */
979 HPI_ERROR_INVALID_DATASIZE = 305, 989 HPI_ERROR_INVALID_DATASIZE = 305,
980 /** Stream buffer is full during stream write. */ 990 /* HPI_ERROR_BUFFER_FULL = 306 use HPI_ERROR_INVALID_DATASIZE */
981 HPI_ERROR_BUFFER_FULL = 306, 991 /* HPI_ERROR_BUFFER_EMPTY = 307 use HPI_ERROR_INVALID_DATASIZE */
982 /** Stream buffer is empty during stream read. */ 992 /** Null data pointer used for stream read/write. */
983 HPI_ERROR_BUFFER_EMPTY = 307, 993 HPI_ERROR_INVALID_DATA_POINTER = 308,
984 /** Invalid datasize used for stream read/write. */
985 HPI_ERROR_INVALID_DATA_TRANSFER = 308,
986 /** Packet ordering error for stream read/write. */ 994 /** Packet ordering error for stream read/write. */
987 HPI_ERROR_INVALID_PACKET_ORDER = 309, 995 HPI_ERROR_INVALID_PACKET_ORDER = 309,
988 996
989 /** Object can't do requested operation in its current 997 /** Object can't do requested operation in its current
990 state, eg set format, change rec mux state while recording.*/ 998 state, eg set format, change rec mux state while recording.*/
991 HPI_ERROR_INVALID_OPERATION = 310, 999 HPI_ERROR_INVALID_OPERATION = 310,
992 1000
993 /** Where an SRG is shared amongst streams, an incompatible samplerate is one 1001 /** Where a SRG is shared amongst streams, an incompatible samplerate
994 that is different to any currently playing or recording stream. */ 1002 is one that is different to any currently active stream. */
995 HPI_ERROR_INCOMPATIBLE_SAMPLERATE = 311, 1003 HPI_ERROR_INCOMPATIBLE_SAMPLERATE = 311,
996 /** Adapter mode is illegal.*/ 1004 /** Adapter mode is illegal.*/
997 HPI_ERROR_BAD_ADAPTER_MODE = 312, 1005 HPI_ERROR_BAD_ADAPTER_MODE = 312,
@@ -1004,6 +1012,8 @@ enum HPI_ERROR_CODES {
1004 HPI_ERROR_NO_INTERADAPTER_GROUPS = 314, 1012 HPI_ERROR_NO_INTERADAPTER_GROUPS = 314,
1005 /** Streams on different DSPs cannot be grouped. */ 1013 /** Streams on different DSPs cannot be grouped. */
1006 HPI_ERROR_NO_INTERDSP_GROUPS = 315, 1014 HPI_ERROR_NO_INTERDSP_GROUPS = 315,
1015 /** Stream wait cancelled before threshold reached. */
1016 HPI_ERROR_WAIT_CANCELLED = 316,
1007 1017
1008 /** Invalid mixer node for this adapter. */ 1018 /** Invalid mixer node for this adapter. */
1009 HPI_ERROR_INVALID_NODE = 400, 1019 HPI_ERROR_INVALID_NODE = 400,
@@ -1017,6 +1027,7 @@ enum HPI_ERROR_CODES {
1017 HPI_ERROR_CONTROL_DISABLED = 404, 1027 HPI_ERROR_CONTROL_DISABLED = 404,
1018 /** I2C transaction failed due to a missing ACK. */ 1028 /** I2C transaction failed due to a missing ACK. */
1019 HPI_ERROR_CONTROL_I2C_MISSING_ACK = 405, 1029 HPI_ERROR_CONTROL_I2C_MISSING_ACK = 405,
1030 HPI_ERROR_I2C_MISSING_ACK = 405,
1020 /** Control is busy, or coming out of 1031 /** Control is busy, or coming out of
1021 reset and cannot be accessed at this time. */ 1032 reset and cannot be accessed at this time. */
1022 HPI_ERROR_CONTROL_NOT_READY = 407, 1033 HPI_ERROR_CONTROL_NOT_READY = 407,
@@ -1027,7 +1038,6 @@ enum HPI_ERROR_CODES {
1027 HPI_ERROR_NVMEM_FAIL = 452, 1038 HPI_ERROR_NVMEM_FAIL = 452,
1028 1039
1029 /** I2C */ 1040 /** I2C */
1030 HPI_ERROR_I2C_MISSING_ACK = HPI_ERROR_CONTROL_I2C_MISSING_ACK,
1031 HPI_ERROR_I2C_BAD_ADR = 460, 1041 HPI_ERROR_I2C_BAD_ADR = 460,
1032 1042
1033 /** Entity errors */ 1043 /** Entity errors */
@@ -1035,6 +1045,7 @@ enum HPI_ERROR_CODES {
1035 HPI_ERROR_ENTITY_ITEM_COUNT = 471, 1045 HPI_ERROR_ENTITY_ITEM_COUNT = 471,
1036 HPI_ERROR_ENTITY_TYPE_INVALID = 472, 1046 HPI_ERROR_ENTITY_TYPE_INVALID = 472,
1037 HPI_ERROR_ENTITY_ROLE_INVALID = 473, 1047 HPI_ERROR_ENTITY_ROLE_INVALID = 473,
1048 HPI_ERROR_ENTITY_SIZE_MISMATCH = 474,
1038 1049
1039 /* AES18 specific errors were 500..507 */ 1050 /* AES18 specific errors were 500..507 */
1040 1051
@@ -1044,11 +1055,18 @@ enum HPI_ERROR_CODES {
1044 /** hpioct32.c can't obtain mutex */ 1055 /** hpioct32.c can't obtain mutex */
1045 HPI_ERROR_MUTEX_TIMEOUT = 700, 1056 HPI_ERROR_MUTEX_TIMEOUT = 700,
1046 1057
1047 /** errors from HPI backends have values >= this */ 1058 /** Backend errors used to be greater than this.
1059 \deprecated Now, all backends return only errors defined here in hpi.h
1060 */
1048 HPI_ERROR_BACKEND_BASE = 900, 1061 HPI_ERROR_BACKEND_BASE = 900,
1049 1062
1050 /** indicates a cached u16 value is invalid. */ 1063 /** Communication with DSP failed */
1051 HPI_ERROR_ILLEGAL_CACHE_VALUE = 0xffff 1064 HPI_ERROR_DSP_COMMUNICATION = 900
1065 /* Note that the dsp communication error is set to this value so that
1066 it remains compatible with any software that expects such errors
1067 to be backend errors i.e. >= 900.
1068 Do not define any new error codes with values > 900.
1069 */
1052}; 1070};
1053 1071
1054/** \defgroup maximums HPI maximum values 1072/** \defgroup maximums HPI maximum values
@@ -1075,7 +1093,7 @@ enum HPI_ERROR_CODES {
1075 1093
1076/**\}*/ 1094/**\}*/
1077 1095
1078/* ////////////////////////////////////////////////////////////////////// */ 1096/**************/
1079/* STRUCTURES */ 1097/* STRUCTURES */
1080#ifndef DISABLE_PRAGMA_PACK1 1098#ifndef DISABLE_PRAGMA_PACK1
1081#pragma pack(push, 1) 1099#pragma pack(push, 1)
@@ -1092,7 +1110,7 @@ struct hpi_format {
1092 /**< Stereo/JointStereo/Mono */ 1110 /**< Stereo/JointStereo/Mono */
1093 u16 mode_legacy; 1111 u16 mode_legacy;
1094 /**< Legacy ancillary mode or idle bit */ 1112 /**< Legacy ancillary mode or idle bit */
1095 u16 unused; /**< unused */ 1113 u16 unused; /**< Unused */
1096 u16 channels; /**< 1,2..., (or ancillary mode or idle bit */ 1114 u16 channels; /**< 1,2..., (or ancillary mode or idle bit */
1097 u16 format; /**< HPI_FORMAT_PCM16, _MPEG etc. see #HPI_FORMATS. */ 1115 u16 format; /**< HPI_FORMAT_PCM16, _MPEG etc. see #HPI_FORMATS. */
1098}; 1116};
@@ -1106,930 +1124,594 @@ struct hpi_anc_frame {
1106*/ 1124*/
1107struct hpi_async_event { 1125struct hpi_async_event {
1108 u16 event_type; /**< type of event. \sa async_event */ 1126 u16 event_type; /**< type of event. \sa async_event */
1109 u16 sequence; /**< sequence number, allows lost event detection */ 1127 u16 sequence; /**< Sequence number, allows lost event detection */
1110 u32 state; /**< new state */ 1128 u32 state; /**< New state */
1111 u32 h_object; /**< handle to the object returning the event. */ 1129 u32 h_object; /**< handle to the object returning the event. */
1112 union { 1130 union {
1113 struct { 1131 struct {
1114 u16 index; /**< GPIO bit index. */ 1132 u16 index; /**< GPIO bit index. */
1115 } gpio; 1133 } gpio;
1116 struct { 1134 struct {
1117 u16 node_index; /**< what node is the control on ? */ 1135 u16 node_index; /**< what node is the control on ? */
1118 u16 node_type; /**< what type of node is the control on ? */ 1136 u16 node_type; /**< what type of node is the control on ? */
1119 } control; 1137 } control;
1120 } u; 1138 } u;
1121}; 1139};
1122 1140
1123/*/////////////////////////////////////////////////////////////////////////// */
1124/* Public HPI Entity related definitions */
1125
1126struct hpi_entity;
1127
1128enum e_entity_type {
1129 entity_type_null,
1130 entity_type_sequence, /* sequence of potentially heterogeneous TLV entities */
1131
1132 entity_type_reference, /* refers to a TLV entity or NULL */
1133
1134 entity_type_int, /* 32 bit */
1135 entity_type_float, /* ieee754 binary 32 bit encoding */
1136 entity_type_double,
1137
1138 entity_type_cstring,
1139 entity_type_octet,
1140 entity_type_ip4_address,
1141 entity_type_ip6_address,
1142 entity_type_mac_address,
1143
1144 LAST_ENTITY_TYPE
1145};
1146
1147enum e_entity_role {
1148 entity_role_null,
1149 entity_role_value,
1150 entity_role_classname,
1151
1152 entity_role_units,
1153 entity_role_flags,
1154 entity_role_range,
1155
1156 entity_role_mapping,
1157 entity_role_enum,
1158
1159 entity_role_instance_of,
1160 entity_role_depends_on,
1161 entity_role_member_of_group,
1162 entity_role_value_constraint,
1163 entity_role_parameter_port,
1164
1165 entity_role_block,
1166 entity_role_node_group,
1167 entity_role_audio_port,
1168 entity_role_clock_port,
1169 LAST_ENTITY_ROLE
1170};
1171
1172/* skip host side function declarations for 1141/* skip host side function declarations for
1173 DSP compile and documentation extraction */ 1142 DSP compile and documentation extraction */
1174 1143
1175struct hpi_hsubsys {
1176 int not_really_used;
1177};
1178
1179#ifndef DISABLE_PRAGMA_PACK1 1144#ifndef DISABLE_PRAGMA_PACK1
1180#pragma pack(pop) 1145#pragma pack(pop)
1181#endif 1146#endif
1182 1147
1183/*////////////////////////////////////////////////////////////////////////// */ 1148/*****************/
1184/* HPI FUNCTIONS */ 1149/* HPI FUNCTIONS */
1150/*****************/
1185 1151
1186/*/////////////////////////// */ 1152/* Stream */
1187/* DATA and FORMAT and STREAM */
1188
1189u16 hpi_stream_estimate_buffer_size(struct hpi_format *pF, 1153u16 hpi_stream_estimate_buffer_size(struct hpi_format *pF,
1190 u32 host_polling_rate_in_milli_seconds, u32 *recommended_buffer_size); 1154 u32 host_polling_rate_in_milli_seconds, u32 *recommended_buffer_size);
1191 1155
1192/*/////////// */ 1156/*************/
1193/* SUB SYSTEM */ 1157/* SubSystem */
1194struct hpi_hsubsys *hpi_subsys_create(void 1158/*************/
1195 );
1196
1197void hpi_subsys_free(const struct hpi_hsubsys *ph_subsys);
1198
1199u16 hpi_subsys_get_version(const struct hpi_hsubsys *ph_subsys,
1200 u32 *pversion);
1201
1202u16 hpi_subsys_get_version_ex(const struct hpi_hsubsys *ph_subsys,
1203 u32 *pversion_ex);
1204
1205u16 hpi_subsys_get_info(const struct hpi_hsubsys *ph_subsys, u32 *pversion,
1206 u16 *pw_num_adapters, u16 aw_adapter_list[], u16 list_length);
1207
1208u16 hpi_subsys_find_adapters(const struct hpi_hsubsys *ph_subsys,
1209 u16 *pw_num_adapters, u16 aw_adapter_list[], u16 list_length);
1210
1211u16 hpi_subsys_get_num_adapters(const struct hpi_hsubsys *ph_subsys,
1212 int *pn_num_adapters);
1213
1214u16 hpi_subsys_get_adapter(const struct hpi_hsubsys *ph_subsys, int iterator,
1215 u32 *padapter_index, u16 *pw_adapter_type);
1216
1217u16 hpi_subsys_ssx2_bypass(const struct hpi_hsubsys *ph_subsys, u16 bypass);
1218 1159
1219u16 hpi_subsys_set_host_network_interface(const struct hpi_hsubsys *ph_subsys, 1160u16 hpi_subsys_get_version_ex(u32 *pversion_ex);
1220 const char *sz_interface);
1221 1161
1222/*///////// */ 1162u16 hpi_subsys_get_num_adapters(int *pn_num_adapters);
1223/* ADAPTER */
1224 1163
1225u16 hpi_adapter_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index); 1164u16 hpi_subsys_get_adapter(int iterator, u32 *padapter_index,
1165 u16 *pw_adapter_type);
1226 1166
1227u16 hpi_adapter_close(const struct hpi_hsubsys *ph_subsys, u16 adapter_index); 1167/***********/
1168/* Adapter */
1169/***********/
1228 1170
1229u16 hpi_adapter_get_info(const struct hpi_hsubsys *ph_subsys, 1171u16 hpi_adapter_open(u16 adapter_index);
1230 u16 adapter_index, u16 *pw_num_outstreams, u16 *pw_num_instreams,
1231 u16 *pw_version, u32 *pserial_number, u16 *pw_adapter_type);
1232 1172
1233u16 hpi_adapter_get_module_by_index(const struct hpi_hsubsys *ph_subsys, 1173u16 hpi_adapter_close(u16 adapter_index);
1234 u16 adapter_index, u16 module_index, u16 *pw_num_outputs,
1235 u16 *pw_num_inputs, u16 *pw_version, u32 *pserial_number,
1236 u16 *pw_module_type, u32 *ph_module);
1237 1174
1238u16 hpi_adapter_set_mode(const struct hpi_hsubsys *ph_subsys, 1175u16 hpi_adapter_get_info(u16 adapter_index, u16 *pw_num_outstreams,
1239 u16 adapter_index, u32 adapter_mode); 1176 u16 *pw_num_instreams, u16 *pw_version, u32 *pserial_number,
1177 u16 *pw_adapter_type);
1240 1178
1241u16 hpi_adapter_set_mode_ex(const struct hpi_hsubsys *ph_subsys, 1179u16 hpi_adapter_get_module_by_index(u16 adapter_index, u16 module_index,
1242 u16 adapter_index, u32 adapter_mode, u16 query_or_set); 1180 u16 *pw_num_outputs, u16 *pw_num_inputs, u16 *pw_version,
1243 1181 u32 *pserial_number, u16 *pw_module_type, u32 *ph_module);
1244u16 hpi_adapter_get_mode(const struct hpi_hsubsys *ph_subsys,
1245 u16 adapter_index, u32 *padapter_mode);
1246
1247u16 hpi_adapter_get_assert(const struct hpi_hsubsys *ph_subsys,
1248 u16 adapter_index, u16 *assert_present, char *psz_assert,
1249 u16 *pw_line_number);
1250
1251u16 hpi_adapter_get_assert_ex(const struct hpi_hsubsys *ph_subsys,
1252 u16 adapter_index, u16 *assert_present, char *psz_assert,
1253 u32 *pline_number, u16 *pw_assert_on_dsp);
1254
1255u16 hpi_adapter_test_assert(const struct hpi_hsubsys *ph_subsys,
1256 u16 adapter_index, u16 assert_id);
1257
1258u16 hpi_adapter_enable_capability(const struct hpi_hsubsys *ph_subsys,
1259 u16 adapter_index, u16 capability, u32 key);
1260
1261u16 hpi_adapter_self_test(const struct hpi_hsubsys *ph_subsys,
1262 u16 adapter_index);
1263
1264u16 hpi_adapter_debug_read(const struct hpi_hsubsys *ph_subsys,
1265 u16 adapter_index, u32 dsp_address, char *p_bytes, int *count_bytes);
1266
1267u16 hpi_adapter_set_property(const struct hpi_hsubsys *ph_subsys,
1268 u16 adapter_index, u16 property, u16 paramter1, u16 paramter2);
1269
1270u16 hpi_adapter_get_property(const struct hpi_hsubsys *ph_subsys,
1271 u16 adapter_index, u16 property, u16 *pw_paramter1,
1272 u16 *pw_paramter2);
1273
1274u16 hpi_adapter_enumerate_property(const struct hpi_hsubsys *ph_subsys,
1275 u16 adapter_index, u16 index, u16 what_to_enumerate,
1276 u16 property_index, u32 *psetting);
1277
1278/*////////////// */
1279/* NonVol Memory */
1280u16 hpi_nv_memory_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index,
1281 u32 *ph_nv_memory, u16 *pw_size_in_bytes);
1282
1283u16 hpi_nv_memory_read_byte(const struct hpi_hsubsys *ph_subsys,
1284 u32 h_nv_memory, u16 index, u16 *pw_data);
1285
1286u16 hpi_nv_memory_write_byte(const struct hpi_hsubsys *ph_subsys,
1287 u32 h_nv_memory, u16 index, u16 data);
1288
1289/*////////////// */
1290/* Digital I/O */
1291u16 hpi_gpio_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index,
1292 u32 *ph_gpio, u16 *pw_number_input_bits, u16 *pw_number_output_bits);
1293
1294u16 hpi_gpio_read_bit(const struct hpi_hsubsys *ph_subsys, u32 h_gpio,
1295 u16 bit_index, u16 *pw_bit_data);
1296
1297u16 hpi_gpio_read_all_bits(const struct hpi_hsubsys *ph_subsys, u32 h_gpio,
1298 u16 aw_all_bit_data[4]
1299 );
1300 1182
1301u16 hpi_gpio_write_bit(const struct hpi_hsubsys *ph_subsys, u32 h_gpio, 1183u16 hpi_adapter_set_mode(u16 adapter_index, u32 adapter_mode);
1302 u16 bit_index, u16 bit_data);
1303 1184
1304u16 hpi_gpio_write_status(const struct hpi_hsubsys *ph_subsys, u32 h_gpio, 1185u16 hpi_adapter_set_mode_ex(u16 adapter_index, u32 adapter_mode,
1305 u16 aw_all_bit_data[4] 1186 u16 query_or_set);
1306 );
1307 1187
1308/**********************/ 1188u16 hpi_adapter_get_mode(u16 adapter_index, u32 *padapter_mode);
1309/* Async Event Object */
1310/**********************/
1311u16 hpi_async_event_open(const struct hpi_hsubsys *ph_subsys,
1312 u16 adapter_index, u32 *ph_async);
1313 1189
1314u16 hpi_async_event_close(const struct hpi_hsubsys *ph_subsys, u32 h_async); 1190u16 hpi_adapter_get_assert2(u16 adapter_index, u16 *p_assert_count,
1191 char *psz_assert, u32 *p_param1, u32 *p_param2,
1192 u32 *p_dsp_string_addr, u16 *p_processor_id);
1315 1193
1316u16 hpi_async_event_wait(const struct hpi_hsubsys *ph_subsys, u32 h_async, 1194u16 hpi_adapter_test_assert(u16 adapter_index, u16 assert_id);
1317 u16 maximum_events, struct hpi_async_event *p_events,
1318 u16 *pw_number_returned);
1319 1195
1320u16 hpi_async_event_get_count(const struct hpi_hsubsys *ph_subsys, 1196u16 hpi_adapter_enable_capability(u16 adapter_index, u16 capability, u32 key);
1321 u32 h_async, u16 *pw_count);
1322 1197
1323u16 hpi_async_event_get(const struct hpi_hsubsys *ph_subsys, u32 h_async, 1198u16 hpi_adapter_self_test(u16 adapter_index);
1324 u16 maximum_events, struct hpi_async_event *p_events,
1325 u16 *pw_number_returned);
1326 1199
1327/*/////////// */ 1200u16 hpi_adapter_debug_read(u16 adapter_index, u32 dsp_address, char *p_bytes,
1328/* WATCH-DOG */ 1201 int *count_bytes);
1329u16 hpi_watchdog_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index,
1330 u32 *ph_watchdog);
1331 1202
1332u16 hpi_watchdog_set_time(const struct hpi_hsubsys *ph_subsys, u32 h_watchdog, 1203u16 hpi_adapter_set_property(u16 adapter_index, u16 property, u16 paramter1,
1333 u32 time_millisec); 1204 u16 paramter2);
1334 1205
1335u16 hpi_watchdog_ping(const struct hpi_hsubsys *ph_subsys, u32 h_watchdog); 1206u16 hpi_adapter_get_property(u16 adapter_index, u16 property,
1207 u16 *pw_paramter1, u16 *pw_paramter2);
1336 1208
1337/**************/ 1209u16 hpi_adapter_enumerate_property(u16 adapter_index, u16 index,
1338/* OUT STREAM */ 1210 u16 what_to_enumerate, u16 property_index, u32 *psetting);
1339/**************/ 1211/*************/
1340u16 hpi_outstream_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index, 1212/* OutStream */
1341 u16 outstream_index, u32 *ph_outstream); 1213/*************/
1214u16 hpi_outstream_open(u16 adapter_index, u16 outstream_index,
1215 u32 *ph_outstream);
1342 1216
1343u16 hpi_outstream_close(const struct hpi_hsubsys *ph_subsys, u32 h_outstream); 1217u16 hpi_outstream_close(u32 h_outstream);
1344 1218
1345u16 hpi_outstream_get_info_ex(const struct hpi_hsubsys *ph_subsys, 1219u16 hpi_outstream_get_info_ex(u32 h_outstream, u16 *pw_state,
1346 u32 h_outstream, u16 *pw_state, u32 *pbuffer_size, u32 *pdata_to_play, 1220 u32 *pbuffer_size, u32 *pdata_to_play, u32 *psamples_played,
1347 u32 *psamples_played, u32 *pauxiliary_data_to_play); 1221 u32 *pauxiliary_data_to_play);
1348 1222
1349u16 hpi_outstream_write_buf(const struct hpi_hsubsys *ph_subsys, 1223u16 hpi_outstream_write_buf(u32 h_outstream, const u8 *pb_write_buf,
1350 u32 h_outstream, const u8 *pb_write_buf, u32 bytes_to_write, 1224 u32 bytes_to_write, const struct hpi_format *p_format);
1351 const struct hpi_format *p_format);
1352 1225
1353u16 hpi_outstream_start(const struct hpi_hsubsys *ph_subsys, u32 h_outstream); 1226u16 hpi_outstream_start(u32 h_outstream);
1354 1227
1355u16 hpi_outstream_wait_start(const struct hpi_hsubsys *ph_subsys, 1228u16 hpi_outstream_wait_start(u32 h_outstream);
1356 u32 h_outstream);
1357 1229
1358u16 hpi_outstream_stop(const struct hpi_hsubsys *ph_subsys, u32 h_outstream); 1230u16 hpi_outstream_stop(u32 h_outstream);
1359 1231
1360u16 hpi_outstream_sinegen(const struct hpi_hsubsys *ph_subsys, 1232u16 hpi_outstream_sinegen(u32 h_outstream);
1361 u32 h_outstream);
1362 1233
1363u16 hpi_outstream_reset(const struct hpi_hsubsys *ph_subsys, u32 h_outstream); 1234u16 hpi_outstream_reset(u32 h_outstream);
1364 1235
1365u16 hpi_outstream_query_format(const struct hpi_hsubsys *ph_subsys, 1236u16 hpi_outstream_query_format(u32 h_outstream, struct hpi_format *p_format);
1366 u32 h_outstream, struct hpi_format *p_format);
1367 1237
1368u16 hpi_outstream_set_format(const struct hpi_hsubsys *ph_subsys, 1238u16 hpi_outstream_set_format(u32 h_outstream, struct hpi_format *p_format);
1369 u32 h_outstream, struct hpi_format *p_format);
1370 1239
1371u16 hpi_outstream_set_punch_in_out(const struct hpi_hsubsys *ph_subsys, 1240u16 hpi_outstream_set_punch_in_out(u32 h_outstream, u32 punch_in_sample,
1372 u32 h_outstream, u32 punch_in_sample, u32 punch_out_sample); 1241 u32 punch_out_sample);
1373 1242
1374u16 hpi_outstream_set_velocity(const struct hpi_hsubsys *ph_subsys, 1243u16 hpi_outstream_set_velocity(u32 h_outstream, short velocity);
1375 u32 h_outstream, short velocity);
1376 1244
1377u16 hpi_outstream_ancillary_reset(const struct hpi_hsubsys *ph_subsys, 1245u16 hpi_outstream_ancillary_reset(u32 h_outstream, u16 mode);
1378 u32 h_outstream, u16 mode);
1379 1246
1380u16 hpi_outstream_ancillary_get_info(const struct hpi_hsubsys *ph_subsys, 1247u16 hpi_outstream_ancillary_get_info(u32 h_outstream, u32 *pframes_available);
1381 u32 h_outstream, u32 *pframes_available);
1382 1248
1383u16 hpi_outstream_ancillary_read(const struct hpi_hsubsys *ph_subsys, 1249u16 hpi_outstream_ancillary_read(u32 h_outstream,
1384 u32 h_outstream, struct hpi_anc_frame *p_anc_frame_buffer, 1250 struct hpi_anc_frame *p_anc_frame_buffer,
1385 u32 anc_frame_buffer_size_in_bytes, 1251 u32 anc_frame_buffer_size_in_bytes,
1386 u32 number_of_ancillary_frames_to_read); 1252 u32 number_of_ancillary_frames_to_read);
1387 1253
1388u16 hpi_outstream_set_time_scale(const struct hpi_hsubsys *ph_subsys, 1254u16 hpi_outstream_set_time_scale(u32 h_outstream, u32 time_scaleX10000);
1389 u32 h_outstream, u32 time_scaleX10000);
1390 1255
1391u16 hpi_outstream_host_buffer_allocate(const struct hpi_hsubsys *ph_subsys, 1256u16 hpi_outstream_host_buffer_allocate(u32 h_outstream, u32 size_in_bytes);
1392 u32 h_outstream, u32 size_in_bytes);
1393 1257
1394u16 hpi_outstream_host_buffer_free(const struct hpi_hsubsys *ph_subsys, 1258u16 hpi_outstream_host_buffer_free(u32 h_outstream);
1395 u32 h_outstream);
1396 1259
1397u16 hpi_outstream_group_add(const struct hpi_hsubsys *ph_subsys, 1260u16 hpi_outstream_group_add(u32 h_outstream, u32 h_stream);
1398 u32 h_outstream, u32 h_stream);
1399 1261
1400u16 hpi_outstream_group_get_map(const struct hpi_hsubsys *ph_subsys, 1262u16 hpi_outstream_group_get_map(u32 h_outstream, u32 *poutstream_map,
1401 u32 h_outstream, u32 *poutstream_map, u32 *pinstream_map); 1263 u32 *pinstream_map);
1402 1264
1403u16 hpi_outstream_group_reset(const struct hpi_hsubsys *ph_subsys, 1265u16 hpi_outstream_group_reset(u32 h_outstream);
1404 u32 h_outstream);
1405 1266
1406/*////////// */ 1267/************/
1407/* IN_STREAM */ 1268/* InStream */
1408u16 hpi_instream_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index, 1269/************/
1409 u16 instream_index, u32 *ph_instream); 1270u16 hpi_instream_open(u16 adapter_index, u16 instream_index,
1271 u32 *ph_instream);
1410 1272
1411u16 hpi_instream_close(const struct hpi_hsubsys *ph_subsys, u32 h_instream); 1273u16 hpi_instream_close(u32 h_instream);
1412 1274
1413u16 hpi_instream_query_format(const struct hpi_hsubsys *ph_subsys, 1275u16 hpi_instream_query_format(u32 h_instream,
1414 u32 h_instream, const struct hpi_format *p_format); 1276 const struct hpi_format *p_format);
1415 1277
1416u16 hpi_instream_set_format(const struct hpi_hsubsys *ph_subsys, 1278u16 hpi_instream_set_format(u32 h_instream,
1417 u32 h_instream, const struct hpi_format *p_format); 1279 const struct hpi_format *p_format);
1418 1280
1419u16 hpi_instream_read_buf(const struct hpi_hsubsys *ph_subsys, u32 h_instream, 1281u16 hpi_instream_read_buf(u32 h_instream, u8 *pb_read_buf, u32 bytes_to_read);
1420 u8 *pb_read_buf, u32 bytes_to_read);
1421 1282
1422u16 hpi_instream_start(const struct hpi_hsubsys *ph_subsys, u32 h_instream); 1283u16 hpi_instream_start(u32 h_instream);
1423 1284
1424u16 hpi_instream_wait_start(const struct hpi_hsubsys *ph_subsys, 1285u16 hpi_instream_wait_start(u32 h_instream);
1425 u32 h_instream);
1426 1286
1427u16 hpi_instream_stop(const struct hpi_hsubsys *ph_subsys, u32 h_instream); 1287u16 hpi_instream_stop(u32 h_instream);
1428 1288
1429u16 hpi_instream_reset(const struct hpi_hsubsys *ph_subsys, u32 h_instream); 1289u16 hpi_instream_reset(u32 h_instream);
1430 1290
1431u16 hpi_instream_get_info_ex(const struct hpi_hsubsys *ph_subsys, 1291u16 hpi_instream_get_info_ex(u32 h_instream, u16 *pw_state, u32 *pbuffer_size,
1432 u32 h_instream, u16 *pw_state, u32 *pbuffer_size, u32 *pdata_recorded, 1292 u32 *pdata_recorded, u32 *psamples_recorded,
1433 u32 *psamples_recorded, u32 *pauxiliary_data_recorded); 1293 u32 *pauxiliary_data_recorded);
1434 1294
1435u16 hpi_instream_ancillary_reset(const struct hpi_hsubsys *ph_subsys, 1295u16 hpi_instream_ancillary_reset(u32 h_instream, u16 bytes_per_frame,
1436 u32 h_instream, u16 bytes_per_frame, u16 mode, u16 alignment, 1296 u16 mode, u16 alignment, u16 idle_bit);
1437 u16 idle_bit);
1438 1297
1439u16 hpi_instream_ancillary_get_info(const struct hpi_hsubsys *ph_subsys, 1298u16 hpi_instream_ancillary_get_info(u32 h_instream, u32 *pframe_space);
1440 u32 h_instream, u32 *pframe_space);
1441 1299
1442u16 hpi_instream_ancillary_write(const struct hpi_hsubsys *ph_subsys, 1300u16 hpi_instream_ancillary_write(u32 h_instream,
1443 u32 h_instream, const struct hpi_anc_frame *p_anc_frame_buffer, 1301 const struct hpi_anc_frame *p_anc_frame_buffer,
1444 u32 anc_frame_buffer_size_in_bytes, 1302 u32 anc_frame_buffer_size_in_bytes,
1445 u32 number_of_ancillary_frames_to_write); 1303 u32 number_of_ancillary_frames_to_write);
1446 1304
1447u16 hpi_instream_host_buffer_allocate(const struct hpi_hsubsys *ph_subsys, 1305u16 hpi_instream_host_buffer_allocate(u32 h_instream, u32 size_in_bytes);
1448 u32 h_instream, u32 size_in_bytes);
1449 1306
1450u16 hpi_instream_host_buffer_free(const struct hpi_hsubsys *ph_subsys, 1307u16 hpi_instream_host_buffer_free(u32 h_instream);
1451 u32 h_instream);
1452 1308
1453u16 hpi_instream_group_add(const struct hpi_hsubsys *ph_subsys, 1309u16 hpi_instream_group_add(u32 h_instream, u32 h_stream);
1454 u32 h_instream, u32 h_stream);
1455 1310
1456u16 hpi_instream_group_get_map(const struct hpi_hsubsys *ph_subsys, 1311u16 hpi_instream_group_get_map(u32 h_instream, u32 *poutstream_map,
1457 u32 h_instream, u32 *poutstream_map, u32 *pinstream_map); 1312 u32 *pinstream_map);
1458 1313
1459u16 hpi_instream_group_reset(const struct hpi_hsubsys *ph_subsys, 1314u16 hpi_instream_group_reset(u32 h_instream);
1460 u32 h_instream);
1461 1315
1462/*********/ 1316/*********/
1463/* MIXER */ 1317/* Mixer */
1464/*********/ 1318/*********/
1465u16 hpi_mixer_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index, 1319u16 hpi_mixer_open(u16 adapter_index, u32 *ph_mixer);
1466 u32 *ph_mixer); 1320
1467 1321u16 hpi_mixer_close(u32 h_mixer);
1468u16 hpi_mixer_close(const struct hpi_hsubsys *ph_subsys, u32 h_mixer); 1322
1469 1323u16 hpi_mixer_get_control(u32 h_mixer, u16 src_node_type,
1470u16 hpi_mixer_get_control(const struct hpi_hsubsys *ph_subsys, u32 h_mixer, 1324 u16 src_node_type_index, u16 dst_node_type, u16 dst_node_type_index,
1471 u16 src_node_type, u16 src_node_type_index, u16 dst_node_type, 1325 u16 control_type, u32 *ph_control);
1472 u16 dst_node_type_index, u16 control_type, u32 *ph_control); 1326
1473 1327u16 hpi_mixer_get_control_by_index(u32 h_mixer, u16 control_index,
1474u16 hpi_mixer_get_control_by_index(const struct hpi_hsubsys *ph_subsys, 1328 u16 *pw_src_node_type, u16 *pw_src_node_index, u16 *pw_dst_node_type,
1475 u32 h_mixer, u16 control_index, u16 *pw_src_node_type, 1329 u16 *pw_dst_node_index, u16 *pw_control_type, u32 *ph_control);
1476 u16 *pw_src_node_index, u16 *pw_dst_node_type, u16 *pw_dst_node_index, 1330
1477 u16 *pw_control_type, u32 *ph_control); 1331u16 hpi_mixer_store(u32 h_mixer, enum HPI_MIXER_STORE_COMMAND command,
1478 1332 u16 index);
1479u16 hpi_mixer_store(const struct hpi_hsubsys *ph_subsys, u32 h_mixer, 1333/************/
1480 enum HPI_MIXER_STORE_COMMAND command, u16 index); 1334/* Controls */
1481/*************************/ 1335/************/
1482/* mixer CONTROLS */ 1336/******************/
1483/*************************/ 1337/* Volume control */
1484/*************************/ 1338/******************/
1485/* volume control */ 1339u16 hpi_volume_set_gain(u32 h_control, short an_gain0_01dB[HPI_MAX_CHANNELS]
1486/*************************/
1487u16 hpi_volume_set_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control,
1488 short an_gain0_01dB[HPI_MAX_CHANNELS]
1489 ); 1340 );
1490 1341
1491u16 hpi_volume_get_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1342u16 hpi_volume_get_gain(u32 h_control,
1492 short an_gain0_01dB_out[HPI_MAX_CHANNELS] 1343 short an_gain0_01dB_out[HPI_MAX_CHANNELS]
1493 ); 1344 );
1494 1345
1346u16 hpi_volume_set_mute(u32 h_control, u32 mute);
1347
1348u16 hpi_volume_get_mute(u32 h_control, u32 *mute);
1349
1495#define hpi_volume_get_range hpi_volume_query_range 1350#define hpi_volume_get_range hpi_volume_query_range
1496u16 hpi_volume_query_range(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1351u16 hpi_volume_query_range(u32 h_control, short *min_gain_01dB,
1497 short *min_gain_01dB, short *max_gain_01dB, short *step_gain_01dB); 1352 short *max_gain_01dB, short *step_gain_01dB);
1498 1353
1499u16 hpi_volume_query_channels(const struct hpi_hsubsys *ph_subsys, 1354u16 hpi_volume_query_channels(const u32 h_volume, u32 *p_channels);
1500 const u32 h_volume, u32 *p_channels);
1501 1355
1502u16 hpi_volume_auto_fade(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1356u16 hpi_volume_auto_fade(u32 h_control,
1503 short an_stop_gain0_01dB[HPI_MAX_CHANNELS], u32 duration_ms); 1357 short an_stop_gain0_01dB[HPI_MAX_CHANNELS], u32 duration_ms);
1504 1358
1505u16 hpi_volume_auto_fade_profile(const struct hpi_hsubsys *ph_subsys, 1359u16 hpi_volume_auto_fade_profile(u32 h_control,
1506 u32 h_control, short an_stop_gain0_01dB[HPI_MAX_CHANNELS], 1360 short an_stop_gain0_01dB[HPI_MAX_CHANNELS], u32 duration_ms,
1507 u32 duration_ms, u16 profile); 1361 u16 profile);
1508 1362
1509/*************************/ 1363/*****************/
1510/* level control */ 1364/* Level control */
1511/*************************/ 1365/*****************/
1512u16 hpi_level_query_range(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1366u16 hpi_level_query_range(u32 h_control, short *min_gain_01dB,
1513 short *min_gain_01dB, short *max_gain_01dB, short *step_gain_01dB); 1367 short *max_gain_01dB, short *step_gain_01dB);
1514 1368
1515u16 hpi_level_set_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1369u16 hpi_level_set_gain(u32 h_control, short an_gain0_01dB[HPI_MAX_CHANNELS]
1516 short an_gain0_01dB[HPI_MAX_CHANNELS]
1517 ); 1370 );
1518 1371
1519u16 hpi_level_get_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1372u16 hpi_level_get_gain(u32 h_control,
1520 short an_gain0_01dB_out[HPI_MAX_CHANNELS] 1373 short an_gain0_01dB_out[HPI_MAX_CHANNELS]
1521 ); 1374 );
1522 1375
1523/*************************/ 1376/*****************/
1524/* meter control */ 1377/* Meter control */
1525/*************************/ 1378/*****************/
1526u16 hpi_meter_query_channels(const struct hpi_hsubsys *ph_subsys, 1379u16 hpi_meter_query_channels(const u32 h_meter, u32 *p_channels);
1527 const u32 h_meter, u32 *p_channels);
1528 1380
1529u16 hpi_meter_get_peak(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1381u16 hpi_meter_get_peak(u32 h_control,
1530 short an_peak0_01dB_out[HPI_MAX_CHANNELS] 1382 short an_peak0_01dB_out[HPI_MAX_CHANNELS]
1531 ); 1383 );
1532 1384
1533u16 hpi_meter_get_rms(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1385u16 hpi_meter_get_rms(u32 h_control, short an_peak0_01dB_out[HPI_MAX_CHANNELS]
1534 short an_peak0_01dB_out[HPI_MAX_CHANNELS]
1535 ); 1386 );
1536 1387
1537u16 hpi_meter_set_peak_ballistics(const struct hpi_hsubsys *ph_subsys, 1388u16 hpi_meter_set_peak_ballistics(u32 h_control, u16 attack, u16 decay);
1538 u32 h_control, u16 attack, u16 decay);
1539 1389
1540u16 hpi_meter_set_rms_ballistics(const struct hpi_hsubsys *ph_subsys, 1390u16 hpi_meter_set_rms_ballistics(u32 h_control, u16 attack, u16 decay);
1541 u32 h_control, u16 attack, u16 decay);
1542 1391
1543u16 hpi_meter_get_peak_ballistics(const struct hpi_hsubsys *ph_subsys, 1392u16 hpi_meter_get_peak_ballistics(u32 h_control, u16 *attack, u16 *decay);
1544 u32 h_control, u16 *attack, u16 *decay);
1545 1393
1546u16 hpi_meter_get_rms_ballistics(const struct hpi_hsubsys *ph_subsys, 1394u16 hpi_meter_get_rms_ballistics(u32 h_control, u16 *attack, u16 *decay);
1547 u32 h_control, u16 *attack, u16 *decay);
1548 1395
1549/*************************/ 1396/************************/
1550/* channel mode control */ 1397/* ChannelMode control */
1551/*************************/ 1398/************************/
1552u16 hpi_channel_mode_query_mode(const struct hpi_hsubsys *ph_subsys, 1399u16 hpi_channel_mode_query_mode(const u32 h_mode, const u32 index,
1553 const u32 h_mode, const u32 index, u16 *pw_mode); 1400 u16 *pw_mode);
1554 1401
1555u16 hpi_channel_mode_set(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1402u16 hpi_channel_mode_set(u32 h_control, u16 mode);
1556 u16 mode);
1557 1403
1558u16 hpi_channel_mode_get(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1404u16 hpi_channel_mode_get(u32 h_control, u16 *mode);
1559 u16 *mode);
1560 1405
1561/*************************/ 1406/*****************/
1562/* Tuner control */ 1407/* Tuner control */
1563/*************************/ 1408/*****************/
1564u16 hpi_tuner_query_band(const struct hpi_hsubsys *ph_subsys, 1409u16 hpi_tuner_query_band(const u32 h_tuner, const u32 index, u16 *pw_band);
1565 const u32 h_tuner, const u32 index, u16 *pw_band);
1566 1410
1567u16 hpi_tuner_set_band(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1411u16 hpi_tuner_set_band(u32 h_control, u16 band);
1568 u16 band);
1569 1412
1570u16 hpi_tuner_get_band(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1413u16 hpi_tuner_get_band(u32 h_control, u16 *pw_band);
1571 u16 *pw_band);
1572 1414
1573u16 hpi_tuner_query_frequency(const struct hpi_hsubsys *ph_subsys, 1415u16 hpi_tuner_query_frequency(const u32 h_tuner, const u32 index,
1574 const u32 h_tuner, const u32 index, const u16 band, u32 *pfreq); 1416 const u16 band, u32 *pfreq);
1575 1417
1576u16 hpi_tuner_set_frequency(const struct hpi_hsubsys *ph_subsys, 1418u16 hpi_tuner_set_frequency(u32 h_control, u32 freq_ink_hz);
1577 u32 h_control, u32 freq_ink_hz);
1578 1419
1579u16 hpi_tuner_get_frequency(const struct hpi_hsubsys *ph_subsys, 1420u16 hpi_tuner_get_frequency(u32 h_control, u32 *pw_freq_ink_hz);
1580 u32 h_control, u32 *pw_freq_ink_hz);
1581 1421
1582u16 hpi_tuner_getRF_level(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1422u16 hpi_tuner_get_rf_level(u32 h_control, short *pw_level);
1583 short *pw_level);
1584 1423
1585u16 hpi_tuner_get_rawRF_level(const struct hpi_hsubsys *ph_subsys, 1424u16 hpi_tuner_get_raw_rf_level(u32 h_control, short *pw_level);
1586 u32 h_control, short *pw_level);
1587 1425
1588u16 hpi_tuner_query_gain(const struct hpi_hsubsys *ph_subsys, 1426u16 hpi_tuner_query_gain(const u32 h_tuner, const u32 index, u16 *pw_gain);
1589 const u32 h_tuner, const u32 index, u16 *pw_gain);
1590 1427
1591u16 hpi_tuner_set_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1428u16 hpi_tuner_set_gain(u32 h_control, short gain);
1592 short gain);
1593 1429
1594u16 hpi_tuner_get_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1430u16 hpi_tuner_get_gain(u32 h_control, short *pn_gain);
1595 short *pn_gain);
1596 1431
1597u16 hpi_tuner_get_status(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1432u16 hpi_tuner_get_status(u32 h_control, u16 *pw_status_mask, u16 *pw_status);
1598 u16 *pw_status_mask, u16 *pw_status);
1599 1433
1600u16 hpi_tuner_set_mode(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1434u16 hpi_tuner_set_mode(u32 h_control, u32 mode, u32 value);
1601 u32 mode, u32 value);
1602 1435
1603u16 hpi_tuner_get_mode(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1436u16 hpi_tuner_get_mode(u32 h_control, u32 mode, u32 *pn_value);
1604 u32 mode, u32 *pn_value);
1605 1437
1606u16 hpi_tuner_getRDS(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1438u16 hpi_tuner_get_rds(u32 h_control, char *p_rds_data);
1607 char *p_rds_data);
1608 1439
1609u16 hpi_tuner_query_deemphasis(const struct hpi_hsubsys *ph_subsys, 1440u16 hpi_tuner_query_deemphasis(const u32 h_tuner, const u32 index,
1610 const u32 h_tuner, const u32 index, const u16 band, u32 *pdeemphasis); 1441 const u16 band, u32 *pdeemphasis);
1611 1442
1612u16 hpi_tuner_set_deemphasis(const struct hpi_hsubsys *ph_subsys, 1443u16 hpi_tuner_set_deemphasis(u32 h_control, u32 deemphasis);
1613 u32 h_control, u32 deemphasis); 1444u16 hpi_tuner_get_deemphasis(u32 h_control, u32 *pdeemphasis);
1614u16 hpi_tuner_get_deemphasis(const struct hpi_hsubsys *ph_subsys,
1615 u32 h_control, u32 *pdeemphasis);
1616 1445
1617u16 hpi_tuner_query_program(const struct hpi_hsubsys *ph_subsys, 1446u16 hpi_tuner_query_program(const u32 h_tuner, u32 *pbitmap_program);
1618 const u32 h_tuner, u32 *pbitmap_program);
1619 1447
1620u16 hpi_tuner_set_program(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1448u16 hpi_tuner_set_program(u32 h_control, u32 program);
1621 u32 program);
1622 1449
1623u16 hpi_tuner_get_program(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1450u16 hpi_tuner_get_program(u32 h_control, u32 *pprogram);
1624 u32 *pprogram);
1625 1451
1626u16 hpi_tuner_get_hd_radio_dsp_version(const struct hpi_hsubsys *ph_subsys, 1452u16 hpi_tuner_get_hd_radio_dsp_version(u32 h_control, char *psz_dsp_version,
1627 u32 h_control, char *psz_dsp_version, const u32 string_size); 1453 const u32 string_size);
1628 1454
1629u16 hpi_tuner_get_hd_radio_sdk_version(const struct hpi_hsubsys *ph_subsys, 1455u16 hpi_tuner_get_hd_radio_sdk_version(u32 h_control, char *psz_sdk_version,
1630 u32 h_control, char *psz_sdk_version, const u32 string_size); 1456 const u32 string_size);
1631 1457
1632u16 hpi_tuner_get_hd_radio_signal_quality(const struct hpi_hsubsys *ph_subsys, 1458u16 hpi_tuner_get_hd_radio_signal_quality(u32 h_control, u32 *pquality);
1633 u32 h_control, u32 *pquality);
1634 1459
1635u16 hpi_tuner_get_hd_radio_signal_blend(const struct hpi_hsubsys *ph_subsys, 1460u16 hpi_tuner_get_hd_radio_signal_blend(u32 h_control, u32 *pblend);
1636 u32 h_control, u32 *pblend);
1637 1461
1638u16 hpi_tuner_set_hd_radio_signal_blend(const struct hpi_hsubsys *ph_subsys, 1462u16 hpi_tuner_set_hd_radio_signal_blend(u32 h_control, const u32 blend);
1639 u32 h_control, const u32 blend);
1640 1463
1641/****************************/ 1464/***************/
1642/* PADs control */ 1465/* PAD control */
1643/****************************/ 1466/***************/
1644 1467
1645u16 HPI_PAD__get_channel_name(const struct hpi_hsubsys *ph_subsys, 1468u16 hpi_pad_get_channel_name(u32 h_control, char *psz_string,
1646 u32 h_control, char *psz_string, const u32 string_length); 1469 const u32 string_length);
1647 1470
1648u16 HPI_PAD__get_artist(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1471u16 hpi_pad_get_artist(u32 h_control, char *psz_string,
1649 char *psz_string, const u32 string_length); 1472 const u32 string_length);
1650 1473
1651u16 HPI_PAD__get_title(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1474u16 hpi_pad_get_title(u32 h_control, char *psz_string,
1652 char *psz_string, const u32 string_length); 1475 const u32 string_length);
1653 1476
1654u16 HPI_PAD__get_comment(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1477u16 hpi_pad_get_comment(u32 h_control, char *psz_string,
1655 char *psz_string, const u32 string_length); 1478 const u32 string_length);
1656 1479
1657u16 HPI_PAD__get_program_type(const struct hpi_hsubsys *ph_subsys, 1480u16 hpi_pad_get_program_type(u32 h_control, u32 *ppTY);
1658 u32 h_control, u32 *ppTY);
1659 1481
1660u16 HPI_PAD__get_rdsPI(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1482u16 hpi_pad_get_rdsPI(u32 h_control, u32 *ppI);
1661 u32 *ppI);
1662 1483
1663u16 HPI_PAD__get_program_type_string(const struct hpi_hsubsys *ph_subsys, 1484u16 hpi_pad_get_program_type_string(u32 h_control, const u32 data_type,
1664 u32 h_control, const u32 data_type, const u32 pTY, char *psz_string, 1485 const u32 pTY, char *psz_string, const u32 string_length);
1665 const u32 string_length);
1666 1486
1667/****************************/ 1487/****************************/
1668/* AES/EBU Receiver control */ 1488/* AES/EBU Receiver control */
1669/****************************/ 1489/****************************/
1670u16 HPI_AESEBU__receiver_query_format(const struct hpi_hsubsys *ph_subsys, 1490u16 hpi_aesebu_receiver_query_format(const u32 h_aes_rx, const u32 index,
1671 const u32 h_aes_rx, const u32 index, u16 *pw_format); 1491 u16 *pw_format);
1672 1492
1673u16 HPI_AESEBU__receiver_set_format(const struct hpi_hsubsys *ph_subsys, 1493u16 hpi_aesebu_receiver_set_format(u32 h_control, u16 source);
1674 u32 h_control, u16 source);
1675 1494
1676u16 HPI_AESEBU__receiver_get_format(const struct hpi_hsubsys *ph_subsys, 1495u16 hpi_aesebu_receiver_get_format(u32 h_control, u16 *pw_source);
1677 u32 h_control, u16 *pw_source);
1678 1496
1679u16 HPI_AESEBU__receiver_get_sample_rate(const struct hpi_hsubsys *ph_subsys, 1497u16 hpi_aesebu_receiver_get_sample_rate(u32 h_control, u32 *psample_rate);
1680 u32 h_control, u32 *psample_rate);
1681 1498
1682u16 HPI_AESEBU__receiver_get_user_data(const struct hpi_hsubsys *ph_subsys, 1499u16 hpi_aesebu_receiver_get_user_data(u32 h_control, u16 index, u16 *pw_data);
1683 u32 h_control, u16 index, u16 *pw_data);
1684 1500
1685u16 HPI_AESEBU__receiver_get_channel_status(const struct hpi_hsubsys 1501u16 hpi_aesebu_receiver_get_channel_status(u32 h_control, u16 index,
1686 *ph_subsys, u32 h_control, u16 index, u16 *pw_data); 1502 u16 *pw_data);
1687 1503
1688u16 HPI_AESEBU__receiver_get_error_status(const struct hpi_hsubsys *ph_subsys, 1504u16 hpi_aesebu_receiver_get_error_status(u32 h_control, u16 *pw_error_data);
1689 u32 h_control, u16 *pw_error_data);
1690 1505
1691/*******************************/ 1506/*******************************/
1692/* AES/EBU Transmitter control */ 1507/* AES/EBU Transmitter control */
1693/*******************************/ 1508/*******************************/
1694u16 HPI_AESEBU__transmitter_set_sample_rate(const struct hpi_hsubsys 1509u16 hpi_aesebu_transmitter_set_sample_rate(u32 h_control, u32 sample_rate);
1695 *ph_subsys, u32 h_control, u32 sample_rate);
1696 1510
1697u16 HPI_AESEBU__transmitter_set_user_data(const struct hpi_hsubsys *ph_subsys, 1511u16 hpi_aesebu_transmitter_set_user_data(u32 h_control, u16 index, u16 data);
1698 u32 h_control, u16 index, u16 data);
1699 1512
1700u16 HPI_AESEBU__transmitter_set_channel_status(const struct hpi_hsubsys 1513u16 hpi_aesebu_transmitter_set_channel_status(u32 h_control, u16 index,
1701 *ph_subsys, u32 h_control, u16 index, u16 data); 1514 u16 data);
1702 1515
1703u16 HPI_AESEBU__transmitter_get_channel_status(const struct hpi_hsubsys 1516u16 hpi_aesebu_transmitter_get_channel_status(u32 h_control, u16 index,
1704 *ph_subsys, u32 h_control, u16 index, u16 *pw_data); 1517 u16 *pw_data);
1705 1518
1706u16 HPI_AESEBU__transmitter_query_format(const struct hpi_hsubsys *ph_subsys, 1519u16 hpi_aesebu_transmitter_query_format(const u32 h_aes_tx, const u32 index,
1707 const u32 h_aes_tx, const u32 index, u16 *pw_format); 1520 u16 *pw_format);
1708 1521
1709u16 HPI_AESEBU__transmitter_set_format(const struct hpi_hsubsys *ph_subsys, 1522u16 hpi_aesebu_transmitter_set_format(u32 h_control, u16 output_format);
1710 u32 h_control, u16 output_format);
1711 1523
1712u16 HPI_AESEBU__transmitter_get_format(const struct hpi_hsubsys *ph_subsys, 1524u16 hpi_aesebu_transmitter_get_format(u32 h_control, u16 *pw_output_format);
1713 u32 h_control, u16 *pw_output_format);
1714 1525
1715/***********************/ 1526/***********************/
1716/* multiplexer control */ 1527/* Multiplexer control */
1717/***********************/ 1528/***********************/
1718u16 hpi_multiplexer_set_source(const struct hpi_hsubsys *ph_subsys, 1529u16 hpi_multiplexer_set_source(u32 h_control, u16 source_node_type,
1719 u32 h_control, u16 source_node_type, u16 source_node_index); 1530 u16 source_node_index);
1720
1721u16 hpi_multiplexer_get_source(const struct hpi_hsubsys *ph_subsys,
1722 u32 h_control, u16 *source_node_type, u16 *source_node_index);
1723 1531
1724u16 hpi_multiplexer_query_source(const struct hpi_hsubsys *ph_subsys, 1532u16 hpi_multiplexer_get_source(u32 h_control, u16 *source_node_type,
1725 u32 h_control, u16 index, u16 *source_node_type,
1726 u16 *source_node_index); 1533 u16 *source_node_index);
1727 1534
1535u16 hpi_multiplexer_query_source(u32 h_control, u16 index,
1536 u16 *source_node_type, u16 *source_node_index);
1537
1728/***************/ 1538/***************/
1729/* VOX control */ 1539/* Vox control */
1730/***************/ 1540/***************/
1731u16 hpi_vox_set_threshold(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1541u16 hpi_vox_set_threshold(u32 h_control, short an_gain0_01dB);
1732 short an_gain0_01dB);
1733 1542
1734u16 hpi_vox_get_threshold(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1543u16 hpi_vox_get_threshold(u32 h_control, short *an_gain0_01dB);
1735 short *an_gain0_01dB);
1736 1544
1737/*********************/ 1545/*********************/
1738/* Bitstream control */ 1546/* Bitstream control */
1739/*********************/ 1547/*********************/
1740u16 hpi_bitstream_set_clock_edge(const struct hpi_hsubsys *ph_subsys, 1548u16 hpi_bitstream_set_clock_edge(u32 h_control, u16 edge_type);
1741 u32 h_control, u16 edge_type);
1742 1549
1743u16 hpi_bitstream_set_data_polarity(const struct hpi_hsubsys *ph_subsys, 1550u16 hpi_bitstream_set_data_polarity(u32 h_control, u16 polarity);
1744 u32 h_control, u16 polarity);
1745 1551
1746u16 hpi_bitstream_get_activity(const struct hpi_hsubsys *ph_subsys, 1552u16 hpi_bitstream_get_activity(u32 h_control, u16 *pw_clk_activity,
1747 u32 h_control, u16 *pw_clk_activity, u16 *pw_data_activity); 1553 u16 *pw_data_activity);
1748 1554
1749/***********************/ 1555/***********************/
1750/* SampleClock control */ 1556/* SampleClock control */
1751/***********************/ 1557/***********************/
1752 1558
1753u16 hpi_sample_clock_query_source(const struct hpi_hsubsys *ph_subsys, 1559u16 hpi_sample_clock_query_source(const u32 h_clock, const u32 index,
1754 const u32 h_clock, const u32 index, u16 *pw_source); 1560 u16 *pw_source);
1755 1561
1756u16 hpi_sample_clock_set_source(const struct hpi_hsubsys *ph_subsys, 1562u16 hpi_sample_clock_set_source(u32 h_control, u16 source);
1757 u32 h_control, u16 source);
1758 1563
1759u16 hpi_sample_clock_get_source(const struct hpi_hsubsys *ph_subsys, 1564u16 hpi_sample_clock_get_source(u32 h_control, u16 *pw_source);
1760 u32 h_control, u16 *pw_source);
1761 1565
1762u16 hpi_sample_clock_query_source_index(const struct hpi_hsubsys *ph_subsys, 1566u16 hpi_sample_clock_query_source_index(const u32 h_clock, const u32 index,
1763 const u32 h_clock, const u32 index, const u32 source, 1567 const u32 source, u16 *pw_source_index);
1764 u16 *pw_source_index);
1765 1568
1766u16 hpi_sample_clock_set_source_index(const struct hpi_hsubsys *ph_subsys, 1569u16 hpi_sample_clock_set_source_index(u32 h_control, u16 source_index);
1767 u32 h_control, u16 source_index);
1768 1570
1769u16 hpi_sample_clock_get_source_index(const struct hpi_hsubsys *ph_subsys, 1571u16 hpi_sample_clock_get_source_index(u32 h_control, u16 *pw_source_index);
1770 u32 h_control, u16 *pw_source_index);
1771 1572
1772u16 hpi_sample_clock_get_sample_rate(const struct hpi_hsubsys *ph_subsys, 1573u16 hpi_sample_clock_get_sample_rate(u32 h_control, u32 *psample_rate);
1773 u32 h_control, u32 *psample_rate);
1774 1574
1775u16 hpi_sample_clock_query_local_rate(const struct hpi_hsubsys *ph_subsys, 1575u16 hpi_sample_clock_query_local_rate(const u32 h_clock, const u32 index,
1776 const u32 h_clock, const u32 index, u32 *psource); 1576 u32 *psource);
1777 1577
1778u16 hpi_sample_clock_set_local_rate(const struct hpi_hsubsys *ph_subsys, 1578u16 hpi_sample_clock_set_local_rate(u32 h_control, u32 sample_rate);
1779 u32 h_control, u32 sample_rate);
1780 1579
1781u16 hpi_sample_clock_get_local_rate(const struct hpi_hsubsys *ph_subsys, 1580u16 hpi_sample_clock_get_local_rate(u32 h_control, u32 *psample_rate);
1782 u32 h_control, u32 *psample_rate);
1783 1581
1784u16 hpi_sample_clock_set_auto(const struct hpi_hsubsys *ph_subsys, 1582u16 hpi_sample_clock_set_auto(u32 h_control, u32 enable);
1785 u32 h_control, u32 enable);
1786 1583
1787u16 hpi_sample_clock_get_auto(const struct hpi_hsubsys *ph_subsys, 1584u16 hpi_sample_clock_get_auto(u32 h_control, u32 *penable);
1788 u32 h_control, u32 *penable);
1789 1585
1790u16 hpi_sample_clock_set_local_rate_lock(const struct hpi_hsubsys *ph_subsys, 1586u16 hpi_sample_clock_set_local_rate_lock(u32 h_control, u32 lock);
1791 u32 h_control, u32 lock);
1792 1587
1793u16 hpi_sample_clock_get_local_rate_lock(const struct hpi_hsubsys *ph_subsys, 1588u16 hpi_sample_clock_get_local_rate_lock(u32 h_control, u32 *plock);
1794 u32 h_control, u32 *plock);
1795 1589
1796/***********************/ 1590/***********************/
1797/* Microphone control */ 1591/* Microphone control */
1798/***********************/ 1592/***********************/
1799u16 hpi_microphone_set_phantom_power(const struct hpi_hsubsys *ph_subsys, 1593u16 hpi_microphone_set_phantom_power(u32 h_control, u16 on_off);
1800 u32 h_control, u16 on_off);
1801 1594
1802u16 hpi_microphone_get_phantom_power(const struct hpi_hsubsys *ph_subsys, 1595u16 hpi_microphone_get_phantom_power(u32 h_control, u16 *pw_on_off);
1803 u32 h_control, u16 *pw_on_off);
1804 1596
1805/******************************* 1597/********************************/
1806 Parametric Equalizer control 1598/* Parametric Equalizer control */
1807*******************************/ 1599/********************************/
1808u16 hpi_parametricEQ__get_info(const struct hpi_hsubsys *ph_subsys, 1600u16 hpi_parametric_eq_get_info(u32 h_control, u16 *pw_number_of_bands,
1809 u32 h_control, u16 *pw_number_of_bands, u16 *pw_enabled); 1601 u16 *pw_enabled);
1810 1602
1811u16 hpi_parametricEQ__set_state(const struct hpi_hsubsys *ph_subsys, 1603u16 hpi_parametric_eq_set_state(u32 h_control, u16 on_off);
1812 u32 h_control, u16 on_off);
1813 1604
1814u16 hpi_parametricEQ__set_band(const struct hpi_hsubsys *ph_subsys, 1605u16 hpi_parametric_eq_set_band(u32 h_control, u16 index, u16 type,
1815 u32 h_control, u16 index, u16 type, u32 frequency_hz, short q100, 1606 u32 frequency_hz, short q100, short gain0_01dB);
1816 short gain0_01dB);
1817 1607
1818u16 hpi_parametricEQ__get_band(const struct hpi_hsubsys *ph_subsys, 1608u16 hpi_parametric_eq_get_band(u32 h_control, u16 index, u16 *pn_type,
1819 u32 h_control, u16 index, u16 *pn_type, u32 *pfrequency_hz, 1609 u32 *pfrequency_hz, short *pnQ100, short *pn_gain0_01dB);
1820 short *pnQ100, short *pn_gain0_01dB);
1821 1610
1822u16 hpi_parametricEQ__get_coeffs(const struct hpi_hsubsys *ph_subsys, 1611u16 hpi_parametric_eq_get_coeffs(u32 h_control, u16 index, short coeffs[5]
1823 u32 h_control, u16 index, short coeffs[5]
1824 ); 1612 );
1825 1613
1826/******************************* 1614/*******************************/
1827 Compressor Expander control 1615/* Compressor Expander control */
1828*******************************/ 1616/*******************************/
1829
1830u16 hpi_compander_set_enable(const struct hpi_hsubsys *ph_subsys,
1831 u32 h_control, u32 on);
1832
1833u16 hpi_compander_get_enable(const struct hpi_hsubsys *ph_subsys,
1834 u32 h_control, u32 *pon);
1835
1836u16 hpi_compander_set_makeup_gain(const struct hpi_hsubsys *ph_subsys,
1837 u32 h_control, short makeup_gain0_01dB);
1838
1839u16 hpi_compander_get_makeup_gain(const struct hpi_hsubsys *ph_subsys,
1840 u32 h_control, short *pn_makeup_gain0_01dB);
1841
1842u16 hpi_compander_set_attack_time_constant(const struct hpi_hsubsys
1843 *ph_subsys, u32 h_control, u32 index, u32 attack);
1844
1845u16 hpi_compander_get_attack_time_constant(const struct hpi_hsubsys
1846 *ph_subsys, u32 h_control, u32 index, u32 *pw_attack);
1847
1848u16 hpi_compander_set_decay_time_constant(const struct hpi_hsubsys *ph_subsys,
1849 u32 h_control, u32 index, u32 decay);
1850
1851u16 hpi_compander_get_decay_time_constant(const struct hpi_hsubsys *ph_subsys,
1852 u32 h_control, u32 index, u32 *pw_decay);
1853
1854u16 hpi_compander_set_threshold(const struct hpi_hsubsys *ph_subsys,
1855 u32 h_control, u32 index, short threshold0_01dB);
1856
1857u16 hpi_compander_get_threshold(const struct hpi_hsubsys *ph_subsys,
1858 u32 h_control, u32 index, short *pn_threshold0_01dB);
1859
1860u16 hpi_compander_set_ratio(const struct hpi_hsubsys *ph_subsys,
1861 u32 h_control, u32 index, u32 ratio100);
1862
1863u16 hpi_compander_get_ratio(const struct hpi_hsubsys *ph_subsys,
1864 u32 h_control, u32 index, u32 *pw_ratio100);
1865
1866/*******************************
1867 Cobranet HMI control
1868*******************************/
1869u16 hpi_cobranet_hmi_write(const struct hpi_hsubsys *ph_subsys, u32 h_control,
1870 u32 hmi_address, u32 byte_count, u8 *pb_data);
1871
1872u16 hpi_cobranet_hmi_read(const struct hpi_hsubsys *ph_subsys, u32 h_control,
1873 u32 hmi_address, u32 max_byte_count, u32 *pbyte_count, u8 *pb_data);
1874
1875u16 hpi_cobranet_hmi_get_status(const struct hpi_hsubsys *ph_subsys,
1876 u32 h_control, u32 *pstatus, u32 *preadable_size,
1877 u32 *pwriteable_size);
1878
1879/*Read the current IP address
1880*/
1881u16 hpi_cobranet_getI_paddress(const struct hpi_hsubsys *ph_subsys,
1882 u32 h_control, u32 *pi_paddress);
1883
1884/* Write the current IP address
1885*/
1886u16 hpi_cobranet_setI_paddress(const struct hpi_hsubsys *ph_subsys,
1887 u32 h_control, u32 i_paddress);
1888
1889/* Read the static IP address
1890*/
1891u16 hpi_cobranet_get_staticI_paddress(const struct hpi_hsubsys *ph_subsys,
1892 u32 h_control, u32 *pi_paddress);
1893 1617
1894/* Write the static IP address 1618u16 hpi_compander_set_enable(u32 h_control, u32 on);
1895*/
1896u16 hpi_cobranet_set_staticI_paddress(const struct hpi_hsubsys *ph_subsys,
1897 u32 h_control, u32 i_paddress);
1898 1619
1899/* Read the MAC address 1620u16 hpi_compander_get_enable(u32 h_control, u32 *pon);
1900*/
1901u16 hpi_cobranet_getMA_caddress(const struct hpi_hsubsys *ph_subsys,
1902 u32 h_control, u32 *pmAC_MS_bs, u32 *pmAC_LS_bs);
1903 1621
1904/******************************* 1622u16 hpi_compander_set_makeup_gain(u32 h_control, short makeup_gain0_01dB);
1905 Tone Detector control
1906*******************************/
1907u16 hpi_tone_detector_get_state(const struct hpi_hsubsys *ph_subsys, u32 hC,
1908 u32 *state);
1909 1623
1910u16 hpi_tone_detector_set_enable(const struct hpi_hsubsys *ph_subsys, u32 hC, 1624u16 hpi_compander_get_makeup_gain(u32 h_control, short *pn_makeup_gain0_01dB);
1911 u32 enable);
1912 1625
1913u16 hpi_tone_detector_get_enable(const struct hpi_hsubsys *ph_subsys, u32 hC, 1626u16 hpi_compander_set_attack_time_constant(u32 h_control, u32 index,
1914 u32 *enable); 1627 u32 attack);
1915 1628
1916u16 hpi_tone_detector_set_event_enable(const struct hpi_hsubsys *ph_subsys, 1629u16 hpi_compander_get_attack_time_constant(u32 h_control, u32 index,
1917 u32 hC, u32 event_enable); 1630 u32 *pw_attack);
1918 1631
1919u16 hpi_tone_detector_get_event_enable(const struct hpi_hsubsys *ph_subsys, 1632u16 hpi_compander_set_decay_time_constant(u32 h_control, u32 index,
1920 u32 hC, u32 *event_enable); 1633 u32 decay);
1921 1634
1922u16 hpi_tone_detector_set_threshold(const struct hpi_hsubsys *ph_subsys, 1635u16 hpi_compander_get_decay_time_constant(u32 h_control, u32 index,
1923 u32 hC, int threshold); 1636 u32 *pw_decay);
1924 1637
1925u16 hpi_tone_detector_get_threshold(const struct hpi_hsubsys *ph_subsys, 1638u16 hpi_compander_set_threshold(u32 h_control, u32 index,
1926 u32 hC, int *threshold); 1639 short threshold0_01dB);
1927 1640
1928u16 hpi_tone_detector_get_frequency(const struct hpi_hsubsys *ph_subsys, 1641u16 hpi_compander_get_threshold(u32 h_control, u32 index,
1929 u32 hC, u32 index, u32 *frequency); 1642 short *pn_threshold0_01dB);
1930 1643
1931/******************************* 1644u16 hpi_compander_set_ratio(u32 h_control, u32 index, u32 ratio100);
1932 Silence Detector control
1933*******************************/
1934u16 hpi_silence_detector_get_state(const struct hpi_hsubsys *ph_subsys,
1935 u32 hC, u32 *state);
1936 1645
1937u16 hpi_silence_detector_set_enable(const struct hpi_hsubsys *ph_subsys, 1646u16 hpi_compander_get_ratio(u32 h_control, u32 index, u32 *pw_ratio100);
1938 u32 hC, u32 enable);
1939 1647
1940u16 hpi_silence_detector_get_enable(const struct hpi_hsubsys *ph_subsys, 1648/********************/
1941 u32 hC, u32 *enable); 1649/* Cobranet control */
1650/********************/
1651u16 hpi_cobranet_hmi_write(u32 h_control, u32 hmi_address, u32 byte_count,
1652 u8 *pb_data);
1942 1653
1943u16 hpi_silence_detector_set_event_enable(const struct hpi_hsubsys *ph_subsys, 1654u16 hpi_cobranet_hmi_read(u32 h_control, u32 hmi_address, u32 max_byte_count,
1944 u32 hC, u32 event_enable); 1655 u32 *pbyte_count, u8 *pb_data);
1945 1656
1946u16 hpi_silence_detector_get_event_enable(const struct hpi_hsubsys *ph_subsys, 1657u16 hpi_cobranet_hmi_get_status(u32 h_control, u32 *pstatus,
1947 u32 hC, u32 *event_enable); 1658 u32 *preadable_size, u32 *pwriteable_size);
1948 1659
1949u16 hpi_silence_detector_set_delay(const struct hpi_hsubsys *ph_subsys, 1660u16 hpi_cobranet_get_ip_address(u32 h_control, u32 *pdw_ip_address);
1950 u32 hC, u32 delay);
1951 1661
1952u16 hpi_silence_detector_get_delay(const struct hpi_hsubsys *ph_subsys, 1662u16 hpi_cobranet_set_ip_address(u32 h_control, u32 dw_ip_address);
1953 u32 hC, u32 *delay);
1954 1663
1955u16 hpi_silence_detector_set_threshold(const struct hpi_hsubsys *ph_subsys, 1664u16 hpi_cobranet_get_static_ip_address(u32 h_control, u32 *pdw_ip_address);
1956 u32 hC, int threshold);
1957 1665
1958u16 hpi_silence_detector_get_threshold(const struct hpi_hsubsys *ph_subsys, 1666u16 hpi_cobranet_set_static_ip_address(u32 h_control, u32 dw_ip_address);
1959 u32 hC, int *threshold);
1960 1667
1961/******************************* 1668u16 hpi_cobranet_get_macaddress(u32 h_control, u32 *p_mac_msbs,
1962 Universal control 1669 u32 *p_mac_lsbs);
1963*******************************/
1964u16 hpi_entity_find_next(struct hpi_entity *container_entity,
1965 enum e_entity_type type, enum e_entity_role role, int recursive_flag,
1966 struct hpi_entity **current_match);
1967 1670
1968u16 hpi_entity_copy_value_from(struct hpi_entity *entity, 1671/*************************/
1969 enum e_entity_type type, size_t item_count, void *value_dst_p); 1672/* Tone Detector control */
1673/*************************/
1674u16 hpi_tone_detector_get_state(u32 hC, u32 *state);
1970 1675
1971u16 hpi_entity_unpack(struct hpi_entity *entity, enum e_entity_type *type, 1676u16 hpi_tone_detector_set_enable(u32 hC, u32 enable);
1972 size_t *items, enum e_entity_role *role, void **value);
1973 1677
1974u16 hpi_entity_alloc_and_pack(const enum e_entity_type type, 1678u16 hpi_tone_detector_get_enable(u32 hC, u32 *enable);
1975 const size_t item_count, const enum e_entity_role role, void *value,
1976 struct hpi_entity **entity);
1977 1679
1978void hpi_entity_free(struct hpi_entity *entity); 1680u16 hpi_tone_detector_set_event_enable(u32 hC, u32 event_enable);
1979 1681
1980u16 hpi_universal_info(const struct hpi_hsubsys *ph_subsys, u32 hC, 1682u16 hpi_tone_detector_get_event_enable(u32 hC, u32 *event_enable);
1981 struct hpi_entity **info);
1982 1683
1983u16 hpi_universal_get(const struct hpi_hsubsys *ph_subsys, u32 hC, 1684u16 hpi_tone_detector_set_threshold(u32 hC, int threshold);
1984 struct hpi_entity **value);
1985 1685
1986u16 hpi_universal_set(const struct hpi_hsubsys *ph_subsys, u32 hC, 1686u16 hpi_tone_detector_get_threshold(u32 hC, int *threshold);
1987 struct hpi_entity *value);
1988 1687
1989/*/////////// */ 1688u16 hpi_tone_detector_get_frequency(u32 hC, u32 index, u32 *frequency);
1990/* DSP CLOCK */
1991/*/////////// */
1992u16 hpi_clock_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index,
1993 u32 *ph_dsp_clock);
1994 1689
1995u16 hpi_clock_set_time(const struct hpi_hsubsys *ph_subsys, u32 h_clock, 1690/****************************/
1996 u16 hour, u16 minute, u16 second, u16 milli_second); 1691/* Silence Detector control */
1692/****************************/
1693u16 hpi_silence_detector_get_state(u32 hC, u32 *state);
1997 1694
1998u16 hpi_clock_get_time(const struct hpi_hsubsys *ph_subsys, u32 h_clock, 1695u16 hpi_silence_detector_set_enable(u32 hC, u32 enable);
1999 u16 *pw_hour, u16 *pw_minute, u16 *pw_second, u16 *pw_milli_second);
2000 1696
2001/*/////////// */ 1697u16 hpi_silence_detector_get_enable(u32 hC, u32 *enable);
2002/* PROFILE */
2003/*/////////// */
2004u16 hpi_profile_open_all(const struct hpi_hsubsys *ph_subsys,
2005 u16 adapter_index, u16 profile_index, u32 *ph_profile,
2006 u16 *pw_max_profiles);
2007 1698
2008u16 hpi_profile_get(const struct hpi_hsubsys *ph_subsys, u32 h_profile, 1699u16 hpi_silence_detector_set_event_enable(u32 hC, u32 event_enable);
2009 u16 index, u16 *pw_seconds, u32 *pmicro_seconds, u32 *pcall_count,
2010 u32 *pmax_micro_seconds, u32 *pmin_micro_seconds);
2011 1700
2012u16 hpi_profile_start_all(const struct hpi_hsubsys *ph_subsys, u32 h_profile); 1701u16 hpi_silence_detector_get_event_enable(u32 hC, u32 *event_enable);
2013 1702
2014u16 hpi_profile_stop_all(const struct hpi_hsubsys *ph_subsys, u32 h_profile); 1703u16 hpi_silence_detector_set_delay(u32 hC, u32 delay);
2015 1704
2016u16 hpi_profile_get_name(const struct hpi_hsubsys *ph_subsys, u32 h_profile, 1705u16 hpi_silence_detector_get_delay(u32 hC, u32 *delay);
2017 u16 index, char *sz_profile_name, u16 profile_name_length);
2018 1706
2019u16 hpi_profile_get_utilization(const struct hpi_hsubsys *ph_subsys, 1707u16 hpi_silence_detector_set_threshold(u32 hC, int threshold);
2020 u32 h_profile, u32 *putilization);
2021 1708
2022/*//////////////////// */ 1709u16 hpi_silence_detector_get_threshold(u32 hC, int *threshold);
2023/* UTILITY functions */ 1710/*********************/
1711/* Utility functions */
1712/*********************/
2024 1713
2025u16 hpi_format_create(struct hpi_format *p_format, u16 channels, u16 format, 1714u16 hpi_format_create(struct hpi_format *p_format, u16 channels, u16 format,
2026 u32 sample_rate, u32 bit_rate, u32 attributes); 1715 u32 sample_rate, u32 bit_rate, u32 attributes);
2027 1716
2028/* Until it's verified, this function is for Windows OSs only */ 1717#endif /*_HPI_H_ */
2029
2030#endif /*_H_HPI_ */
2031/*
2032///////////////////////////////////////////////////////////////////////////////
2033// See CVS for history. Last complete set in rev 1.146
2034////////////////////////////////////////////////////////////////////////////////
2035*/
diff --git a/sound/pci/asihpi/hpi6000.c b/sound/pci/asihpi/hpi6000.c
index 1b9bf9395cfe..3e3c2ef6efd8 100644
--- a/sound/pci/asihpi/hpi6000.c
+++ b/sound/pci/asihpi/hpi6000.c
@@ -43,16 +43,17 @@
43#define HPI_HIF_ERROR_MASK 0x4000 43#define HPI_HIF_ERROR_MASK 0x4000
44 44
45/* HPI6000 specific error codes */ 45/* HPI6000 specific error codes */
46#define HPI6000_ERROR_BASE 900 /* not actually used anywhere */
46 47
47#define HPI6000_ERROR_BASE 900 48/* operational/messaging errors */
48#define HPI6000_ERROR_MSG_RESP_IDLE_TIMEOUT 901 49#define HPI6000_ERROR_MSG_RESP_IDLE_TIMEOUT 901
49#define HPI6000_ERROR_MSG_RESP_SEND_MSG_ACK 902 50
50#define HPI6000_ERROR_MSG_RESP_GET_RESP_ACK 903 51#define HPI6000_ERROR_MSG_RESP_GET_RESP_ACK 903
51#define HPI6000_ERROR_MSG_GET_ADR 904 52#define HPI6000_ERROR_MSG_GET_ADR 904
52#define HPI6000_ERROR_RESP_GET_ADR 905 53#define HPI6000_ERROR_RESP_GET_ADR 905
53#define HPI6000_ERROR_MSG_RESP_BLOCKWRITE32 906 54#define HPI6000_ERROR_MSG_RESP_BLOCKWRITE32 906
54#define HPI6000_ERROR_MSG_RESP_BLOCKREAD32 907 55#define HPI6000_ERROR_MSG_RESP_BLOCKREAD32 907
55#define HPI6000_ERROR_MSG_INVALID_DSP_INDEX 908 56
56#define HPI6000_ERROR_CONTROL_CACHE_PARAMS 909 57#define HPI6000_ERROR_CONTROL_CACHE_PARAMS 909
57 58
58#define HPI6000_ERROR_SEND_DATA_IDLE_TIMEOUT 911 59#define HPI6000_ERROR_SEND_DATA_IDLE_TIMEOUT 911
@@ -62,7 +63,6 @@
62#define HPI6000_ERROR_SEND_DATA_CMD 915 63#define HPI6000_ERROR_SEND_DATA_CMD 915
63#define HPI6000_ERROR_SEND_DATA_WRITE 916 64#define HPI6000_ERROR_SEND_DATA_WRITE 916
64#define HPI6000_ERROR_SEND_DATA_IDLECMD 917 65#define HPI6000_ERROR_SEND_DATA_IDLECMD 917
65#define HPI6000_ERROR_SEND_DATA_VERIFY 918
66 66
67#define HPI6000_ERROR_GET_DATA_IDLE_TIMEOUT 921 67#define HPI6000_ERROR_GET_DATA_IDLE_TIMEOUT 921
68#define HPI6000_ERROR_GET_DATA_ACK 922 68#define HPI6000_ERROR_GET_DATA_ACK 922
@@ -76,9 +76,8 @@
76 76
77#define HPI6000_ERROR_MSG_RESP_GETRESPCMD 961 77#define HPI6000_ERROR_MSG_RESP_GETRESPCMD 961
78#define HPI6000_ERROR_MSG_RESP_IDLECMD 962 78#define HPI6000_ERROR_MSG_RESP_IDLECMD 962
79#define HPI6000_ERROR_MSG_RESP_BLOCKVERIFY32 963
80 79
81/* adapter init errors */ 80/* Initialisation/bootload errors */
82#define HPI6000_ERROR_UNHANDLED_SUBSYS_ID 930 81#define HPI6000_ERROR_UNHANDLED_SUBSYS_ID 930
83 82
84/* can't access PCI2040 */ 83/* can't access PCI2040 */
@@ -210,6 +209,8 @@ static void adapter_get_asserts(struct hpi_adapter_obj *pao,
210static short create_adapter_obj(struct hpi_adapter_obj *pao, 209static short create_adapter_obj(struct hpi_adapter_obj *pao,
211 u32 *pos_error_code); 210 u32 *pos_error_code);
212 211
212static void delete_adapter_obj(struct hpi_adapter_obj *pao);
213
213/* local globals */ 214/* local globals */
214 215
215static u16 gw_pci_read_asserts; /* used to count PCI2040 errors */ 216static u16 gw_pci_read_asserts; /* used to count PCI2040 errors */
@@ -217,17 +218,7 @@ static u16 gw_pci_write_asserts; /* used to count PCI2040 errors */
217 218
218static void subsys_message(struct hpi_message *phm, struct hpi_response *phr) 219static void subsys_message(struct hpi_message *phm, struct hpi_response *phr)
219{ 220{
220
221 switch (phm->function) { 221 switch (phm->function) {
222 case HPI_SUBSYS_OPEN:
223 case HPI_SUBSYS_CLOSE:
224 case HPI_SUBSYS_GET_INFO:
225 case HPI_SUBSYS_DRIVER_UNLOAD:
226 case HPI_SUBSYS_DRIVER_LOAD:
227 case HPI_SUBSYS_FIND_ADAPTERS:
228 /* messages that should not get here */
229 phr->error = HPI_ERROR_UNIMPLEMENTED;
230 break;
231 case HPI_SUBSYS_CREATE_ADAPTER: 222 case HPI_SUBSYS_CREATE_ADAPTER:
232 subsys_create_adapter(phm, phr); 223 subsys_create_adapter(phm, phr);
233 break; 224 break;
@@ -243,7 +234,6 @@ static void subsys_message(struct hpi_message *phm, struct hpi_response *phr)
243static void control_message(struct hpi_adapter_obj *pao, 234static void control_message(struct hpi_adapter_obj *pao,
244 struct hpi_message *phm, struct hpi_response *phr) 235 struct hpi_message *phm, struct hpi_response *phr)
245{ 236{
246
247 switch (phm->function) { 237 switch (phm->function) {
248 case HPI_CONTROL_GET_STATE: 238 case HPI_CONTROL_GET_STATE:
249 if (pao->has_control_cache) { 239 if (pao->has_control_cache) {
@@ -251,7 +241,13 @@ static void control_message(struct hpi_adapter_obj *pao,
251 err = hpi6000_update_control_cache(pao, phm); 241 err = hpi6000_update_control_cache(pao, phm);
252 242
253 if (err) { 243 if (err) {
254 phr->error = err; 244 if (err >= HPI_ERROR_BACKEND_BASE) {
245 phr->error =
246 HPI_ERROR_CONTROL_CACHING;
247 phr->specific_error = err;
248 } else {
249 phr->error = err;
250 }
255 break; 251 break;
256 } 252 }
257 253
@@ -262,16 +258,15 @@ static void control_message(struct hpi_adapter_obj *pao,
262 } 258 }
263 hw_message(pao, phm, phr); 259 hw_message(pao, phm, phr);
264 break; 260 break;
265 case HPI_CONTROL_GET_INFO:
266 hw_message(pao, phm, phr);
267 break;
268 case HPI_CONTROL_SET_STATE: 261 case HPI_CONTROL_SET_STATE:
269 hw_message(pao, phm, phr); 262 hw_message(pao, phm, phr);
270 hpi_sync_control_cache(((struct hpi_hw_obj *)pao->priv)-> 263 hpi_cmn_control_cache_sync_to_msg(((struct hpi_hw_obj *)pao->
271 p_cache, phm, phr); 264 priv)->p_cache, phm, phr);
272 break; 265 break;
266
267 case HPI_CONTROL_GET_INFO:
273 default: 268 default:
274 phr->error = HPI_ERROR_INVALID_FUNC; 269 hw_message(pao, phm, phr);
275 break; 270 break;
276 } 271 }
277} 272}
@@ -280,26 +275,12 @@ static void adapter_message(struct hpi_adapter_obj *pao,
280 struct hpi_message *phm, struct hpi_response *phr) 275 struct hpi_message *phm, struct hpi_response *phr)
281{ 276{
282 switch (phm->function) { 277 switch (phm->function) {
283 case HPI_ADAPTER_GET_INFO:
284 hw_message(pao, phm, phr);
285 break;
286 case HPI_ADAPTER_GET_ASSERT: 278 case HPI_ADAPTER_GET_ASSERT:
287 adapter_get_asserts(pao, phm, phr); 279 adapter_get_asserts(pao, phm, phr);
288 break; 280 break;
289 case HPI_ADAPTER_OPEN: 281
290 case HPI_ADAPTER_CLOSE:
291 case HPI_ADAPTER_TEST_ASSERT:
292 case HPI_ADAPTER_SELFTEST:
293 case HPI_ADAPTER_GET_MODE:
294 case HPI_ADAPTER_SET_MODE:
295 case HPI_ADAPTER_FIND_OBJECT:
296 case HPI_ADAPTER_GET_PROPERTY:
297 case HPI_ADAPTER_SET_PROPERTY:
298 case HPI_ADAPTER_ENUM_PROPERTY:
299 hw_message(pao, phm, phr);
300 break;
301 default: 282 default:
302 phr->error = HPI_ERROR_INVALID_FUNC; 283 hw_message(pao, phm, phr);
303 break; 284 break;
304 } 285 }
305} 286}
@@ -311,7 +292,7 @@ static void outstream_message(struct hpi_adapter_obj *pao,
311 case HPI_OSTREAM_HOSTBUFFER_ALLOC: 292 case HPI_OSTREAM_HOSTBUFFER_ALLOC:
312 case HPI_OSTREAM_HOSTBUFFER_FREE: 293 case HPI_OSTREAM_HOSTBUFFER_FREE:
313 /* Don't let these messages go to the HW function because 294 /* Don't let these messages go to the HW function because
314 * they're called without allocating the spinlock. 295 * they're called without locking the spinlock.
315 * For the HPI6000 adapters the HW would return 296 * For the HPI6000 adapters the HW would return
316 * HPI_ERROR_INVALID_FUNC anyway. 297 * HPI_ERROR_INVALID_FUNC anyway.
317 */ 298 */
@@ -331,7 +312,7 @@ static void instream_message(struct hpi_adapter_obj *pao,
331 case HPI_ISTREAM_HOSTBUFFER_ALLOC: 312 case HPI_ISTREAM_HOSTBUFFER_ALLOC:
332 case HPI_ISTREAM_HOSTBUFFER_FREE: 313 case HPI_ISTREAM_HOSTBUFFER_FREE:
333 /* Don't let these messages go to the HW function because 314 /* Don't let these messages go to the HW function because
334 * they're called without allocating the spinlock. 315 * they're called without locking the spinlock.
335 * For the HPI6000 adapters the HW would return 316 * For the HPI6000 adapters the HW would return
336 * HPI_ERROR_INVALID_FUNC anyway. 317 * HPI_ERROR_INVALID_FUNC anyway.
337 */ 318 */
@@ -355,7 +336,7 @@ void HPI_6000(struct hpi_message *phm, struct hpi_response *phr)
355 /* subsytem messages get executed by every HPI. */ 336 /* subsytem messages get executed by every HPI. */
356 /* All other messages are ignored unless the adapter index matches */ 337 /* All other messages are ignored unless the adapter index matches */
357 /* an adapter in the HPI */ 338 /* an adapter in the HPI */
358 HPI_DEBUG_LOG(DEBUG, "O %d,F %x\n", phm->object, phm->function); 339 /*HPI_DEBUG_LOG(DEBUG, "O %d,F %x\n", phm->wObject, phm->wFunction); */
359 340
360 /* if Dsp has crashed then do not communicate with it any more */ 341 /* if Dsp has crashed then do not communicate with it any more */
361 if (phm->object != HPI_OBJ_SUBSYSTEM) { 342 if (phm->object != HPI_OBJ_SUBSYSTEM) {
@@ -433,21 +414,13 @@ static void subsys_create_adapter(struct hpi_message *phm,
433 struct hpi_adapter_obj ao; 414 struct hpi_adapter_obj ao;
434 struct hpi_adapter_obj *pao; 415 struct hpi_adapter_obj *pao;
435 u32 os_error_code; 416 u32 os_error_code;
436 short error = 0; 417 u16 err = 0;
437 u32 dsp_index = 0; 418 u32 dsp_index = 0;
438 419
439 HPI_DEBUG_LOG(VERBOSE, "subsys_create_adapter\n"); 420 HPI_DEBUG_LOG(VERBOSE, "subsys_create_adapter\n");
440 421
441 memset(&ao, 0, sizeof(ao)); 422 memset(&ao, 0, sizeof(ao));
442 423
443 /* this HPI only creates adapters for TI/PCI2040 based devices */
444 if (phm->u.s.resource.bus_type != HPI_BUS_PCI)
445 return;
446 if (phm->u.s.resource.r.pci->vendor_id != HPI_PCI_VENDOR_ID_TI)
447 return;
448 if (phm->u.s.resource.r.pci->device_id != HPI_PCI_DEV_ID_PCI2040)
449 return;
450
451 ao.priv = kzalloc(sizeof(struct hpi_hw_obj), GFP_KERNEL); 424 ao.priv = kzalloc(sizeof(struct hpi_hw_obj), GFP_KERNEL);
452 if (!ao.priv) { 425 if (!ao.priv) {
453 HPI_DEBUG_LOG(ERROR, "cant get mem for adapter object\n"); 426 HPI_DEBUG_LOG(ERROR, "cant get mem for adapter object\n");
@@ -456,16 +429,19 @@ static void subsys_create_adapter(struct hpi_message *phm,
456 } 429 }
457 430
458 /* create the adapter object based on the resource information */ 431 /* create the adapter object based on the resource information */
459 /*? memcpy(&ao.Pci,&phm->u.s.Resource.r.Pci,sizeof(ao.Pci)); */
460 ao.pci = *phm->u.s.resource.r.pci; 432 ao.pci = *phm->u.s.resource.r.pci;
461 433
462 error = create_adapter_obj(&ao, &os_error_code); 434 err = create_adapter_obj(&ao, &os_error_code);
463 if (!error) 435 if (err) {
464 error = hpi_add_adapter(&ao); 436 delete_adapter_obj(&ao);
465 if (error) { 437 if (err >= HPI_ERROR_BACKEND_BASE) {
438 phr->error = HPI_ERROR_DSP_BOOTLOAD;
439 phr->specific_error = err;
440 } else {
441 phr->error = err;
442 }
443
466 phr->u.s.data = os_error_code; 444 phr->u.s.data = os_error_code;
467 kfree(ao.priv);
468 phr->error = error;
469 return; 445 return;
470 } 446 }
471 /* need to update paParentAdapter */ 447 /* need to update paParentAdapter */
@@ -473,7 +449,7 @@ static void subsys_create_adapter(struct hpi_message *phm,
473 if (!pao) { 449 if (!pao) {
474 /* We just added this adapter, why can't we find it!? */ 450 /* We just added this adapter, why can't we find it!? */
475 HPI_DEBUG_LOG(ERROR, "lost adapter after boot\n"); 451 HPI_DEBUG_LOG(ERROR, "lost adapter after boot\n");
476 phr->error = 950; 452 phr->error = HPI_ERROR_BAD_ADAPTER;
477 return; 453 return;
478 } 454 }
479 455
@@ -482,9 +458,8 @@ static void subsys_create_adapter(struct hpi_message *phm,
482 phw->ado[dsp_index].pa_parent_adapter = pao; 458 phw->ado[dsp_index].pa_parent_adapter = pao;
483 } 459 }
484 460
485 phr->u.s.aw_adapter_list[ao.index] = ao.adapter_type; 461 phr->u.s.adapter_type = ao.adapter_type;
486 phr->u.s.adapter_index = ao.index; 462 phr->u.s.adapter_index = ao.index;
487 phr->u.s.num_adapters++;
488 phr->error = 0; 463 phr->error = 0;
489} 464}
490 465
@@ -492,20 +467,13 @@ static void subsys_delete_adapter(struct hpi_message *phm,
492 struct hpi_response *phr) 467 struct hpi_response *phr)
493{ 468{
494 struct hpi_adapter_obj *pao = NULL; 469 struct hpi_adapter_obj *pao = NULL;
495 struct hpi_hw_obj *phw;
496 470
497 pao = hpi_find_adapter(phm->adapter_index); 471 pao = hpi_find_adapter(phm->obj_index);
498 if (!pao) 472 if (!pao)
499 return; 473 return;
500 474
501 phw = (struct hpi_hw_obj *)pao->priv; 475 delete_adapter_obj(pao);
502
503 if (pao->has_control_cache)
504 hpi_free_control_cache(phw->p_cache);
505
506 hpi_delete_adapter(pao); 476 hpi_delete_adapter(pao);
507 kfree(phw);
508
509 phr->error = 0; 477 phr->error = 0;
510} 478}
511 479
@@ -519,9 +487,6 @@ static short create_adapter_obj(struct hpi_adapter_obj *pao,
519 u32 control_cache_count = 0; 487 u32 control_cache_count = 0;
520 struct hpi_hw_obj *phw = (struct hpi_hw_obj *)pao->priv; 488 struct hpi_hw_obj *phw = (struct hpi_hw_obj *)pao->priv;
521 489
522 /* init error reporting */
523 pao->dsp_crashed = 0;
524
525 /* The PCI2040 has the following address map */ 490 /* The PCI2040 has the following address map */
526 /* BAR0 - 4K = HPI control and status registers on PCI2040 (HPI CSR) */ 491 /* BAR0 - 4K = HPI control and status registers on PCI2040 (HPI CSR) */
527 /* BAR1 - 32K = HPI registers on DSP */ 492 /* BAR1 - 32K = HPI registers on DSP */
@@ -575,36 +540,36 @@ static short create_adapter_obj(struct hpi_adapter_obj *pao,
575 /* get info about the adapter by asking the adapter */ 540 /* get info about the adapter by asking the adapter */
576 /* send a HPI_ADAPTER_GET_INFO message */ 541 /* send a HPI_ADAPTER_GET_INFO message */
577 { 542 {
578 struct hpi_message hM; 543 struct hpi_message hm;
579 struct hpi_response hR0; /* response from DSP 0 */ 544 struct hpi_response hr0; /* response from DSP 0 */
580 struct hpi_response hR1; /* response from DSP 1 */ 545 struct hpi_response hr1; /* response from DSP 1 */
581 u16 error = 0; 546 u16 error = 0;
582 547
583 HPI_DEBUG_LOG(VERBOSE, "send ADAPTER_GET_INFO\n"); 548 HPI_DEBUG_LOG(VERBOSE, "send ADAPTER_GET_INFO\n");
584 memset(&hM, 0, sizeof(hM)); 549 memset(&hm, 0, sizeof(hm));
585 hM.type = HPI_TYPE_MESSAGE; 550 hm.type = HPI_TYPE_MESSAGE;
586 hM.size = sizeof(struct hpi_message); 551 hm.size = sizeof(struct hpi_message);
587 hM.object = HPI_OBJ_ADAPTER; 552 hm.object = HPI_OBJ_ADAPTER;
588 hM.function = HPI_ADAPTER_GET_INFO; 553 hm.function = HPI_ADAPTER_GET_INFO;
589 hM.adapter_index = 0; 554 hm.adapter_index = 0;
590 memset(&hR0, 0, sizeof(hR0)); 555 memset(&hr0, 0, sizeof(hr0));
591 memset(&hR1, 0, sizeof(hR1)); 556 memset(&hr1, 0, sizeof(hr1));
592 hR0.size = sizeof(hR0); 557 hr0.size = sizeof(hr0);
593 hR1.size = sizeof(hR1); 558 hr1.size = sizeof(hr1);
594 559
595 error = hpi6000_message_response_sequence(pao, 0, &hM, &hR0); 560 error = hpi6000_message_response_sequence(pao, 0, &hm, &hr0);
596 if (hR0.error) { 561 if (hr0.error) {
597 HPI_DEBUG_LOG(DEBUG, "message error %d\n", hR0.error); 562 HPI_DEBUG_LOG(DEBUG, "message error %d\n", hr0.error);
598 return hR0.error; 563 return hr0.error;
599 } 564 }
600 if (phw->num_dsp == 2) { 565 if (phw->num_dsp == 2) {
601 error = hpi6000_message_response_sequence(pao, 1, &hM, 566 error = hpi6000_message_response_sequence(pao, 1, &hm,
602 &hR1); 567 &hr1);
603 if (error) 568 if (error)
604 return error; 569 return error;
605 } 570 }
606 pao->adapter_type = hR0.u.a.adapter_type; 571 pao->adapter_type = hr0.u.ax.info.adapter_type;
607 pao->index = hR0.u.a.adapter_index; 572 pao->index = hr0.u.ax.info.adapter_index;
608 } 573 }
609 574
610 memset(&phw->control_cache[0], 0, 575 memset(&phw->control_cache[0], 0,
@@ -618,22 +583,37 @@ static short create_adapter_obj(struct hpi_adapter_obj *pao,
618 control_cache_count = 583 control_cache_count =
619 hpi_read_word(&phw->ado[0], 584 hpi_read_word(&phw->ado[0],
620 HPI_HIF_ADDR(control_cache_count)); 585 HPI_HIF_ADDR(control_cache_count));
621 pao->has_control_cache = 1;
622 586
623 phw->p_cache = 587 phw->p_cache =
624 hpi_alloc_control_cache(control_cache_count, 588 hpi_alloc_control_cache(control_cache_count,
625 control_cache_size, (struct hpi_control_cache_info *) 589 control_cache_size, (unsigned char *)
626 &phw->control_cache[0] 590 &phw->control_cache[0]
627 ); 591 );
628 if (!phw->p_cache) 592 if (phw->p_cache)
629 pao->has_control_cache = 0; 593 pao->has_control_cache = 1;
630 } else 594 }
631 pao->has_control_cache = 0;
632 595
633 HPI_DEBUG_LOG(DEBUG, "get adapter info ASI%04X index %d\n", 596 HPI_DEBUG_LOG(DEBUG, "get adapter info ASI%04X index %d\n",
634 pao->adapter_type, pao->index); 597 pao->adapter_type, pao->index);
635 pao->open = 0; /* upon creation the adapter is closed */ 598 pao->open = 0; /* upon creation the adapter is closed */
636 return 0; 599
600 if (phw->p_cache)
601 phw->p_cache->adap_idx = pao->index;
602
603 return hpi_add_adapter(pao);
604}
605
606static void delete_adapter_obj(struct hpi_adapter_obj *pao)
607{
608 struct hpi_hw_obj *phw = (struct hpi_hw_obj *)pao->priv;
609
610 if (pao->has_control_cache)
611 hpi_free_control_cache(phw->p_cache);
612
613 /* reset DSPs on adapter */
614 iowrite32(0x0003000F, phw->dw2040_HPICSR + HPI_RESET);
615
616 kfree(phw);
637} 617}
638 618
639/************************************************************************/ 619/************************************************************************/
@@ -645,11 +625,13 @@ static void adapter_get_asserts(struct hpi_adapter_obj *pao,
645#ifndef HIDE_PCI_ASSERTS 625#ifndef HIDE_PCI_ASSERTS
646 /* if we have PCI2040 asserts then collect them */ 626 /* if we have PCI2040 asserts then collect them */
647 if ((gw_pci_read_asserts > 0) || (gw_pci_write_asserts > 0)) { 627 if ((gw_pci_read_asserts > 0) || (gw_pci_write_asserts > 0)) {
648 phr->u.a.serial_number = 628 phr->u.ax.assert.p1 =
649 gw_pci_read_asserts * 100 + gw_pci_write_asserts; 629 gw_pci_read_asserts * 100 + gw_pci_write_asserts;
650 phr->u.a.adapter_index = 1; /* assert count */ 630 phr->u.ax.assert.p2 = 0;
651 phr->u.a.adapter_type = -1; /* "dsp index" */ 631 phr->u.ax.assert.count = 1; /* assert count */
652 strcpy(phr->u.a.sz_adapter_assert, "PCI2040 error"); 632 phr->u.ax.assert.dsp_index = -1; /* "dsp index" */
633 strcpy(phr->u.ax.assert.sz_message, "PCI2040 error");
634 phr->u.ax.assert.dsp_msg_addr = 0;
653 gw_pci_read_asserts = 0; 635 gw_pci_read_asserts = 0;
654 gw_pci_write_asserts = 0; 636 gw_pci_write_asserts = 0;
655 phr->error = 0; 637 phr->error = 0;
@@ -686,10 +668,10 @@ static short hpi6000_adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
686 668
687 /* NOTE don't use wAdapterType in this routine. It is not setup yet */ 669 /* NOTE don't use wAdapterType in this routine. It is not setup yet */
688 670
689 switch (pao->pci.subsys_device_id) { 671 switch (pao->pci.pci_dev->subsystem_device) {
690 case 0x5100: 672 case 0x5100:
691 case 0x5110: /* ASI5100 revB or higher with C6711D */ 673 case 0x5110: /* ASI5100 revB or higher with C6711D */
692 case 0x5200: /* ASI5200 PC_ie version of ASI5100 */ 674 case 0x5200: /* ASI5200 PCIe version of ASI5100 */
693 case 0x6100: 675 case 0x6100:
694 case 0x6200: 676 case 0x6200:
695 boot_load_family = HPI_ADAPTER_FAMILY_ASI(0x6200); 677 boot_load_family = HPI_ADAPTER_FAMILY_ASI(0x6200);
@@ -709,8 +691,9 @@ static short hpi6000_adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
709 * note that bits 4..15 are read-only and so should always return zero, 691 * note that bits 4..15 are read-only and so should always return zero,
710 * even though we wrote 1 to them 692 * even though we wrote 1 to them
711 */ 693 */
712 for (i = 0; i < 1000; i++) 694 hpios_delay_micro_seconds(1000);
713 delay = ioread32(phw->dw2040_HPICSR + HPI_RESET); 695 delay = ioread32(phw->dw2040_HPICSR + HPI_RESET);
696
714 if (delay != dw2040_reset) { 697 if (delay != dw2040_reset) {
715 HPI_DEBUG_LOG(ERROR, "INIT_PCI2040 %x %x\n", dw2040_reset, 698 HPI_DEBUG_LOG(ERROR, "INIT_PCI2040 %x %x\n", dw2040_reset,
716 delay); 699 delay);
@@ -743,8 +726,7 @@ static short hpi6000_adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
743 dw2040_reset = dw2040_reset & (~0x00000008); 726 dw2040_reset = dw2040_reset & (~0x00000008);
744 iowrite32(dw2040_reset, phw->dw2040_HPICSR + HPI_RESET); 727 iowrite32(dw2040_reset, phw->dw2040_HPICSR + HPI_RESET);
745 /*delay to allow DSP to get going */ 728 /*delay to allow DSP to get going */
746 for (i = 0; i < 100; i++) 729 hpios_delay_micro_seconds(100);
747 delay = ioread32(phw->dw2040_HPICSR + HPI_RESET);
748 730
749 /* loop through all DSPs, downloading DSP code */ 731 /* loop through all DSPs, downloading DSP code */
750 for (dsp_index = 0; dsp_index < phw->num_dsp; dsp_index++) { 732 for (dsp_index = 0; dsp_index < phw->num_dsp; dsp_index++) {
@@ -783,27 +765,27 @@ static short hpi6000_adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
783 */ 765 */
784 /* bypass PLL */ 766 /* bypass PLL */
785 hpi_write_word(pdo, 0x01B7C100, 0x0000); 767 hpi_write_word(pdo, 0x01B7C100, 0x0000);
786 for (i = 0; i < 100; i++) 768 hpios_delay_micro_seconds(100);
787 delay = ioread32(phw->dw2040_HPICSR +
788 HPI_RESET);
789 769
790 /* ** use default of PLL x7 ** */ 770 /* ** use default of PLL x7 ** */
791 /* EMIF = 225/3=75MHz */ 771 /* EMIF = 225/3=75MHz */
792 hpi_write_word(pdo, 0x01B7C120, 0x8002); 772 hpi_write_word(pdo, 0x01B7C120, 0x8002);
773 hpios_delay_micro_seconds(100);
774
793 /* peri = 225/2 */ 775 /* peri = 225/2 */
794 hpi_write_word(pdo, 0x01B7C11C, 0x8001); 776 hpi_write_word(pdo, 0x01B7C11C, 0x8001);
777 hpios_delay_micro_seconds(100);
778
795 /* cpu = 225/1 */ 779 /* cpu = 225/1 */
796 hpi_write_word(pdo, 0x01B7C118, 0x8000); 780 hpi_write_word(pdo, 0x01B7C118, 0x8000);
797 /* ~200us delay */ 781
798 for (i = 0; i < 2000; i++) 782 /* ~2ms delay */
799 delay = ioread32(phw->dw2040_HPICSR + 783 hpios_delay_micro_seconds(2000);
800 HPI_RESET); 784
801 /* PLL not bypassed */ 785 /* PLL not bypassed */
802 hpi_write_word(pdo, 0x01B7C100, 0x0001); 786 hpi_write_word(pdo, 0x01B7C100, 0x0001);
803 /* ~200us delay */ 787 /* ~2ms delay */
804 for (i = 0; i < 2000; i++) 788 hpios_delay_micro_seconds(2000);
805 delay = ioread32(phw->dw2040_HPICSR +
806 HPI_RESET);
807 } 789 }
808 790
809 /* test r/w to internal DSP memory 791 /* test r/w to internal DSP memory
@@ -927,9 +909,7 @@ static short hpi6000_adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
927 } 909 }
928 910
929 /* delay a little to allow SDRAM and DSP to "get going" */ 911 /* delay a little to allow SDRAM and DSP to "get going" */
930 912 hpios_delay_micro_seconds(1000);
931 for (i = 0; i < 1000; i++)
932 delay = ioread32(phw->dw2040_HPICSR + HPI_RESET);
933 913
934 /* test access to SDRAM */ 914 /* test access to SDRAM */
935 { 915 {
@@ -976,7 +956,7 @@ static short hpi6000_adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
976 956
977 /* write the DSP code down into the DSPs memory */ 957 /* write the DSP code down into the DSPs memory */
978 /*HpiDspCode_Open(nBootLoadFamily,&DspCode,pdwOsErrorCode); */ 958 /*HpiDspCode_Open(nBootLoadFamily,&DspCode,pdwOsErrorCode); */
979 dsp_code.ps_dev = pao->pci.p_os_data; 959 dsp_code.ps_dev = pao->pci.pci_dev;
980 960
981 error = hpi_dsp_code_open(boot_load_family, &dsp_code, 961 error = hpi_dsp_code_open(boot_load_family, &dsp_code,
982 pos_error_code); 962 pos_error_code);
@@ -1073,8 +1053,7 @@ static short hpi6000_adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
1073 1053
1074 /* step 3. Start code by sending interrupt */ 1054 /* step 3. Start code by sending interrupt */
1075 iowrite32(0x00030003, pdo->prHPI_control); 1055 iowrite32(0x00030003, pdo->prHPI_control);
1076 for (i = 0; i < 10000; i++) 1056 hpios_delay_micro_seconds(10000);
1077 delay = ioread32(phw->dw2040_HPICSR + HPI_RESET);
1078 1057
1079 /* wait for a non-zero value in hostcmd - 1058 /* wait for a non-zero value in hostcmd -
1080 * indicating initialization is complete 1059 * indicating initialization is complete
@@ -1101,7 +1080,7 @@ static short hpi6000_adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
1101 * locks up with a bluescreen (NOT GPF or pagefault). 1080 * locks up with a bluescreen (NOT GPF or pagefault).
1102 */ 1081 */
1103 else 1082 else
1104 hpios_delay_micro_seconds(1000); 1083 hpios_delay_micro_seconds(10000);
1105 } 1084 }
1106 if (timeout == 0) 1085 if (timeout == 0)
1107 return HPI6000_ERROR_INIT_NOACK; 1086 return HPI6000_ERROR_INIT_NOACK;
@@ -1132,14 +1111,14 @@ static short hpi6000_adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
1132 mask = 0xFFFFFF00L; 1111 mask = 0xFFFFFF00L;
1133 /* ASI5100 uses AX6 code, */ 1112 /* ASI5100 uses AX6 code, */
1134 /* but has no PLD r/w register to test */ 1113 /* but has no PLD r/w register to test */
1135 if (HPI_ADAPTER_FAMILY_ASI(pao->pci. 1114 if (HPI_ADAPTER_FAMILY_ASI(pao->pci.pci_dev->
1136 subsys_device_id) == 1115 subsystem_device) ==
1137 HPI_ADAPTER_FAMILY_ASI(0x5100)) 1116 HPI_ADAPTER_FAMILY_ASI(0x5100))
1138 mask = 0x00000000L; 1117 mask = 0x00000000L;
1139 /* ASI5200 uses AX6 code, */ 1118 /* ASI5200 uses AX6 code, */
1140 /* but has no PLD r/w register to test */ 1119 /* but has no PLD r/w register to test */
1141 if (HPI_ADAPTER_FAMILY_ASI(pao->pci. 1120 if (HPI_ADAPTER_FAMILY_ASI(pao->pci.pci_dev->
1142 subsys_device_id) == 1121 subsystem_device) ==
1143 HPI_ADAPTER_FAMILY_ASI(0x5200)) 1122 HPI_ADAPTER_FAMILY_ASI(0x5200))
1144 mask = 0x00000000L; 1123 mask = 0x00000000L;
1145 break; 1124 break;
@@ -1204,7 +1183,7 @@ static u32 hpi_read_word(struct dsp_obj *pdo, u32 address)
1204 u32 data = 0; 1183 u32 data = 0;
1205 1184
1206 if (hpi_set_address(pdo, address)) 1185 if (hpi_set_address(pdo, address))
1207 return 0; /*? no way to return error */ 1186 return 0; /*? No way to return error */
1208 1187
1209 /* take care of errata in revB DSP (2.0.1) */ 1188 /* take care of errata in revB DSP (2.0.1) */
1210 data = ioread32(pdo->prHPI_data); 1189 data = ioread32(pdo->prHPI_data);
@@ -1340,10 +1319,6 @@ static short hpi6000_message_response_sequence(struct hpi_adapter_obj *pao,
1340 u32 *p_data; 1319 u32 *p_data;
1341 u16 error = 0; 1320 u16 error = 0;
1342 1321
1343 /* does the DSP we are referencing exist? */
1344 if (dsp_index >= phw->num_dsp)
1345 return HPI6000_ERROR_MSG_INVALID_DSP_INDEX;
1346
1347 ack = hpi6000_wait_dsp_ack(pao, dsp_index, HPI_HIF_IDLE); 1322 ack = hpi6000_wait_dsp_ack(pao, dsp_index, HPI_HIF_IDLE);
1348 if (ack & HPI_HIF_ERROR_MASK) { 1323 if (ack & HPI_HIF_ERROR_MASK) {
1349 pao->dsp_crashed++; 1324 pao->dsp_crashed++;
@@ -1351,9 +1326,7 @@ static short hpi6000_message_response_sequence(struct hpi_adapter_obj *pao,
1351 } 1326 }
1352 pao->dsp_crashed = 0; 1327 pao->dsp_crashed = 0;
1353 1328
1354 /* send the message */ 1329 /* get the message address and size */
1355
1356 /* get the address and size */
1357 if (phw->message_buffer_address_on_dsp == 0) { 1330 if (phw->message_buffer_address_on_dsp == 0) {
1358 timeout = TIMEOUT; 1331 timeout = TIMEOUT;
1359 do { 1332 do {
@@ -1368,10 +1341,9 @@ static short hpi6000_message_response_sequence(struct hpi_adapter_obj *pao,
1368 } else 1341 } else
1369 address = phw->message_buffer_address_on_dsp; 1342 address = phw->message_buffer_address_on_dsp;
1370 1343
1371 /* dwLength = sizeof(struct hpi_message); */
1372 length = phm->size; 1344 length = phm->size;
1373 1345
1374 /* send it */ 1346 /* send the message */
1375 p_data = (u32 *)phm; 1347 p_data = (u32 *)phm;
1376 if (hpi6000_dsp_block_write32(pao, dsp_index, address, p_data, 1348 if (hpi6000_dsp_block_write32(pao, dsp_index, address, p_data,
1377 (u16)length / 4)) 1349 (u16)length / 4))
@@ -1385,7 +1357,7 @@ static short hpi6000_message_response_sequence(struct hpi_adapter_obj *pao,
1385 if (ack & HPI_HIF_ERROR_MASK) 1357 if (ack & HPI_HIF_ERROR_MASK)
1386 return HPI6000_ERROR_MSG_RESP_GET_RESP_ACK; 1358 return HPI6000_ERROR_MSG_RESP_GET_RESP_ACK;
1387 1359
1388 /* get the address and size */ 1360 /* get the response address */
1389 if (phw->response_buffer_address_on_dsp == 0) { 1361 if (phw->response_buffer_address_on_dsp == 0) {
1390 timeout = TIMEOUT; 1362 timeout = TIMEOUT;
1391 do { 1363 do {
@@ -1409,7 +1381,7 @@ static short hpi6000_message_response_sequence(struct hpi_adapter_obj *pao,
1409 if (!timeout) 1381 if (!timeout)
1410 length = sizeof(struct hpi_response); 1382 length = sizeof(struct hpi_response);
1411 1383
1412 /* get it */ 1384 /* get the response */
1413 p_data = (u32 *)phr; 1385 p_data = (u32 *)phr;
1414 if (hpi6000_dsp_block_read32(pao, dsp_index, address, p_data, 1386 if (hpi6000_dsp_block_read32(pao, dsp_index, address, p_data,
1415 (u16)length / 4)) 1387 (u16)length / 4))
@@ -1805,17 +1777,11 @@ static void hw_message(struct hpi_adapter_obj *pao, struct hpi_message *phm,
1805 hpios_dsplock_lock(pao); 1777 hpios_dsplock_lock(pao);
1806 error = hpi6000_message_response_sequence(pao, dsp_index, phm, phr); 1778 error = hpi6000_message_response_sequence(pao, dsp_index, phm, phr);
1807 1779
1808 /* maybe an error response */ 1780 if (error) /* something failed in the HPI/DSP interface */
1809 if (error) {
1810 /* something failed in the HPI/DSP interface */
1811 phr->error = error;
1812 /* just the header of the response is valid */
1813 phr->size = sizeof(struct hpi_response_header);
1814 goto err; 1781 goto err;
1815 }
1816 1782
1817 if (phr->error != 0) /* something failed in the DSP */ 1783 if (phr->error) /* something failed in the DSP */
1818 goto err; 1784 goto out;
1819 1785
1820 switch (phm->function) { 1786 switch (phm->function) {
1821 case HPI_OSTREAM_WRITE: 1787 case HPI_OSTREAM_WRITE:
@@ -1827,21 +1793,30 @@ static void hw_message(struct hpi_adapter_obj *pao, struct hpi_message *phm,
1827 error = hpi6000_get_data(pao, dsp_index, phm, phr); 1793 error = hpi6000_get_data(pao, dsp_index, phm, phr);
1828 break; 1794 break;
1829 case HPI_ADAPTER_GET_ASSERT: 1795 case HPI_ADAPTER_GET_ASSERT:
1830 phr->u.a.adapter_index = 0; /* dsp 0 default */ 1796 phr->u.ax.assert.dsp_index = 0; /* dsp 0 default */
1831 if (num_dsp == 2) { 1797 if (num_dsp == 2) {
1832 if (!phr->u.a.adapter_type) { 1798 if (!phr->u.ax.assert.count) {
1833 /* no assert from dsp 0, check dsp 1 */ 1799 /* no assert from dsp 0, check dsp 1 */
1834 error = hpi6000_message_response_sequence(pao, 1800 error = hpi6000_message_response_sequence(pao,
1835 1, phm, phr); 1801 1, phm, phr);
1836 phr->u.a.adapter_index = 1; 1802 phr->u.ax.assert.dsp_index = 1;
1837 } 1803 }
1838 } 1804 }
1839 } 1805 }
1840 1806
1841 if (error)
1842 phr->error = error;
1843
1844err: 1807err:
1808 if (error) {
1809 if (error >= HPI_ERROR_BACKEND_BASE) {
1810 phr->error = HPI_ERROR_DSP_COMMUNICATION;
1811 phr->specific_error = error;
1812 } else {
1813 phr->error = error;
1814 }
1815
1816 /* just the header of the response is valid */
1817 phr->size = sizeof(struct hpi_response_header);
1818 }
1819out:
1845 hpios_dsplock_unlock(pao); 1820 hpios_dsplock_unlock(pao);
1846 return; 1821 return;
1847} 1822}
diff --git a/sound/pci/asihpi/hpi6205.c b/sound/pci/asihpi/hpi6205.c
index 2672f6591ceb..620525bdac59 100644
--- a/sound/pci/asihpi/hpi6205.c
+++ b/sound/pci/asihpi/hpi6205.c
@@ -38,27 +38,26 @@
38 38
39/*****************************************************************************/ 39/*****************************************************************************/
40/* HPI6205 specific error codes */ 40/* HPI6205 specific error codes */
41#define HPI6205_ERROR_BASE 1000 41#define HPI6205_ERROR_BASE 1000 /* not actually used anywhere */
42/*#define HPI6205_ERROR_MEM_ALLOC 1001 */ 42
43/* operational/messaging errors */
44#define HPI6205_ERROR_MSG_RESP_IDLE_TIMEOUT 1015
45#define HPI6205_ERROR_MSG_RESP_TIMEOUT 1016
46
47/* initialization/bootload errors */
43#define HPI6205_ERROR_6205_NO_IRQ 1002 48#define HPI6205_ERROR_6205_NO_IRQ 1002
44#define HPI6205_ERROR_6205_INIT_FAILED 1003 49#define HPI6205_ERROR_6205_INIT_FAILED 1003
45/*#define HPI6205_ERROR_MISSING_DSPCODE 1004 */
46#define HPI6205_ERROR_UNKNOWN_PCI_DEVICE 1005
47#define HPI6205_ERROR_6205_REG 1006 50#define HPI6205_ERROR_6205_REG 1006
48#define HPI6205_ERROR_6205_DSPPAGE 1007 51#define HPI6205_ERROR_6205_DSPPAGE 1007
49#define HPI6205_ERROR_BAD_DSPINDEX 1008
50#define HPI6205_ERROR_C6713_HPIC 1009 52#define HPI6205_ERROR_C6713_HPIC 1009
51#define HPI6205_ERROR_C6713_HPIA 1010 53#define HPI6205_ERROR_C6713_HPIA 1010
52#define HPI6205_ERROR_C6713_PLL 1011 54#define HPI6205_ERROR_C6713_PLL 1011
53#define HPI6205_ERROR_DSP_INTMEM 1012 55#define HPI6205_ERROR_DSP_INTMEM 1012
54#define HPI6205_ERROR_DSP_EXTMEM 1013 56#define HPI6205_ERROR_DSP_EXTMEM 1013
55#define HPI6205_ERROR_DSP_PLD 1014 57#define HPI6205_ERROR_DSP_PLD 1014
56#define HPI6205_ERROR_MSG_RESP_IDLE_TIMEOUT 1015
57#define HPI6205_ERROR_MSG_RESP_TIMEOUT 1016
58#define HPI6205_ERROR_6205_EEPROM 1017 58#define HPI6205_ERROR_6205_EEPROM 1017
59#define HPI6205_ERROR_DSP_EMIF 1018 59#define HPI6205_ERROR_DSP_EMIF 1018
60 60
61#define hpi6205_error(dsp_index, err) (err)
62/*****************************************************************************/ 61/*****************************************************************************/
63/* for C6205 PCI i/f */ 62/* for C6205 PCI i/f */
64/* Host Status Register (HSR) bitfields */ 63/* Host Status Register (HSR) bitfields */
@@ -128,9 +127,6 @@ struct hpi_hw_obj {
128 u32 outstream_host_buffer_size[HPI_MAX_STREAMS]; 127 u32 outstream_host_buffer_size[HPI_MAX_STREAMS];
129 128
130 struct consistent_dma_area h_control_cache; 129 struct consistent_dma_area h_control_cache;
131 struct consistent_dma_area h_async_event_buffer;
132/* struct hpi_control_cache_single *pControlCache; */
133 struct hpi_async_event *p_async_event_buffer;
134 struct hpi_control_cache *p_cache; 130 struct hpi_control_cache *p_cache;
135}; 131};
136 132
@@ -208,8 +204,8 @@ static void instream_start(struct hpi_adapter_obj *pao,
208static u32 boot_loader_read_mem32(struct hpi_adapter_obj *pao, int dsp_index, 204static u32 boot_loader_read_mem32(struct hpi_adapter_obj *pao, int dsp_index,
209 u32 address); 205 u32 address);
210 206
211static u16 boot_loader_write_mem32(struct hpi_adapter_obj *pao, int dsp_index, 207static void boot_loader_write_mem32(struct hpi_adapter_obj *pao,
212 u32 address, u32 data); 208 int dsp_index, u32 address, u32 data);
213 209
214static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao, 210static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao,
215 int dsp_index); 211 int dsp_index);
@@ -229,17 +225,7 @@ static u16 boot_loader_test_pld(struct hpi_adapter_obj *pao, int dsp_index);
229 225
230static void subsys_message(struct hpi_message *phm, struct hpi_response *phr) 226static void subsys_message(struct hpi_message *phm, struct hpi_response *phr)
231{ 227{
232
233 switch (phm->function) { 228 switch (phm->function) {
234 case HPI_SUBSYS_OPEN:
235 case HPI_SUBSYS_CLOSE:
236 case HPI_SUBSYS_GET_INFO:
237 case HPI_SUBSYS_DRIVER_UNLOAD:
238 case HPI_SUBSYS_DRIVER_LOAD:
239 case HPI_SUBSYS_FIND_ADAPTERS:
240 /* messages that should not get here */
241 phr->error = HPI_ERROR_UNIMPLEMENTED;
242 break;
243 case HPI_SUBSYS_CREATE_ADAPTER: 229 case HPI_SUBSYS_CREATE_ADAPTER:
244 subsys_create_adapter(phm, phr); 230 subsys_create_adapter(phm, phr);
245 break; 231 break;
@@ -257,15 +243,22 @@ static void control_message(struct hpi_adapter_obj *pao,
257{ 243{
258 244
259 struct hpi_hw_obj *phw = pao->priv; 245 struct hpi_hw_obj *phw = pao->priv;
246 u16 pending_cache_error = 0;
260 247
261 switch (phm->function) { 248 switch (phm->function) {
262 case HPI_CONTROL_GET_STATE: 249 case HPI_CONTROL_GET_STATE:
263 if (pao->has_control_cache) { 250 if (pao->has_control_cache) {
264 rmb(); /* make sure we see updates DM_aed from DSP */ 251 rmb(); /* make sure we see updates DMAed from DSP */
265 if (hpi_check_control_cache(phw->p_cache, phm, phr)) 252 if (hpi_check_control_cache(phw->p_cache, phm, phr)) {
266 break; 253 break;
254 } else if (phm->u.c.attribute == HPI_METER_PEAK) {
255 pending_cache_error =
256 HPI_ERROR_CONTROL_CACHING;
257 }
267 } 258 }
268 hw_message(pao, phm, phr); 259 hw_message(pao, phm, phr);
260 if (pending_cache_error && !phr->error)
261 phr->error = pending_cache_error;
269 break; 262 break;
270 case HPI_CONTROL_GET_INFO: 263 case HPI_CONTROL_GET_INFO:
271 hw_message(pao, phm, phr); 264 hw_message(pao, phm, phr);
@@ -273,7 +266,8 @@ static void control_message(struct hpi_adapter_obj *pao,
273 case HPI_CONTROL_SET_STATE: 266 case HPI_CONTROL_SET_STATE:
274 hw_message(pao, phm, phr); 267 hw_message(pao, phm, phr);
275 if (pao->has_control_cache) 268 if (pao->has_control_cache)
276 hpi_sync_control_cache(phw->p_cache, phm, phr); 269 hpi_cmn_control_cache_sync_to_msg(phw->p_cache, phm,
270 phr);
277 break; 271 break;
278 default: 272 default:
279 phr->error = HPI_ERROR_INVALID_FUNC; 273 phr->error = HPI_ERROR_INVALID_FUNC;
@@ -296,9 +290,9 @@ static void outstream_message(struct hpi_adapter_obj *pao,
296{ 290{
297 291
298 if (phm->obj_index >= HPI_MAX_STREAMS) { 292 if (phm->obj_index >= HPI_MAX_STREAMS) {
299 phr->error = HPI_ERROR_INVALID_STREAM; 293 phr->error = HPI_ERROR_INVALID_OBJ_INDEX;
300 HPI_DEBUG_LOG(WARNING, 294 HPI_DEBUG_LOG(WARNING,
301 "message referencing invalid stream %d " 295 "Message referencing invalid stream %d "
302 "on adapter index %d\n", phm->obj_index, 296 "on adapter index %d\n", phm->obj_index,
303 phm->adapter_index); 297 phm->adapter_index);
304 return; 298 return;
@@ -340,9 +334,9 @@ static void instream_message(struct hpi_adapter_obj *pao,
340{ 334{
341 335
342 if (phm->obj_index >= HPI_MAX_STREAMS) { 336 if (phm->obj_index >= HPI_MAX_STREAMS) {
343 phr->error = HPI_ERROR_INVALID_STREAM; 337 phr->error = HPI_ERROR_INVALID_OBJ_INDEX;
344 HPI_DEBUG_LOG(WARNING, 338 HPI_DEBUG_LOG(WARNING,
345 "message referencing invalid stream %d " 339 "Message referencing invalid stream %d "
346 "on adapter index %d\n", phm->obj_index, 340 "on adapter index %d\n", phm->obj_index,
347 phm->adapter_index); 341 phm->adapter_index);
348 return; 342 return;
@@ -385,8 +379,8 @@ void HPI_6205(struct hpi_message *phm, struct hpi_response *phr)
385 * All other messages are ignored unless the adapter index matches 379 * All other messages are ignored unless the adapter index matches
386 * an adapter in the HPI 380 * an adapter in the HPI
387 */ 381 */
388 HPI_DEBUG_LOG(DEBUG, "HPI obj=%d, func=%d\n", phm->object, 382 /* HPI_DEBUG_LOG(DEBUG, "HPI Obj=%d, Func=%d\n", phm->wObject,
389 phm->function); 383 phm->wFunction); */
390 384
391 /* if Dsp has crashed then do not communicate with it any more */ 385 /* if Dsp has crashed then do not communicate with it any more */
392 if (phm->object != HPI_OBJ_SUBSYSTEM) { 386 if (phm->object != HPI_OBJ_SUBSYSTEM) {
@@ -411,8 +405,7 @@ void HPI_6205(struct hpi_message *phm, struct hpi_response *phr)
411 405
412 /* Init default response */ 406 /* Init default response */
413 if (phm->function != HPI_SUBSYS_CREATE_ADAPTER) 407 if (phm->function != HPI_SUBSYS_CREATE_ADAPTER)
414 hpi_init_response(phr, phm->object, phm->function, 408 phr->error = HPI_ERROR_PROCESSING_MESSAGE;
415 HPI_ERROR_PROCESSING_MESSAGE);
416 409
417 HPI_DEBUG_LOG(VERBOSE, "start of switch\n"); 410 HPI_DEBUG_LOG(VERBOSE, "start of switch\n");
418 switch (phm->type) { 411 switch (phm->type) {
@@ -423,9 +416,6 @@ void HPI_6205(struct hpi_message *phm, struct hpi_response *phr)
423 break; 416 break;
424 417
425 case HPI_OBJ_ADAPTER: 418 case HPI_OBJ_ADAPTER:
426 phr->size =
427 sizeof(struct hpi_response_header) +
428 sizeof(struct hpi_adapter_res);
429 adapter_message(pao, phm, phr); 419 adapter_message(pao, phm, phr);
430 break; 420 break;
431 421
@@ -474,14 +464,6 @@ static void subsys_create_adapter(struct hpi_message *phm,
474 464
475 memset(&ao, 0, sizeof(ao)); 465 memset(&ao, 0, sizeof(ao));
476 466
477 /* this HPI only creates adapters for TI/PCI devices */
478 if (phm->u.s.resource.bus_type != HPI_BUS_PCI)
479 return;
480 if (phm->u.s.resource.r.pci->vendor_id != HPI_PCI_VENDOR_ID_TI)
481 return;
482 if (phm->u.s.resource.r.pci->device_id != HPI_PCI_DEV_ID_DSP6205)
483 return;
484
485 ao.priv = kzalloc(sizeof(struct hpi_hw_obj), GFP_KERNEL); 467 ao.priv = kzalloc(sizeof(struct hpi_hw_obj), GFP_KERNEL);
486 if (!ao.priv) { 468 if (!ao.priv) {
487 HPI_DEBUG_LOG(ERROR, "cant get mem for adapter object\n"); 469 HPI_DEBUG_LOG(ERROR, "cant get mem for adapter object\n");
@@ -491,18 +473,20 @@ static void subsys_create_adapter(struct hpi_message *phm,
491 473
492 ao.pci = *phm->u.s.resource.r.pci; 474 ao.pci = *phm->u.s.resource.r.pci;
493 err = create_adapter_obj(&ao, &os_error_code); 475 err = create_adapter_obj(&ao, &os_error_code);
494 if (!err)
495 err = hpi_add_adapter(&ao);
496 if (err) { 476 if (err) {
497 phr->u.s.data = os_error_code;
498 delete_adapter_obj(&ao); 477 delete_adapter_obj(&ao);
499 phr->error = err; 478 if (err >= HPI_ERROR_BACKEND_BASE) {
479 phr->error = HPI_ERROR_DSP_BOOTLOAD;
480 phr->specific_error = err;
481 } else {
482 phr->error = err;
483 }
484 phr->u.s.data = os_error_code;
500 return; 485 return;
501 } 486 }
502 487
503 phr->u.s.aw_adapter_list[ao.index] = ao.adapter_type; 488 phr->u.s.adapter_type = ao.adapter_type;
504 phr->u.s.adapter_index = ao.index; 489 phr->u.s.adapter_index = ao.index;
505 phr->u.s.num_adapters++;
506 phr->error = 0; 490 phr->error = 0;
507} 491}
508 492
@@ -513,7 +497,7 @@ static void subsys_delete_adapter(struct hpi_message *phm,
513 struct hpi_adapter_obj *pao; 497 struct hpi_adapter_obj *pao;
514 struct hpi_hw_obj *phw; 498 struct hpi_hw_obj *phw;
515 499
516 pao = hpi_find_adapter(phm->adapter_index); 500 pao = hpi_find_adapter(phm->obj_index);
517 if (!pao) { 501 if (!pao) {
518 phr->error = HPI_ERROR_INVALID_OBJ_INDEX; 502 phr->error = HPI_ERROR_INVALID_OBJ_INDEX;
519 return; 503 return;
@@ -526,6 +510,7 @@ static void subsys_delete_adapter(struct hpi_message *phm,
526 iowrite32(C6205_HDCR_WARMRESET, phw->prHDCR); 510 iowrite32(C6205_HDCR_WARMRESET, phw->prHDCR);
527 511
528 delete_adapter_obj(pao); 512 delete_adapter_obj(pao);
513 hpi_delete_adapter(pao);
529 phr->error = 0; 514 phr->error = 0;
530} 515}
531 516
@@ -538,10 +523,6 @@ static u16 create_adapter_obj(struct hpi_adapter_obj *pao,
538 struct hpi_hw_obj *phw = pao->priv; 523 struct hpi_hw_obj *phw = pao->priv;
539 struct bus_master_interface *interface; 524 struct bus_master_interface *interface;
540 u32 phys_addr; 525 u32 phys_addr;
541#ifndef HPI6205_NO_HSR_POLL
542 u32 time_out = HPI6205_TIMEOUT;
543 u32 temp1;
544#endif
545 int i; 526 int i;
546 u16 err; 527 u16 err;
547 528
@@ -566,7 +547,7 @@ static u16 create_adapter_obj(struct hpi_adapter_obj *pao,
566 547
567 if (hpios_locked_mem_alloc(&phw->h_locked_mem, 548 if (hpios_locked_mem_alloc(&phw->h_locked_mem,
568 sizeof(struct bus_master_interface), 549 sizeof(struct bus_master_interface),
569 pao->pci.p_os_data)) 550 pao->pci.pci_dev))
570 phw->p_interface_buffer = NULL; 551 phw->p_interface_buffer = NULL;
571 else if (hpios_locked_mem_get_virt_addr(&phw->h_locked_mem, 552 else if (hpios_locked_mem_get_virt_addr(&phw->h_locked_mem,
572 (void *)&phw->p_interface_buffer)) 553 (void *)&phw->p_interface_buffer))
@@ -591,49 +572,29 @@ static u16 create_adapter_obj(struct hpi_adapter_obj *pao,
591 572
592 /* allow boot load even if mem alloc wont work */ 573 /* allow boot load even if mem alloc wont work */
593 if (!phw->p_interface_buffer) 574 if (!phw->p_interface_buffer)
594 return hpi6205_error(0, HPI_ERROR_MEMORY_ALLOC); 575 return HPI_ERROR_MEMORY_ALLOC;
595 576
596 interface = phw->p_interface_buffer; 577 interface = phw->p_interface_buffer;
597 578
598#ifndef HPI6205_NO_HSR_POLL
599 /* wait for first interrupt indicating the DSP init is done */
600 time_out = HPI6205_TIMEOUT * 10;
601 temp1 = 0;
602 while (((temp1 & C6205_HSR_INTSRC) == 0) && --time_out)
603 temp1 = ioread32(phw->prHSR);
604
605 if (temp1 & C6205_HSR_INTSRC)
606 HPI_DEBUG_LOG(INFO,
607 "interrupt confirming DSP code running OK\n");
608 else {
609 HPI_DEBUG_LOG(ERROR,
610 "timed out waiting for interrupt "
611 "confirming DSP code running\n");
612 return hpi6205_error(0, HPI6205_ERROR_6205_NO_IRQ);
613 }
614
615 /* reset the interrupt */
616 iowrite32(C6205_HSR_INTSRC, phw->prHSR);
617#endif
618
619 /* make sure the DSP has started ok */ 579 /* make sure the DSP has started ok */
620 if (!wait_dsp_ack(phw, H620_HIF_RESET, HPI6205_TIMEOUT * 10)) { 580 if (!wait_dsp_ack(phw, H620_HIF_RESET, HPI6205_TIMEOUT * 10)) {
621 HPI_DEBUG_LOG(ERROR, "timed out waiting reset state \n"); 581 HPI_DEBUG_LOG(ERROR, "timed out waiting reset state \n");
622 return hpi6205_error(0, HPI6205_ERROR_6205_INIT_FAILED); 582 return HPI6205_ERROR_6205_INIT_FAILED;
623 } 583 }
624 /* Note that *pao, *phw are zeroed after allocation, 584 /* Note that *pao, *phw are zeroed after allocation,
625 * so pointers and flags are NULL by default. 585 * so pointers and flags are NULL by default.
626 * Allocate bus mastering control cache buffer and tell the DSP about it 586 * Allocate bus mastering control cache buffer and tell the DSP about it
627 */ 587 */
628 if (interface->control_cache.number_of_controls) { 588 if (interface->control_cache.number_of_controls) {
629 void *p_control_cache_virtual; 589 u8 *p_control_cache_virtual;
630 590
631 err = hpios_locked_mem_alloc(&phw->h_control_cache, 591 err = hpios_locked_mem_alloc(&phw->h_control_cache,
632 interface->control_cache.size_in_bytes, 592 interface->control_cache.size_in_bytes,
633 pao->pci.p_os_data); 593 pao->pci.pci_dev);
634 if (!err) 594 if (!err)
635 err = hpios_locked_mem_get_virt_addr(&phw-> 595 err = hpios_locked_mem_get_virt_addr(&phw->
636 h_control_cache, &p_control_cache_virtual); 596 h_control_cache,
597 (void *)&p_control_cache_virtual);
637 if (!err) { 598 if (!err) {
638 memset(p_control_cache_virtual, 0, 599 memset(p_control_cache_virtual, 0,
639 interface->control_cache.size_in_bytes); 600 interface->control_cache.size_in_bytes);
@@ -642,7 +603,6 @@ static u16 create_adapter_obj(struct hpi_adapter_obj *pao,
642 hpi_alloc_control_cache(interface-> 603 hpi_alloc_control_cache(interface->
643 control_cache.number_of_controls, 604 control_cache.number_of_controls,
644 interface->control_cache.size_in_bytes, 605 interface->control_cache.size_in_bytes,
645 (struct hpi_control_cache_info *)
646 p_control_cache_virtual); 606 p_control_cache_virtual);
647 if (!phw->p_cache) 607 if (!phw->p_cache)
648 err = HPI_ERROR_MEMORY_ALLOC; 608 err = HPI_ERROR_MEMORY_ALLOC;
@@ -662,78 +622,56 @@ static u16 create_adapter_obj(struct hpi_adapter_obj *pao,
662 pao->has_control_cache = 0; 622 pao->has_control_cache = 0;
663 } 623 }
664 } 624 }
665 /* allocate bus mastering async buffer and tell the DSP about it */
666 if (interface->async_buffer.b.size) {
667 err = hpios_locked_mem_alloc(&phw->h_async_event_buffer,
668 interface->async_buffer.b.size *
669 sizeof(struct hpi_async_event), pao->pci.p_os_data);
670 if (!err)
671 err = hpios_locked_mem_get_virt_addr
672 (&phw->h_async_event_buffer, (void *)
673 &phw->p_async_event_buffer);
674 if (!err)
675 memset((void *)phw->p_async_event_buffer, 0,
676 interface->async_buffer.b.size *
677 sizeof(struct hpi_async_event));
678 if (!err) {
679 err = hpios_locked_mem_get_phys_addr
680 (&phw->h_async_event_buffer, &phys_addr);
681 interface->async_buffer.physical_address32 =
682 phys_addr;
683 }
684 if (err) {
685 if (hpios_locked_mem_valid(&phw->
686 h_async_event_buffer)) {
687 hpios_locked_mem_free
688 (&phw->h_async_event_buffer);
689 phw->p_async_event_buffer = NULL;
690 }
691 }
692 }
693 send_dsp_command(phw, H620_HIF_IDLE); 625 send_dsp_command(phw, H620_HIF_IDLE);
694 626
695 { 627 {
696 struct hpi_message hM; 628 struct hpi_message hm;
697 struct hpi_response hR; 629 struct hpi_response hr;
698 u32 max_streams; 630 u32 max_streams;
699 631
700 HPI_DEBUG_LOG(VERBOSE, "init ADAPTER_GET_INFO\n"); 632 HPI_DEBUG_LOG(VERBOSE, "init ADAPTER_GET_INFO\n");
701 memset(&hM, 0, sizeof(hM)); 633 memset(&hm, 0, sizeof(hm));
702 hM.type = HPI_TYPE_MESSAGE; 634 hm.type = HPI_TYPE_MESSAGE;
703 hM.size = sizeof(hM); 635 hm.size = sizeof(hm);
704 hM.object = HPI_OBJ_ADAPTER; 636 hm.object = HPI_OBJ_ADAPTER;
705 hM.function = HPI_ADAPTER_GET_INFO; 637 hm.function = HPI_ADAPTER_GET_INFO;
706 hM.adapter_index = 0; 638 hm.adapter_index = 0;
707 memset(&hR, 0, sizeof(hR)); 639 memset(&hr, 0, sizeof(hr));
708 hR.size = sizeof(hR); 640 hr.size = sizeof(hr);
709 641
710 err = message_response_sequence(pao, &hM, &hR); 642 err = message_response_sequence(pao, &hm, &hr);
711 if (err) { 643 if (err) {
712 HPI_DEBUG_LOG(ERROR, "message transport error %d\n", 644 HPI_DEBUG_LOG(ERROR, "message transport error %d\n",
713 err); 645 err);
714 return err; 646 return err;
715 } 647 }
716 if (hR.error) 648 if (hr.error)
717 return hR.error; 649 return hr.error;
718 650
719 pao->adapter_type = hR.u.a.adapter_type; 651 pao->adapter_type = hr.u.ax.info.adapter_type;
720 pao->index = hR.u.a.adapter_index; 652 pao->index = hr.u.ax.info.adapter_index;
721 653
722 max_streams = hR.u.a.num_outstreams + hR.u.a.num_instreams; 654 max_streams =
655 hr.u.ax.info.num_outstreams +
656 hr.u.ax.info.num_instreams;
723 657
724 hpios_locked_mem_prepare((max_streams * 6) / 10, max_streams, 658 hpios_locked_mem_prepare((max_streams * 6) / 10, max_streams,
725 65536, pao->pci.p_os_data); 659 65536, pao->pci.pci_dev);
726 660
727 HPI_DEBUG_LOG(VERBOSE, 661 HPI_DEBUG_LOG(VERBOSE,
728 "got adapter info type %x index %d serial %d\n", 662 "got adapter info type %x index %d serial %d\n",
729 hR.u.a.adapter_type, hR.u.a.adapter_index, 663 hr.u.ax.info.adapter_type, hr.u.ax.info.adapter_index,
730 hR.u.a.serial_number); 664 hr.u.ax.info.serial_number);
731 } 665 }
732 666
733 pao->open = 0; /* upon creation the adapter is closed */ 667 pao->open = 0; /* upon creation the adapter is closed */
734 668
669 if (phw->p_cache)
670 phw->p_cache->adap_idx = pao->index;
671
735 HPI_DEBUG_LOG(INFO, "bootload DSP OK\n"); 672 HPI_DEBUG_LOG(INFO, "bootload DSP OK\n");
736 return 0; 673
674 return hpi_add_adapter(pao);
737} 675}
738 676
739/** Free memory areas allocated by adapter 677/** Free memory areas allocated by adapter
@@ -747,11 +685,6 @@ static void delete_adapter_obj(struct hpi_adapter_obj *pao)
747 685
748 phw = pao->priv; 686 phw = pao->priv;
749 687
750 if (hpios_locked_mem_valid(&phw->h_async_event_buffer)) {
751 hpios_locked_mem_free(&phw->h_async_event_buffer);
752 phw->p_async_event_buffer = NULL;
753 }
754
755 if (hpios_locked_mem_valid(&phw->h_control_cache)) { 688 if (hpios_locked_mem_valid(&phw->h_control_cache)) {
756 hpios_locked_mem_free(&phw->h_control_cache); 689 hpios_locked_mem_free(&phw->h_control_cache);
757 hpi_free_control_cache(phw->p_cache); 690 hpi_free_control_cache(phw->p_cache);
@@ -776,13 +709,15 @@ static void delete_adapter_obj(struct hpi_adapter_obj *pao)
776 phw->outstream_host_buffer_size[i] = 0; 709 phw->outstream_host_buffer_size[i] = 0;
777 } 710 }
778 711
779 hpios_locked_mem_unprepare(pao->pci.p_os_data); 712 hpios_locked_mem_unprepare(pao->pci.pci_dev);
780 713
781 hpi_delete_adapter(pao);
782 kfree(phw); 714 kfree(phw);
783} 715}
784 716
785/*****************************************************************************/ 717/*****************************************************************************/
718/* Adapter functions */
719
720/*****************************************************************************/
786/* OutStream Host buffer functions */ 721/* OutStream Host buffer functions */
787 722
788/** Allocate or attach buffer for busmastering 723/** Allocate or attach buffer for busmastering
@@ -824,7 +759,7 @@ static void outstream_host_buffer_allocate(struct hpi_adapter_obj *pao,
824 759
825 err = hpios_locked_mem_alloc(&phw->outstream_host_buffers 760 err = hpios_locked_mem_alloc(&phw->outstream_host_buffers
826 [phm->obj_index], phm->u.d.u.buffer.buffer_size, 761 [phm->obj_index], phm->u.d.u.buffer.buffer_size,
827 pao->pci.p_os_data); 762 pao->pci.pci_dev);
828 763
829 if (err) { 764 if (err) {
830 phr->error = HPI_ERROR_INVALID_DATASIZE; 765 phr->error = HPI_ERROR_INVALID_DATASIZE;
@@ -861,7 +796,7 @@ static void outstream_host_buffer_allocate(struct hpi_adapter_obj *pao,
861 if (phm->u.d.u.buffer.buffer_size & (phm->u.d.u.buffer. 796 if (phm->u.d.u.buffer.buffer_size & (phm->u.d.u.buffer.
862 buffer_size - 1)) { 797 buffer_size - 1)) {
863 HPI_DEBUG_LOG(ERROR, 798 HPI_DEBUG_LOG(ERROR,
864 "buffer size must be 2^N not %d\n", 799 "Buffer size must be 2^N not %d\n",
865 phm->u.d.u.buffer.buffer_size); 800 phm->u.d.u.buffer.buffer_size);
866 phr->error = HPI_ERROR_INVALID_DATASIZE; 801 phr->error = HPI_ERROR_INVALID_DATASIZE;
867 return; 802 return;
@@ -875,6 +810,7 @@ static void outstream_host_buffer_allocate(struct hpi_adapter_obj *pao,
875 status->dSP_index = 0; 810 status->dSP_index = 0;
876 status->host_index = status->dSP_index; 811 status->host_index = status->dSP_index;
877 status->size_in_bytes = phm->u.d.u.buffer.buffer_size; 812 status->size_in_bytes = phm->u.d.u.buffer.buffer_size;
813 status->auxiliary_data_available = 0;
878 814
879 hw_message(pao, phm, phr); 815 hw_message(pao, phm, phr);
880 816
@@ -966,51 +902,6 @@ static void outstream_write(struct hpi_adapter_obj *pao,
966 hpi_init_response(phr, phm->object, phm->function, 0); 902 hpi_init_response(phr, phm->object, phm->function, 0);
967 status = &interface->outstream_host_buffer_status[phm->obj_index]; 903 status = &interface->outstream_host_buffer_status[phm->obj_index];
968 904
969 if (phw->flag_outstream_just_reset[phm->obj_index]) {
970 /* First OutStremWrite() call following reset will write data to the
971 adapter's buffers, reducing delay before stream can start. The DSP
972 takes care of setting the stream data format using format information
973 embedded in phm.
974 */
975 int partial_write = 0;
976 unsigned int original_size = 0;
977
978 phw->flag_outstream_just_reset[phm->obj_index] = 0;
979
980 /* Send the first buffer to the DSP the old way. */
981 /* Limit size of first transfer - */
982 /* expect that this will not usually be triggered. */
983 if (phm->u.d.u.data.data_size > HPI6205_SIZEOF_DATA) {
984 partial_write = 1;
985 original_size = phm->u.d.u.data.data_size;
986 phm->u.d.u.data.data_size = HPI6205_SIZEOF_DATA;
987 }
988 /* write it */
989 phm->function = HPI_OSTREAM_WRITE;
990 hw_message(pao, phm, phr);
991
992 if (phr->error)
993 return;
994
995 /* update status information that the DSP would typically
996 * update (and will update next time the DSP
997 * buffer update task reads data from the host BBM buffer)
998 */
999 status->auxiliary_data_available = phm->u.d.u.data.data_size;
1000 status->host_index += phm->u.d.u.data.data_size;
1001 status->dSP_index += phm->u.d.u.data.data_size;
1002
1003 /* if we did a full write, we can return from here. */
1004 if (!partial_write)
1005 return;
1006
1007 /* tweak buffer parameters and let the rest of the */
1008 /* buffer land in internal BBM buffer */
1009 phm->u.d.u.data.data_size =
1010 original_size - HPI6205_SIZEOF_DATA;
1011 phm->u.d.u.data.pb_data += HPI6205_SIZEOF_DATA;
1012 }
1013
1014 space_available = outstream_get_space_available(status); 905 space_available = outstream_get_space_available(status);
1015 if (space_available < phm->u.d.u.data.data_size) { 906 if (space_available < phm->u.d.u.data.data_size) {
1016 phr->error = HPI_ERROR_INVALID_DATASIZE; 907 phr->error = HPI_ERROR_INVALID_DATASIZE;
@@ -1047,6 +938,24 @@ static void outstream_write(struct hpi_adapter_obj *pao,
1047 memcpy(p_bbm_data, p_app_data + l_first_write, 938 memcpy(p_bbm_data, p_app_data + l_first_write,
1048 phm->u.d.u.data.data_size - l_first_write); 939 phm->u.d.u.data.data_size - l_first_write);
1049 } 940 }
941
942 /*
943 * This version relies on the DSP code triggering an OStream buffer
944 * update immediately following a SET_FORMAT call. The host has
945 * already written data into the BBM buffer, but the DSP won't know
946 * about it until dwHostIndex is adjusted.
947 */
948 if (phw->flag_outstream_just_reset[phm->obj_index]) {
949 /* Format can only change after reset. Must tell DSP. */
950 u16 function = phm->function;
951 phw->flag_outstream_just_reset[phm->obj_index] = 0;
952 phm->function = HPI_OSTREAM_SET_FORMAT;
953 hw_message(pao, phm, phr); /* send the format to the DSP */
954 phm->function = function;
955 if (phr->error)
956 return;
957 }
958
1050 status->host_index += phm->u.d.u.data.data_size; 959 status->host_index += phm->u.d.u.data.data_size;
1051} 960}
1052 961
@@ -1132,7 +1041,7 @@ static void instream_host_buffer_allocate(struct hpi_adapter_obj *pao,
1132 1041
1133 err = hpios_locked_mem_alloc(&phw->instream_host_buffers[phm-> 1042 err = hpios_locked_mem_alloc(&phw->instream_host_buffers[phm->
1134 obj_index], phm->u.d.u.buffer.buffer_size, 1043 obj_index], phm->u.d.u.buffer.buffer_size,
1135 pao->pci.p_os_data); 1044 pao->pci.pci_dev);
1136 1045
1137 if (err) { 1046 if (err) {
1138 phr->error = HPI_ERROR_INVALID_DATASIZE; 1047 phr->error = HPI_ERROR_INVALID_DATASIZE;
@@ -1163,7 +1072,7 @@ static void instream_host_buffer_allocate(struct hpi_adapter_obj *pao,
1163 if (phm->u.d.u.buffer.buffer_size & (phm->u.d.u.buffer. 1072 if (phm->u.d.u.buffer.buffer_size & (phm->u.d.u.buffer.
1164 buffer_size - 1)) { 1073 buffer_size - 1)) {
1165 HPI_DEBUG_LOG(ERROR, 1074 HPI_DEBUG_LOG(ERROR,
1166 "buffer size must be 2^N not %d\n", 1075 "Buffer size must be 2^N not %d\n",
1167 phm->u.d.u.buffer.buffer_size); 1076 phm->u.d.u.buffer.buffer_size);
1168 phr->error = HPI_ERROR_INVALID_DATASIZE; 1077 phr->error = HPI_ERROR_INVALID_DATASIZE;
1169 return; 1078 return;
@@ -1178,8 +1087,10 @@ static void instream_host_buffer_allocate(struct hpi_adapter_obj *pao,
1178 status->dSP_index = 0; 1087 status->dSP_index = 0;
1179 status->host_index = status->dSP_index; 1088 status->host_index = status->dSP_index;
1180 status->size_in_bytes = phm->u.d.u.buffer.buffer_size; 1089 status->size_in_bytes = phm->u.d.u.buffer.buffer_size;
1090 status->auxiliary_data_available = 0;
1181 1091
1182 hw_message(pao, phm, phr); 1092 hw_message(pao, phm, phr);
1093
1183 if (phr->error 1094 if (phr->error
1184 && hpios_locked_mem_valid(&phw-> 1095 && hpios_locked_mem_valid(&phw->
1185 instream_host_buffers[phm->obj_index])) { 1096 instream_host_buffers[phm->obj_index])) {
@@ -1344,33 +1255,36 @@ static u16 adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
1344 struct hpi_hw_obj *phw = pao->priv; 1255 struct hpi_hw_obj *phw = pao->priv;
1345 struct dsp_code dsp_code; 1256 struct dsp_code dsp_code;
1346 u16 boot_code_id[HPI6205_MAX_FILES_TO_LOAD]; 1257 u16 boot_code_id[HPI6205_MAX_FILES_TO_LOAD];
1347 u16 firmware_id = pao->pci.subsys_device_id;
1348 u32 temp; 1258 u32 temp;
1349 int dsp = 0, i = 0; 1259 int dsp = 0, i = 0;
1350 u16 err = 0; 1260 u16 err = 0;
1351 1261
1352 boot_code_id[0] = HPI_ADAPTER_ASI(0x6205); 1262 boot_code_id[0] = HPI_ADAPTER_ASI(0x6205);
1353 1263
1354 /* special cases where firmware_id != subsys ID */ 1264 boot_code_id[1] = pao->pci.pci_dev->subsystem_device;
1355 switch (firmware_id) { 1265 boot_code_id[1] = HPI_ADAPTER_FAMILY_ASI(boot_code_id[1]);
1266
1267 /* fix up cases where bootcode id[1] != subsys id */
1268 switch (boot_code_id[1]) {
1356 case HPI_ADAPTER_FAMILY_ASI(0x5000): 1269 case HPI_ADAPTER_FAMILY_ASI(0x5000):
1357 boot_code_id[0] = firmware_id; 1270 boot_code_id[0] = boot_code_id[1];
1358 firmware_id = 0; 1271 boot_code_id[1] = 0;
1359 break; 1272 break;
1360 case HPI_ADAPTER_FAMILY_ASI(0x5300): 1273 case HPI_ADAPTER_FAMILY_ASI(0x5300):
1361 case HPI_ADAPTER_FAMILY_ASI(0x5400): 1274 case HPI_ADAPTER_FAMILY_ASI(0x5400):
1362 case HPI_ADAPTER_FAMILY_ASI(0x6300): 1275 case HPI_ADAPTER_FAMILY_ASI(0x6300):
1363 firmware_id = HPI_ADAPTER_FAMILY_ASI(0x6400); 1276 boot_code_id[1] = HPI_ADAPTER_FAMILY_ASI(0x6400);
1364 break; 1277 break;
1365 case HPI_ADAPTER_FAMILY_ASI(0x5600): 1278 case HPI_ADAPTER_FAMILY_ASI(0x5600):
1366 case HPI_ADAPTER_FAMILY_ASI(0x6500): 1279 case HPI_ADAPTER_FAMILY_ASI(0x6500):
1367 firmware_id = HPI_ADAPTER_FAMILY_ASI(0x6600); 1280 boot_code_id[1] = HPI_ADAPTER_FAMILY_ASI(0x6600);
1368 break; 1281 break;
1369 case HPI_ADAPTER_FAMILY_ASI(0x8800): 1282 case HPI_ADAPTER_FAMILY_ASI(0x8800):
1370 firmware_id = HPI_ADAPTER_FAMILY_ASI(0x8900); 1283 boot_code_id[1] = HPI_ADAPTER_FAMILY_ASI(0x8900);
1284 break;
1285 default:
1371 break; 1286 break;
1372 } 1287 }
1373 boot_code_id[1] = firmware_id;
1374 1288
1375 /* reset DSP by writing a 1 to the WARMRESET bit */ 1289 /* reset DSP by writing a 1 to the WARMRESET bit */
1376 temp = C6205_HDCR_WARMRESET; 1290 temp = C6205_HDCR_WARMRESET;
@@ -1381,7 +1295,7 @@ static u16 adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
1381 temp = ioread32(phw->prHSR); 1295 temp = ioread32(phw->prHSR);
1382 if ((temp & (C6205_HSR_CFGERR | C6205_HSR_EEREAD)) != 1296 if ((temp & (C6205_HSR_CFGERR | C6205_HSR_EEREAD)) !=
1383 C6205_HSR_EEREAD) 1297 C6205_HSR_EEREAD)
1384 return hpi6205_error(0, HPI6205_ERROR_6205_EEPROM); 1298 return HPI6205_ERROR_6205_EEPROM;
1385 temp |= 0x04; 1299 temp |= 0x04;
1386 /* disable PINTA interrupt */ 1300 /* disable PINTA interrupt */
1387 iowrite32(temp, phw->prHSR); 1301 iowrite32(temp, phw->prHSR);
@@ -1389,27 +1303,27 @@ static u16 adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
1389 /* check control register reports PCI boot mode */ 1303 /* check control register reports PCI boot mode */
1390 temp = ioread32(phw->prHDCR); 1304 temp = ioread32(phw->prHDCR);
1391 if (!(temp & C6205_HDCR_PCIBOOT)) 1305 if (!(temp & C6205_HDCR_PCIBOOT))
1392 return hpi6205_error(0, HPI6205_ERROR_6205_REG); 1306 return HPI6205_ERROR_6205_REG;
1393 1307
1394 /* try writing a couple of numbers to the DSP page register */ 1308 /* try writing a few numbers to the DSP page register */
1395 /* and reading them back. */ 1309 /* and reading them back. */
1396 temp = 1; 1310 temp = 3;
1397 iowrite32(temp, phw->prDSPP); 1311 iowrite32(temp, phw->prDSPP);
1398 if ((temp | C6205_DSPP_MAP1) != ioread32(phw->prDSPP)) 1312 if ((temp | C6205_DSPP_MAP1) != ioread32(phw->prDSPP))
1399 return hpi6205_error(0, HPI6205_ERROR_6205_DSPPAGE); 1313 return HPI6205_ERROR_6205_DSPPAGE;
1400 temp = 2; 1314 temp = 2;
1401 iowrite32(temp, phw->prDSPP); 1315 iowrite32(temp, phw->prDSPP);
1402 if ((temp | C6205_DSPP_MAP1) != ioread32(phw->prDSPP)) 1316 if ((temp | C6205_DSPP_MAP1) != ioread32(phw->prDSPP))
1403 return hpi6205_error(0, HPI6205_ERROR_6205_DSPPAGE); 1317 return HPI6205_ERROR_6205_DSPPAGE;
1404 temp = 3; 1318 temp = 1;
1405 iowrite32(temp, phw->prDSPP); 1319 iowrite32(temp, phw->prDSPP);
1406 if ((temp | C6205_DSPP_MAP1) != ioread32(phw->prDSPP)) 1320 if ((temp | C6205_DSPP_MAP1) != ioread32(phw->prDSPP))
1407 return hpi6205_error(0, HPI6205_ERROR_6205_DSPPAGE); 1321 return HPI6205_ERROR_6205_DSPPAGE;
1408 /* reset DSP page to the correct number */ 1322 /* reset DSP page to the correct number */
1409 temp = 0; 1323 temp = 0;
1410 iowrite32(temp, phw->prDSPP); 1324 iowrite32(temp, phw->prDSPP);
1411 if ((temp | C6205_DSPP_MAP1) != ioread32(phw->prDSPP)) 1325 if ((temp | C6205_DSPP_MAP1) != ioread32(phw->prDSPP))
1412 return hpi6205_error(0, HPI6205_ERROR_6205_DSPPAGE); 1326 return HPI6205_ERROR_6205_DSPPAGE;
1413 phw->dsp_page = 0; 1327 phw->dsp_page = 0;
1414 1328
1415 /* release 6713 from reset before 6205 is bootloaded. 1329 /* release 6713 from reset before 6205 is bootloaded.
@@ -1455,7 +1369,7 @@ static u16 adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
1455 return err; 1369 return err;
1456 1370
1457 /* write the DSP code down into the DSPs memory */ 1371 /* write the DSP code down into the DSPs memory */
1458 dsp_code.ps_dev = pao->pci.p_os_data; 1372 dsp_code.ps_dev = pao->pci.pci_dev;
1459 err = hpi_dsp_code_open(boot_code_id[dsp], &dsp_code, 1373 err = hpi_dsp_code_open(boot_code_id[dsp], &dsp_code,
1460 pos_error_code); 1374 pos_error_code);
1461 if (err) 1375 if (err)
@@ -1484,10 +1398,8 @@ static u16 adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
1484 if (err) 1398 if (err)
1485 break; 1399 break;
1486 for (i = 0; i < (int)length; i++) { 1400 for (i = 0; i < (int)length; i++) {
1487 err = boot_loader_write_mem32(pao, dsp, 1401 boot_loader_write_mem32(pao, dsp, address,
1488 address, *pcode); 1402 *pcode);
1489 if (err)
1490 break;
1491 /* dummy read every 4 words */ 1403 /* dummy read every 4 words */
1492 /* for 6205 advisory 1.4.4 */ 1404 /* for 6205 advisory 1.4.4 */
1493 if (i % 4 == 0) 1405 if (i % 4 == 0)
@@ -1561,7 +1473,7 @@ static u16 adapter_boot_load_dsp(struct hpi_adapter_obj *pao,
1561 host_mailbox_address_on_dsp = 0x80000000; 1473 host_mailbox_address_on_dsp = 0x80000000;
1562 while ((physicalPC_iaddress != physicalPC_iaddress_verify) 1474 while ((physicalPC_iaddress != physicalPC_iaddress_verify)
1563 && time_out--) { 1475 && time_out--) {
1564 err = boot_loader_write_mem32(pao, 0, 1476 boot_loader_write_mem32(pao, 0,
1565 host_mailbox_address_on_dsp, 1477 host_mailbox_address_on_dsp,
1566 physicalPC_iaddress); 1478 physicalPC_iaddress);
1567 physicalPC_iaddress_verify = 1479 physicalPC_iaddress_verify =
@@ -1631,11 +1543,10 @@ static u32 boot_loader_read_mem32(struct hpi_adapter_obj *pao, int dsp_index,
1631 return data; 1543 return data;
1632} 1544}
1633 1545
1634static u16 boot_loader_write_mem32(struct hpi_adapter_obj *pao, int dsp_index, 1546static void boot_loader_write_mem32(struct hpi_adapter_obj *pao,
1635 u32 address, u32 data) 1547 int dsp_index, u32 address, u32 data)
1636{ 1548{
1637 struct hpi_hw_obj *phw = pao->priv; 1549 struct hpi_hw_obj *phw = pao->priv;
1638 u16 err = 0;
1639 __iomem u32 *p_data; 1550 __iomem u32 *p_data;
1640 /* u32 dwVerifyData=0; */ 1551 /* u32 dwVerifyData=0; */
1641 1552
@@ -1675,15 +1586,11 @@ static u16 boot_loader_write_mem32(struct hpi_adapter_obj *pao, int dsp_index,
1675 1586
1676 /* dummy read every 4 words for 6205 advisory 1.4.4 */ 1587 /* dummy read every 4 words for 6205 advisory 1.4.4 */
1677 boot_loader_read_mem32(pao, 0, 0); 1588 boot_loader_read_mem32(pao, 0, 0);
1678 } else 1589 }
1679 err = hpi6205_error(dsp_index, HPI6205_ERROR_BAD_DSPINDEX);
1680 return err;
1681} 1590}
1682 1591
1683static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao, int dsp_index) 1592static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao, int dsp_index)
1684{ 1593{
1685 u16 err = 0;
1686
1687 if (dsp_index == 0) { 1594 if (dsp_index == 0) {
1688 u32 setting; 1595 u32 setting;
1689 1596
@@ -1711,8 +1618,7 @@ static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao, int dsp_index)
1711 boot_loader_write_mem32(pao, dsp_index, 0x01800008, setting); 1618 boot_loader_write_mem32(pao, dsp_index, 0x01800008, setting);
1712 if (setting != boot_loader_read_mem32(pao, dsp_index, 1619 if (setting != boot_loader_read_mem32(pao, dsp_index,
1713 0x01800008)) 1620 0x01800008))
1714 return hpi6205_error(dsp_index, 1621 return HPI6205_ERROR_DSP_EMIF;
1715 HPI6205_ERROR_DSP_EMIF);
1716 1622
1717 /* EMIF CE1 setup - 32 bit async. This is 6713 #1 HPI, */ 1623 /* EMIF CE1 setup - 32 bit async. This is 6713 #1 HPI, */
1718 /* which occupies D15..0. 6713 starts at 27MHz, so need */ 1624 /* which occupies D15..0. 6713 starts at 27MHz, so need */
@@ -1725,8 +1631,7 @@ static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao, int dsp_index)
1725 boot_loader_write_mem32(pao, dsp_index, 0x01800004, setting); 1631 boot_loader_write_mem32(pao, dsp_index, 0x01800004, setting);
1726 if (setting != boot_loader_read_mem32(pao, dsp_index, 1632 if (setting != boot_loader_read_mem32(pao, dsp_index,
1727 0x01800004)) 1633 0x01800004))
1728 return hpi6205_error(dsp_index, 1634 return HPI6205_ERROR_DSP_EMIF;
1729 HPI6205_ERROR_DSP_EMIF);
1730 1635
1731 /* EMIF CE2 setup - 32 bit async. This is 6713 #2 HPI, */ 1636 /* EMIF CE2 setup - 32 bit async. This is 6713 #2 HPI, */
1732 /* which occupies D15..0. 6713 starts at 27MHz, so need */ 1637 /* which occupies D15..0. 6713 starts at 27MHz, so need */
@@ -1738,8 +1643,7 @@ static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao, int dsp_index)
1738 boot_loader_write_mem32(pao, dsp_index, 0x01800010, setting); 1643 boot_loader_write_mem32(pao, dsp_index, 0x01800010, setting);
1739 if (setting != boot_loader_read_mem32(pao, dsp_index, 1644 if (setting != boot_loader_read_mem32(pao, dsp_index,
1740 0x01800010)) 1645 0x01800010))
1741 return hpi6205_error(dsp_index, 1646 return HPI6205_ERROR_DSP_EMIF;
1742 HPI6205_ERROR_DSP_EMIF);
1743 1647
1744 /* EMIF CE3 setup - 32 bit async. */ 1648 /* EMIF CE3 setup - 32 bit async. */
1745 /* This is the PLD on the ASI5000 cards only */ 1649 /* This is the PLD on the ASI5000 cards only */
@@ -1750,8 +1654,7 @@ static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao, int dsp_index)
1750 boot_loader_write_mem32(pao, dsp_index, 0x01800014, setting); 1654 boot_loader_write_mem32(pao, dsp_index, 0x01800014, setting);
1751 if (setting != boot_loader_read_mem32(pao, dsp_index, 1655 if (setting != boot_loader_read_mem32(pao, dsp_index,
1752 0x01800014)) 1656 0x01800014))
1753 return hpi6205_error(dsp_index, 1657 return HPI6205_ERROR_DSP_EMIF;
1754 HPI6205_ERROR_DSP_EMIF);
1755 1658
1756 /* set EMIF SDRAM control for 2Mx32 SDRAM (512x32x4 bank) */ 1659 /* set EMIF SDRAM control for 2Mx32 SDRAM (512x32x4 bank) */
1757 /* need to use this else DSP code crashes? */ 1660 /* need to use this else DSP code crashes? */
@@ -1775,12 +1678,9 @@ static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao, int dsp_index)
1775 read_data = 1678 read_data =
1776 0xFFF7 & boot_loader_read_mem32(pao, 0, HPICL_ADDR); 1679 0xFFF7 & boot_loader_read_mem32(pao, 0, HPICL_ADDR);
1777 if (write_data != read_data) { 1680 if (write_data != read_data) {
1778 err = hpi6205_error(dsp_index,
1779 HPI6205_ERROR_C6713_HPIC);
1780 HPI_DEBUG_LOG(ERROR, "HPICL %x %x\n", write_data, 1681 HPI_DEBUG_LOG(ERROR, "HPICL %x %x\n", write_data,
1781 read_data); 1682 read_data);
1782 1683 return HPI6205_ERROR_C6713_HPIC;
1783 return err;
1784 } 1684 }
1785 /* HPIA - walking ones test */ 1685 /* HPIA - walking ones test */
1786 write_data = 1; 1686 write_data = 1;
@@ -1798,11 +1698,9 @@ static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao, int dsp_index)
1798 HPIAH_ADDR)) 1698 HPIAH_ADDR))
1799 << 16); 1699 << 16);
1800 if (read_data != write_data) { 1700 if (read_data != write_data) {
1801 err = hpi6205_error(dsp_index,
1802 HPI6205_ERROR_C6713_HPIA);
1803 HPI_DEBUG_LOG(ERROR, "HPIA %x %x\n", 1701 HPI_DEBUG_LOG(ERROR, "HPIA %x %x\n",
1804 write_data, read_data); 1702 write_data, read_data);
1805 return err; 1703 return HPI6205_ERROR_C6713_HPIA;
1806 } 1704 }
1807 write_data = write_data << 1; 1705 write_data = write_data << 1;
1808 } 1706 }
@@ -1847,30 +1745,81 @@ static u16 boot_loader_config_emif(struct hpi_adapter_obj *pao, int dsp_index)
1847 /* PLL should not be bypassed! */ 1745 /* PLL should not be bypassed! */
1848 if ((boot_loader_read_mem32(pao, dsp_index, 0x01B7C100) & 0xF) 1746 if ((boot_loader_read_mem32(pao, dsp_index, 0x01B7C100) & 0xF)
1849 != 0x0001) { 1747 != 0x0001) {
1850 err = hpi6205_error(dsp_index, 1748 return HPI6205_ERROR_C6713_PLL;
1851 HPI6205_ERROR_C6713_PLL);
1852 return err;
1853 } 1749 }
1854 /* setup C67x EMIF (note this is the only use of 1750 /* setup C67x EMIF (note this is the only use of
1855 BAR1 via BootLoader_WriteMem32) */ 1751 BAR1 via BootLoader_WriteMem32) */
1856 boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_GCTL, 1752 boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_GCTL,
1857 0x000034A8); 1753 0x000034A8);
1754
1755 /* EMIF CE0 setup - 2Mx32 Sync DRAM
1756 31..28 Wr setup
1757 27..22 Wr strobe
1758 21..20 Wr hold
1759 19..16 Rd setup
1760 15..14 -
1761 13..8 Rd strobe
1762 7..4 MTYPE 0011 Sync DRAM 32bits
1763 3 Wr hold MSB
1764 2..0 Rd hold
1765 */
1858 boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_CE0, 1766 boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_CE0,
1859 0x00000030); 1767 0x00000030);
1768
1769 /* EMIF SDRAM Extension
1770 0x00
1771 31-21 0000b 0000b 000b
1772 20 WR2RD = 2cycles-1 = 1b
1773
1774 19-18 WR2DEAC = 3cycle-1 = 10b
1775 17 WR2WR = 2cycle-1 = 1b
1776 16-15 R2WDQM = 4cycle-1 = 11b
1777 14-12 RD2WR = 6cycles-1 = 101b
1778
1779 11-10 RD2DEAC = 4cycle-1 = 11b
1780 9 RD2RD = 2cycle-1 = 1b
1781 8-7 THZP = 3cycle-1 = 10b
1782 6-5 TWR = 2cycle-1 = 01b (tWR = 17ns)
1783 4 TRRD = 2cycle = 0b (tRRD = 14ns)
1784 3-1 TRAS = 5cycle-1 = 100b (Tras=42ns)
1785 1 CAS latency = 3cyc = 1b
1786 (for Micron 2M32-7 operating at 100MHz)
1787 */
1860 boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_SDRAMEXT, 1788 boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_SDRAMEXT,
1861 0x001BDF29); 1789 0x001BDF29);
1790
1791 /* EMIF SDRAM control - set up for a 2Mx32 SDRAM (512x32x4 bank)
1792 31 - 0b -
1793 30 SDBSZ 1b 4 bank
1794 29..28 SDRSZ 00b 11 row address pins
1795
1796 27..26 SDCSZ 01b 8 column address pins
1797 25 RFEN 1b refersh enabled
1798 24 INIT 1b init SDRAM!
1799
1800 23..20 TRCD 0001b (Trcd/Tcyc)-1 = (20/10)-1 = 1
1801
1802 19..16 TRP 0001b (Trp/Tcyc)-1 = (20/10)-1 = 1
1803
1804 15..12 TRC 0110b (Trc/Tcyc)-1 = (70/10)-1 = 6
1805
1806 11..0 - 0000b 0000b 0000b
1807 */
1862 boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_SDRAMCTL, 1808 boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_SDRAMCTL,
1863 0x47117000); 1809 0x47116000);
1810
1811 /* SDRAM refresh timing
1812 Need 4,096 refresh cycles every 64ms = 15.625us = 1562cycles of 100MHz = 0x61A
1813 */
1864 boot_loader_write_mem32(pao, dsp_index, 1814 boot_loader_write_mem32(pao, dsp_index,
1865 C6713_EMIF_SDRAMTIMING, 0x00000410); 1815 C6713_EMIF_SDRAMTIMING, 0x00000410);
1866 1816
1867 hpios_delay_micro_seconds(1000); 1817 hpios_delay_micro_seconds(1000);
1868 } else if (dsp_index == 2) { 1818 } else if (dsp_index == 2) {
1869 /* DSP 2 is a C6713 */ 1819 /* DSP 2 is a C6713 */
1820 }
1870 1821
1871 } else 1822 return 0;
1872 err = hpi6205_error(dsp_index, HPI6205_ERROR_BAD_DSPINDEX);
1873 return err;
1874} 1823}
1875 1824
1876static u16 boot_loader_test_memory(struct hpi_adapter_obj *pao, int dsp_index, 1825static u16 boot_loader_test_memory(struct hpi_adapter_obj *pao, int dsp_index,
@@ -1896,7 +1845,7 @@ static u16 boot_loader_test_memory(struct hpi_adapter_obj *pao, int dsp_index,
1896 test_addr); 1845 test_addr);
1897 if (data != test_data) { 1846 if (data != test_data) {
1898 HPI_DEBUG_LOG(VERBOSE, 1847 HPI_DEBUG_LOG(VERBOSE,
1899 "memtest error details " 1848 "Memtest error details "
1900 "%08x %08x %08x %i\n", test_addr, 1849 "%08x %08x %08x %i\n", test_addr,
1901 test_data, data, dsp_index); 1850 test_data, data, dsp_index);
1902 return 1; /* error */ 1851 return 1; /* error */
@@ -1916,7 +1865,7 @@ static u16 boot_loader_test_memory(struct hpi_adapter_obj *pao, int dsp_index,
1916 data = boot_loader_read_mem32(pao, dsp_index, test_addr); 1865 data = boot_loader_read_mem32(pao, dsp_index, test_addr);
1917 if (data != test_data) { 1866 if (data != test_data) {
1918 HPI_DEBUG_LOG(VERBOSE, 1867 HPI_DEBUG_LOG(VERBOSE,
1919 "memtest error details " 1868 "Memtest error details "
1920 "%08x %08x %08x %i\n", test_addr, test_data, 1869 "%08x %08x %08x %i\n", test_addr, test_data,
1921 data, dsp_index); 1870 data, dsp_index);
1922 return 1; /* error */ 1871 return 1; /* error */
@@ -1946,8 +1895,8 @@ static u16 boot_loader_test_internal_memory(struct hpi_adapter_obj *pao,
1946 /* 64K data mem */ 1895 /* 64K data mem */
1947 err = boot_loader_test_memory(pao, dsp_index, 1896 err = boot_loader_test_memory(pao, dsp_index,
1948 0x80000000, 0x10000); 1897 0x80000000, 0x10000);
1949 } else if ((dsp_index == 1) || (dsp_index == 2)) { 1898 } else if (dsp_index == 1) {
1950 /* DSP 1&2 are a C6713 */ 1899 /* DSP 1 is a C6713 */
1951 /* 192K internal mem */ 1900 /* 192K internal mem */
1952 err = boot_loader_test_memory(pao, dsp_index, 0x00000000, 1901 err = boot_loader_test_memory(pao, dsp_index, 0x00000000,
1953 0x30000); 1902 0x30000);
@@ -1955,11 +1904,10 @@ static u16 boot_loader_test_internal_memory(struct hpi_adapter_obj *pao,
1955 /* 64K internal mem / L2 cache */ 1904 /* 64K internal mem / L2 cache */
1956 err = boot_loader_test_memory(pao, dsp_index, 1905 err = boot_loader_test_memory(pao, dsp_index,
1957 0x00030000, 0x10000); 1906 0x00030000, 0x10000);
1958 } else 1907 }
1959 return hpi6205_error(dsp_index, HPI6205_ERROR_BAD_DSPINDEX);
1960 1908
1961 if (err) 1909 if (err)
1962 return hpi6205_error(dsp_index, HPI6205_ERROR_DSP_INTMEM); 1910 return HPI6205_ERROR_DSP_INTMEM;
1963 else 1911 else
1964 return 0; 1912 return 0;
1965} 1913}
@@ -1972,24 +1920,23 @@ static u16 boot_loader_test_external_memory(struct hpi_adapter_obj *pao,
1972 1920
1973 if (dsp_index == 0) { 1921 if (dsp_index == 0) {
1974 /* only test for SDRAM if an ASI5000 card */ 1922 /* only test for SDRAM if an ASI5000 card */
1975 if (pao->pci.subsys_device_id == 0x5000) { 1923 if (pao->pci.pci_dev->subsystem_device == 0x5000) {
1976 /* DSP 0 is always C6205 */ 1924 /* DSP 0 is always C6205 */
1977 dRAM_start_address = 0x00400000; 1925 dRAM_start_address = 0x00400000;
1978 dRAM_size = 0x200000; 1926 dRAM_size = 0x200000;
1979 /*dwDRAMinc=1024; */ 1927 /*dwDRAMinc=1024; */
1980 } else 1928 } else
1981 return 0; 1929 return 0;
1982 } else if ((dsp_index == 1) || (dsp_index == 2)) { 1930 } else if (dsp_index == 1) {
1983 /* DSP 1 is a C6713 */ 1931 /* DSP 1 is a C6713 */
1984 dRAM_start_address = 0x80000000; 1932 dRAM_start_address = 0x80000000;
1985 dRAM_size = 0x200000; 1933 dRAM_size = 0x200000;
1986 /*dwDRAMinc=1024; */ 1934 /*dwDRAMinc=1024; */
1987 } else 1935 }
1988 return hpi6205_error(dsp_index, HPI6205_ERROR_BAD_DSPINDEX);
1989 1936
1990 if (boot_loader_test_memory(pao, dsp_index, dRAM_start_address, 1937 if (boot_loader_test_memory(pao, dsp_index, dRAM_start_address,
1991 dRAM_size)) 1938 dRAM_size))
1992 return hpi6205_error(dsp_index, HPI6205_ERROR_DSP_EXTMEM); 1939 return HPI6205_ERROR_DSP_EXTMEM;
1993 return 0; 1940 return 0;
1994} 1941}
1995 1942
@@ -1998,28 +1945,25 @@ static u16 boot_loader_test_pld(struct hpi_adapter_obj *pao, int dsp_index)
1998 u32 data = 0; 1945 u32 data = 0;
1999 if (dsp_index == 0) { 1946 if (dsp_index == 0) {
2000 /* only test for DSP0 PLD on ASI5000 card */ 1947 /* only test for DSP0 PLD on ASI5000 card */
2001 if (pao->pci.subsys_device_id == 0x5000) { 1948 if (pao->pci.pci_dev->subsystem_device == 0x5000) {
2002 /* PLD is located at CE3=0x03000000 */ 1949 /* PLD is located at CE3=0x03000000 */
2003 data = boot_loader_read_mem32(pao, dsp_index, 1950 data = boot_loader_read_mem32(pao, dsp_index,
2004 0x03000008); 1951 0x03000008);
2005 if ((data & 0xF) != 0x5) 1952 if ((data & 0xF) != 0x5)
2006 return hpi6205_error(dsp_index, 1953 return HPI6205_ERROR_DSP_PLD;
2007 HPI6205_ERROR_DSP_PLD);
2008 data = boot_loader_read_mem32(pao, dsp_index, 1954 data = boot_loader_read_mem32(pao, dsp_index,
2009 0x0300000C); 1955 0x0300000C);
2010 if ((data & 0xF) != 0xA) 1956 if ((data & 0xF) != 0xA)
2011 return hpi6205_error(dsp_index, 1957 return HPI6205_ERROR_DSP_PLD;
2012 HPI6205_ERROR_DSP_PLD);
2013 } 1958 }
2014 } else if (dsp_index == 1) { 1959 } else if (dsp_index == 1) {
2015 /* DSP 1 is a C6713 */ 1960 /* DSP 1 is a C6713 */
2016 if (pao->pci.subsys_device_id == 0x8700) { 1961 if (pao->pci.pci_dev->subsystem_device == 0x8700) {
2017 /* PLD is located at CE1=0x90000000 */ 1962 /* PLD is located at CE1=0x90000000 */
2018 data = boot_loader_read_mem32(pao, dsp_index, 1963 data = boot_loader_read_mem32(pao, dsp_index,
2019 0x90000010); 1964 0x90000010);
2020 if ((data & 0xFF) != 0xAA) 1965 if ((data & 0xFF) != 0xAA)
2021 return hpi6205_error(dsp_index, 1966 return HPI6205_ERROR_DSP_PLD;
2022 HPI6205_ERROR_DSP_PLD);
2023 /* 8713 - LED on */ 1967 /* 8713 - LED on */
2024 boot_loader_write_mem32(pao, dsp_index, 0x90000000, 1968 boot_loader_write_mem32(pao, dsp_index, 0x90000000,
2025 0x02); 1969 0x02);
@@ -2037,14 +1981,11 @@ static short hpi6205_transfer_data(struct hpi_adapter_obj *pao, u8 *p_data,
2037 struct hpi_hw_obj *phw = pao->priv; 1981 struct hpi_hw_obj *phw = pao->priv;
2038 u32 data_transferred = 0; 1982 u32 data_transferred = 0;
2039 u16 err = 0; 1983 u16 err = 0;
2040#ifndef HPI6205_NO_HSR_POLL
2041 u32 time_out;
2042#endif
2043 u32 temp2; 1984 u32 temp2;
2044 struct bus_master_interface *interface = phw->p_interface_buffer; 1985 struct bus_master_interface *interface = phw->p_interface_buffer;
2045 1986
2046 if (!p_data) 1987 if (!p_data)
2047 return HPI_ERROR_INVALID_DATA_TRANSFER; 1988 return HPI_ERROR_INVALID_DATA_POINTER;
2048 1989
2049 data_size &= ~3L; /* round data_size down to nearest 4 bytes */ 1990 data_size &= ~3L; /* round data_size down to nearest 4 bytes */
2050 1991
@@ -2064,14 +2005,10 @@ static short hpi6205_transfer_data(struct hpi_adapter_obj *pao, u8 *p_data,
2064 2005
2065 interface->transfer_size_in_bytes = this_copy; 2006 interface->transfer_size_in_bytes = this_copy;
2066 2007
2067#ifdef HPI6205_NO_HSR_POLL
2068 /* DSP must change this back to nOperation */ 2008 /* DSP must change this back to nOperation */
2069 interface->dsp_ack = H620_HIF_IDLE; 2009 interface->dsp_ack = H620_HIF_IDLE;
2070#endif
2071
2072 send_dsp_command(phw, operation); 2010 send_dsp_command(phw, operation);
2073 2011
2074#ifdef HPI6205_NO_HSR_POLL
2075 temp2 = wait_dsp_ack(phw, operation, HPI6205_TIMEOUT); 2012 temp2 = wait_dsp_ack(phw, operation, HPI6205_TIMEOUT);
2076 HPI_DEBUG_LOG(DEBUG, "spun %d times for data xfer of %d\n", 2013 HPI_DEBUG_LOG(DEBUG, "spun %d times for data xfer of %d\n",
2077 HPI6205_TIMEOUT - temp2, this_copy); 2014 HPI6205_TIMEOUT - temp2, this_copy);
@@ -2079,45 +2016,11 @@ static short hpi6205_transfer_data(struct hpi_adapter_obj *pao, u8 *p_data,
2079 if (!temp2) { 2016 if (!temp2) {
2080 /* timed out */ 2017 /* timed out */
2081 HPI_DEBUG_LOG(ERROR, 2018 HPI_DEBUG_LOG(ERROR,
2082 "timed out waiting for " "state %d got %d\n", 2019 "Timed out waiting for " "state %d got %d\n",
2083 operation, interface->dsp_ack); 2020 operation, interface->dsp_ack);
2084 2021
2085 break; 2022 break;
2086 } 2023 }
2087#else
2088 /* spin waiting on the result */
2089 time_out = HPI6205_TIMEOUT;
2090 temp2 = 0;
2091 while ((temp2 == 0) && time_out--) {
2092 /* give 16k bus mastering transfer time to happen */
2093 /*(16k / 132Mbytes/s = 122usec) */
2094 hpios_delay_micro_seconds(20);
2095 temp2 = ioread32(phw->prHSR);
2096 temp2 &= C6205_HSR_INTSRC;
2097 }
2098 HPI_DEBUG_LOG(DEBUG, "spun %d times for data xfer of %d\n",
2099 HPI6205_TIMEOUT - time_out, this_copy);
2100 if (temp2 == C6205_HSR_INTSRC) {
2101 HPI_DEBUG_LOG(VERBOSE,
2102 "interrupt from HIF <data> OK\n");
2103 /*
2104 if(interface->dwDspAck != nOperation) {
2105 HPI_DEBUG_LOG(DEBUG("interface->dwDspAck=%d,
2106 expected %d \n",
2107 interface->dwDspAck,nOperation);
2108 }
2109 */
2110 }
2111/* need to handle this differently... */
2112 else {
2113 HPI_DEBUG_LOG(ERROR,
2114 "interrupt from HIF <data> BAD\n");
2115 err = HPI_ERROR_DSP_HARDWARE;
2116 }
2117
2118 /* reset the interrupt from the DSP */
2119 iowrite32(C6205_HSR_INTSRC, phw->prHSR);
2120#endif
2121 if (operation == H620_HIF_GET_DATA) 2024 if (operation == H620_HIF_GET_DATA)
2122 memcpy(&p_data[data_transferred], 2025 memcpy(&p_data[data_transferred],
2123 (void *)&interface->u.b_data[0], this_copy); 2026 (void *)&interface->u.b_data[0], this_copy);
@@ -2174,31 +2077,39 @@ static unsigned int message_count;
2174static u16 message_response_sequence(struct hpi_adapter_obj *pao, 2077static u16 message_response_sequence(struct hpi_adapter_obj *pao,
2175 struct hpi_message *phm, struct hpi_response *phr) 2078 struct hpi_message *phm, struct hpi_response *phr)
2176{ 2079{
2177#ifndef HPI6205_NO_HSR_POLL
2178 u32 temp2;
2179#endif
2180 u32 time_out, time_out2; 2080 u32 time_out, time_out2;
2181 struct hpi_hw_obj *phw = pao->priv; 2081 struct hpi_hw_obj *phw = pao->priv;
2182 struct bus_master_interface *interface = phw->p_interface_buffer; 2082 struct bus_master_interface *interface = phw->p_interface_buffer;
2183 u16 err = 0; 2083 u16 err = 0;
2184 2084
2185 message_count++; 2085 message_count++;
2086 if (phm->size > sizeof(interface->u)) {
2087 phr->error = HPI_ERROR_MESSAGE_BUFFER_TOO_SMALL;
2088 phr->specific_error = sizeof(interface->u);
2089 phr->size = sizeof(struct hpi_response_header);
2090 HPI_DEBUG_LOG(ERROR,
2091 "message len %d too big for buffer %zd \n", phm->size,
2092 sizeof(interface->u));
2093 return 0;
2094 }
2095
2186 /* Assume buffer of type struct bus_master_interface 2096 /* Assume buffer of type struct bus_master_interface
2187 is allocated "noncacheable" */ 2097 is allocated "noncacheable" */
2188 2098
2189 if (!wait_dsp_ack(phw, H620_HIF_IDLE, HPI6205_TIMEOUT)) { 2099 if (!wait_dsp_ack(phw, H620_HIF_IDLE, HPI6205_TIMEOUT)) {
2190 HPI_DEBUG_LOG(DEBUG, "timeout waiting for idle\n"); 2100 HPI_DEBUG_LOG(DEBUG, "timeout waiting for idle\n");
2191 return hpi6205_error(0, HPI6205_ERROR_MSG_RESP_IDLE_TIMEOUT); 2101 return HPI6205_ERROR_MSG_RESP_IDLE_TIMEOUT;
2192 } 2102 }
2193 interface->u.message_buffer = *phm; 2103
2104 memcpy(&interface->u.message_buffer, phm, phm->size);
2194 /* signal we want a response */ 2105 /* signal we want a response */
2195 send_dsp_command(phw, H620_HIF_GET_RESP); 2106 send_dsp_command(phw, H620_HIF_GET_RESP);
2196 2107
2197 time_out2 = wait_dsp_ack(phw, H620_HIF_GET_RESP, HPI6205_TIMEOUT); 2108 time_out2 = wait_dsp_ack(phw, H620_HIF_GET_RESP, HPI6205_TIMEOUT);
2198 2109
2199 if (time_out2 == 0) { 2110 if (!time_out2) {
2200 HPI_DEBUG_LOG(ERROR, 2111 HPI_DEBUG_LOG(ERROR,
2201 "(%u) timed out waiting for " "GET_RESP state [%x]\n", 2112 "(%u) Timed out waiting for " "GET_RESP state [%x]\n",
2202 message_count, interface->dsp_ack); 2113 message_count, interface->dsp_ack);
2203 } else { 2114 } else {
2204 HPI_DEBUG_LOG(VERBOSE, 2115 HPI_DEBUG_LOG(VERBOSE,
@@ -2208,58 +2119,38 @@ static u16 message_response_sequence(struct hpi_adapter_obj *pao,
2208 /* spin waiting on HIF interrupt flag (end of msg process) */ 2119 /* spin waiting on HIF interrupt flag (end of msg process) */
2209 time_out = HPI6205_TIMEOUT; 2120 time_out = HPI6205_TIMEOUT;
2210 2121
2211#ifndef HPI6205_NO_HSR_POLL 2122 /* read the result */
2212 temp2 = 0; 2123 if (time_out) {
2213 while ((temp2 == 0) && --time_out) { 2124 if (interface->u.response_buffer.size <= phr->size)
2214 temp2 = ioread32(phw->prHSR); 2125 memcpy(phr, &interface->u.response_buffer,
2215 temp2 &= C6205_HSR_INTSRC; 2126 interface->u.response_buffer.size);
2216 hpios_delay_micro_seconds(1); 2127 else {
2217 } 2128 HPI_DEBUG_LOG(ERROR,
2218 if (temp2 == C6205_HSR_INTSRC) { 2129 "response len %d too big for buffer %d\n",
2219 rmb(); /* ensure we see latest value for dsp_ack */ 2130 interface->u.response_buffer.size, phr->size);
2220 if ((interface->dsp_ack != H620_HIF_GET_RESP)) { 2131 memcpy(phr, &interface->u.response_buffer,
2221 HPI_DEBUG_LOG(DEBUG, 2132 sizeof(struct hpi_response_header));
2222 "(%u)interface->dsp_ack(0x%x) != " 2133 phr->error = HPI_ERROR_RESPONSE_BUFFER_TOO_SMALL;
2223 "H620_HIF_GET_RESP, t=%u\n", message_count, 2134 phr->specific_error =
2224 interface->dsp_ack, 2135 interface->u.response_buffer.size;
2225 HPI6205_TIMEOUT - time_out); 2136 phr->size = sizeof(struct hpi_response_header);
2226 } else {
2227 HPI_DEBUG_LOG(VERBOSE,
2228 "(%u)int with GET_RESP after %u\n",
2229 message_count, HPI6205_TIMEOUT - time_out);
2230 } 2137 }
2231
2232 } else {
2233 /* can we do anything else in response to the error ? */
2234 HPI_DEBUG_LOG(ERROR,
2235 "interrupt from HIF module BAD (function %x)\n",
2236 phm->function);
2237 } 2138 }
2238
2239 /* reset the interrupt from the DSP */
2240 iowrite32(C6205_HSR_INTSRC, phw->prHSR);
2241#endif
2242
2243 /* read the result */
2244 if (time_out != 0)
2245 *phr = interface->u.response_buffer;
2246
2247 /* set interface back to idle */ 2139 /* set interface back to idle */
2248 send_dsp_command(phw, H620_HIF_IDLE); 2140 send_dsp_command(phw, H620_HIF_IDLE);
2249 2141
2250 if ((time_out == 0) || (time_out2 == 0)) { 2142 if (!time_out || !time_out2) {
2251 HPI_DEBUG_LOG(DEBUG, "something timed out!\n"); 2143 HPI_DEBUG_LOG(DEBUG, "something timed out!\n");
2252 return hpi6205_error(0, HPI6205_ERROR_MSG_RESP_TIMEOUT); 2144 return HPI6205_ERROR_MSG_RESP_TIMEOUT;
2253 } 2145 }
2254 /* special case for adapter close - */ 2146 /* special case for adapter close - */
2255 /* wait for the DSP to indicate it is idle */ 2147 /* wait for the DSP to indicate it is idle */
2256 if (phm->function == HPI_ADAPTER_CLOSE) { 2148 if (phm->function == HPI_ADAPTER_CLOSE) {
2257 if (!wait_dsp_ack(phw, H620_HIF_IDLE, HPI6205_TIMEOUT)) { 2149 if (!wait_dsp_ack(phw, H620_HIF_IDLE, HPI6205_TIMEOUT)) {
2258 HPI_DEBUG_LOG(DEBUG, 2150 HPI_DEBUG_LOG(DEBUG,
2259 "timeout waiting for idle " 2151 "Timeout waiting for idle "
2260 "(on adapter_close)\n"); 2152 "(on adapter_close)\n");
2261 return hpi6205_error(0, 2153 return HPI6205_ERROR_MSG_RESP_IDLE_TIMEOUT;
2262 HPI6205_ERROR_MSG_RESP_IDLE_TIMEOUT);
2263 } 2154 }
2264 } 2155 }
2265 err = hpi_validate_response(phm, phr); 2156 err = hpi_validate_response(phm, phr);
@@ -2279,7 +2170,13 @@ static void hw_message(struct hpi_adapter_obj *pao, struct hpi_message *phm,
2279 /* maybe an error response */ 2170 /* maybe an error response */
2280 if (err) { 2171 if (err) {
2281 /* something failed in the HPI/DSP interface */ 2172 /* something failed in the HPI/DSP interface */
2282 phr->error = err; 2173 if (err >= HPI_ERROR_BACKEND_BASE) {
2174 phr->error = HPI_ERROR_DSP_COMMUNICATION;
2175 phr->specific_error = err;
2176 } else {
2177 phr->error = err;
2178 }
2179
2283 pao->dsp_crashed++; 2180 pao->dsp_crashed++;
2284 2181
2285 /* just the header of the response is valid */ 2182 /* just the header of the response is valid */
diff --git a/sound/pci/asihpi/hpi6205.h b/sound/pci/asihpi/hpi6205.h
index 1adae0857cda..df2f02c0c7b4 100644
--- a/sound/pci/asihpi/hpi6205.h
+++ b/sound/pci/asihpi/hpi6205.h
@@ -25,9 +25,6 @@ Copyright AudioScience, Inc., 2003
25#ifndef _HPI6205_H_ 25#ifndef _HPI6205_H_
26#define _HPI6205_H_ 26#define _HPI6205_H_
27 27
28/* transitional conditional compile shared between host and DSP */
29/* #define HPI6205_NO_HSR_POLL */
30
31#include "hpi_internal.h" 28#include "hpi_internal.h"
32 29
33/*********************************************************** 30/***********************************************************
@@ -78,8 +75,8 @@ struct bus_master_interface {
78 u32 dsp_ack; 75 u32 dsp_ack;
79 u32 transfer_size_in_bytes; 76 u32 transfer_size_in_bytes;
80 union { 77 union {
81 struct hpi_message message_buffer; 78 struct hpi_message_header message_buffer;
82 struct hpi_response response_buffer; 79 struct hpi_response_header response_buffer;
83 u8 b_data[HPI6205_SIZEOF_DATA]; 80 u8 b_data[HPI6205_SIZEOF_DATA];
84 } u; 81 } u;
85 struct controlcache_6205 control_cache; 82 struct controlcache_6205 control_cache;
diff --git a/sound/pci/asihpi/hpi_internal.h b/sound/pci/asihpi/hpi_internal.h
index 16f502d459de..af678be0aa15 100644
--- a/sound/pci/asihpi/hpi_internal.h
+++ b/sound/pci/asihpi/hpi_internal.h
@@ -28,7 +28,7 @@ HPI internal definitions
28/** maximum number of memory regions mapped to an adapter */ 28/** maximum number of memory regions mapped to an adapter */
29#define HPI_MAX_ADAPTER_MEM_SPACES (2) 29#define HPI_MAX_ADAPTER_MEM_SPACES (2)
30 30
31/* Each OS needs its own hpios.h, or specific define as above */ 31/* Each OS needs its own hpios.h */
32#include "hpios.h" 32#include "hpios.h"
33 33
34/* physical memory allocation */ 34/* physical memory allocation */
@@ -49,7 +49,7 @@ HpiOs_LockedMem_GetPyhsAddr() will always succed on the returned handle.
49*/ 49*/
50u16 hpios_locked_mem_alloc(struct consistent_dma_area *p_locked_mem_handle, 50u16 hpios_locked_mem_alloc(struct consistent_dma_area *p_locked_mem_handle,
51 /**< memory handle */ 51 /**< memory handle */
52 u32 size, /**< size in bytes to allocate */ 52 u32 size, /**< Size in bytes to allocate */
53 struct pci_dev *p_os_reference 53 struct pci_dev *p_os_reference
54 /**< OS specific data required for memory allocation */ 54 /**< OS specific data required for memory allocation */
55 ); 55 );
@@ -96,41 +96,6 @@ typedef void hpi_handler_func(struct hpi_message *, struct hpi_response *);
96#define compile_time_assert(cond, msg) \ 96#define compile_time_assert(cond, msg) \
97 typedef char ASSERT_##msg[(cond) ? 1 : -1] 97 typedef char ASSERT_##msg[(cond) ? 1 : -1]
98 98
99/*/////////////////////////////////////////////////////////////////////////// */
100/* Private HPI Entity related definitions */
101
102#define STR_SIZE_FIELD_MAX 65535U
103#define STR_TYPE_FIELD_MAX 255U
104#define STR_ROLE_FIELD_MAX 255U
105
106struct hpi_entity_str {
107 u16 size;
108 u8 type;
109 u8 role;
110};
111
112#if defined(_MSC_VER)
113#pragma warning(push)
114#pragma warning(disable : 4200)
115#endif
116
117struct hpi_entity {
118 struct hpi_entity_str header;
119#if ! defined(HPI_OS_DSP_C6000) || (defined(HPI_OS_DSP_C6000) && (__TI_COMPILER_VERSION__ > 6000008))
120 /* DSP C6000 compiler v6.0.8 and lower
121 do not support flexible array member */
122 u8 value[];
123#else
124 /* NOTE! Using sizeof(struct hpi_entity) will give erroneous results */
125#define HPI_INTERNAL_WARN_ABOUT_ENTITY_VALUE
126 u8 value[1];
127#endif
128};
129
130#if defined(_MSC_VER)
131#pragma warning(pop)
132#endif
133
134/******************************************* bus types */ 99/******************************************* bus types */
135enum HPI_BUSES { 100enum HPI_BUSES {
136 HPI_BUS_ISAPNP = 1, 101 HPI_BUS_ISAPNP = 1,
@@ -139,206 +104,155 @@ enum HPI_BUSES {
139 HPI_BUS_NET = 4 104 HPI_BUS_NET = 4
140}; 105};
141 106
107enum HPI_SUBSYS_OPTIONS {
108 /* 0, 256 are invalid, 1..255 reserved for global options */
109 HPI_SUBSYS_OPT_NET_ENABLE = 257,
110 HPI_SUBSYS_OPT_NET_BROADCAST = 258,
111 HPI_SUBSYS_OPT_NET_UNICAST = 259,
112 HPI_SUBSYS_OPT_NET_ADDR = 260,
113 HPI_SUBSYS_OPT_NET_MASK = 261,
114 HPI_SUBSYS_OPT_NET_ADAPTER_ADDRESS_ADD = 262
115};
116
117/** Volume flags
118*/
119enum HPI_VOLUME_FLAGS {
120 /** Set if the volume control is muted */
121 HPI_VOLUME_FLAG_MUTED = (1 << 0),
122 /** Set if the volume control has a mute function */
123 HPI_VOLUME_FLAG_HAS_MUTE = (1 << 1),
124 /** Set if volume control can do autofading */
125 HPI_VOLUME_FLAG_HAS_AUTOFADE = (1 << 2)
126 /* Note Flags >= (1<<8) are for DSP internal use only */
127};
128
142/******************************************* CONTROL ATTRIBUTES ****/ 129/******************************************* CONTROL ATTRIBUTES ****/
143/* (in order of control type ID */ 130/* (in order of control type ID */
144 131
145/* This allows for 255 control types, 256 unique attributes each */ 132/* This allows for 255 control types, 256 unique attributes each */
146#define HPI_CTL_ATTR(ctl, ai) (HPI_CONTROL_##ctl * 0x100 + ai) 133#define HPI_CTL_ATTR(ctl, ai) ((HPI_CONTROL_##ctl << 8) + ai)
147 134
148/* Get the sub-index of the attribute for a control type */ 135/* Get the sub-index of the attribute for a control type */
149#define HPI_CTL_ATTR_INDEX(i) (i&0xff) 136#define HPI_CTL_ATTR_INDEX(i) (i & 0xff)
150 137
151/* Extract the control from the control attribute */ 138/* Extract the control from the control attribute */
152#define HPI_CTL_ATTR_CONTROL(i) (i>>8) 139#define HPI_CTL_ATTR_CONTROL(i) (i >> 8)
153
154/* Generic control attributes. */
155
156/** Enable a control.
1570=disable, 1=enable
158\note generic to all mixer plugins?
159*/
160#define HPI_GENERIC_ENABLE HPI_CTL_ATTR(GENERIC, 1)
161 140
162/** Enable event generation for a control. 141/** Enable event generation for a control.
1630=disable, 1=enable 1420=disable, 1=enable
164\note generic to all controls that can generate events 143\note generic to all controls that can generate events
165*/ 144*/
166#define HPI_GENERIC_EVENT_ENABLE HPI_CTL_ATTR(GENERIC, 2) 145
167 146/** Unique identifiers for every control attribute
168/* Volume Control attributes */
169#define HPI_VOLUME_GAIN HPI_CTL_ATTR(VOLUME, 1)
170#define HPI_VOLUME_AUTOFADE HPI_CTL_ATTR(VOLUME, 2)
171
172/** For HPI_ControlQuery() to get the number of channels of a volume control*/
173#define HPI_VOLUME_NUM_CHANNELS HPI_CTL_ATTR(VOLUME, 6)
174#define HPI_VOLUME_RANGE HPI_CTL_ATTR(VOLUME, 10)
175
176/** Level Control attributes */
177#define HPI_LEVEL_GAIN HPI_CTL_ATTR(LEVEL, 1)
178#define HPI_LEVEL_RANGE HPI_CTL_ATTR(LEVEL, 10)
179
180/* Meter Control attributes */
181/** return RMS signal level */
182#define HPI_METER_RMS HPI_CTL_ATTR(METER, 1)
183/** return peak signal level */
184#define HPI_METER_PEAK HPI_CTL_ATTR(METER, 2)
185/** ballistics for ALL rms meters on adapter */
186#define HPI_METER_RMS_BALLISTICS HPI_CTL_ATTR(METER, 3)
187/** ballistics for ALL peak meters on adapter */
188#define HPI_METER_PEAK_BALLISTICS HPI_CTL_ATTR(METER, 4)
189
190/** For HPI_ControlQuery() to get the number of channels of a meter control*/
191#define HPI_METER_NUM_CHANNELS HPI_CTL_ATTR(METER, 5)
192
193/* Multiplexer control attributes */
194#define HPI_MULTIPLEXER_SOURCE HPI_CTL_ATTR(MULTIPLEXER, 1)
195#define HPI_MULTIPLEXER_QUERYSOURCE HPI_CTL_ATTR(MULTIPLEXER, 2)
196
197/** AES/EBU transmitter control attributes */
198/** AESEBU or SPDIF */
199#define HPI_AESEBUTX_FORMAT HPI_CTL_ATTR(AESEBUTX, 1)
200#define HPI_AESEBUTX_SAMPLERATE HPI_CTL_ATTR(AESEBUTX, 3)
201#define HPI_AESEBUTX_CHANNELSTATUS HPI_CTL_ATTR(AESEBUTX, 4)
202#define HPI_AESEBUTX_USERDATA HPI_CTL_ATTR(AESEBUTX, 5)
203
204/** AES/EBU receiver control attributes */
205#define HPI_AESEBURX_FORMAT HPI_CTL_ATTR(AESEBURX, 1)
206#define HPI_AESEBURX_ERRORSTATUS HPI_CTL_ATTR(AESEBURX, 2)
207#define HPI_AESEBURX_SAMPLERATE HPI_CTL_ATTR(AESEBURX, 3)
208#define HPI_AESEBURX_CHANNELSTATUS HPI_CTL_ATTR(AESEBURX, 4)
209#define HPI_AESEBURX_USERDATA HPI_CTL_ATTR(AESEBURX, 5)
210
211/** \defgroup tuner_defs Tuners
212\{
213*/
214/** \defgroup tuner_attrs Tuner control attributes
215\{
216*/
217#define HPI_TUNER_BAND HPI_CTL_ATTR(TUNER, 1)
218#define HPI_TUNER_FREQ HPI_CTL_ATTR(TUNER, 2)
219#define HPI_TUNER_LEVEL HPI_CTL_ATTR(TUNER, 3)
220#define HPI_TUNER_AUDIOMUTE HPI_CTL_ATTR(TUNER, 4)
221/* use TUNER_STATUS instead */
222#define HPI_TUNER_VIDEO_STATUS HPI_CTL_ATTR(TUNER, 5)
223#define HPI_TUNER_GAIN HPI_CTL_ATTR(TUNER, 6)
224#define HPI_TUNER_STATUS HPI_CTL_ATTR(TUNER, 7)
225#define HPI_TUNER_MODE HPI_CTL_ATTR(TUNER, 8)
226/** RDS data. */
227#define HPI_TUNER_RDS HPI_CTL_ATTR(TUNER, 9)
228/** Audio pre-emphasis. */
229#define HPI_TUNER_DEEMPHASIS HPI_CTL_ATTR(TUNER, 10)
230/** HD Radio tuner program control. */
231#define HPI_TUNER_PROGRAM HPI_CTL_ATTR(TUNER, 11)
232/** HD Radio tuner digital signal quality. */
233#define HPI_TUNER_HDRADIO_SIGNAL_QUALITY HPI_CTL_ATTR(TUNER, 12)
234/** HD Radio SDK firmware version. */
235#define HPI_TUNER_HDRADIO_SDK_VERSION HPI_CTL_ATTR(TUNER, 13)
236/** HD Radio DSP firmware version. */
237#define HPI_TUNER_HDRADIO_DSP_VERSION HPI_CTL_ATTR(TUNER, 14)
238/** HD Radio signal blend (force analog, or automatic). */
239#define HPI_TUNER_HDRADIO_BLEND HPI_CTL_ATTR(TUNER, 15)
240
241/** \} */
242
243/** \defgroup pads_attrs Tuner PADs control attributes
244\{
245*/
246/** The text string containing the station/channel combination. */
247#define HPI_PAD_CHANNEL_NAME HPI_CTL_ATTR(PAD, 1)
248/** The text string containing the artist. */
249#define HPI_PAD_ARTIST HPI_CTL_ATTR(PAD, 2)
250/** The text string containing the title. */
251#define HPI_PAD_TITLE HPI_CTL_ATTR(PAD, 3)
252/** The text string containing the comment. */
253#define HPI_PAD_COMMENT HPI_CTL_ATTR(PAD, 4)
254/** The integer containing the PTY code. */
255#define HPI_PAD_PROGRAM_TYPE HPI_CTL_ATTR(PAD, 5)
256/** The integer containing the program identification. */
257#define HPI_PAD_PROGRAM_ID HPI_CTL_ATTR(PAD, 6)
258/** The integer containing whether traffic information is supported.
259Contains either 1 or 0. */
260#define HPI_PAD_TA_SUPPORT HPI_CTL_ATTR(PAD, 7)
261/** The integer containing whether traffic announcement is in progress.
262Contains either 1 or 0. */
263#define HPI_PAD_TA_ACTIVE HPI_CTL_ATTR(PAD, 8)
264/** \} */
265/** \} */
266
267/* VOX control attributes */
268#define HPI_VOX_THRESHOLD HPI_CTL_ATTR(VOX, 1)
269
270/*?? channel mode used hpi_multiplexer_source attribute == 1 */
271#define HPI_CHANNEL_MODE_MODE HPI_CTL_ATTR(CHANNEL_MODE, 1)
272
273/** \defgroup channel_modes Channel Modes
274Used for HPI_ChannelModeSet/Get()
275\{
276*/ 147*/
277/** Left channel out = left channel in, Right channel out = right channel in. */ 148enum HPI_CONTROL_ATTRIBUTES {
278#define HPI_CHANNEL_MODE_NORMAL 1 149 HPI_GENERIC_ENABLE = HPI_CTL_ATTR(GENERIC, 1),
279/** Left channel out = right channel in, Right channel out = left channel in. */ 150 HPI_GENERIC_EVENT_ENABLE = HPI_CTL_ATTR(GENERIC, 2),
280#define HPI_CHANNEL_MODE_SWAP 2 151
281/** Left channel out = left channel in, Right channel out = left channel in. */ 152 HPI_VOLUME_GAIN = HPI_CTL_ATTR(VOLUME, 1),
282#define HPI_CHANNEL_MODE_LEFT_TO_STEREO 3 153 HPI_VOLUME_AUTOFADE = HPI_CTL_ATTR(VOLUME, 2),
283/** Left channel out = right channel in, Right channel out = right channel in.*/ 154 HPI_VOLUME_MUTE = HPI_CTL_ATTR(VOLUME, 3),
284#define HPI_CHANNEL_MODE_RIGHT_TO_STEREO 4 155 HPI_VOLUME_GAIN_AND_FLAGS = HPI_CTL_ATTR(VOLUME, 4),
285/** Left channel out = (left channel in + right channel in)/2, 156 HPI_VOLUME_NUM_CHANNELS = HPI_CTL_ATTR(VOLUME, 6),
286 Right channel out = mute. */ 157 HPI_VOLUME_RANGE = HPI_CTL_ATTR(VOLUME, 10),
287#define HPI_CHANNEL_MODE_STEREO_TO_LEFT 5 158
288/** Left channel out = mute, 159 HPI_METER_RMS = HPI_CTL_ATTR(METER, 1),
289 Right channel out = (right channel in + left channel in)/2. */ 160 HPI_METER_PEAK = HPI_CTL_ATTR(METER, 2),
290#define HPI_CHANNEL_MODE_STEREO_TO_RIGHT 6 161 HPI_METER_RMS_BALLISTICS = HPI_CTL_ATTR(METER, 3),
291#define HPI_CHANNEL_MODE_LAST 6 162 HPI_METER_PEAK_BALLISTICS = HPI_CTL_ATTR(METER, 4),
292/** \} */ 163 HPI_METER_NUM_CHANNELS = HPI_CTL_ATTR(METER, 5),
293 164
294/* Bitstream control set attributes */ 165 HPI_MULTIPLEXER_SOURCE = HPI_CTL_ATTR(MULTIPLEXER, 1),
295#define HPI_BITSTREAM_DATA_POLARITY HPI_CTL_ATTR(BITSTREAM, 1) 166 HPI_MULTIPLEXER_QUERYSOURCE = HPI_CTL_ATTR(MULTIPLEXER, 2),
296#define HPI_BITSTREAM_CLOCK_EDGE HPI_CTL_ATTR(BITSTREAM, 2) 167
297#define HPI_BITSTREAM_CLOCK_SOURCE HPI_CTL_ATTR(BITSTREAM, 3) 168 HPI_AESEBUTX_FORMAT = HPI_CTL_ATTR(AESEBUTX, 1),
169 HPI_AESEBUTX_SAMPLERATE = HPI_CTL_ATTR(AESEBUTX, 3),
170 HPI_AESEBUTX_CHANNELSTATUS = HPI_CTL_ATTR(AESEBUTX, 4),
171 HPI_AESEBUTX_USERDATA = HPI_CTL_ATTR(AESEBUTX, 5),
172
173 HPI_AESEBURX_FORMAT = HPI_CTL_ATTR(AESEBURX, 1),
174 HPI_AESEBURX_ERRORSTATUS = HPI_CTL_ATTR(AESEBURX, 2),
175 HPI_AESEBURX_SAMPLERATE = HPI_CTL_ATTR(AESEBURX, 3),
176 HPI_AESEBURX_CHANNELSTATUS = HPI_CTL_ATTR(AESEBURX, 4),
177 HPI_AESEBURX_USERDATA = HPI_CTL_ATTR(AESEBURX, 5),
178
179 HPI_LEVEL_GAIN = HPI_CTL_ATTR(LEVEL, 1),
180 HPI_LEVEL_RANGE = HPI_CTL_ATTR(LEVEL, 10),
181
182 HPI_TUNER_BAND = HPI_CTL_ATTR(TUNER, 1),
183 HPI_TUNER_FREQ = HPI_CTL_ATTR(TUNER, 2),
184 HPI_TUNER_LEVEL_AVG = HPI_CTL_ATTR(TUNER, 3),
185 HPI_TUNER_LEVEL_RAW = HPI_CTL_ATTR(TUNER, 4),
186 HPI_TUNER_SNR = HPI_CTL_ATTR(TUNER, 5),
187 HPI_TUNER_GAIN = HPI_CTL_ATTR(TUNER, 6),
188 HPI_TUNER_STATUS = HPI_CTL_ATTR(TUNER, 7),
189 HPI_TUNER_MODE = HPI_CTL_ATTR(TUNER, 8),
190 HPI_TUNER_RDS = HPI_CTL_ATTR(TUNER, 9),
191 HPI_TUNER_DEEMPHASIS = HPI_CTL_ATTR(TUNER, 10),
192 HPI_TUNER_PROGRAM = HPI_CTL_ATTR(TUNER, 11),
193 HPI_TUNER_HDRADIO_SIGNAL_QUALITY = HPI_CTL_ATTR(TUNER, 12),
194 HPI_TUNER_HDRADIO_SDK_VERSION = HPI_CTL_ATTR(TUNER, 13),
195 HPI_TUNER_HDRADIO_DSP_VERSION = HPI_CTL_ATTR(TUNER, 14),
196 HPI_TUNER_HDRADIO_BLEND = HPI_CTL_ATTR(TUNER, 15),
197
198 HPI_VOX_THRESHOLD = HPI_CTL_ATTR(VOX, 1),
199
200 HPI_CHANNEL_MODE_MODE = HPI_CTL_ATTR(CHANNEL_MODE, 1),
201
202 HPI_BITSTREAM_DATA_POLARITY = HPI_CTL_ATTR(BITSTREAM, 1),
203 HPI_BITSTREAM_CLOCK_EDGE = HPI_CTL_ATTR(BITSTREAM, 2),
204 HPI_BITSTREAM_CLOCK_SOURCE = HPI_CTL_ATTR(BITSTREAM, 3),
205 HPI_BITSTREAM_ACTIVITY = HPI_CTL_ATTR(BITSTREAM, 4),
206
207 HPI_SAMPLECLOCK_SOURCE = HPI_CTL_ATTR(SAMPLECLOCK, 1),
208 HPI_SAMPLECLOCK_SAMPLERATE = HPI_CTL_ATTR(SAMPLECLOCK, 2),
209 HPI_SAMPLECLOCK_SOURCE_INDEX = HPI_CTL_ATTR(SAMPLECLOCK, 3),
210 HPI_SAMPLECLOCK_LOCAL_SAMPLERATE = HPI_CTL_ATTR(SAMPLECLOCK, 4),
211 HPI_SAMPLECLOCK_AUTO = HPI_CTL_ATTR(SAMPLECLOCK, 5),
212 HPI_SAMPLECLOCK_LOCAL_LOCK = HPI_CTL_ATTR(SAMPLECLOCK, 6),
213
214 HPI_MICROPHONE_PHANTOM_POWER = HPI_CTL_ATTR(MICROPHONE, 1),
215
216 HPI_EQUALIZER_NUM_FILTERS = HPI_CTL_ATTR(EQUALIZER, 1),
217 HPI_EQUALIZER_FILTER = HPI_CTL_ATTR(EQUALIZER, 2),
218 HPI_EQUALIZER_COEFFICIENTS = HPI_CTL_ATTR(EQUALIZER, 3),
219
220 HPI_COMPANDER_PARAMS = HPI_CTL_ATTR(COMPANDER, 1),
221 HPI_COMPANDER_MAKEUPGAIN = HPI_CTL_ATTR(COMPANDER, 2),
222 HPI_COMPANDER_THRESHOLD = HPI_CTL_ATTR(COMPANDER, 3),
223 HPI_COMPANDER_RATIO = HPI_CTL_ATTR(COMPANDER, 4),
224 HPI_COMPANDER_ATTACK = HPI_CTL_ATTR(COMPANDER, 5),
225 HPI_COMPANDER_DECAY = HPI_CTL_ATTR(COMPANDER, 6),
226
227 HPI_COBRANET_SET = HPI_CTL_ATTR(COBRANET, 1),
228 HPI_COBRANET_GET = HPI_CTL_ATTR(COBRANET, 2),
229 HPI_COBRANET_SET_DATA = HPI_CTL_ATTR(COBRANET, 3),
230 HPI_COBRANET_GET_DATA = HPI_CTL_ATTR(COBRANET, 4),
231 HPI_COBRANET_GET_STATUS = HPI_CTL_ATTR(COBRANET, 5),
232 HPI_COBRANET_SEND_PACKET = HPI_CTL_ATTR(COBRANET, 6),
233 HPI_COBRANET_GET_PACKET = HPI_CTL_ATTR(COBRANET, 7),
234
235 HPI_TONEDETECTOR_THRESHOLD = HPI_CTL_ATTR(TONEDETECTOR, 1),
236 HPI_TONEDETECTOR_STATE = HPI_CTL_ATTR(TONEDETECTOR, 2),
237 HPI_TONEDETECTOR_FREQUENCY = HPI_CTL_ATTR(TONEDETECTOR, 3),
238
239 HPI_SILENCEDETECTOR_THRESHOLD = HPI_CTL_ATTR(SILENCEDETECTOR, 1),
240 HPI_SILENCEDETECTOR_STATE = HPI_CTL_ATTR(SILENCEDETECTOR, 2),
241 HPI_SILENCEDETECTOR_DELAY = HPI_CTL_ATTR(SILENCEDETECTOR, 3),
242
243 HPI_PAD_CHANNEL_NAME = HPI_CTL_ATTR(PAD, 1),
244 HPI_PAD_ARTIST = HPI_CTL_ATTR(PAD, 2),
245 HPI_PAD_TITLE = HPI_CTL_ATTR(PAD, 3),
246 HPI_PAD_COMMENT = HPI_CTL_ATTR(PAD, 4),
247 HPI_PAD_PROGRAM_TYPE = HPI_CTL_ATTR(PAD, 5),
248 HPI_PAD_PROGRAM_ID = HPI_CTL_ATTR(PAD, 6),
249 HPI_PAD_TA_SUPPORT = HPI_CTL_ATTR(PAD, 7),
250 HPI_PAD_TA_ACTIVE = HPI_CTL_ATTR(PAD, 8)
251};
298 252
299#define HPI_POLARITY_POSITIVE 0 253#define HPI_POLARITY_POSITIVE 0
300#define HPI_POLARITY_NEGATIVE 1 254#define HPI_POLARITY_NEGATIVE 1
301 255
302/* Bitstream control get attributes */
303#define HPI_BITSTREAM_ACTIVITY 1
304
305/* SampleClock control attributes */
306#define HPI_SAMPLECLOCK_SOURCE HPI_CTL_ATTR(SAMPLECLOCK, 1)
307#define HPI_SAMPLECLOCK_SAMPLERATE HPI_CTL_ATTR(SAMPLECLOCK, 2)
308#define HPI_SAMPLECLOCK_SOURCE_INDEX HPI_CTL_ATTR(SAMPLECLOCK, 3)
309#define HPI_SAMPLECLOCK_LOCAL_SAMPLERATE\
310 HPI_CTL_ATTR(SAMPLECLOCK, 4)
311#define HPI_SAMPLECLOCK_AUTO HPI_CTL_ATTR(SAMPLECLOCK, 5)
312#define HPI_SAMPLECLOCK_LOCAL_LOCK HPI_CTL_ATTR(SAMPLECLOCK, 6)
313
314/* Microphone control attributes */
315#define HPI_MICROPHONE_PHANTOM_POWER HPI_CTL_ATTR(MICROPHONE, 1)
316
317/** Equalizer control attributes */
318/** Used to get number of filters in an EQ. (Can't set) */
319#define HPI_EQUALIZER_NUM_FILTERS HPI_CTL_ATTR(EQUALIZER, 1)
320/** Set/get the filter by type, freq, Q, gain */
321#define HPI_EQUALIZER_FILTER HPI_CTL_ATTR(EQUALIZER, 2)
322/** Get the biquad coefficients */
323#define HPI_EQUALIZER_COEFFICIENTS HPI_CTL_ATTR(EQUALIZER, 3)
324
325/* Note compander also uses HPI_GENERIC_ENABLE */
326#define HPI_COMPANDER_PARAMS HPI_CTL_ATTR(COMPANDER, 1)
327#define HPI_COMPANDER_MAKEUPGAIN HPI_CTL_ATTR(COMPANDER, 2)
328#define HPI_COMPANDER_THRESHOLD HPI_CTL_ATTR(COMPANDER, 3)
329#define HPI_COMPANDER_RATIO HPI_CTL_ATTR(COMPANDER, 4)
330#define HPI_COMPANDER_ATTACK HPI_CTL_ATTR(COMPANDER, 5)
331#define HPI_COMPANDER_DECAY HPI_CTL_ATTR(COMPANDER, 6)
332
333/* Cobranet control attributes. */
334#define HPI_COBRANET_SET HPI_CTL_ATTR(COBRANET, 1)
335#define HPI_COBRANET_GET HPI_CTL_ATTR(COBRANET, 2)
336#define HPI_COBRANET_SET_DATA HPI_CTL_ATTR(COBRANET, 3)
337#define HPI_COBRANET_GET_DATA HPI_CTL_ATTR(COBRANET, 4)
338#define HPI_COBRANET_GET_STATUS HPI_CTL_ATTR(COBRANET, 5)
339#define HPI_COBRANET_SEND_PACKET HPI_CTL_ATTR(COBRANET, 6)
340#define HPI_COBRANET_GET_PACKET HPI_CTL_ATTR(COBRANET, 7)
341
342/*------------------------------------------------------------ 256/*------------------------------------------------------------
343 Cobranet Chip Bridge - copied from HMI.H 257 Cobranet Chip Bridge - copied from HMI.H
344------------------------------------------------------------*/ 258------------------------------------------------------------*/
@@ -395,69 +309,22 @@ Used for HPI_ChannelModeSet/Get()
395 309
396#define HPI_ETHERNET_UDP_PORT (44600) /*!< UDP messaging port */ 310#define HPI_ETHERNET_UDP_PORT (44600) /*!< UDP messaging port */
397 311
398/** Base network time out is set to 100 milli-seconds. */ 312/** Default network timeout in milli-seconds. */
399#define HPI_ETHERNET_TIMEOUT_MS (100) 313#define HPI_ETHERNET_TIMEOUT_MS 500
400
401/** \defgroup tonedet_attr Tonedetector attributes
402\{
403Used by HPI_ToneDetector_Set() and HPI_ToneDetector_Get()
404*/
405
406/** Set the threshold level of a tonedetector,
407Threshold is a -ve number in units of dB/100,
408*/
409#define HPI_TONEDETECTOR_THRESHOLD HPI_CTL_ATTR(TONEDETECTOR, 1)
410
411/** Get the current state of tonedetection
412The result is a bitmap of detected tones. pairs of bits represent the left
413and right channels, with left channel in LSB.
414The lowest frequency detector state is in the LSB
415*/
416#define HPI_TONEDETECTOR_STATE HPI_CTL_ATTR(TONEDETECTOR, 2)
417
418/** Get the frequency of a tonedetector band.
419*/
420#define HPI_TONEDETECTOR_FREQUENCY HPI_CTL_ATTR(TONEDETECTOR, 3)
421
422/**\}*/
423 314
424/** \defgroup silencedet_attr SilenceDetector attributes 315/** Locked memory buffer alloc/free phases */
425\{ 316enum HPI_BUFFER_CMDS {
426*/ 317 /** use one message to allocate or free physical memory */
427 318 HPI_BUFFER_CMD_EXTERNAL = 0,
428/** Get the current state of tonedetection 319 /** alloc physical memory */
429The result is a bitmap with 1s for silent channels. Left channel is in LSB 320 HPI_BUFFER_CMD_INTERNAL_ALLOC = 1,
430*/ 321 /** send physical memory address to adapter */
431#define HPI_SILENCEDETECTOR_STATE \ 322 HPI_BUFFER_CMD_INTERNAL_GRANTADAPTER = 2,
432 HPI_CTL_ATTR(SILENCEDETECTOR, 2) 323 /** notify adapter to stop using physical buffer */
433 324 HPI_BUFFER_CMD_INTERNAL_REVOKEADAPTER = 3,
434/** Set the threshold level of a SilenceDetector, 325 /** free physical buffer */
435Threshold is a -ve number in units of dB/100, 326 HPI_BUFFER_CMD_INTERNAL_FREE = 4
436*/ 327};
437#define HPI_SILENCEDETECTOR_THRESHOLD \
438 HPI_CTL_ATTR(SILENCEDETECTOR, 1)
439
440/** get/set the silence time before the detector triggers
441*/
442#define HPI_SILENCEDETECTOR_DELAY \
443 HPI_CTL_ATTR(SILENCEDETECTOR, 3)
444
445/**\}*/
446
447/* Locked memory buffer alloc/free phases */
448/** use one message to allocate or free physical memory */
449#define HPI_BUFFER_CMD_EXTERNAL 0
450/** alloc physical memory */
451#define HPI_BUFFER_CMD_INTERNAL_ALLOC 1
452/** send physical memory address to adapter */
453#define HPI_BUFFER_CMD_INTERNAL_GRANTADAPTER 2
454/** notify adapter to stop using physical buffer */
455#define HPI_BUFFER_CMD_INTERNAL_REVOKEADAPTER 3
456/** free physical buffer */
457#define HPI_BUFFER_CMD_INTERNAL_FREE 4
458
459/******************************************* CONTROLX ATTRIBUTES ****/
460/* NOTE: All controlx attributes must be unique, unlike control attributes */
461 328
462/*****************************************************************************/ 329/*****************************************************************************/
463/*****************************************************************************/ 330/*****************************************************************************/
@@ -482,6 +349,12 @@ Threshold is a -ve number in units of dB/100,
482#define HPI_USB_W2K_TAG 0x57495341 /* "ASIW" */ 349#define HPI_USB_W2K_TAG 0x57495341 /* "ASIW" */
483#define HPI_USB_LINUX_TAG 0x4C495341 /* "ASIL" */ 350#define HPI_USB_LINUX_TAG 0x4C495341 /* "ASIL" */
484 351
352/** Invalid Adapter index
353Used in HPI messages that are not addressed to a specific adapter
354Used in DLL to indicate device not present
355*/
356#define HPI_ADAPTER_INDEX_INVALID 0xFFFF
357
485/** First 2 hex digits define the adapter family */ 358/** First 2 hex digits define the adapter family */
486#define HPI_ADAPTER_FAMILY_MASK 0xff00 359#define HPI_ADAPTER_FAMILY_MASK 0xff00
487#define HPI_MODULE_FAMILY_MASK 0xfff0 360#define HPI_MODULE_FAMILY_MASK 0xfff0
@@ -490,178 +363,185 @@ Threshold is a -ve number in units of dB/100,
490#define HPI_MODULE_FAMILY_ASI(f) (f & HPI_MODULE_FAMILY_MASK) 363#define HPI_MODULE_FAMILY_ASI(f) (f & HPI_MODULE_FAMILY_MASK)
491#define HPI_ADAPTER_ASI(f) (f) 364#define HPI_ADAPTER_ASI(f) (f)
492 365
493/******************************************* message types */ 366enum HPI_MESSAGE_TYPES {
494#define HPI_TYPE_MESSAGE 1 367 HPI_TYPE_MESSAGE = 1,
495#define HPI_TYPE_RESPONSE 2 368 HPI_TYPE_RESPONSE = 2,
496#define HPI_TYPE_DATA 3 369 HPI_TYPE_DATA = 3,
497#define HPI_TYPE_SSX2BYPASS_MESSAGE 4 370 HPI_TYPE_SSX2BYPASS_MESSAGE = 4
498 371};
499/******************************************* object types */ 372
500#define HPI_OBJ_SUBSYSTEM 1 373enum HPI_OBJECT_TYPES {
501#define HPI_OBJ_ADAPTER 2 374 HPI_OBJ_SUBSYSTEM = 1,
502#define HPI_OBJ_OSTREAM 3 375 HPI_OBJ_ADAPTER = 2,
503#define HPI_OBJ_ISTREAM 4 376 HPI_OBJ_OSTREAM = 3,
504#define HPI_OBJ_MIXER 5 377 HPI_OBJ_ISTREAM = 4,
505#define HPI_OBJ_NODE 6 378 HPI_OBJ_MIXER = 5,
506#define HPI_OBJ_CONTROL 7 379 HPI_OBJ_NODE = 6,
507#define HPI_OBJ_NVMEMORY 8 380 HPI_OBJ_CONTROL = 7,
508#define HPI_OBJ_GPIO 9 381 HPI_OBJ_NVMEMORY = 8,
509#define HPI_OBJ_WATCHDOG 10 382 HPI_OBJ_GPIO = 9,
510#define HPI_OBJ_CLOCK 11 383 HPI_OBJ_WATCHDOG = 10,
511#define HPI_OBJ_PROFILE 12 384 HPI_OBJ_CLOCK = 11,
512#define HPI_OBJ_CONTROLEX 13 385 HPI_OBJ_PROFILE = 12,
513#define HPI_OBJ_ASYNCEVENT 14 386 HPI_OBJ_CONTROLEX = 13,
514 387 HPI_OBJ_ASYNCEVENT = 14
515#define HPI_OBJ_MAXINDEX 14 388#define HPI_OBJ_MAXINDEX 14
516 389};
517/******************************************* methods/functions */ 390
518 391#define HPI_OBJ_FUNCTION_SPACING 0x100
519#define HPI_OBJ_FUNCTION_SPACING 0x100 392#define HPI_FUNC_ID(obj, i) (HPI_OBJ_##obj * HPI_OBJ_FUNCTION_SPACING + i)
520#define HPI_MAKE_INDEX(obj, index) (obj * HPI_OBJ_FUNCTION_SPACING + index) 393
521#define HPI_EXTRACT_INDEX(fn) (fn & 0xff) 394#define HPI_EXTRACT_INDEX(fn) (fn & 0xff)
522 395
523/* SUB-SYSTEM */ 396enum HPI_FUNCTION_IDS {
524#define HPI_SUBSYS_OPEN HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 1) 397 HPI_SUBSYS_OPEN = HPI_FUNC_ID(SUBSYSTEM, 1),
525#define HPI_SUBSYS_GET_VERSION HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 2) 398 HPI_SUBSYS_GET_VERSION = HPI_FUNC_ID(SUBSYSTEM, 2),
526#define HPI_SUBSYS_GET_INFO HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 3) 399 HPI_SUBSYS_GET_INFO = HPI_FUNC_ID(SUBSYSTEM, 3),
527#define HPI_SUBSYS_FIND_ADAPTERS HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 4) 400 HPI_SUBSYS_FIND_ADAPTERS = HPI_FUNC_ID(SUBSYSTEM, 4),
528#define HPI_SUBSYS_CREATE_ADAPTER HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 5) 401 HPI_SUBSYS_CREATE_ADAPTER = HPI_FUNC_ID(SUBSYSTEM, 5),
529#define HPI_SUBSYS_CLOSE HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 6) 402 HPI_SUBSYS_CLOSE = HPI_FUNC_ID(SUBSYSTEM, 6),
530#define HPI_SUBSYS_DELETE_ADAPTER HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 7) 403 HPI_SUBSYS_DELETE_ADAPTER = HPI_FUNC_ID(SUBSYSTEM, 7),
531#define HPI_SUBSYS_DRIVER_LOAD HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 8) 404 HPI_SUBSYS_DRIVER_LOAD = HPI_FUNC_ID(SUBSYSTEM, 8),
532#define HPI_SUBSYS_DRIVER_UNLOAD HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 9) 405 HPI_SUBSYS_DRIVER_UNLOAD = HPI_FUNC_ID(SUBSYSTEM, 9),
533#define HPI_SUBSYS_READ_PORT_8 HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 10) 406 HPI_SUBSYS_READ_PORT_8 = HPI_FUNC_ID(SUBSYSTEM, 10),
534#define HPI_SUBSYS_WRITE_PORT_8 HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 11) 407 HPI_SUBSYS_WRITE_PORT_8 = HPI_FUNC_ID(SUBSYSTEM, 11),
535#define HPI_SUBSYS_GET_NUM_ADAPTERS HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 12) 408 HPI_SUBSYS_GET_NUM_ADAPTERS = HPI_FUNC_ID(SUBSYSTEM, 12),
536#define HPI_SUBSYS_GET_ADAPTER HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 13) 409 HPI_SUBSYS_GET_ADAPTER = HPI_FUNC_ID(SUBSYSTEM, 13),
537#define HPI_SUBSYS_SET_NETWORK_INTERFACE HPI_MAKE_INDEX(HPI_OBJ_SUBSYSTEM, 14) 410 HPI_SUBSYS_SET_NETWORK_INTERFACE = HPI_FUNC_ID(SUBSYSTEM, 14),
538#define HPI_SUBSYS_FUNCTION_COUNT 14 411 HPI_SUBSYS_OPTION_INFO = HPI_FUNC_ID(SUBSYSTEM, 15),
539/* ADAPTER */ 412 HPI_SUBSYS_OPTION_GET = HPI_FUNC_ID(SUBSYSTEM, 16),
540#define HPI_ADAPTER_OPEN HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 1) 413 HPI_SUBSYS_OPTION_SET = HPI_FUNC_ID(SUBSYSTEM, 17),
541#define HPI_ADAPTER_CLOSE HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 2) 414#define HPI_SUBSYS_FUNCTION_COUNT 17
542#define HPI_ADAPTER_GET_INFO HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 3) 415
543#define HPI_ADAPTER_GET_ASSERT HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 4) 416 HPI_ADAPTER_OPEN = HPI_FUNC_ID(ADAPTER, 1),
544#define HPI_ADAPTER_TEST_ASSERT HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 5) 417 HPI_ADAPTER_CLOSE = HPI_FUNC_ID(ADAPTER, 2),
545#define HPI_ADAPTER_SET_MODE HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 6) 418 HPI_ADAPTER_GET_INFO = HPI_FUNC_ID(ADAPTER, 3),
546#define HPI_ADAPTER_GET_MODE HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 7) 419 HPI_ADAPTER_GET_ASSERT = HPI_FUNC_ID(ADAPTER, 4),
547#define HPI_ADAPTER_ENABLE_CAPABILITY HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 8) 420 HPI_ADAPTER_TEST_ASSERT = HPI_FUNC_ID(ADAPTER, 5),
548#define HPI_ADAPTER_SELFTEST HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 9) 421 HPI_ADAPTER_SET_MODE = HPI_FUNC_ID(ADAPTER, 6),
549#define HPI_ADAPTER_FIND_OBJECT HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 10) 422 HPI_ADAPTER_GET_MODE = HPI_FUNC_ID(ADAPTER, 7),
550#define HPI_ADAPTER_QUERY_FLASH HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 11) 423 HPI_ADAPTER_ENABLE_CAPABILITY = HPI_FUNC_ID(ADAPTER, 8),
551#define HPI_ADAPTER_START_FLASH HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 12) 424 HPI_ADAPTER_SELFTEST = HPI_FUNC_ID(ADAPTER, 9),
552#define HPI_ADAPTER_PROGRAM_FLASH HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 13) 425 HPI_ADAPTER_FIND_OBJECT = HPI_FUNC_ID(ADAPTER, 10),
553#define HPI_ADAPTER_SET_PROPERTY HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 14) 426 HPI_ADAPTER_QUERY_FLASH = HPI_FUNC_ID(ADAPTER, 11),
554#define HPI_ADAPTER_GET_PROPERTY HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 15) 427 HPI_ADAPTER_START_FLASH = HPI_FUNC_ID(ADAPTER, 12),
555#define HPI_ADAPTER_ENUM_PROPERTY HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 16) 428 HPI_ADAPTER_PROGRAM_FLASH = HPI_FUNC_ID(ADAPTER, 13),
556#define HPI_ADAPTER_MODULE_INFO HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 17) 429 HPI_ADAPTER_SET_PROPERTY = HPI_FUNC_ID(ADAPTER, 14),
557#define HPI_ADAPTER_DEBUG_READ HPI_MAKE_INDEX(HPI_OBJ_ADAPTER, 18) 430 HPI_ADAPTER_GET_PROPERTY = HPI_FUNC_ID(ADAPTER, 15),
558#define HPI_ADAPTER_FUNCTION_COUNT 18 431 HPI_ADAPTER_ENUM_PROPERTY = HPI_FUNC_ID(ADAPTER, 16),
559/* OUTPUT STREAM */ 432 HPI_ADAPTER_MODULE_INFO = HPI_FUNC_ID(ADAPTER, 17),
560#define HPI_OSTREAM_OPEN HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 1) 433 HPI_ADAPTER_DEBUG_READ = HPI_FUNC_ID(ADAPTER, 18),
561#define HPI_OSTREAM_CLOSE HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 2) 434 HPI_ADAPTER_IRQ_QUERY_AND_CLEAR = HPI_FUNC_ID(ADAPTER, 19),
562#define HPI_OSTREAM_WRITE HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 3) 435 HPI_ADAPTER_IRQ_CALLBACK = HPI_FUNC_ID(ADAPTER, 20),
563#define HPI_OSTREAM_START HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 4) 436#define HPI_ADAPTER_FUNCTION_COUNT 20
564#define HPI_OSTREAM_STOP HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 5) 437
565#define HPI_OSTREAM_RESET HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 6) 438 HPI_OSTREAM_OPEN = HPI_FUNC_ID(OSTREAM, 1),
566#define HPI_OSTREAM_GET_INFO HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 7) 439 HPI_OSTREAM_CLOSE = HPI_FUNC_ID(OSTREAM, 2),
567#define HPI_OSTREAM_QUERY_FORMAT HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 8) 440 HPI_OSTREAM_WRITE = HPI_FUNC_ID(OSTREAM, 3),
568#define HPI_OSTREAM_DATA HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 9) 441 HPI_OSTREAM_START = HPI_FUNC_ID(OSTREAM, 4),
569#define HPI_OSTREAM_SET_VELOCITY HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 10) 442 HPI_OSTREAM_STOP = HPI_FUNC_ID(OSTREAM, 5),
570#define HPI_OSTREAM_SET_PUNCHINOUT HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 11) 443 HPI_OSTREAM_RESET = HPI_FUNC_ID(OSTREAM, 6),
571#define HPI_OSTREAM_SINEGEN HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 12) 444 HPI_OSTREAM_GET_INFO = HPI_FUNC_ID(OSTREAM, 7),
572#define HPI_OSTREAM_ANC_RESET HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 13) 445 HPI_OSTREAM_QUERY_FORMAT = HPI_FUNC_ID(OSTREAM, 8),
573#define HPI_OSTREAM_ANC_GET_INFO HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 14) 446 HPI_OSTREAM_DATA = HPI_FUNC_ID(OSTREAM, 9),
574#define HPI_OSTREAM_ANC_READ HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 15) 447 HPI_OSTREAM_SET_VELOCITY = HPI_FUNC_ID(OSTREAM, 10),
575#define HPI_OSTREAM_SET_TIMESCALE HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 16) 448 HPI_OSTREAM_SET_PUNCHINOUT = HPI_FUNC_ID(OSTREAM, 11),
576#define HPI_OSTREAM_SET_FORMAT HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 17) 449 HPI_OSTREAM_SINEGEN = HPI_FUNC_ID(OSTREAM, 12),
577#define HPI_OSTREAM_HOSTBUFFER_ALLOC HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 18) 450 HPI_OSTREAM_ANC_RESET = HPI_FUNC_ID(OSTREAM, 13),
578#define HPI_OSTREAM_HOSTBUFFER_FREE HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 19) 451 HPI_OSTREAM_ANC_GET_INFO = HPI_FUNC_ID(OSTREAM, 14),
579#define HPI_OSTREAM_GROUP_ADD HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 20) 452 HPI_OSTREAM_ANC_READ = HPI_FUNC_ID(OSTREAM, 15),
580#define HPI_OSTREAM_GROUP_GETMAP HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 21) 453 HPI_OSTREAM_SET_TIMESCALE = HPI_FUNC_ID(OSTREAM, 16),
581#define HPI_OSTREAM_GROUP_RESET HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 22) 454 HPI_OSTREAM_SET_FORMAT = HPI_FUNC_ID(OSTREAM, 17),
582#define HPI_OSTREAM_HOSTBUFFER_GET_INFO HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 23) 455 HPI_OSTREAM_HOSTBUFFER_ALLOC = HPI_FUNC_ID(OSTREAM, 18),
583#define HPI_OSTREAM_WAIT_START HPI_MAKE_INDEX(HPI_OBJ_OSTREAM, 24) 456 HPI_OSTREAM_HOSTBUFFER_FREE = HPI_FUNC_ID(OSTREAM, 19),
584#define HPI_OSTREAM_FUNCTION_COUNT 24 457 HPI_OSTREAM_GROUP_ADD = HPI_FUNC_ID(OSTREAM, 20),
585/* INPUT STREAM */ 458 HPI_OSTREAM_GROUP_GETMAP = HPI_FUNC_ID(OSTREAM, 21),
586#define HPI_ISTREAM_OPEN HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 1) 459 HPI_OSTREAM_GROUP_RESET = HPI_FUNC_ID(OSTREAM, 22),
587#define HPI_ISTREAM_CLOSE HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 2) 460 HPI_OSTREAM_HOSTBUFFER_GET_INFO = HPI_FUNC_ID(OSTREAM, 23),
588#define HPI_ISTREAM_SET_FORMAT HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 3) 461 HPI_OSTREAM_WAIT_START = HPI_FUNC_ID(OSTREAM, 24),
589#define HPI_ISTREAM_READ HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 4) 462 HPI_OSTREAM_WAIT = HPI_FUNC_ID(OSTREAM, 25),
590#define HPI_ISTREAM_START HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 5) 463#define HPI_OSTREAM_FUNCTION_COUNT 25
591#define HPI_ISTREAM_STOP HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 6) 464
592#define HPI_ISTREAM_RESET HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 7) 465 HPI_ISTREAM_OPEN = HPI_FUNC_ID(ISTREAM, 1),
593#define HPI_ISTREAM_GET_INFO HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 8) 466 HPI_ISTREAM_CLOSE = HPI_FUNC_ID(ISTREAM, 2),
594#define HPI_ISTREAM_QUERY_FORMAT HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 9) 467 HPI_ISTREAM_SET_FORMAT = HPI_FUNC_ID(ISTREAM, 3),
595#define HPI_ISTREAM_ANC_RESET HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 10) 468 HPI_ISTREAM_READ = HPI_FUNC_ID(ISTREAM, 4),
596#define HPI_ISTREAM_ANC_GET_INFO HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 11) 469 HPI_ISTREAM_START = HPI_FUNC_ID(ISTREAM, 5),
597#define HPI_ISTREAM_ANC_WRITE HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 12) 470 HPI_ISTREAM_STOP = HPI_FUNC_ID(ISTREAM, 6),
598#define HPI_ISTREAM_HOSTBUFFER_ALLOC HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 13) 471 HPI_ISTREAM_RESET = HPI_FUNC_ID(ISTREAM, 7),
599#define HPI_ISTREAM_HOSTBUFFER_FREE HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 14) 472 HPI_ISTREAM_GET_INFO = HPI_FUNC_ID(ISTREAM, 8),
600#define HPI_ISTREAM_GROUP_ADD HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 15) 473 HPI_ISTREAM_QUERY_FORMAT = HPI_FUNC_ID(ISTREAM, 9),
601#define HPI_ISTREAM_GROUP_GETMAP HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 16) 474 HPI_ISTREAM_ANC_RESET = HPI_FUNC_ID(ISTREAM, 10),
602#define HPI_ISTREAM_GROUP_RESET HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 17) 475 HPI_ISTREAM_ANC_GET_INFO = HPI_FUNC_ID(ISTREAM, 11),
603#define HPI_ISTREAM_HOSTBUFFER_GET_INFO HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 18) 476 HPI_ISTREAM_ANC_WRITE = HPI_FUNC_ID(ISTREAM, 12),
604#define HPI_ISTREAM_WAIT_START HPI_MAKE_INDEX(HPI_OBJ_ISTREAM, 19) 477 HPI_ISTREAM_HOSTBUFFER_ALLOC = HPI_FUNC_ID(ISTREAM, 13),
605#define HPI_ISTREAM_FUNCTION_COUNT 19 478 HPI_ISTREAM_HOSTBUFFER_FREE = HPI_FUNC_ID(ISTREAM, 14),
606/* MIXER */ 479 HPI_ISTREAM_GROUP_ADD = HPI_FUNC_ID(ISTREAM, 15),
480 HPI_ISTREAM_GROUP_GETMAP = HPI_FUNC_ID(ISTREAM, 16),
481 HPI_ISTREAM_GROUP_RESET = HPI_FUNC_ID(ISTREAM, 17),
482 HPI_ISTREAM_HOSTBUFFER_GET_INFO = HPI_FUNC_ID(ISTREAM, 18),
483 HPI_ISTREAM_WAIT_START = HPI_FUNC_ID(ISTREAM, 19),
484 HPI_ISTREAM_WAIT = HPI_FUNC_ID(ISTREAM, 20),
485#define HPI_ISTREAM_FUNCTION_COUNT 20
486
607/* NOTE: 487/* NOTE:
608 GET_NODE_INFO, SET_CONNECTION, GET_CONNECTIONS are not currently used */ 488 GET_NODE_INFO, SET_CONNECTION, GET_CONNECTIONS are not currently used */
609#define HPI_MIXER_OPEN HPI_MAKE_INDEX(HPI_OBJ_MIXER, 1) 489 HPI_MIXER_OPEN = HPI_FUNC_ID(MIXER, 1),
610#define HPI_MIXER_CLOSE HPI_MAKE_INDEX(HPI_OBJ_MIXER, 2) 490 HPI_MIXER_CLOSE = HPI_FUNC_ID(MIXER, 2),
611#define HPI_MIXER_GET_INFO HPI_MAKE_INDEX(HPI_OBJ_MIXER, 3) 491 HPI_MIXER_GET_INFO = HPI_FUNC_ID(MIXER, 3),
612#define HPI_MIXER_GET_NODE_INFO HPI_MAKE_INDEX(HPI_OBJ_MIXER, 4) 492 HPI_MIXER_GET_NODE_INFO = HPI_FUNC_ID(MIXER, 4),
613#define HPI_MIXER_GET_CONTROL HPI_MAKE_INDEX(HPI_OBJ_MIXER, 5) 493 HPI_MIXER_GET_CONTROL = HPI_FUNC_ID(MIXER, 5),
614#define HPI_MIXER_SET_CONNECTION HPI_MAKE_INDEX(HPI_OBJ_MIXER, 6) 494 HPI_MIXER_SET_CONNECTION = HPI_FUNC_ID(MIXER, 6),
615#define HPI_MIXER_GET_CONNECTIONS HPI_MAKE_INDEX(HPI_OBJ_MIXER, 7) 495 HPI_MIXER_GET_CONNECTIONS = HPI_FUNC_ID(MIXER, 7),
616#define HPI_MIXER_GET_CONTROL_BY_INDEX HPI_MAKE_INDEX(HPI_OBJ_MIXER, 8) 496 HPI_MIXER_GET_CONTROL_BY_INDEX = HPI_FUNC_ID(MIXER, 8),
617#define HPI_MIXER_GET_CONTROL_ARRAY_BY_INDEX HPI_MAKE_INDEX(HPI_OBJ_MIXER, 9) 497 HPI_MIXER_GET_CONTROL_ARRAY_BY_INDEX = HPI_FUNC_ID(MIXER, 9),
618#define HPI_MIXER_GET_CONTROL_MULTIPLE_VALUES HPI_MAKE_INDEX(HPI_OBJ_MIXER, 10) 498 HPI_MIXER_GET_CONTROL_MULTIPLE_VALUES = HPI_FUNC_ID(MIXER, 10),
619#define HPI_MIXER_STORE HPI_MAKE_INDEX(HPI_OBJ_MIXER, 11) 499 HPI_MIXER_STORE = HPI_FUNC_ID(MIXER, 11),
620#define HPI_MIXER_FUNCTION_COUNT 11 500 HPI_MIXER_GET_CACHE_INFO = HPI_FUNC_ID(MIXER, 12),
621/* MIXER CONTROLS */ 501#define HPI_MIXER_FUNCTION_COUNT 12
622#define HPI_CONTROL_GET_INFO HPI_MAKE_INDEX(HPI_OBJ_CONTROL, 1) 502
623#define HPI_CONTROL_GET_STATE HPI_MAKE_INDEX(HPI_OBJ_CONTROL, 2) 503 HPI_CONTROL_GET_INFO = HPI_FUNC_ID(CONTROL, 1),
624#define HPI_CONTROL_SET_STATE HPI_MAKE_INDEX(HPI_OBJ_CONTROL, 3) 504 HPI_CONTROL_GET_STATE = HPI_FUNC_ID(CONTROL, 2),
505 HPI_CONTROL_SET_STATE = HPI_FUNC_ID(CONTROL, 3),
625#define HPI_CONTROL_FUNCTION_COUNT 3 506#define HPI_CONTROL_FUNCTION_COUNT 3
626/* NONVOL MEMORY */ 507
627#define HPI_NVMEMORY_OPEN HPI_MAKE_INDEX(HPI_OBJ_NVMEMORY, 1) 508 HPI_NVMEMORY_OPEN = HPI_FUNC_ID(NVMEMORY, 1),
628#define HPI_NVMEMORY_READ_BYTE HPI_MAKE_INDEX(HPI_OBJ_NVMEMORY, 2) 509 HPI_NVMEMORY_READ_BYTE = HPI_FUNC_ID(NVMEMORY, 2),
629#define HPI_NVMEMORY_WRITE_BYTE HPI_MAKE_INDEX(HPI_OBJ_NVMEMORY, 3) 510 HPI_NVMEMORY_WRITE_BYTE = HPI_FUNC_ID(NVMEMORY, 3),
630#define HPI_NVMEMORY_FUNCTION_COUNT 3 511#define HPI_NVMEMORY_FUNCTION_COUNT 3
631/* GPIO */ 512
632#define HPI_GPIO_OPEN HPI_MAKE_INDEX(HPI_OBJ_GPIO, 1) 513 HPI_GPIO_OPEN = HPI_FUNC_ID(GPIO, 1),
633#define HPI_GPIO_READ_BIT HPI_MAKE_INDEX(HPI_OBJ_GPIO, 2) 514 HPI_GPIO_READ_BIT = HPI_FUNC_ID(GPIO, 2),
634#define HPI_GPIO_WRITE_BIT HPI_MAKE_INDEX(HPI_OBJ_GPIO, 3) 515 HPI_GPIO_WRITE_BIT = HPI_FUNC_ID(GPIO, 3),
635#define HPI_GPIO_READ_ALL HPI_MAKE_INDEX(HPI_OBJ_GPIO, 4) 516 HPI_GPIO_READ_ALL = HPI_FUNC_ID(GPIO, 4),
636#define HPI_GPIO_WRITE_STATUS HPI_MAKE_INDEX(HPI_OBJ_GPIO, 5) 517 HPI_GPIO_WRITE_STATUS = HPI_FUNC_ID(GPIO, 5),
637#define HPI_GPIO_FUNCTION_COUNT 5 518#define HPI_GPIO_FUNCTION_COUNT 5
638/* ASYNC EVENT */ 519
639#define HPI_ASYNCEVENT_OPEN HPI_MAKE_INDEX(HPI_OBJ_ASYNCEVENT, 1) 520 HPI_ASYNCEVENT_OPEN = HPI_FUNC_ID(ASYNCEVENT, 1),
640#define HPI_ASYNCEVENT_CLOSE HPI_MAKE_INDEX(HPI_OBJ_ASYNCEVENT, 2) 521 HPI_ASYNCEVENT_CLOSE = HPI_FUNC_ID(ASYNCEVENT, 2),
641#define HPI_ASYNCEVENT_WAIT HPI_MAKE_INDEX(HPI_OBJ_ASYNCEVENT, 3) 522 HPI_ASYNCEVENT_WAIT = HPI_FUNC_ID(ASYNCEVENT, 3),
642#define HPI_ASYNCEVENT_GETCOUNT HPI_MAKE_INDEX(HPI_OBJ_ASYNCEVENT, 4) 523 HPI_ASYNCEVENT_GETCOUNT = HPI_FUNC_ID(ASYNCEVENT, 4),
643#define HPI_ASYNCEVENT_GET HPI_MAKE_INDEX(HPI_OBJ_ASYNCEVENT, 5) 524 HPI_ASYNCEVENT_GET = HPI_FUNC_ID(ASYNCEVENT, 5),
644#define HPI_ASYNCEVENT_SENDEVENTS HPI_MAKE_INDEX(HPI_OBJ_ASYNCEVENT, 6) 525 HPI_ASYNCEVENT_SENDEVENTS = HPI_FUNC_ID(ASYNCEVENT, 6),
645#define HPI_ASYNCEVENT_FUNCTION_COUNT 6 526#define HPI_ASYNCEVENT_FUNCTION_COUNT 6
646/* WATCH-DOG */ 527
647#define HPI_WATCHDOG_OPEN HPI_MAKE_INDEX(HPI_OBJ_WATCHDOG, 1) 528 HPI_WATCHDOG_OPEN = HPI_FUNC_ID(WATCHDOG, 1),
648#define HPI_WATCHDOG_SET_TIME HPI_MAKE_INDEX(HPI_OBJ_WATCHDOG, 2) 529 HPI_WATCHDOG_SET_TIME = HPI_FUNC_ID(WATCHDOG, 2),
649#define HPI_WATCHDOG_PING HPI_MAKE_INDEX(HPI_OBJ_WATCHDOG, 3) 530 HPI_WATCHDOG_PING = HPI_FUNC_ID(WATCHDOG, 3),
650/* CLOCK */ 531
651#define HPI_CLOCK_OPEN HPI_MAKE_INDEX(HPI_OBJ_CLOCK, 1) 532 HPI_CLOCK_OPEN = HPI_FUNC_ID(CLOCK, 1),
652#define HPI_CLOCK_SET_TIME HPI_MAKE_INDEX(HPI_OBJ_CLOCK, 2) 533 HPI_CLOCK_SET_TIME = HPI_FUNC_ID(CLOCK, 2),
653#define HPI_CLOCK_GET_TIME HPI_MAKE_INDEX(HPI_OBJ_CLOCK, 3) 534 HPI_CLOCK_GET_TIME = HPI_FUNC_ID(CLOCK, 3),
654/* PROFILE */ 535
655#define HPI_PROFILE_OPEN_ALL HPI_MAKE_INDEX(HPI_OBJ_PROFILE, 1) 536 HPI_PROFILE_OPEN_ALL = HPI_FUNC_ID(PROFILE, 1),
656#define HPI_PROFILE_START_ALL HPI_MAKE_INDEX(HPI_OBJ_PROFILE, 2) 537 HPI_PROFILE_START_ALL = HPI_FUNC_ID(PROFILE, 2),
657#define HPI_PROFILE_STOP_ALL HPI_MAKE_INDEX(HPI_OBJ_PROFILE, 3) 538 HPI_PROFILE_STOP_ALL = HPI_FUNC_ID(PROFILE, 3),
658#define HPI_PROFILE_GET HPI_MAKE_INDEX(HPI_OBJ_PROFILE, 4) 539 HPI_PROFILE_GET = HPI_FUNC_ID(PROFILE, 4),
659#define HPI_PROFILE_GET_IDLECOUNT HPI_MAKE_INDEX(HPI_OBJ_PROFILE, 5) 540 HPI_PROFILE_GET_IDLECOUNT = HPI_FUNC_ID(PROFILE, 5),
660#define HPI_PROFILE_GET_NAME HPI_MAKE_INDEX(HPI_OBJ_PROFILE, 6) 541 HPI_PROFILE_GET_NAME = HPI_FUNC_ID(PROFILE, 6),
661#define HPI_PROFILE_GET_UTILIZATION HPI_MAKE_INDEX(HPI_OBJ_PROFILE, 7) 542 HPI_PROFILE_GET_UTILIZATION = HPI_FUNC_ID(PROFILE, 7)
662#define HPI_PROFILE_FUNCTION_COUNT 7 543#define HPI_PROFILE_FUNCTION_COUNT 7
663/* ////////////////////////////////////////////////////////////////////// */ 544};
664/* PRIVATE ATTRIBUTES */
665 545
666/* ////////////////////////////////////////////////////////////////////// */ 546/* ////////////////////////////////////////////////////////////////////// */
667/* STRUCTURES */ 547/* STRUCTURES */
@@ -672,18 +552,7 @@ Threshold is a -ve number in units of dB/100,
672/** PCI bus resource */ 552/** PCI bus resource */
673struct hpi_pci { 553struct hpi_pci {
674 u32 __iomem *ap_mem_base[HPI_MAX_ADAPTER_MEM_SPACES]; 554 u32 __iomem *ap_mem_base[HPI_MAX_ADAPTER_MEM_SPACES];
675 struct pci_dev *p_os_data; 555 struct pci_dev *pci_dev;
676
677#ifndef HPI64BIT /* keep structure size constant */
678 u32 padding[HPI_MAX_ADAPTER_MEM_SPACES + 1];
679#endif
680 u16 vendor_id;
681 u16 device_id;
682 u16 subsys_vendor_id;
683 u16 subsys_device_id;
684 u16 bus_number;
685 u16 device_number;
686 u32 interrupt;
687}; 556};
688 557
689struct hpi_resource { 558struct hpi_resource {
@@ -702,12 +571,10 @@ struct hpi_resource {
702/** Format info used inside struct hpi_message 571/** Format info used inside struct hpi_message
703 Not the same as public API struct hpi_format */ 572 Not the same as public API struct hpi_format */
704struct hpi_msg_format { 573struct hpi_msg_format {
705 u32 sample_rate; 574 u32 sample_rate; /**< 11025, 32000, 44100 etc. */
706 /**< 11025, 32000, 44100 ... */ 575 u32 bit_rate; /**< for MPEG */
707 u32 bit_rate; /**< for MPEG */ 576 u32 attributes; /**< stereo/joint_stereo/mono */
708 u32 attributes; 577 u16 channels; /**< 1,2..., (or ancillary mode or idle bit */
709 /**< Stereo/JointStereo/Mono */
710 u16 channels; /**< 1,2..., (or ancillary mode or idle bit */
711 u16 format; /**< HPI_FORMAT_PCM16, _MPEG etc. see \ref HPI_FORMATS. */ 578 u16 format; /**< HPI_FORMAT_PCM16, _MPEG etc. see \ref HPI_FORMATS. */
712}; 579};
713 580
@@ -742,7 +609,7 @@ struct hpi_data_compat32 {
742struct hpi_buffer { 609struct hpi_buffer {
743 /** placehoder for backward compatability (see dwBufferSize) */ 610 /** placehoder for backward compatability (see dwBufferSize) */
744 struct hpi_msg_format reserved; 611 struct hpi_msg_format reserved;
745 u32 command; /**< HPI_BUFFER_CMD_xxx*/ 612 u32 command; /**< HPI_BUFFER_CMD_xxx*/
746 u32 pci_address; /**< PCI physical address of buffer for DSP DMA */ 613 u32 pci_address; /**< PCI physical address of buffer for DSP DMA */
747 u32 buffer_size; /**< must line up with data_size of HPI_DATA*/ 614 u32 buffer_size; /**< must line up with data_size of HPI_DATA*/
748}; 615};
@@ -777,30 +644,25 @@ struct hpi_subsys_msg {
777 644
778struct hpi_subsys_res { 645struct hpi_subsys_res {
779 u32 version; 646 u32 version;
780 u32 data; /* used to return extended version */ 647 u32 data; /* extended version */
781 u16 num_adapters; /* number of adapters */ 648 u16 num_adapters;
782 u16 adapter_index; 649 u16 adapter_index;
783 u16 aw_adapter_list[HPI_MAX_ADAPTERS]; 650 u16 adapter_type;
784}; 651 u16 pad16;
785
786struct hpi_adapter_msg {
787 u32 adapter_mode; /* adapter mode */
788 u16 assert_id; /* assert number for "test assert" call
789 object_index for find object call
790 query_or_set for hpi_adapter_set_mode_ex() */
791 u16 object_type; /* for adapter find object call */
792}; 652};
793 653
794union hpi_adapterx_msg { 654union hpi_adapterx_msg {
795 struct hpi_adapter_msg adapter;
796 struct { 655 struct {
797 u32 offset; 656 u32 dsp_address;
798 } query_flash; 657 u32 count_bytes;
658 } debug_read;
799 struct { 659 struct {
800 u32 offset; 660 u32 adapter_mode;
801 u32 length; 661 u16 query_or_set;
802 u32 key; 662 } mode;
803 } start_flash; 663 struct {
664 u16 index;
665 } module_info;
804 struct { 666 struct {
805 u32 checksum; 667 u32 checksum;
806 u16 sequence; 668 u16 sequence;
@@ -809,28 +671,41 @@ union hpi_adapterx_msg {
809 u16 unused; 671 u16 unused;
810 } program_flash; 672 } program_flash;
811 struct { 673 struct {
674 u16 index;
675 u16 what;
676 u16 property_index;
677 } property_enum;
678 struct {
812 u16 property; 679 u16 property;
813 u16 parameter1; 680 u16 parameter1;
814 u16 parameter2; 681 u16 parameter2;
815 } property_set; 682 } property_set;
816 struct { 683 struct {
817 u16 index; 684 u32 offset;
818 u16 what; 685 } query_flash;
819 u16 property_index;
820 } property_enum;
821 struct { 686 struct {
822 u16 index; 687 u32 pad32;
823 } module_info; 688 u16 key1;
689 u16 key2;
690 } restart;
824 struct { 691 struct {
825 u32 dsp_address; 692 u32 offset;
826 u32 count_bytes; 693 u32 length;
827 } debug_read; 694 u32 key;
695 } start_flash;
696 struct {
697 u32 pad32;
698 u16 value;
699 } test_assert;
700 struct {
701 u32 yes;
702 } irq_query;
828}; 703};
829 704
830struct hpi_adapter_res { 705struct hpi_adapter_res {
831 u32 serial_number; 706 u32 serial_number;
832 u16 adapter_type; 707 u16 adapter_type;
833 u16 adapter_index; /* is this needed? also used for dsp_index */ 708 u16 adapter_index;
834 u16 num_instreams; 709 u16 num_instreams;
835 u16 num_outstreams; 710 u16 num_outstreams;
836 u16 num_mixers; 711 u16 num_mixers;
@@ -839,12 +714,18 @@ struct hpi_adapter_res {
839}; 714};
840 715
841union hpi_adapterx_res { 716union hpi_adapterx_res {
842 struct hpi_adapter_res adapter; 717 struct hpi_adapter_res info;
843 struct { 718 struct {
844 u32 checksum; 719 u32 p1;
845 u32 length; 720 u16 count;
846 u32 version; 721 u16 dsp_index;
847 } query_flash; 722 u32 p2;
723 u32 dsp_msg_addr;
724 char sz_message[HPI_STRING_LEN];
725 } assert;
726 struct {
727 u32 adapter_mode;
728 } mode;
848 struct { 729 struct {
849 u16 sequence; 730 u16 sequence;
850 } program_flash; 731 } program_flash;
@@ -852,6 +733,14 @@ union hpi_adapterx_res {
852 u16 parameter1; 733 u16 parameter1;
853 u16 parameter2; 734 u16 parameter2;
854 } property_get; 735 } property_get;
736 struct {
737 u32 checksum;
738 u32 length;
739 u32 version;
740 } query_flash;
741 struct {
742 u32 yes;
743 } irq_query;
855}; 744};
856 745
857struct hpi_stream_msg { 746struct hpi_stream_msg {
@@ -863,6 +752,7 @@ struct hpi_stream_msg {
863 u32 time_scale; 752 u32 time_scale;
864 struct hpi_buffer buffer; 753 struct hpi_buffer buffer;
865 struct hpi_streamid stream; 754 struct hpi_streamid stream;
755 u32 threshold_bytes;
866 } u; 756 } u;
867}; 757};
868 758
@@ -911,7 +801,7 @@ struct hpi_stream_res {
911struct hpi_mixer_msg { 801struct hpi_mixer_msg {
912 u16 control_index; 802 u16 control_index;
913 u16 control_type; /* = HPI_CONTROL_METER _VOLUME etc */ 803 u16 control_type; /* = HPI_CONTROL_METER _VOLUME etc */
914 u16 padding1; /* maintain alignment of subsequent fields */ 804 u16 padding1; /* Maintain alignment of subsequent fields */
915 u16 node_type1; /* = HPI_SOURCENODE_LINEIN etc */ 805 u16 node_type1; /* = HPI_SOURCENODE_LINEIN etc */
916 u16 node_index1; /* = 0..N */ 806 u16 node_index1; /* = 0..N */
917 u16 node_type2; 807 u16 node_type2;
@@ -949,6 +839,11 @@ union hpi_mixerx_res {
949 u32 p_data; /* pointer to data array */ 839 u32 p_data; /* pointer to data array */
950 u16 more_to_do; /* indicates if there is more to do */ 840 u16 more_to_do; /* indicates if there is more to do */
951 } gcabi; 841 } gcabi;
842 struct {
843 u32 total_controls; /* count of controls in the mixer */
844 u32 cache_controls; /* count of controls in the cac */
845 u32 cache_bytes; /* size of cache */
846 } cache_info;
952}; 847};
953 848
954struct hpi_control_msg { 849struct hpi_control_msg {
@@ -1000,12 +895,16 @@ union hpi_control_union_res {
1000 u32 band; 895 u32 band;
1001 u32 frequency; 896 u32 frequency;
1002 u32 gain; 897 u32 gain;
1003 u32 level;
1004 u32 deemphasis; 898 u32 deemphasis;
1005 struct { 899 struct {
1006 u32 data[2]; 900 u32 data[2];
1007 u32 bLER; 901 u32 bLER;
1008 } rds; 902 } rds;
903 short s_level;
904 struct {
905 u16 value;
906 u16 mask;
907 } status;
1009 } tuner; 908 } tuner;
1010 struct { 909 struct {
1011 char sz_data[8]; 910 char sz_data[8];
@@ -1178,11 +1077,11 @@ struct hpi_profile_res_open {
1178}; 1077};
1179 1078
1180struct hpi_profile_res_time { 1079struct hpi_profile_res_time {
1181 u32 micro_seconds; 1080 u32 total_tick_count;
1182 u32 call_count; 1081 u32 call_count;
1183 u32 max_micro_seconds; 1082 u32 max_tick_count;
1184 u32 min_micro_seconds; 1083 u32 ticks_per_millisecond;
1185 u16 seconds; 1084 u16 profile_interval;
1186}; 1085};
1187 1086
1188struct hpi_profile_res_name { 1087struct hpi_profile_res_name {
@@ -1218,7 +1117,6 @@ struct hpi_message {
1218 u16 obj_index; /* */ 1117 u16 obj_index; /* */
1219 union { 1118 union {
1220 struct hpi_subsys_msg s; 1119 struct hpi_subsys_msg s;
1221 struct hpi_adapter_msg a;
1222 union hpi_adapterx_msg ax; 1120 union hpi_adapterx_msg ax;
1223 struct hpi_stream_msg d; 1121 struct hpi_stream_msg d;
1224 struct hpi_mixer_msg m; 1122 struct hpi_mixer_msg m;
@@ -1239,7 +1137,7 @@ struct hpi_message {
1239}; 1137};
1240 1138
1241#define HPI_MESSAGE_SIZE_BY_OBJECT { \ 1139#define HPI_MESSAGE_SIZE_BY_OBJECT { \
1242 sizeof(struct hpi_message_header) , /* default, no object type 0 */ \ 1140 sizeof(struct hpi_message_header) , /* Default, no object type 0 */ \
1243 sizeof(struct hpi_message_header) + sizeof(struct hpi_subsys_msg),\ 1141 sizeof(struct hpi_message_header) + sizeof(struct hpi_subsys_msg),\
1244 sizeof(struct hpi_message_header) + sizeof(union hpi_adapterx_msg),\ 1142 sizeof(struct hpi_message_header) + sizeof(union hpi_adapterx_msg),\
1245 sizeof(struct hpi_message_header) + sizeof(struct hpi_stream_msg),\ 1143 sizeof(struct hpi_message_header) + sizeof(struct hpi_stream_msg),\
@@ -1256,6 +1154,11 @@ struct hpi_message {
1256 sizeof(struct hpi_message_header) + sizeof(struct hpi_async_msg) \ 1154 sizeof(struct hpi_message_header) + sizeof(struct hpi_async_msg) \
1257} 1155}
1258 1156
1157/*
1158Note that the wSpecificError error field should be inspected and potentially
1159reported whenever HPI_ERROR_DSP_COMMUNICATION or HPI_ERROR_DSP_BOOTLOAD is
1160returned in wError.
1161*/
1259struct hpi_response_header { 1162struct hpi_response_header {
1260 u16 size; 1163 u16 size;
1261 u8 type; /* HPI_TYPE_RESPONSE */ 1164 u8 type; /* HPI_TYPE_RESPONSE */
@@ -1277,7 +1180,6 @@ struct hpi_response {
1277 u16 specific_error; /* adapter specific error */ 1180 u16 specific_error; /* adapter specific error */
1278 union { 1181 union {
1279 struct hpi_subsys_res s; 1182 struct hpi_subsys_res s;
1280 struct hpi_adapter_res a;
1281 union hpi_adapterx_res ax; 1183 union hpi_adapterx_res ax;
1282 struct hpi_stream_res d; 1184 struct hpi_stream_res d;
1283 struct hpi_mixer_res m; 1185 struct hpi_mixer_res m;
@@ -1297,7 +1199,7 @@ struct hpi_response {
1297}; 1199};
1298 1200
1299#define HPI_RESPONSE_SIZE_BY_OBJECT { \ 1201#define HPI_RESPONSE_SIZE_BY_OBJECT { \
1300 sizeof(struct hpi_response_header) ,/* default, no object type 0 */ \ 1202 sizeof(struct hpi_response_header) ,/* Default, no object type 0 */ \
1301 sizeof(struct hpi_response_header) + sizeof(struct hpi_subsys_res),\ 1203 sizeof(struct hpi_response_header) + sizeof(struct hpi_subsys_res),\
1302 sizeof(struct hpi_response_header) + sizeof(union hpi_adapterx_res),\ 1204 sizeof(struct hpi_response_header) + sizeof(union hpi_adapterx_res),\
1303 sizeof(struct hpi_response_header) + sizeof(struct hpi_stream_res),\ 1205 sizeof(struct hpi_response_header) + sizeof(struct hpi_stream_res),\
@@ -1314,7 +1216,7 @@ struct hpi_response {
1314 sizeof(struct hpi_response_header) + sizeof(struct hpi_async_res) \ 1216 sizeof(struct hpi_response_header) + sizeof(struct hpi_async_res) \
1315} 1217}
1316 1218
1317/*********************** version 1 message/response *****************************/ 1219/*********************** version 1 message/response **************************/
1318#define HPINET_ETHERNET_DATA_SIZE (1500) 1220#define HPINET_ETHERNET_DATA_SIZE (1500)
1319#define HPINET_IP_HDR_SIZE (20) 1221#define HPINET_IP_HDR_SIZE (20)
1320#define HPINET_IP_DATA_SIZE (HPINET_ETHERNET_DATA_SIZE - HPINET_IP_HDR_SIZE) 1222#define HPINET_IP_DATA_SIZE (HPINET_ETHERNET_DATA_SIZE - HPINET_IP_HDR_SIZE)
@@ -1394,6 +1296,17 @@ struct hpi_res_adapter_program_flash {
1394 sizeof(struct hpi_response_header) - sizeof(u16)]; 1296 sizeof(struct hpi_response_header) - sizeof(u16)];
1395}; 1297};
1396 1298
1299struct hpi_msg_adapter_debug_read {
1300 struct hpi_message_header h;
1301 u32 dsp_address;
1302 u32 count_bytes;
1303};
1304
1305struct hpi_res_adapter_debug_read {
1306 struct hpi_response_header h;
1307 u8 bytes[256];
1308};
1309
1397#if 1 1310#if 1
1398#define hpi_message_header_v1 hpi_message_header 1311#define hpi_message_header_v1 hpi_message_header
1399#define hpi_response_header_v1 hpi_response_header 1312#define hpi_response_header_v1 hpi_response_header
@@ -1414,23 +1327,10 @@ struct hpi_response_header_v1 {
1414}; 1327};
1415#endif 1328#endif
1416 1329
1417/* STRV HPI Packet */
1418struct hpi_msg_strv {
1419 struct hpi_message_header h;
1420 struct hpi_entity strv;
1421};
1422
1423struct hpi_res_strv {
1424 struct hpi_response_header h;
1425 struct hpi_entity strv;
1426};
1427#define MIN_STRV_PACKET_SIZE sizeof(struct hpi_res_strv)
1428
1429struct hpi_msg_payload_v0 { 1330struct hpi_msg_payload_v0 {
1430 struct hpi_message_header h; 1331 struct hpi_message_header h;
1431 union { 1332 union {
1432 struct hpi_subsys_msg s; 1333 struct hpi_subsys_msg s;
1433 struct hpi_adapter_msg a;
1434 union hpi_adapterx_msg ax; 1334 union hpi_adapterx_msg ax;
1435 struct hpi_stream_msg d; 1335 struct hpi_stream_msg d;
1436 struct hpi_mixer_msg m; 1336 struct hpi_mixer_msg m;
@@ -1451,7 +1351,6 @@ struct hpi_res_payload_v0 {
1451 struct hpi_response_header h; 1351 struct hpi_response_header h;
1452 union { 1352 union {
1453 struct hpi_subsys_res s; 1353 struct hpi_subsys_res s;
1454 struct hpi_adapter_res a;
1455 union hpi_adapterx_res ax; 1354 union hpi_adapterx_res ax;
1456 struct hpi_stream_res d; 1355 struct hpi_stream_res d;
1457 struct hpi_mixer_res m; 1356 struct hpi_mixer_res m;
@@ -1471,13 +1370,13 @@ struct hpi_res_payload_v0 {
1471union hpi_message_buffer_v1 { 1370union hpi_message_buffer_v1 {
1472 struct hpi_message m0; /* version 0 */ 1371 struct hpi_message m0; /* version 0 */
1473 struct hpi_message_header_v1 h; 1372 struct hpi_message_header_v1 h;
1474 unsigned char buf[HPI_MAX_PAYLOAD_SIZE]; 1373 u8 buf[HPI_MAX_PAYLOAD_SIZE];
1475}; 1374};
1476 1375
1477union hpi_response_buffer_v1 { 1376union hpi_response_buffer_v1 {
1478 struct hpi_response r0; /* version 0 */ 1377 struct hpi_response r0; /* version 0 */
1479 struct hpi_response_header_v1 h; 1378 struct hpi_response_header_v1 h;
1480 unsigned char buf[HPI_MAX_PAYLOAD_SIZE]; 1379 u8 buf[HPI_MAX_PAYLOAD_SIZE];
1481}; 1380};
1482 1381
1483compile_time_assert((sizeof(union hpi_message_buffer_v1) <= 1382compile_time_assert((sizeof(union hpi_message_buffer_v1) <=
@@ -1499,6 +1398,11 @@ struct hpi_control_defn {
1499/*////////////////////////////////////////////////////////////////////////// */ 1398/*////////////////////////////////////////////////////////////////////////// */
1500/* declarations for control caching (internal to HPI<->DSP interaction) */ 1399/* declarations for control caching (internal to HPI<->DSP interaction) */
1501 1400
1401/** indicates a cached u16 value is invalid. */
1402#define HPI_CACHE_INVALID_UINT16 0xFFFF
1403/** indicates a cached short value is invalid. */
1404#define HPI_CACHE_INVALID_SHORT -32768
1405
1502/** A compact representation of (part of) a controls state. 1406/** A compact representation of (part of) a controls state.
1503Used for efficient transfer of the control state 1407Used for efficient transfer of the control state
1504between DSP and host or across a network 1408between DSP and host or across a network
@@ -1512,58 +1416,104 @@ struct hpi_control_cache_info {
1512 u16 control_index; 1416 u16 control_index;
1513}; 1417};
1514 1418
1515struct hpi_control_cache_single { 1419struct hpi_control_cache_vol {
1420 struct hpi_control_cache_info i;
1421 short an_log[2];
1422 unsigned short flags;
1423 char padding[2];
1424};
1425
1426struct hpi_control_cache_meter {
1427 struct hpi_control_cache_info i;
1428 short an_log_peak[2];
1429 short an_logRMS[2];
1430};
1431
1432struct hpi_control_cache_channelmode {
1433 struct hpi_control_cache_info i;
1434 u16 mode;
1435 char temp_padding[6];
1436};
1437
1438struct hpi_control_cache_mux {
1439 struct hpi_control_cache_info i;
1440 u16 source_node_type;
1441 u16 source_node_index;
1442 char temp_padding[4];
1443};
1444
1445struct hpi_control_cache_level {
1516 struct hpi_control_cache_info i; 1446 struct hpi_control_cache_info i;
1447 short an_log[2];
1448 char temp_padding[4];
1449};
1450
1451struct hpi_control_cache_tuner {
1452 struct hpi_control_cache_info i;
1453 u32 freq_ink_hz;
1454 u16 band;
1455 short s_level_avg;
1456};
1457
1458struct hpi_control_cache_aes3rx {
1459 struct hpi_control_cache_info i;
1460 u32 error_status;
1461 u32 format;
1462};
1463
1464struct hpi_control_cache_aes3tx {
1465 struct hpi_control_cache_info i;
1466 u32 format;
1467 char temp_padding[4];
1468};
1469
1470struct hpi_control_cache_tonedetector {
1471 struct hpi_control_cache_info i;
1472 u16 state;
1473 char temp_padding[6];
1474};
1475
1476struct hpi_control_cache_silencedetector {
1477 struct hpi_control_cache_info i;
1478 u32 state;
1479 char temp_padding[4];
1480};
1481
1482struct hpi_control_cache_sampleclock {
1483 struct hpi_control_cache_info i;
1484 u16 source;
1485 u16 source_index;
1486 u32 sample_rate;
1487};
1488
1489struct hpi_control_cache_microphone {
1490 struct hpi_control_cache_info i;
1491 u16 phantom_state;
1492 char temp_padding[6];
1493};
1494
1495struct hpi_control_cache_generic {
1496 struct hpi_control_cache_info i;
1497 u32 dw1;
1498 u32 dw2;
1499};
1500
1501struct hpi_control_cache_single {
1517 union { 1502 union {
1518 struct { /* volume */ 1503 struct hpi_control_cache_info i;
1519 short an_log[2]; 1504 struct hpi_control_cache_vol vol;
1520 } v; 1505 struct hpi_control_cache_meter meter;
1521 struct { /* peak meter */ 1506 struct hpi_control_cache_channelmode mode;
1522 short an_log_peak[2]; 1507 struct hpi_control_cache_mux mux;
1523 short an_logRMS[2]; 1508 struct hpi_control_cache_level level;
1524 } p; 1509 struct hpi_control_cache_tuner tuner;
1525 struct { /* channel mode */ 1510 struct hpi_control_cache_aes3rx aes3rx;
1526 u16 mode; 1511 struct hpi_control_cache_aes3tx aes3tx;
1527 } m; 1512 struct hpi_control_cache_tonedetector tone;
1528 struct { /* multiplexer */ 1513 struct hpi_control_cache_silencedetector silence;
1529 u16 source_node_type; 1514 struct hpi_control_cache_sampleclock clk;
1530 u16 source_node_index; 1515 struct hpi_control_cache_microphone microphone;
1531 } x; 1516 struct hpi_control_cache_generic generic;
1532 struct { /* level/trim */
1533 short an_log[2];
1534 } l;
1535 struct { /* tuner - partial caching.
1536 some attributes go to the DSP. */
1537 u32 freq_ink_hz;
1538 u16 band;
1539 u16 level;
1540 } t;
1541 struct { /* AESEBU rx status */
1542 u32 error_status;
1543 u32 source;
1544 } aes3rx;
1545 struct { /* AESEBU tx */
1546 u32 format;
1547 } aes3tx;
1548 struct { /* tone detector */
1549 u16 state;
1550 } tone;
1551 struct { /* silence detector */
1552 u32 state;
1553 u32 count;
1554 } silence;
1555 struct { /* sample clock */
1556 u16 source;
1557 u16 source_index;
1558 u32 sample_rate;
1559 } clk;
1560 struct { /* microphone control */
1561 u16 state;
1562 } phantom_power;
1563 struct { /* generic control */
1564 u32 dw1;
1565 u32 dw2;
1566 } g;
1567 } u; 1517 } u;
1568}; 1518};
1569 1519
@@ -1580,8 +1530,7 @@ struct hpi_control_cache_pad {
1580 u32 traffic_anouncement; 1530 u32 traffic_anouncement;
1581}; 1531};
1582 1532
1583/*/////////////////////////////////////////////////////////////////////////// */ 1533/* 2^N sized FIFO buffer (internal to HPI<->DSP interaction) */
1584/* declarations for 2^N sized FIFO buffer (internal to HPI<->DSP interaction) */
1585struct hpi_fifo_buffer { 1534struct hpi_fifo_buffer {
1586 u32 size; 1535 u32 size;
1587 u32 dSP_index; 1536 u32 dSP_index;
@@ -1606,25 +1555,18 @@ u32 hpi_indexes_to_handle(const char c_object, const u16 adapter_index,
1606/*////////////////////////////////////////////////////////////////////////// */ 1555/*////////////////////////////////////////////////////////////////////////// */
1607 1556
1608/* main HPI entry point */ 1557/* main HPI entry point */
1609hpi_handler_func hpi_send_recv; 1558void hpi_send_recv(struct hpi_message *phm, struct hpi_response *phr);
1610
1611/* UDP message */
1612void hpi_send_recvUDP(struct hpi_message *phm, struct hpi_response *phr,
1613 const unsigned int timeout);
1614 1559
1615/* used in PnP OS/driver */ 1560/* used in PnP OS/driver */
1616u16 hpi_subsys_create_adapter(const struct hpi_hsubsys *ph_subsys, 1561u16 hpi_subsys_create_adapter(const struct hpi_resource *p_resource,
1617 const struct hpi_resource *p_resource, u16 *pw_adapter_index); 1562 u16 *pw_adapter_index);
1618 1563
1619u16 hpi_subsys_delete_adapter(const struct hpi_hsubsys *ph_subsys, 1564u16 hpi_subsys_delete_adapter(u16 adapter_index);
1620 u16 adapter_index);
1621 1565
1622u16 hpi_outstream_host_buffer_get_info(const struct hpi_hsubsys *ph_subsys, 1566u16 hpi_outstream_host_buffer_get_info(u32 h_outstream, u8 **pp_buffer,
1623 u32 h_outstream, u8 **pp_buffer,
1624 struct hpi_hostbuffer_status **pp_status); 1567 struct hpi_hostbuffer_status **pp_status);
1625 1568
1626u16 hpi_instream_host_buffer_get_info(const struct hpi_hsubsys *ph_subsys, 1569u16 hpi_instream_host_buffer_get_info(u32 h_instream, u8 **pp_buffer,
1627 u32 h_instream, u8 **pp_buffer,
1628 struct hpi_hostbuffer_status **pp_status); 1570 struct hpi_hostbuffer_status **pp_status);
1629 1571
1630u16 hpi_adapter_restart(u16 adapter_index); 1572u16 hpi_adapter_restart(u16 adapter_index);
diff --git a/sound/pci/asihpi/hpicmn.c b/sound/pci/asihpi/hpicmn.c
index d67f4d3db911..3e9c5c289764 100644
--- a/sound/pci/asihpi/hpicmn.c
+++ b/sound/pci/asihpi/hpicmn.c
@@ -26,6 +26,8 @@
26 26
27#include "hpi_internal.h" 27#include "hpi_internal.h"
28#include "hpidebug.h" 28#include "hpidebug.h"
29#include "hpimsginit.h"
30
29#include "hpicmn.h" 31#include "hpicmn.h"
30 32
31struct hpi_adapters_list { 33struct hpi_adapters_list {
@@ -43,14 +45,24 @@ static struct hpi_adapters_list adapters;
43**/ 45**/
44u16 hpi_validate_response(struct hpi_message *phm, struct hpi_response *phr) 46u16 hpi_validate_response(struct hpi_message *phm, struct hpi_response *phr)
45{ 47{
46 u16 error = 0; 48 if (phr->type != HPI_TYPE_RESPONSE) {
49 HPI_DEBUG_LOG(ERROR, "header type %d invalid\n", phr->type);
50 return HPI_ERROR_INVALID_RESPONSE;
51 }
47 52
48 if ((phr->type != HPI_TYPE_RESPONSE) 53 if (phr->object != phm->object) {
49 || (phr->object != phm->object) 54 HPI_DEBUG_LOG(ERROR, "header object %d invalid\n",
50 || (phr->function != phm->function)) 55 phr->object);
51 error = HPI_ERROR_INVALID_RESPONSE; 56 return HPI_ERROR_INVALID_RESPONSE;
57 }
58
59 if (phr->function != phm->function) {
60 HPI_DEBUG_LOG(ERROR, "header type %d invalid\n",
61 phr->function);
62 return HPI_ERROR_INVALID_RESPONSE;
63 }
52 64
53 return error; 65 return 0;
54} 66}
55 67
56u16 hpi_add_adapter(struct hpi_adapter_obj *pao) 68u16 hpi_add_adapter(struct hpi_adapter_obj *pao)
@@ -66,8 +78,18 @@ u16 hpi_add_adapter(struct hpi_adapter_obj *pao)
66 } 78 }
67 79
68 if (adapters.adapter[pao->index].adapter_type) { 80 if (adapters.adapter[pao->index].adapter_type) {
69 { 81 int a;
70 retval = HPI_DUPLICATE_ADAPTER_NUMBER; 82 for (a = HPI_MAX_ADAPTERS - 1; a >= 0; a--) {
83 if (!adapters.adapter[a].adapter_type) {
84 HPI_DEBUG_LOG(WARNING,
85 "ASI%X duplicate index %d moved to %d\n",
86 pao->adapter_type, pao->index, a);
87 pao->index = a;
88 break;
89 }
90 }
91 if (a < 0) {
92 retval = HPI_ERROR_DUPLICATE_ADAPTER_NUMBER;
71 goto unlock; 93 goto unlock;
72 } 94 }
73 } 95 }
@@ -76,17 +98,22 @@ u16 hpi_add_adapter(struct hpi_adapter_obj *pao)
76 adapters.gw_num_adapters++; 98 adapters.gw_num_adapters++;
77 99
78unlock: 100unlock:
79 hpios_alistlock_un_lock(&adapters); 101 hpios_alistlock_unlock(&adapters);
80 return retval; 102 return retval;
81} 103}
82 104
83void hpi_delete_adapter(struct hpi_adapter_obj *pao) 105void hpi_delete_adapter(struct hpi_adapter_obj *pao)
84{ 106{
85 memset(pao, 0, sizeof(struct hpi_adapter_obj)); 107 if (!pao->adapter_type) {
108 HPI_DEBUG_LOG(ERROR, "removing null adapter?\n");
109 return;
110 }
86 111
87 hpios_alistlock_lock(&adapters); 112 hpios_alistlock_lock(&adapters);
88 adapters.gw_num_adapters--; /* dec the number of adapters */ 113 if (adapters.adapter[pao->index].adapter_type)
89 hpios_alistlock_un_lock(&adapters); 114 adapters.gw_num_adapters--;
115 memset(&adapters.adapter[pao->index], 0, sizeof(adapters.adapter[0]));
116 hpios_alistlock_unlock(&adapters);
90} 117}
91 118
92/** 119/**
@@ -99,7 +126,7 @@ struct hpi_adapter_obj *hpi_find_adapter(u16 adapter_index)
99 struct hpi_adapter_obj *pao = NULL; 126 struct hpi_adapter_obj *pao = NULL;
100 127
101 if (adapter_index >= HPI_MAX_ADAPTERS) { 128 if (adapter_index >= HPI_MAX_ADAPTERS) {
102 HPI_DEBUG_LOG(VERBOSE, "find_adapter invalid index %d ", 129 HPI_DEBUG_LOG(VERBOSE, "find_adapter invalid index %d\n",
103 adapter_index); 130 adapter_index);
104 return NULL; 131 return NULL;
105 } 132 }
@@ -125,51 +152,34 @@ struct hpi_adapter_obj *hpi_find_adapter(u16 adapter_index)
125* wipe an HPI_ADAPTERS_LIST structure. 152* wipe an HPI_ADAPTERS_LIST structure.
126* 153*
127**/ 154**/
128static void wipe_adapter_list(void 155static void wipe_adapter_list(void)
129 )
130{ 156{
131 memset(&adapters, 0, sizeof(adapters)); 157 memset(&adapters, 0, sizeof(adapters));
132} 158}
133 159
134/** 160static void subsys_get_adapter(struct hpi_message *phm,
135* SubSysGetAdapters fills awAdapterList in an struct hpi_response structure 161 struct hpi_response *phr)
136* with all adapters in the given HPI_ADAPTERS_LIST.
137*
138*/
139static void subsys_get_adapters(struct hpi_response *phr)
140{ 162{
141 /* fill in the response adapter array with the position */ 163 int count = phm->obj_index;
142 /* identified by the adapter number/index of the adapters in */ 164 u16 index = 0;
143 /* this HPI */
144 /* i.e. if we have an A120 with it's jumper set to */
145 /* Adapter Number 2 then put an Adapter type A120 in the */
146 /* array in position 1 */
147 /* NOTE: AdapterNumber is 1..N, Index is 0..N-1 */
148
149 /* input: NONE */
150 /* output: wNumAdapters */
151 /* awAdapter[] */
152 /* */
153
154 short i;
155 struct hpi_adapter_obj *pao = NULL;
156 165
157 HPI_DEBUG_LOG(VERBOSE, "subsys_get_adapters\n"); 166 /* find the nCount'th nonzero adapter in array */
158 167 for (index = 0; index < HPI_MAX_ADAPTERS; index++) {
159 /* for each adapter, place it's type in the position of the array */ 168 if (adapters.adapter[index].adapter_type) {
160 /* corresponding to it's adapter number */ 169 if (!count)
161 for (i = 0; i < adapters.gw_num_adapters; i++) { 170 break;
162 pao = &adapters.adapter[i]; 171 count--;
163 if (phr->u.s.aw_adapter_list[pao->index] != 0) {
164 phr->error = HPI_DUPLICATE_ADAPTER_NUMBER;
165 phr->specific_error = pao->index;
166 return;
167 } 172 }
168 phr->u.s.aw_adapter_list[pao->index] = pao->adapter_type;
169 } 173 }
170 174
171 phr->u.s.num_adapters = adapters.gw_num_adapters; 175 if (index < HPI_MAX_ADAPTERS) {
172 phr->error = 0; /* the function completed OK; */ 176 phr->u.s.adapter_index = adapters.adapter[index].index;
177 phr->u.s.adapter_type = adapters.adapter[index].adapter_type;
178 } else {
179 phr->u.s.adapter_index = 0;
180 phr->u.s.adapter_type = 0;
181 phr->error = HPI_ERROR_BAD_ADAPTER_NUMBER;
182 }
173} 183}
174 184
175static unsigned int control_cache_alloc_check(struct hpi_control_cache *pC) 185static unsigned int control_cache_alloc_check(struct hpi_control_cache *pC)
@@ -178,67 +188,98 @@ static unsigned int control_cache_alloc_check(struct hpi_control_cache *pC)
178 int cached = 0; 188 int cached = 0;
179 if (!pC) 189 if (!pC)
180 return 0; 190 return 0;
181 if ((!pC->init) && (pC->p_cache != NULL) && (pC->control_count) 191
182 && (pC->cache_size_in_bytes) 192 if (pC->init)
183 ) { 193 return pC->init;
184 u32 *p_master_cache; 194
185 pC->init = 1; 195 if (!pC->p_cache)
186 196 return 0;
187 p_master_cache = (u32 *)pC->p_cache; 197
188 HPI_DEBUG_LOG(VERBOSE, "check %d controls\n", 198 if (pC->control_count && pC->cache_size_in_bytes) {
199 char *p_master_cache;
200 unsigned int byte_count = 0;
201
202 p_master_cache = (char *)pC->p_cache;
203 HPI_DEBUG_LOG(DEBUG, "check %d controls\n",
189 pC->control_count); 204 pC->control_count);
190 for (i = 0; i < pC->control_count; i++) { 205 for (i = 0; i < pC->control_count; i++) {
191 struct hpi_control_cache_info *info = 206 struct hpi_control_cache_info *info =
192 (struct hpi_control_cache_info *) 207 (struct hpi_control_cache_info *)
193 p_master_cache; 208 &p_master_cache[byte_count];
209
210 if (!info->size_in32bit_words) {
211 if (!i) {
212 HPI_DEBUG_LOG(INFO,
213 "adap %d cache not ready?\n",
214 pC->adap_idx);
215 return 0;
216 }
217 /* The cache is invalid.
218 * Minimum valid entry size is
219 * sizeof(struct hpi_control_cache_info)
220 */
221 HPI_DEBUG_LOG(ERROR,
222 "adap %d zero size cache entry %d\n",
223 pC->adap_idx, i);
224 break;
225 }
194 226
195 if (info->control_type) { 227 if (info->control_type) {
196 pC->p_info[i] = info; 228 pC->p_info[info->control_index] = info;
197 cached++; 229 cached++;
198 } else 230 } else /* dummy cache entry */
199 pC->p_info[i] = NULL; 231 pC->p_info[info->control_index] = NULL;
200 232
201 if (info->size_in32bit_words) 233 byte_count += info->size_in32bit_words * 4;
202 p_master_cache += info->size_in32bit_words;
203 else
204 p_master_cache +=
205 sizeof(struct
206 hpi_control_cache_single) /
207 sizeof(u32);
208 234
209 HPI_DEBUG_LOG(VERBOSE, 235 HPI_DEBUG_LOG(VERBOSE,
210 "cached %d, pinfo %p index %d type %d\n", 236 "cached %d, pinfo %p index %d type %d size %d\n",
211 cached, pC->p_info[i], info->control_index, 237 cached, pC->p_info[info->control_index],
212 info->control_type); 238 info->control_index, info->control_type,
239 info->size_in32bit_words);
240
241 /* quit loop early if whole cache has been scanned.
242 * dwControlCount is the maximum possible entries
243 * but some may be absent from the cache
244 */
245 if (byte_count >= pC->cache_size_in_bytes)
246 break;
247 /* have seen last control index */
248 if (info->control_index == pC->control_count - 1)
249 break;
213 } 250 }
214 /* 251
215 We didn't find anything to cache, so try again later ! 252 if (byte_count != pC->cache_size_in_bytes)
216 */ 253 HPI_DEBUG_LOG(WARNING,
217 if (!cached) 254 "adap %d bytecount %d != cache size %d\n",
218 pC->init = 0; 255 pC->adap_idx, byte_count,
256 pC->cache_size_in_bytes);
257 else
258 HPI_DEBUG_LOG(DEBUG,
259 "adap %d cache good, bytecount == cache size = %d\n",
260 pC->adap_idx, byte_count);
261
262 pC->init = (u16)cached;
219 } 263 }
220 return pC->init; 264 return pC->init;
221} 265}
222 266
223/** Find a control. 267/** Find a control.
224*/ 268*/
225static short find_control(struct hpi_message *phm, 269static short find_control(u16 control_index,
226 struct hpi_control_cache *p_cache, struct hpi_control_cache_info **pI, 270 struct hpi_control_cache *p_cache, struct hpi_control_cache_info **pI)
227 u16 *pw_control_index)
228{ 271{
229 *pw_control_index = phm->obj_index;
230
231 if (!control_cache_alloc_check(p_cache)) { 272 if (!control_cache_alloc_check(p_cache)) {
232 HPI_DEBUG_LOG(VERBOSE, 273 HPI_DEBUG_LOG(VERBOSE,
233 "control_cache_alloc_check() failed. adap%d ci%d\n", 274 "control_cache_alloc_check() failed %d\n",
234 phm->adapter_index, *pw_control_index); 275 control_index);
235 return 0; 276 return 0;
236 } 277 }
237 278
238 *pI = p_cache->p_info[*pw_control_index]; 279 *pI = p_cache->p_info[control_index];
239 if (!*pI) { 280 if (!*pI) {
240 HPI_DEBUG_LOG(VERBOSE, "uncached adap %d, control %d\n", 281 HPI_DEBUG_LOG(VERBOSE, "Uncached Control %d\n",
241 phm->adapter_index, *pw_control_index); 282 control_index);
242 return 0; 283 return 0;
243 } else { 284 } else {
244 HPI_DEBUG_LOG(VERBOSE, "find_control() type %d\n", 285 HPI_DEBUG_LOG(VERBOSE, "find_control() type %d\n",
@@ -247,25 +288,6 @@ static short find_control(struct hpi_message *phm,
247 return 1; 288 return 1;
248} 289}
249 290
250/** Used by the kernel driver to figure out if a buffer needs mapping.
251 */
252short hpi_check_buffer_mapping(struct hpi_control_cache *p_cache,
253 struct hpi_message *phm, void **p, unsigned int *pN)
254{
255 *pN = 0;
256 *p = NULL;
257 if ((phm->function == HPI_CONTROL_GET_STATE)
258 && (phm->object == HPI_OBJ_CONTROLEX)
259 ) {
260 u16 control_index;
261 struct hpi_control_cache_info *pI;
262
263 if (!find_control(phm, p_cache, &pI, &control_index))
264 return 0;
265 }
266 return 0;
267}
268
269/* allow unified treatment of several string fields within struct */ 291/* allow unified treatment of several string fields within struct */
270#define HPICMN_PAD_OFS_AND_SIZE(m) {\ 292#define HPICMN_PAD_OFS_AND_SIZE(m) {\
271 offsetof(struct hpi_control_cache_pad, m), \ 293 offsetof(struct hpi_control_cache_pad, m), \
@@ -290,13 +312,16 @@ short hpi_check_control_cache(struct hpi_control_cache *p_cache,
290 struct hpi_message *phm, struct hpi_response *phr) 312 struct hpi_message *phm, struct hpi_response *phr)
291{ 313{
292 short found = 1; 314 short found = 1;
293 u16 control_index;
294 struct hpi_control_cache_info *pI; 315 struct hpi_control_cache_info *pI;
295 struct hpi_control_cache_single *pC; 316 struct hpi_control_cache_single *pC;
296 struct hpi_control_cache_pad *p_pad; 317 struct hpi_control_cache_pad *p_pad;
297 318
298 if (!find_control(phm, p_cache, &pI, &control_index)) 319 if (!find_control(phm->obj_index, p_cache, &pI)) {
320 HPI_DEBUG_LOG(VERBOSE,
321 "HPICMN find_control() failed for adap %d\n",
322 phm->adapter_index);
299 return 0; 323 return 0;
324 }
300 325
301 phr->error = 0; 326 phr->error = 0;
302 327
@@ -310,55 +335,79 @@ short hpi_check_control_cache(struct hpi_control_cache *p_cache,
310 335
311 case HPI_CONTROL_METER: 336 case HPI_CONTROL_METER:
312 if (phm->u.c.attribute == HPI_METER_PEAK) { 337 if (phm->u.c.attribute == HPI_METER_PEAK) {
313 phr->u.c.an_log_value[0] = pC->u.p.an_log_peak[0]; 338 phr->u.c.an_log_value[0] = pC->u.meter.an_log_peak[0];
314 phr->u.c.an_log_value[1] = pC->u.p.an_log_peak[1]; 339 phr->u.c.an_log_value[1] = pC->u.meter.an_log_peak[1];
315 } else if (phm->u.c.attribute == HPI_METER_RMS) { 340 } else if (phm->u.c.attribute == HPI_METER_RMS) {
316 phr->u.c.an_log_value[0] = pC->u.p.an_logRMS[0]; 341 if (pC->u.meter.an_logRMS[0] ==
317 phr->u.c.an_log_value[1] = pC->u.p.an_logRMS[1]; 342 HPI_CACHE_INVALID_SHORT) {
343 phr->error =
344 HPI_ERROR_INVALID_CONTROL_ATTRIBUTE;
345 phr->u.c.an_log_value[0] = HPI_METER_MINIMUM;
346 phr->u.c.an_log_value[1] = HPI_METER_MINIMUM;
347 } else {
348 phr->u.c.an_log_value[0] =
349 pC->u.meter.an_logRMS[0];
350 phr->u.c.an_log_value[1] =
351 pC->u.meter.an_logRMS[1];
352 }
318 } else 353 } else
319 found = 0; 354 found = 0;
320 break; 355 break;
321 case HPI_CONTROL_VOLUME: 356 case HPI_CONTROL_VOLUME:
322 if (phm->u.c.attribute == HPI_VOLUME_GAIN) { 357 if (phm->u.c.attribute == HPI_VOLUME_GAIN) {
323 phr->u.c.an_log_value[0] = pC->u.v.an_log[0]; 358 phr->u.c.an_log_value[0] = pC->u.vol.an_log[0];
324 phr->u.c.an_log_value[1] = pC->u.v.an_log[1]; 359 phr->u.c.an_log_value[1] = pC->u.vol.an_log[1];
325 } else 360 } else if (phm->u.c.attribute == HPI_VOLUME_MUTE) {
361 if (pC->u.vol.flags & HPI_VOLUME_FLAG_HAS_MUTE) {
362 if (pC->u.vol.flags & HPI_VOLUME_FLAG_MUTED)
363 phr->u.c.param1 =
364 HPI_BITMASK_ALL_CHANNELS;
365 else
366 phr->u.c.param1 = 0;
367 } else {
368 phr->error =
369 HPI_ERROR_INVALID_CONTROL_ATTRIBUTE;
370 phr->u.c.param1 = 0;
371 }
372 } else {
326 found = 0; 373 found = 0;
374 }
327 break; 375 break;
328 case HPI_CONTROL_MULTIPLEXER: 376 case HPI_CONTROL_MULTIPLEXER:
329 if (phm->u.c.attribute == HPI_MULTIPLEXER_SOURCE) { 377 if (phm->u.c.attribute == HPI_MULTIPLEXER_SOURCE) {
330 phr->u.c.param1 = pC->u.x.source_node_type; 378 phr->u.c.param1 = pC->u.mux.source_node_type;
331 phr->u.c.param2 = pC->u.x.source_node_index; 379 phr->u.c.param2 = pC->u.mux.source_node_index;
332 } else { 380 } else {
333 found = 0; 381 found = 0;
334 } 382 }
335 break; 383 break;
336 case HPI_CONTROL_CHANNEL_MODE: 384 case HPI_CONTROL_CHANNEL_MODE:
337 if (phm->u.c.attribute == HPI_CHANNEL_MODE_MODE) 385 if (phm->u.c.attribute == HPI_CHANNEL_MODE_MODE)
338 phr->u.c.param1 = pC->u.m.mode; 386 phr->u.c.param1 = pC->u.mode.mode;
339 else 387 else
340 found = 0; 388 found = 0;
341 break; 389 break;
342 case HPI_CONTROL_LEVEL: 390 case HPI_CONTROL_LEVEL:
343 if (phm->u.c.attribute == HPI_LEVEL_GAIN) { 391 if (phm->u.c.attribute == HPI_LEVEL_GAIN) {
344 phr->u.c.an_log_value[0] = pC->u.l.an_log[0]; 392 phr->u.c.an_log_value[0] = pC->u.level.an_log[0];
345 phr->u.c.an_log_value[1] = pC->u.l.an_log[1]; 393 phr->u.c.an_log_value[1] = pC->u.level.an_log[1];
346 } else 394 } else
347 found = 0; 395 found = 0;
348 break; 396 break;
349 case HPI_CONTROL_TUNER: 397 case HPI_CONTROL_TUNER:
350 if (phm->u.c.attribute == HPI_TUNER_FREQ) 398 if (phm->u.c.attribute == HPI_TUNER_FREQ)
351 phr->u.c.param1 = pC->u.t.freq_ink_hz; 399 phr->u.c.param1 = pC->u.tuner.freq_ink_hz;
352 else if (phm->u.c.attribute == HPI_TUNER_BAND) 400 else if (phm->u.c.attribute == HPI_TUNER_BAND)
353 phr->u.c.param1 = pC->u.t.band; 401 phr->u.c.param1 = pC->u.tuner.band;
354 else if ((phm->u.c.attribute == HPI_TUNER_LEVEL) 402 else if (phm->u.c.attribute == HPI_TUNER_LEVEL_AVG)
355 && (phm->u.c.param1 == HPI_TUNER_LEVEL_AVERAGE)) 403 if (pC->u.tuner.s_level_avg ==
356 if (pC->u.t.level == HPI_ERROR_ILLEGAL_CACHE_VALUE) { 404 HPI_CACHE_INVALID_SHORT) {
357 phr->u.c.param1 = 0; 405 phr->u.cu.tuner.s_level = 0;
358 phr->error = 406 phr->error =
359 HPI_ERROR_INVALID_CONTROL_ATTRIBUTE; 407 HPI_ERROR_INVALID_CONTROL_ATTRIBUTE;
360 } else 408 } else
361 phr->u.c.param1 = pC->u.t.level; 409 phr->u.cu.tuner.s_level =
410 pC->u.tuner.s_level_avg;
362 else 411 else
363 found = 0; 412 found = 0;
364 break; 413 break;
@@ -366,7 +415,7 @@ short hpi_check_control_cache(struct hpi_control_cache *p_cache,
366 if (phm->u.c.attribute == HPI_AESEBURX_ERRORSTATUS) 415 if (phm->u.c.attribute == HPI_AESEBURX_ERRORSTATUS)
367 phr->u.c.param1 = pC->u.aes3rx.error_status; 416 phr->u.c.param1 = pC->u.aes3rx.error_status;
368 else if (phm->u.c.attribute == HPI_AESEBURX_FORMAT) 417 else if (phm->u.c.attribute == HPI_AESEBURX_FORMAT)
369 phr->u.c.param1 = pC->u.aes3rx.source; 418 phr->u.c.param1 = pC->u.aes3rx.format;
370 else 419 else
371 found = 0; 420 found = 0;
372 break; 421 break;
@@ -385,13 +434,12 @@ short hpi_check_control_cache(struct hpi_control_cache *p_cache,
385 case HPI_CONTROL_SILENCEDETECTOR: 434 case HPI_CONTROL_SILENCEDETECTOR:
386 if (phm->u.c.attribute == HPI_SILENCEDETECTOR_STATE) { 435 if (phm->u.c.attribute == HPI_SILENCEDETECTOR_STATE) {
387 phr->u.c.param1 = pC->u.silence.state; 436 phr->u.c.param1 = pC->u.silence.state;
388 phr->u.c.param2 = pC->u.silence.count;
389 } else 437 } else
390 found = 0; 438 found = 0;
391 break; 439 break;
392 case HPI_CONTROL_MICROPHONE: 440 case HPI_CONTROL_MICROPHONE:
393 if (phm->u.c.attribute == HPI_MICROPHONE_PHANTOM_POWER) 441 if (phm->u.c.attribute == HPI_MICROPHONE_PHANTOM_POWER)
394 phr->u.c.param1 = pC->u.phantom_power.state; 442 phr->u.c.param1 = pC->u.microphone.phantom_state;
395 else 443 else
396 found = 0; 444 found = 0;
397 break; 445 break;
@@ -400,7 +448,7 @@ short hpi_check_control_cache(struct hpi_control_cache *p_cache,
400 phr->u.c.param1 = pC->u.clk.source; 448 phr->u.c.param1 = pC->u.clk.source;
401 else if (phm->u.c.attribute == HPI_SAMPLECLOCK_SOURCE_INDEX) { 449 else if (phm->u.c.attribute == HPI_SAMPLECLOCK_SOURCE_INDEX) {
402 if (pC->u.clk.source_index == 450 if (pC->u.clk.source_index ==
403 HPI_ERROR_ILLEGAL_CACHE_VALUE) { 451 HPI_CACHE_INVALID_UINT16) {
404 phr->u.c.param1 = 0; 452 phr->u.c.param1 = 0;
405 phr->error = 453 phr->error =
406 HPI_ERROR_INVALID_CONTROL_ATTRIBUTE; 454 HPI_ERROR_INVALID_CONTROL_ATTRIBUTE;
@@ -411,60 +459,63 @@ short hpi_check_control_cache(struct hpi_control_cache *p_cache,
411 else 459 else
412 found = 0; 460 found = 0;
413 break; 461 break;
414 case HPI_CONTROL_PAD: 462 case HPI_CONTROL_PAD:{
463 struct hpi_control_cache_pad *p_pad;
464 p_pad = (struct hpi_control_cache_pad *)pI;
415 465
416 if (!(p_pad->field_valid_flags & (1 << 466 if (!(p_pad->field_valid_flags & (1 <<
417 HPI_CTL_ATTR_INDEX(phm->u.c. 467 HPI_CTL_ATTR_INDEX(phm->u.c.
418 attribute)))) { 468 attribute)))) {
419 phr->error = HPI_ERROR_INVALID_CONTROL_ATTRIBUTE;
420 break;
421 }
422
423 if (phm->u.c.attribute == HPI_PAD_PROGRAM_ID)
424 phr->u.c.param1 = p_pad->pI;
425 else if (phm->u.c.attribute == HPI_PAD_PROGRAM_TYPE)
426 phr->u.c.param1 = p_pad->pTY;
427 else {
428 unsigned int index =
429 HPI_CTL_ATTR_INDEX(phm->u.c.attribute) - 1;
430 unsigned int offset = phm->u.c.param1;
431 unsigned int pad_string_len, field_size;
432 char *pad_string;
433 unsigned int tocopy;
434
435 HPI_DEBUG_LOG(VERBOSE, "PADS HPI_PADS_ %d\n",
436 phm->u.c.attribute);
437
438 if (index > ARRAY_SIZE(pad_desc) - 1) {
439 phr->error = 469 phr->error =
440 HPI_ERROR_INVALID_CONTROL_ATTRIBUTE; 470 HPI_ERROR_INVALID_CONTROL_ATTRIBUTE;
441 break; 471 break;
442 } 472 }
443 473
444 pad_string = ((char *)p_pad) + pad_desc[index].offset; 474 if (phm->u.c.attribute == HPI_PAD_PROGRAM_ID)
445 field_size = pad_desc[index].field_size; 475 phr->u.c.param1 = p_pad->pI;
446 /* Ensure null terminator */ 476 else if (phm->u.c.attribute == HPI_PAD_PROGRAM_TYPE)
447 pad_string[field_size - 1] = 0; 477 phr->u.c.param1 = p_pad->pTY;
448 478 else {
449 pad_string_len = strlen(pad_string) + 1; 479 unsigned int index =
450 480 HPI_CTL_ATTR_INDEX(phm->u.c.
451 if (offset > pad_string_len) { 481 attribute) - 1;
452 phr->error = HPI_ERROR_INVALID_CONTROL_VALUE; 482 unsigned int offset = phm->u.c.param1;
453 break; 483 unsigned int pad_string_len, field_size;
484 char *pad_string;
485 unsigned int tocopy;
486
487 if (index > ARRAY_SIZE(pad_desc) - 1) {
488 phr->error =
489 HPI_ERROR_INVALID_CONTROL_ATTRIBUTE;
490 break;
491 }
492
493 pad_string =
494 ((char *)p_pad) +
495 pad_desc[index].offset;
496 field_size = pad_desc[index].field_size;
497 /* Ensure null terminator */
498 pad_string[field_size - 1] = 0;
499
500 pad_string_len = strlen(pad_string) + 1;
501
502 if (offset > pad_string_len) {
503 phr->error =
504 HPI_ERROR_INVALID_CONTROL_VALUE;
505 break;
506 }
507
508 tocopy = pad_string_len - offset;
509 if (tocopy > sizeof(phr->u.cu.chars8.sz_data))
510 tocopy = sizeof(phr->u.cu.chars8.
511 sz_data);
512
513 memcpy(phr->u.cu.chars8.sz_data,
514 &pad_string[offset], tocopy);
515
516 phr->u.cu.chars8.remaining_chars =
517 pad_string_len - offset - tocopy;
454 } 518 }
455
456 tocopy = pad_string_len - offset;
457 if (tocopy > sizeof(phr->u.cu.chars8.sz_data))
458 tocopy = sizeof(phr->u.cu.chars8.sz_data);
459
460 HPI_DEBUG_LOG(VERBOSE,
461 "PADS memcpy(%d), offset %d \n", tocopy,
462 offset);
463 memcpy(phr->u.cu.chars8.sz_data, &pad_string[offset],
464 tocopy);
465
466 phr->u.cu.chars8.remaining_chars =
467 pad_string_len - offset - tocopy;
468 } 519 }
469 break; 520 break;
470 default: 521 default:
@@ -472,16 +523,9 @@ short hpi_check_control_cache(struct hpi_control_cache *p_cache,
472 break; 523 break;
473 } 524 }
474 525
475 if (found) 526 HPI_DEBUG_LOG(VERBOSE, "%s Adap %d, Ctl %d, Type %d, Attr %d\n",
476 HPI_DEBUG_LOG(VERBOSE, 527 found ? "Cached" : "Uncached", phm->adapter_index,
477 "cached adap %d, ctl %d, type %d, attr %d\n", 528 pI->control_index, pI->control_type, phm->u.c.attribute);
478 phm->adapter_index, pI->control_index,
479 pI->control_type, phm->u.c.attribute);
480 else
481 HPI_DEBUG_LOG(VERBOSE,
482 "uncached adap %d, ctl %d, ctl type %d\n",
483 phm->adapter_index, pI->control_index,
484 pI->control_type);
485 529
486 if (found) 530 if (found)
487 phr->size = 531 phr->size =
@@ -497,18 +541,21 @@ Only update if no error.
497Volume and Level return the limited values in the response, so use these 541Volume and Level return the limited values in the response, so use these
498Multiplexer does so use sent values 542Multiplexer does so use sent values
499*/ 543*/
500void hpi_sync_control_cache(struct hpi_control_cache *p_cache, 544void hpi_cmn_control_cache_sync_to_msg(struct hpi_control_cache *p_cache,
501 struct hpi_message *phm, struct hpi_response *phr) 545 struct hpi_message *phm, struct hpi_response *phr)
502{ 546{
503 u16 control_index;
504 struct hpi_control_cache_single *pC; 547 struct hpi_control_cache_single *pC;
505 struct hpi_control_cache_info *pI; 548 struct hpi_control_cache_info *pI;
506 549
507 if (phr->error) 550 if (phr->error)
508 return; 551 return;
509 552
510 if (!find_control(phm, p_cache, &pI, &control_index)) 553 if (!find_control(phm->obj_index, p_cache, &pI)) {
554 HPI_DEBUG_LOG(VERBOSE,
555 "HPICMN find_control() failed for adap %d\n",
556 phm->adapter_index);
511 return; 557 return;
558 }
512 559
513 /* pC is the default cached control strucure. 560 /* pC is the default cached control strucure.
514 May be cast to something else in the following switch statement. 561 May be cast to something else in the following switch statement.
@@ -518,31 +565,36 @@ void hpi_sync_control_cache(struct hpi_control_cache *p_cache,
518 switch (pI->control_type) { 565 switch (pI->control_type) {
519 case HPI_CONTROL_VOLUME: 566 case HPI_CONTROL_VOLUME:
520 if (phm->u.c.attribute == HPI_VOLUME_GAIN) { 567 if (phm->u.c.attribute == HPI_VOLUME_GAIN) {
521 pC->u.v.an_log[0] = phr->u.c.an_log_value[0]; 568 pC->u.vol.an_log[0] = phr->u.c.an_log_value[0];
522 pC->u.v.an_log[1] = phr->u.c.an_log_value[1]; 569 pC->u.vol.an_log[1] = phr->u.c.an_log_value[1];
570 } else if (phm->u.c.attribute == HPI_VOLUME_MUTE) {
571 if (phm->u.c.param1)
572 pC->u.vol.flags |= HPI_VOLUME_FLAG_MUTED;
573 else
574 pC->u.vol.flags &= ~HPI_VOLUME_FLAG_MUTED;
523 } 575 }
524 break; 576 break;
525 case HPI_CONTROL_MULTIPLEXER: 577 case HPI_CONTROL_MULTIPLEXER:
526 /* mux does not return its setting on Set command. */ 578 /* mux does not return its setting on Set command. */
527 if (phm->u.c.attribute == HPI_MULTIPLEXER_SOURCE) { 579 if (phm->u.c.attribute == HPI_MULTIPLEXER_SOURCE) {
528 pC->u.x.source_node_type = (u16)phm->u.c.param1; 580 pC->u.mux.source_node_type = (u16)phm->u.c.param1;
529 pC->u.x.source_node_index = (u16)phm->u.c.param2; 581 pC->u.mux.source_node_index = (u16)phm->u.c.param2;
530 } 582 }
531 break; 583 break;
532 case HPI_CONTROL_CHANNEL_MODE: 584 case HPI_CONTROL_CHANNEL_MODE:
533 /* mode does not return its setting on Set command. */ 585 /* mode does not return its setting on Set command. */
534 if (phm->u.c.attribute == HPI_CHANNEL_MODE_MODE) 586 if (phm->u.c.attribute == HPI_CHANNEL_MODE_MODE)
535 pC->u.m.mode = (u16)phm->u.c.param1; 587 pC->u.mode.mode = (u16)phm->u.c.param1;
536 break; 588 break;
537 case HPI_CONTROL_LEVEL: 589 case HPI_CONTROL_LEVEL:
538 if (phm->u.c.attribute == HPI_LEVEL_GAIN) { 590 if (phm->u.c.attribute == HPI_LEVEL_GAIN) {
539 pC->u.v.an_log[0] = phr->u.c.an_log_value[0]; 591 pC->u.vol.an_log[0] = phr->u.c.an_log_value[0];
540 pC->u.v.an_log[1] = phr->u.c.an_log_value[1]; 592 pC->u.vol.an_log[1] = phr->u.c.an_log_value[1];
541 } 593 }
542 break; 594 break;
543 case HPI_CONTROL_MICROPHONE: 595 case HPI_CONTROL_MICROPHONE:
544 if (phm->u.c.attribute == HPI_MICROPHONE_PHANTOM_POWER) 596 if (phm->u.c.attribute == HPI_MICROPHONE_PHANTOM_POWER)
545 pC->u.phantom_power.state = (u16)phm->u.c.param1; 597 pC->u.microphone.phantom_state = (u16)phm->u.c.param1;
546 break; 598 break;
547 case HPI_CONTROL_AESEBU_TRANSMITTER: 599 case HPI_CONTROL_AESEBU_TRANSMITTER:
548 if (phm->u.c.attribute == HPI_AESEBUTX_FORMAT) 600 if (phm->u.c.attribute == HPI_AESEBUTX_FORMAT)
@@ -550,7 +602,7 @@ void hpi_sync_control_cache(struct hpi_control_cache *p_cache,
550 break; 602 break;
551 case HPI_CONTROL_AESEBU_RECEIVER: 603 case HPI_CONTROL_AESEBU_RECEIVER:
552 if (phm->u.c.attribute == HPI_AESEBURX_FORMAT) 604 if (phm->u.c.attribute == HPI_AESEBURX_FORMAT)
553 pC->u.aes3rx.source = phm->u.c.param1; 605 pC->u.aes3rx.format = phm->u.c.param1;
554 break; 606 break;
555 case HPI_CONTROL_SAMPLECLOCK: 607 case HPI_CONTROL_SAMPLECLOCK:
556 if (phm->u.c.attribute == HPI_SAMPLECLOCK_SOURCE) 608 if (phm->u.c.attribute == HPI_SAMPLECLOCK_SOURCE)
@@ -565,59 +617,57 @@ void hpi_sync_control_cache(struct hpi_control_cache *p_cache,
565 } 617 }
566} 618}
567 619
568struct hpi_control_cache *hpi_alloc_control_cache(const u32 620struct hpi_control_cache *hpi_alloc_control_cache(const u32 control_count,
569 number_of_controls, const u32 size_in_bytes, 621 const u32 size_in_bytes, u8 *p_dsp_control_buffer)
570 struct hpi_control_cache_info *pDSP_control_buffer)
571{ 622{
572 struct hpi_control_cache *p_cache = 623 struct hpi_control_cache *p_cache =
573 kmalloc(sizeof(*p_cache), GFP_KERNEL); 624 kmalloc(sizeof(*p_cache), GFP_KERNEL);
574 if (!p_cache) 625 if (!p_cache)
575 return NULL; 626 return NULL;
627
576 p_cache->p_info = 628 p_cache->p_info =
577 kmalloc(sizeof(*p_cache->p_info) * number_of_controls, 629 kmalloc(sizeof(*p_cache->p_info) * control_count, GFP_KERNEL);
578 GFP_KERNEL);
579 if (!p_cache->p_info) { 630 if (!p_cache->p_info) {
580 kfree(p_cache); 631 kfree(p_cache);
581 return NULL; 632 return NULL;
582 } 633 }
634 memset(p_cache->p_info, 0, sizeof(*p_cache->p_info) * control_count);
583 p_cache->cache_size_in_bytes = size_in_bytes; 635 p_cache->cache_size_in_bytes = size_in_bytes;
584 p_cache->control_count = number_of_controls; 636 p_cache->control_count = control_count;
585 p_cache->p_cache = 637 p_cache->p_cache = p_dsp_control_buffer;
586 (struct hpi_control_cache_single *)pDSP_control_buffer;
587 p_cache->init = 0; 638 p_cache->init = 0;
588 return p_cache; 639 return p_cache;
589} 640}
590 641
591void hpi_free_control_cache(struct hpi_control_cache *p_cache) 642void hpi_free_control_cache(struct hpi_control_cache *p_cache)
592{ 643{
593 if (p_cache->init) { 644 if (p_cache) {
594 kfree(p_cache->p_info); 645 kfree(p_cache->p_info);
595 p_cache->p_info = NULL;
596 p_cache->init = 0;
597 kfree(p_cache); 646 kfree(p_cache);
598 } 647 }
599} 648}
600 649
601static void subsys_message(struct hpi_message *phm, struct hpi_response *phr) 650static void subsys_message(struct hpi_message *phm, struct hpi_response *phr)
602{ 651{
652 hpi_init_response(phr, HPI_OBJ_SUBSYSTEM, phm->function, 0);
603 653
604 switch (phm->function) { 654 switch (phm->function) {
605 case HPI_SUBSYS_OPEN: 655 case HPI_SUBSYS_OPEN:
606 case HPI_SUBSYS_CLOSE: 656 case HPI_SUBSYS_CLOSE:
607 case HPI_SUBSYS_DRIVER_UNLOAD: 657 case HPI_SUBSYS_DRIVER_UNLOAD:
608 phr->error = 0;
609 break; 658 break;
610 case HPI_SUBSYS_DRIVER_LOAD: 659 case HPI_SUBSYS_DRIVER_LOAD:
611 wipe_adapter_list(); 660 wipe_adapter_list();
612 hpios_alistlock_init(&adapters); 661 hpios_alistlock_init(&adapters);
613 phr->error = 0;
614 break; 662 break;
615 case HPI_SUBSYS_GET_INFO: 663 case HPI_SUBSYS_GET_ADAPTER:
616 subsys_get_adapters(phr); 664 subsys_get_adapter(phm, phr);
665 break;
666 case HPI_SUBSYS_GET_NUM_ADAPTERS:
667 phr->u.s.num_adapters = adapters.gw_num_adapters;
617 break; 668 break;
618 case HPI_SUBSYS_CREATE_ADAPTER: 669 case HPI_SUBSYS_CREATE_ADAPTER:
619 case HPI_SUBSYS_DELETE_ADAPTER: 670 case HPI_SUBSYS_DELETE_ADAPTER:
620 phr->error = 0;
621 break; 671 break;
622 default: 672 default:
623 phr->error = HPI_ERROR_INVALID_FUNC; 673 phr->error = HPI_ERROR_INVALID_FUNC;
diff --git a/sound/pci/asihpi/hpicmn.h b/sound/pci/asihpi/hpicmn.h
index 6229022f56cb..590f0b69e655 100644
--- a/sound/pci/asihpi/hpicmn.h
+++ b/sound/pci/asihpi/hpicmn.h
@@ -33,18 +33,19 @@ struct hpi_adapter_obj {
33}; 33};
34 34
35struct hpi_control_cache { 35struct hpi_control_cache {
36 u32 init; /**< indicates whether the 36 /** indicates whether the structures are initialized */
37 structures are initialized */ 37 u16 init;
38 u16 adap_idx;
38 u32 control_count; 39 u32 control_count;
39 u32 cache_size_in_bytes; 40 u32 cache_size_in_bytes;
40 struct hpi_control_cache_info 41 /** pointer to allocated memory of lookup pointers. */
41 **p_info; /**< pointer to allocated memory of 42 struct hpi_control_cache_info **p_info;
42 lookup pointers. */ 43 /** pointer to DSP's control cache. */
43 struct hpi_control_cache_single 44 u8 *p_cache;
44 *p_cache; /**< pointer to DSP's control cache. */
45}; 45};
46 46
47struct hpi_adapter_obj *hpi_find_adapter(u16 adapter_index); 47struct hpi_adapter_obj *hpi_find_adapter(u16 adapter_index);
48
48u16 hpi_add_adapter(struct hpi_adapter_obj *pao); 49u16 hpi_add_adapter(struct hpi_adapter_obj *pao);
49 50
50void hpi_delete_adapter(struct hpi_adapter_obj *pao); 51void hpi_delete_adapter(struct hpi_adapter_obj *pao);
@@ -52,13 +53,10 @@ void hpi_delete_adapter(struct hpi_adapter_obj *pao);
52short hpi_check_control_cache(struct hpi_control_cache *pC, 53short hpi_check_control_cache(struct hpi_control_cache *pC,
53 struct hpi_message *phm, struct hpi_response *phr); 54 struct hpi_message *phm, struct hpi_response *phr);
54struct hpi_control_cache *hpi_alloc_control_cache(const u32 55struct hpi_control_cache *hpi_alloc_control_cache(const u32
55 number_of_controls, const u32 size_in_bytes, 56 number_of_controls, const u32 size_in_bytes, u8 *pDSP_control_buffer);
56 struct hpi_control_cache_info
57 *pDSP_control_buffer);
58void hpi_free_control_cache(struct hpi_control_cache *p_cache); 57void hpi_free_control_cache(struct hpi_control_cache *p_cache);
59 58
60void hpi_sync_control_cache(struct hpi_control_cache *pC, 59void hpi_cmn_control_cache_sync_to_msg(struct hpi_control_cache *pC,
61 struct hpi_message *phm, struct hpi_response *phr); 60 struct hpi_message *phm, struct hpi_response *phr);
61
62u16 hpi_validate_response(struct hpi_message *phm, struct hpi_response *phr); 62u16 hpi_validate_response(struct hpi_message *phm, struct hpi_response *phr);
63short hpi_check_buffer_mapping(struct hpi_control_cache *p_cache,
64 struct hpi_message *phm, void **p, unsigned int *pN);
diff --git a/sound/pci/asihpi/hpidebug.c b/sound/pci/asihpi/hpidebug.c
index 949836ec913a..b52baf62791e 100644
--- a/sound/pci/asihpi/hpidebug.c
+++ b/sound/pci/asihpi/hpidebug.c
@@ -45,161 +45,14 @@ int hpi_debug_level_get(void)
45 return hpi_debug_level; 45 return hpi_debug_level;
46} 46}
47 47
48#ifdef HPIOS_DEBUG_PRINT
49/* implies OS has no printf-like function */
50#include <stdarg.h>
51
52void hpi_debug_printf(char *fmt, ...)
53{
54 va_list arglist;
55 char buffer[128];
56
57 va_start(arglist, fmt);
58
59 if (buffer[0])
60 HPIOS_DEBUG_PRINT(buffer);
61 va_end(arglist);
62}
63#endif
64
65struct treenode {
66 void *array;
67 unsigned int num_elements;
68};
69
70#define make_treenode_from_array(nodename, array) \
71static void *tmp_strarray_##nodename[] = array; \
72static struct treenode nodename = { \
73 &tmp_strarray_##nodename, \
74 ARRAY_SIZE(tmp_strarray_##nodename) \
75};
76
77#define get_treenode_elem(node_ptr, idx, type) \
78 (&(*((type *)(node_ptr)->array)[idx]))
79
80make_treenode_from_array(hpi_control_type_strings, HPI_CONTROL_TYPE_STRINGS)
81
82 make_treenode_from_array(hpi_subsys_strings, HPI_SUBSYS_STRINGS)
83 make_treenode_from_array(hpi_adapter_strings, HPI_ADAPTER_STRINGS)
84 make_treenode_from_array(hpi_istream_strings, HPI_ISTREAM_STRINGS)
85 make_treenode_from_array(hpi_ostream_strings, HPI_OSTREAM_STRINGS)
86 make_treenode_from_array(hpi_mixer_strings, HPI_MIXER_STRINGS)
87 make_treenode_from_array(hpi_node_strings,
88 {
89 "NODE is invalid object"})
90
91 make_treenode_from_array(hpi_control_strings, HPI_CONTROL_STRINGS)
92 make_treenode_from_array(hpi_nvmemory_strings, HPI_OBJ_STRINGS)
93 make_treenode_from_array(hpi_digitalio_strings, HPI_DIGITALIO_STRINGS)
94 make_treenode_from_array(hpi_watchdog_strings, HPI_WATCHDOG_STRINGS)
95 make_treenode_from_array(hpi_clock_strings, HPI_CLOCK_STRINGS)
96 make_treenode_from_array(hpi_profile_strings, HPI_PROFILE_STRINGS)
97 make_treenode_from_array(hpi_asyncevent_strings, HPI_ASYNCEVENT_STRINGS)
98#define HPI_FUNCTION_STRINGS \
99{ \
100 &hpi_subsys_strings,\
101 &hpi_adapter_strings,\
102 &hpi_ostream_strings,\
103 &hpi_istream_strings,\
104 &hpi_mixer_strings,\
105 &hpi_node_strings,\
106 &hpi_control_strings,\
107 &hpi_nvmemory_strings,\
108 &hpi_digitalio_strings,\
109 &hpi_watchdog_strings,\
110 &hpi_clock_strings,\
111 &hpi_profile_strings,\
112 &hpi_control_strings, \
113 &hpi_asyncevent_strings \
114}
115 make_treenode_from_array(hpi_function_strings, HPI_FUNCTION_STRINGS)
116
117 compile_time_assert(HPI_OBJ_MAXINDEX == 14, obj_list_doesnt_match);
118
119static char *hpi_function_string(unsigned int function)
120{
121 unsigned int object;
122 struct treenode *tmp;
123
124 object = function / HPI_OBJ_FUNCTION_SPACING;
125 function = function - object * HPI_OBJ_FUNCTION_SPACING;
126
127 if (object == 0 || object == HPI_OBJ_NODE
128 || object > hpi_function_strings.num_elements)
129 return "invalid object";
130
131 tmp = get_treenode_elem(&hpi_function_strings, object - 1,
132 struct treenode *);
133
134 if (function == 0 || function > tmp->num_elements)
135 return "invalid function";
136
137 return get_treenode_elem(tmp, function - 1, char *);
138}
139
140void hpi_debug_message(struct hpi_message *phm, char *sz_fileline) 48void hpi_debug_message(struct hpi_message *phm, char *sz_fileline)
141{ 49{
142 if (phm) { 50 if (phm) {
143 if ((phm->object <= HPI_OBJ_MAXINDEX) && phm->object) { 51 printk(KERN_DEBUG "HPI_MSG%d,%d,%d,%d,%d\n", phm->version,
144 u16 index = 0; 52 phm->adapter_index, phm->obj_index, phm->function,
145 u16 attrib = 0; 53 phm->u.c.attribute);
146 int is_control = 0; 54 }
147 55
148 index = phm->obj_index;
149 switch (phm->object) {
150 case HPI_OBJ_ADAPTER:
151 case HPI_OBJ_PROFILE:
152 break;
153 case HPI_OBJ_MIXER:
154 if (phm->function ==
155 HPI_MIXER_GET_CONTROL_BY_INDEX)
156 index = phm->u.m.control_index;
157 break;
158 case HPI_OBJ_OSTREAM:
159 case HPI_OBJ_ISTREAM:
160 break;
161
162 case HPI_OBJ_CONTROLEX:
163 case HPI_OBJ_CONTROL:
164 if (phm->version == 1)
165 attrib = HPI_CTL_ATTR(UNIVERSAL, 1);
166 else
167 attrib = phm->u.c.attribute;
168 is_control = 1;
169 break;
170 default:
171 break;
172 }
173
174 if (is_control && (attrib & 0xFF00)) {
175 int control_type = (attrib & 0xFF00) >> 8;
176 int attr_index = HPI_CTL_ATTR_INDEX(attrib);
177 /* note the KERN facility level
178 is in szFileline already */
179 printk("%s adapter %d %s "
180 "ctrl_index x%04x %s %d\n",
181 sz_fileline, phm->adapter_index,
182 hpi_function_string(phm->function),
183 index,
184 get_treenode_elem
185 (&hpi_control_type_strings,
186 control_type, char *),
187 attr_index);
188
189 } else
190 printk("%s adapter %d %s "
191 "idx x%04x attr x%04x \n",
192 sz_fileline, phm->adapter_index,
193 hpi_function_string(phm->function),
194 index, attrib);
195 } else {
196 printk("adap=%d, invalid obj=%d, func=0x%x\n",
197 phm->adapter_index, phm->object,
198 phm->function);
199 }
200 } else
201 printk(KERN_ERR
202 "NULL message pointer to hpi_debug_message!\n");
203} 56}
204 57
205void hpi_debug_data(u16 *pdata, u32 len) 58void hpi_debug_data(u16 *pdata, u32 len)
diff --git a/sound/pci/asihpi/hpidebug.h b/sound/pci/asihpi/hpidebug.h
index a2f0952a99f0..940f54c3c538 100644
--- a/sound/pci/asihpi/hpidebug.h
+++ b/sound/pci/asihpi/hpidebug.h
@@ -37,7 +37,7 @@ enum { HPI_DEBUG_LEVEL_ERROR = 0, /* always log errors */
37#define HPI_DEBUG_LEVEL_DEFAULT HPI_DEBUG_LEVEL_NOTICE 37#define HPI_DEBUG_LEVEL_DEFAULT HPI_DEBUG_LEVEL_NOTICE
38 38
39/* an OS can define an extra flag string that is appended to 39/* an OS can define an extra flag string that is appended to
40 the start of each message, eg see hpios_linux.h */ 40 the start of each message, eg see linux kernel hpios.h */
41 41
42#ifdef SOURCEFILE_NAME 42#ifdef SOURCEFILE_NAME
43#define FILE_LINE SOURCEFILE_NAME ":" __stringify(__LINE__) " " 43#define FILE_LINE SOURCEFILE_NAME ":" __stringify(__LINE__) " "
@@ -45,18 +45,11 @@ enum { HPI_DEBUG_LEVEL_ERROR = 0, /* always log errors */
45#define FILE_LINE __FILE__ ":" __stringify(__LINE__) " " 45#define FILE_LINE __FILE__ ":" __stringify(__LINE__) " "
46#endif 46#endif
47 47
48#if defined(HPI_DEBUG) && defined(_WINDOWS)
49#define HPI_DEBUGBREAK() debug_break()
50#else
51#define HPI_DEBUGBREAK()
52#endif
53
54#define HPI_DEBUG_ASSERT(expression) \ 48#define HPI_DEBUG_ASSERT(expression) \
55 do { \ 49 do { \
56 if (!(expression)) {\ 50 if (!(expression)) { \
57 printk(KERN_ERR FILE_LINE\ 51 printk(KERN_ERR FILE_LINE \
58 "ASSERT " __stringify(expression));\ 52 "ASSERT " __stringify(expression)); \
59 HPI_DEBUGBREAK();\
60 } \ 53 } \
61 } while (0) 54 } while (0)
62 55
@@ -78,28 +71,27 @@ void hpi_debug_message(struct hpi_message *phm, char *sz_fileline);
78 71
79void hpi_debug_data(u16 *pdata, u32 len); 72void hpi_debug_data(u16 *pdata, u32 len);
80 73
81#define HPI_DEBUG_DATA(pdata, len) \ 74#define HPI_DEBUG_DATA(pdata, len) \
82 do { \ 75 do { \
83 if (hpi_debug_level >= HPI_DEBUG_LEVEL_VERBOSE) \ 76 if (hpi_debug_level >= HPI_DEBUG_LEVEL_VERBOSE) \
84 hpi_debug_data(pdata, len); \ 77 hpi_debug_data(pdata, len); \
85 } while (0) 78 } while (0)
86 79
87#define HPI_DEBUG_MESSAGE(level, phm) \ 80#define HPI_DEBUG_MESSAGE(level, phm) \
88 do { \ 81 do { \
89 if (hpi_debug_level >= HPI_DEBUG_LEVEL_##level) { \ 82 if (hpi_debug_level >= HPI_DEBUG_LEVEL_##level) { \
90 hpi_debug_message(phm,HPI_DEBUG_FLAG_##level \ 83 hpi_debug_message(phm, HPI_DEBUG_FLAG_##level \
91 FILE_LINE __stringify(level));\ 84 FILE_LINE __stringify(level)); \
92 } \ 85 } \
93 } while (0) 86 } while (0)
94 87
95#define HPI_DEBUG_RESPONSE(phr) \ 88#define HPI_DEBUG_RESPONSE(phr) \
96 do { \ 89 do { \
97 if ((hpi_debug_level >= HPI_DEBUG_LEVEL_DEBUG) && (phr->error))\ 90 if (((hpi_debug_level >= HPI_DEBUG_LEVEL_DEBUG) && \
98 HPI_DEBUG_LOG(ERROR, \ 91 (phr->error)) ||\
99 "HPI response - error# %d\n", \ 92 (hpi_debug_level >= HPI_DEBUG_LEVEL_VERBOSE)) \
100 phr->error); \ 93 printk(KERN_DEBUG "HPI_RES%d,%d,%d\n", \
101 else if (hpi_debug_level >= HPI_DEBUG_LEVEL_VERBOSE) \ 94 phr->version, phr->error, phr->specific_error); \
102 HPI_DEBUG_LOG(VERBOSE, "HPI response OK\n");\
103 } while (0) 95 } while (0)
104 96
105#ifndef compile_time_assert 97#ifndef compile_time_assert
@@ -107,279 +99,4 @@ void hpi_debug_data(u16 *pdata, u32 len);
107 typedef char msg[(cond) ? 1 : -1] 99 typedef char msg[(cond) ? 1 : -1]
108#endif 100#endif
109 101
110 /* check that size is exactly some number */ 102#endif /* _HPIDEBUG_H_ */
111#define function_count_check(sym, size) \
112 compile_time_assert((sym##_FUNCTION_COUNT) == (size),\
113 strings_match_defs_##sym)
114
115/* These strings should be generated using a macro which defines
116 the corresponding symbol values. */
117#define HPI_OBJ_STRINGS \
118{ \
119 "HPI_OBJ_SUBSYSTEM", \
120 "HPI_OBJ_ADAPTER", \
121 "HPI_OBJ_OSTREAM", \
122 "HPI_OBJ_ISTREAM", \
123 "HPI_OBJ_MIXER", \
124 "HPI_OBJ_NODE", \
125 "HPI_OBJ_CONTROL", \
126 "HPI_OBJ_NVMEMORY", \
127 "HPI_OBJ_DIGITALIO", \
128 "HPI_OBJ_WATCHDOG", \
129 "HPI_OBJ_CLOCK", \
130 "HPI_OBJ_PROFILE", \
131 "HPI_OBJ_CONTROLEX" \
132}
133
134#define HPI_SUBSYS_STRINGS \
135{ \
136 "HPI_SUBSYS_OPEN", \
137 "HPI_SUBSYS_GET_VERSION", \
138 "HPI_SUBSYS_GET_INFO", \
139 "HPI_SUBSYS_FIND_ADAPTERS", \
140 "HPI_SUBSYS_CREATE_ADAPTER",\
141 "HPI_SUBSYS_CLOSE", \
142 "HPI_SUBSYS_DELETE_ADAPTER", \
143 "HPI_SUBSYS_DRIVER_LOAD", \
144 "HPI_SUBSYS_DRIVER_UNLOAD", \
145 "HPI_SUBSYS_READ_PORT_8", \
146 "HPI_SUBSYS_WRITE_PORT_8", \
147 "HPI_SUBSYS_GET_NUM_ADAPTERS",\
148 "HPI_SUBSYS_GET_ADAPTER", \
149 "HPI_SUBSYS_SET_NETWORK_INTERFACE"\
150}
151function_count_check(HPI_SUBSYS, 14);
152
153#define HPI_ADAPTER_STRINGS \
154{ \
155 "HPI_ADAPTER_OPEN", \
156 "HPI_ADAPTER_CLOSE", \
157 "HPI_ADAPTER_GET_INFO", \
158 "HPI_ADAPTER_GET_ASSERT", \
159 "HPI_ADAPTER_TEST_ASSERT", \
160 "HPI_ADAPTER_SET_MODE", \
161 "HPI_ADAPTER_GET_MODE", \
162 "HPI_ADAPTER_ENABLE_CAPABILITY",\
163 "HPI_ADAPTER_SELFTEST", \
164 "HPI_ADAPTER_FIND_OBJECT", \
165 "HPI_ADAPTER_QUERY_FLASH", \
166 "HPI_ADAPTER_START_FLASH", \
167 "HPI_ADAPTER_PROGRAM_FLASH", \
168 "HPI_ADAPTER_SET_PROPERTY", \
169 "HPI_ADAPTER_GET_PROPERTY", \
170 "HPI_ADAPTER_ENUM_PROPERTY", \
171 "HPI_ADAPTER_MODULE_INFO", \
172 "HPI_ADAPTER_DEBUG_READ" \
173}
174
175function_count_check(HPI_ADAPTER, 18);
176
177#define HPI_OSTREAM_STRINGS \
178{ \
179 "HPI_OSTREAM_OPEN", \
180 "HPI_OSTREAM_CLOSE", \
181 "HPI_OSTREAM_WRITE", \
182 "HPI_OSTREAM_START", \
183 "HPI_OSTREAM_STOP", \
184 "HPI_OSTREAM_RESET", \
185 "HPI_OSTREAM_GET_INFO", \
186 "HPI_OSTREAM_QUERY_FORMAT", \
187 "HPI_OSTREAM_DATA", \
188 "HPI_OSTREAM_SET_VELOCITY", \
189 "HPI_OSTREAM_SET_PUNCHINOUT", \
190 "HPI_OSTREAM_SINEGEN", \
191 "HPI_OSTREAM_ANC_RESET", \
192 "HPI_OSTREAM_ANC_GET_INFO", \
193 "HPI_OSTREAM_ANC_READ", \
194 "HPI_OSTREAM_SET_TIMESCALE",\
195 "HPI_OSTREAM_SET_FORMAT", \
196 "HPI_OSTREAM_HOSTBUFFER_ALLOC", \
197 "HPI_OSTREAM_HOSTBUFFER_FREE", \
198 "HPI_OSTREAM_GROUP_ADD",\
199 "HPI_OSTREAM_GROUP_GETMAP", \
200 "HPI_OSTREAM_GROUP_RESET", \
201 "HPI_OSTREAM_HOSTBUFFER_GET_INFO", \
202 "HPI_OSTREAM_WAIT_START", \
203}
204function_count_check(HPI_OSTREAM, 24);
205
206#define HPI_ISTREAM_STRINGS \
207{ \
208 "HPI_ISTREAM_OPEN", \
209 "HPI_ISTREAM_CLOSE", \
210 "HPI_ISTREAM_SET_FORMAT", \
211 "HPI_ISTREAM_READ", \
212 "HPI_ISTREAM_START", \
213 "HPI_ISTREAM_STOP", \
214 "HPI_ISTREAM_RESET", \
215 "HPI_ISTREAM_GET_INFO", \
216 "HPI_ISTREAM_QUERY_FORMAT", \
217 "HPI_ISTREAM_ANC_RESET", \
218 "HPI_ISTREAM_ANC_GET_INFO", \
219 "HPI_ISTREAM_ANC_WRITE", \
220 "HPI_ISTREAM_HOSTBUFFER_ALLOC",\
221 "HPI_ISTREAM_HOSTBUFFER_FREE", \
222 "HPI_ISTREAM_GROUP_ADD", \
223 "HPI_ISTREAM_GROUP_GETMAP", \
224 "HPI_ISTREAM_GROUP_RESET", \
225 "HPI_ISTREAM_HOSTBUFFER_GET_INFO", \
226 "HPI_ISTREAM_WAIT_START", \
227}
228function_count_check(HPI_ISTREAM, 19);
229
230#define HPI_MIXER_STRINGS \
231{ \
232 "HPI_MIXER_OPEN", \
233 "HPI_MIXER_CLOSE", \
234 "HPI_MIXER_GET_INFO", \
235 "HPI_MIXER_GET_NODE_INFO", \
236 "HPI_MIXER_GET_CONTROL", \
237 "HPI_MIXER_SET_CONNECTION", \
238 "HPI_MIXER_GET_CONNECTIONS", \
239 "HPI_MIXER_GET_CONTROL_BY_INDEX", \
240 "HPI_MIXER_GET_CONTROL_ARRAY_BY_INDEX", \
241 "HPI_MIXER_GET_CONTROL_MULTIPLE_VALUES", \
242 "HPI_MIXER_STORE", \
243}
244function_count_check(HPI_MIXER, 11);
245
246#define HPI_CONTROL_STRINGS \
247{ \
248 "HPI_CONTROL_GET_INFO", \
249 "HPI_CONTROL_GET_STATE", \
250 "HPI_CONTROL_SET_STATE" \
251}
252function_count_check(HPI_CONTROL, 3);
253
254#define HPI_NVMEMORY_STRINGS \
255{ \
256 "HPI_NVMEMORY_OPEN", \
257 "HPI_NVMEMORY_READ_BYTE", \
258 "HPI_NVMEMORY_WRITE_BYTE" \
259}
260function_count_check(HPI_NVMEMORY, 3);
261
262#define HPI_DIGITALIO_STRINGS \
263{ \
264 "HPI_GPIO_OPEN", \
265 "HPI_GPIO_READ_BIT", \
266 "HPI_GPIO_WRITE_BIT", \
267 "HPI_GPIO_READ_ALL", \
268 "HPI_GPIO_WRITE_STATUS"\
269}
270function_count_check(HPI_GPIO, 5);
271
272#define HPI_WATCHDOG_STRINGS \
273{ \
274 "HPI_WATCHDOG_OPEN", \
275 "HPI_WATCHDOG_SET_TIME", \
276 "HPI_WATCHDOG_PING" \
277}
278
279#define HPI_CLOCK_STRINGS \
280{ \
281 "HPI_CLOCK_OPEN", \
282 "HPI_CLOCK_SET_TIME", \
283 "HPI_CLOCK_GET_TIME" \
284}
285
286#define HPI_PROFILE_STRINGS \
287{ \
288 "HPI_PROFILE_OPEN_ALL", \
289 "HPI_PROFILE_START_ALL", \
290 "HPI_PROFILE_STOP_ALL", \
291 "HPI_PROFILE_GET", \
292 "HPI_PROFILE_GET_IDLECOUNT", \
293 "HPI_PROFILE_GET_NAME", \
294 "HPI_PROFILE_GET_UTILIZATION" \
295}
296function_count_check(HPI_PROFILE, 7);
297
298#define HPI_ASYNCEVENT_STRINGS \
299{ \
300 "HPI_ASYNCEVENT_OPEN",\
301 "HPI_ASYNCEVENT_CLOSE ",\
302 "HPI_ASYNCEVENT_WAIT",\
303 "HPI_ASYNCEVENT_GETCOUNT",\
304 "HPI_ASYNCEVENT_GET",\
305 "HPI_ASYNCEVENT_SENDEVENTS"\
306}
307function_count_check(HPI_ASYNCEVENT, 6);
308
309#define HPI_CONTROL_TYPE_STRINGS \
310{ \
311 "null control", \
312 "HPI_CONTROL_CONNECTION", \
313 "HPI_CONTROL_VOLUME", \
314 "HPI_CONTROL_METER", \
315 "HPI_CONTROL_MUTE", \
316 "HPI_CONTROL_MULTIPLEXER", \
317 "HPI_CONTROL_AESEBU_TRANSMITTER", \
318 "HPI_CONTROL_AESEBU_RECEIVER", \
319 "HPI_CONTROL_LEVEL", \
320 "HPI_CONTROL_TUNER", \
321 "HPI_CONTROL_ONOFFSWITCH", \
322 "HPI_CONTROL_VOX", \
323 "HPI_CONTROL_AES18_TRANSMITTER", \
324 "HPI_CONTROL_AES18_RECEIVER", \
325 "HPI_CONTROL_AES18_BLOCKGENERATOR", \
326 "HPI_CONTROL_CHANNEL_MODE", \
327 "HPI_CONTROL_BITSTREAM", \
328 "HPI_CONTROL_SAMPLECLOCK", \
329 "HPI_CONTROL_MICROPHONE", \
330 "HPI_CONTROL_PARAMETRIC_EQ", \
331 "HPI_CONTROL_COMPANDER", \
332 "HPI_CONTROL_COBRANET", \
333 "HPI_CONTROL_TONE_DETECT", \
334 "HPI_CONTROL_SILENCE_DETECT", \
335 "HPI_CONTROL_PAD", \
336 "HPI_CONTROL_SRC" ,\
337 "HPI_CONTROL_UNIVERSAL" \
338}
339
340compile_time_assert((HPI_CONTROL_LAST_INDEX + 1 == 27),
341 controltype_strings_match_defs);
342
343#define HPI_SOURCENODE_STRINGS \
344{ \
345 "no source", \
346 "HPI_SOURCENODE_OSTREAM", \
347 "HPI_SOURCENODE_LINEIN", \
348 "HPI_SOURCENODE_AESEBU_IN", \
349 "HPI_SOURCENODE_TUNER", \
350 "HPI_SOURCENODE_RF", \
351 "HPI_SOURCENODE_CLOCK_SOURCE", \
352 "HPI_SOURCENODE_RAW_BITSTREAM", \
353 "HPI_SOURCENODE_MICROPHONE", \
354 "HPI_SOURCENODE_COBRANET", \
355 "HPI_SOURCENODE_ANALOG", \
356 "HPI_SOURCENODE_ADAPTER" \
357}
358
359compile_time_assert((HPI_SOURCENODE_LAST_INDEX - HPI_SOURCENODE_NONE + 1) ==
360 (12), sourcenode_strings_match_defs);
361
362#define HPI_DESTNODE_STRINGS \
363{ \
364 "no destination", \
365 "HPI_DESTNODE_ISTREAM", \
366 "HPI_DESTNODE_LINEOUT", \
367 "HPI_DESTNODE_AESEBU_OUT", \
368 "HPI_DESTNODE_RF", \
369 "HPI_DESTNODE_SPEAKER", \
370 "HPI_DESTNODE_COBRANET", \
371 "HPI_DESTNODE_ANALOG" \
372}
373compile_time_assert((HPI_DESTNODE_LAST_INDEX - HPI_DESTNODE_NONE + 1) == (8),
374 destnode_strings_match_defs);
375
376#define HPI_CONTROL_CHANNEL_MODE_STRINGS \
377{ \
378 "XXX HPI_CHANNEL_MODE_ERROR XXX", \
379 "HPI_CHANNEL_MODE_NORMAL", \
380 "HPI_CHANNEL_MODE_SWAP", \
381 "HPI_CHANNEL_MODE_LEFT_ONLY", \
382 "HPI_CHANNEL_MODE_RIGHT_ONLY" \
383}
384
385#endif /* _HPIDEBUG_H */
diff --git a/sound/pci/asihpi/hpidspcd.c b/sound/pci/asihpi/hpidspcd.c
index 9b10d9a5c255..fb311d8c05bf 100644
--- a/sound/pci/asihpi/hpidspcd.c
+++ b/sound/pci/asihpi/hpidspcd.c
@@ -71,47 +71,50 @@ short hpi_dsp_code_open(u32 adapter, struct dsp_code *ps_dsp_code,
71 int err; 71 int err;
72 72
73 sprintf(fw_name, "asihpi/dsp%04x.bin", adapter); 73 sprintf(fw_name, "asihpi/dsp%04x.bin", adapter);
74 HPI_DEBUG_LOG(INFO, "requesting firmware for %s\n", fw_name);
75 74
76 err = request_firmware(&ps_firmware, fw_name, 75 err = request_firmware(&ps_firmware, fw_name,
77 &ps_dsp_code->ps_dev->dev); 76 &ps_dsp_code->ps_dev->dev);
77
78 if (err != 0) { 78 if (err != 0) {
79 HPI_DEBUG_LOG(ERROR, "%d, request_firmware failed for %s\n", 79 dev_printk(KERN_ERR, &ps_dsp_code->ps_dev->dev,
80 err, fw_name); 80 "%d, request_firmware failed for %s\n", err,
81 fw_name);
81 goto error1; 82 goto error1;
82 } 83 }
83 if (ps_firmware->size < sizeof(header)) { 84 if (ps_firmware->size < sizeof(header)) {
84 HPI_DEBUG_LOG(ERROR, "header size too small %s\n", fw_name); 85 dev_printk(KERN_ERR, &ps_dsp_code->ps_dev->dev,
86 "Header size too small %s\n", fw_name);
85 goto error2; 87 goto error2;
86 } 88 }
87 memcpy(&header, ps_firmware->data, sizeof(header)); 89 memcpy(&header, ps_firmware->data, sizeof(header));
88 if (header.adapter != adapter) { 90 if (header.adapter != adapter) {
89 HPI_DEBUG_LOG(ERROR, "adapter type incorrect %4x != %4x\n", 91 dev_printk(KERN_ERR, &ps_dsp_code->ps_dev->dev,
90 header.adapter, adapter); 92 "Adapter type incorrect %4x != %4x\n", header.adapter,
93 adapter);
91 goto error2; 94 goto error2;
92 } 95 }
93 if (header.size != ps_firmware->size) { 96 if (header.size != ps_firmware->size) {
94 HPI_DEBUG_LOG(ERROR, "code size wrong %d != %ld\n", 97 dev_printk(KERN_ERR, &ps_dsp_code->ps_dev->dev,
95 header.size, (unsigned long)ps_firmware->size); 98 "Code size wrong %d != %ld\n", header.size,
99 (unsigned long)ps_firmware->size);
96 goto error2; 100 goto error2;
97 } 101 }
98 102
99 if (header.version / 10000 != HPI_VER_DECIMAL / 10000) { 103 if (header.version / 100 != HPI_VER_DECIMAL / 100) {
100 HPI_DEBUG_LOG(ERROR, 104 dev_printk(KERN_ERR, &ps_dsp_code->ps_dev->dev,
101 "firmware major version mismatch " 105 "Incompatible firmware version "
102 "DSP image %d != driver %d\n", header.version, 106 "DSP image %d != Driver %d\n", header.version,
103 HPI_VER_DECIMAL); 107 HPI_VER_DECIMAL);
104 goto error2; 108 goto error2;
105 } 109 }
106 110
107 if (header.version != HPI_VER_DECIMAL) { 111 if (header.version != HPI_VER_DECIMAL) {
108 HPI_DEBUG_LOG(WARNING, 112 dev_printk(KERN_WARNING, &ps_dsp_code->ps_dev->dev,
109 "version mismatch DSP image %d != driver %d\n", 113 "Firmware: release version mismatch DSP image %d != Driver %d\n",
110 header.version, HPI_VER_DECIMAL); 114 header.version, HPI_VER_DECIMAL);
111 /* goto error2; still allow driver to load */
112 } 115 }
113 116
114 HPI_DEBUG_LOG(INFO, "dsp code %s opened\n", fw_name); 117 HPI_DEBUG_LOG(DEBUG, "dsp code %s opened\n", fw_name);
115 ps_dsp_code->ps_firmware = ps_firmware; 118 ps_dsp_code->ps_firmware = ps_firmware;
116 ps_dsp_code->block_length = header.size / sizeof(u32); 119 ps_dsp_code->block_length = header.size / sizeof(u32);
117 ps_dsp_code->word_count = sizeof(header) / sizeof(u32); 120 ps_dsp_code->word_count = sizeof(header) / sizeof(u32);
@@ -148,7 +151,7 @@ void hpi_dsp_code_rewind(struct dsp_code *ps_dsp_code)
148short hpi_dsp_code_read_word(struct dsp_code *ps_dsp_code, u32 *pword) 151short hpi_dsp_code_read_word(struct dsp_code *ps_dsp_code, u32 *pword)
149{ 152{
150 if (ps_dsp_code->word_count + 1 > ps_dsp_code->block_length) 153 if (ps_dsp_code->word_count + 1 > ps_dsp_code->block_length)
151 return (HPI_ERROR_DSP_FILE_FORMAT); 154 return HPI_ERROR_DSP_FILE_FORMAT;
152 155
153 *pword = ((u32 *)(ps_dsp_code->ps_firmware->data))[ps_dsp_code-> 156 *pword = ((u32 *)(ps_dsp_code->ps_firmware->data))[ps_dsp_code->
154 word_count]; 157 word_count];
diff --git a/sound/pci/asihpi/hpidspcd.h b/sound/pci/asihpi/hpidspcd.h
index d7c240398225..65f0ca732704 100644
--- a/sound/pci/asihpi/hpidspcd.h
+++ b/sound/pci/asihpi/hpidspcd.h
@@ -87,7 +87,7 @@ void hpi_dsp_code_rewind(struct dsp_code *ps_dsp_code);
87*/ 87*/
88short hpi_dsp_code_read_word(struct dsp_code *ps_dsp_code, 88short hpi_dsp_code_read_word(struct dsp_code *ps_dsp_code,
89 /**< DSP code descriptor */ 89 /**< DSP code descriptor */
90 u32 *pword /**< where to store the read word */ 90 u32 *pword /**< Where to store the read word */
91 ); 91 );
92 92
93/** Get a block of dsp code into an internal buffer, and provide a pointer to 93/** Get a block of dsp code into an internal buffer, and provide a pointer to
diff --git a/sound/pci/asihpi/hpifunc.c b/sound/pci/asihpi/hpifunc.c
index 1e92eb6dd509..c38fc9487560 100644
--- a/sound/pci/asihpi/hpifunc.c
+++ b/sound/pci/asihpi/hpifunc.c
@@ -30,16 +30,25 @@ u32 hpi_indexes_to_handle(const char c_object, const u16 adapter_index,
30 return handle.w; 30 return handle.w;
31} 31}
32 32
33void hpi_handle_to_indexes(const u32 handle, u16 *pw_adapter_index, 33static u16 hpi_handle_indexes(const u32 h, u16 *p1, u16 *p2)
34 u16 *pw_object_index)
35{ 34{
36 union handle_word uhandle; 35 union handle_word uhandle;
37 uhandle.w = handle; 36 if (!h)
37 return HPI_ERROR_INVALID_HANDLE;
38
39 uhandle.w = h;
40
41 *p1 = (u16)uhandle.h.adapter_index;
42 if (p2)
43 *p2 = (u16)uhandle.h.obj_index;
38 44
39 if (pw_adapter_index) 45 return 0;
40 *pw_adapter_index = (u16)uhandle.h.adapter_index; 46}
41 if (pw_object_index) 47
42 *pw_object_index = (u16)uhandle.h.obj_index; 48void hpi_handle_to_indexes(const u32 handle, u16 *pw_adapter_index,
49 u16 *pw_object_index)
50{
51 hpi_handle_indexes(handle, pw_adapter_index, pw_object_index);
43} 52}
44 53
45char hpi_handle_object(const u32 handle) 54char hpi_handle_object(const u32 handle)
@@ -49,22 +58,6 @@ char hpi_handle_object(const u32 handle)
49 return (char)uhandle.h.obj_type; 58 return (char)uhandle.h.obj_type;
50} 59}
51 60
52#define u32TOINDEX(h, i1) \
53do {\
54 if (h == 0) \
55 return HPI_ERROR_INVALID_OBJ; \
56 else \
57 hpi_handle_to_indexes(h, i1, NULL); \
58} while (0)
59
60#define u32TOINDEXES(h, i1, i2) \
61do {\
62 if (h == 0) \
63 return HPI_ERROR_INVALID_OBJ; \
64 else \
65 hpi_handle_to_indexes(h, i1, i2);\
66} while (0)
67
68void hpi_format_to_msg(struct hpi_msg_format *pMF, 61void hpi_format_to_msg(struct hpi_msg_format *pMF,
69 const struct hpi_format *pF) 62 const struct hpi_format *pF)
70{ 63{
@@ -94,52 +87,13 @@ void hpi_stream_response_to_legacy(struct hpi_stream_res *pSR)
94 pSR->u.legacy_stream_info.state = pSR->u.stream_info.state; 87 pSR->u.legacy_stream_info.state = pSR->u.stream_info.state;
95} 88}
96 89
97static struct hpi_hsubsys gh_subsys; 90static inline void hpi_send_recvV1(struct hpi_message_header *m,
98 91 struct hpi_response_header *r)
99struct hpi_hsubsys *hpi_subsys_create(void)
100{ 92{
101 struct hpi_message hm; 93 hpi_send_recv((struct hpi_message *)m, (struct hpi_response *)r);
102 struct hpi_response hr;
103
104 memset(&gh_subsys, 0, sizeof(struct hpi_hsubsys));
105
106 {
107 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM,
108 HPI_SUBSYS_OPEN);
109 hpi_send_recv(&hm, &hr);
110
111 if (hr.error == 0)
112 return &gh_subsys;
113
114 }
115 return NULL;
116}
117
118void hpi_subsys_free(const struct hpi_hsubsys *ph_subsys)
119{
120 struct hpi_message hm;
121 struct hpi_response hr;
122
123 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM,
124 HPI_SUBSYS_CLOSE);
125 hpi_send_recv(&hm, &hr);
126
127} 94}
128 95
129u16 hpi_subsys_get_version(const struct hpi_hsubsys *ph_subsys, u32 *pversion) 96u16 hpi_subsys_get_version_ex(u32 *pversion_ex)
130{
131 struct hpi_message hm;
132 struct hpi_response hr;
133
134 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM,
135 HPI_SUBSYS_GET_VERSION);
136 hpi_send_recv(&hm, &hr);
137 *pversion = hr.u.s.version;
138 return hr.error;
139}
140
141u16 hpi_subsys_get_version_ex(const struct hpi_hsubsys *ph_subsys,
142 u32 *pversion_ex)
143{ 97{
144 struct hpi_message hm; 98 struct hpi_message hm;
145 struct hpi_response hr; 99 struct hpi_response hr;
@@ -151,51 +105,8 @@ u16 hpi_subsys_get_version_ex(const struct hpi_hsubsys *ph_subsys,
151 return hr.error; 105 return hr.error;
152} 106}
153 107
154u16 hpi_subsys_get_info(const struct hpi_hsubsys *ph_subsys, u32 *pversion, 108u16 hpi_subsys_create_adapter(const struct hpi_resource *p_resource,
155 u16 *pw_num_adapters, u16 aw_adapter_list[], u16 list_length) 109 u16 *pw_adapter_index)
156{
157 struct hpi_message hm;
158 struct hpi_response hr;
159 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM,
160 HPI_SUBSYS_GET_INFO);
161
162 hpi_send_recv(&hm, &hr);
163
164 *pversion = hr.u.s.version;
165 if (list_length > HPI_MAX_ADAPTERS)
166 memcpy(aw_adapter_list, &hr.u.s.aw_adapter_list,
167 HPI_MAX_ADAPTERS);
168 else
169 memcpy(aw_adapter_list, &hr.u.s.aw_adapter_list, list_length);
170 *pw_num_adapters = hr.u.s.num_adapters;
171 return hr.error;
172}
173
174u16 hpi_subsys_find_adapters(const struct hpi_hsubsys *ph_subsys,
175 u16 *pw_num_adapters, u16 aw_adapter_list[], u16 list_length)
176{
177 struct hpi_message hm;
178 struct hpi_response hr;
179 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM,
180 HPI_SUBSYS_FIND_ADAPTERS);
181
182 hpi_send_recv(&hm, &hr);
183
184 if (list_length > HPI_MAX_ADAPTERS) {
185 memcpy(aw_adapter_list, &hr.u.s.aw_adapter_list,
186 HPI_MAX_ADAPTERS * sizeof(u16));
187 memset(&aw_adapter_list[HPI_MAX_ADAPTERS], 0,
188 (list_length - HPI_MAX_ADAPTERS) * sizeof(u16));
189 } else
190 memcpy(aw_adapter_list, &hr.u.s.aw_adapter_list,
191 list_length * sizeof(u16));
192 *pw_num_adapters = hr.u.s.num_adapters;
193
194 return hr.error;
195}
196
197u16 hpi_subsys_create_adapter(const struct hpi_hsubsys *ph_subsys,
198 const struct hpi_resource *p_resource, u16 *pw_adapter_index)
199{ 110{
200 struct hpi_message hm; 111 struct hpi_message hm;
201 struct hpi_response hr; 112 struct hpi_response hr;
@@ -210,20 +121,18 @@ u16 hpi_subsys_create_adapter(const struct hpi_hsubsys *ph_subsys,
210 return hr.error; 121 return hr.error;
211} 122}
212 123
213u16 hpi_subsys_delete_adapter(const struct hpi_hsubsys *ph_subsys, 124u16 hpi_subsys_delete_adapter(u16 adapter_index)
214 u16 adapter_index)
215{ 125{
216 struct hpi_message hm; 126 struct hpi_message hm;
217 struct hpi_response hr; 127 struct hpi_response hr;
218 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM, 128 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM,
219 HPI_SUBSYS_DELETE_ADAPTER); 129 HPI_SUBSYS_DELETE_ADAPTER);
220 hm.adapter_index = adapter_index; 130 hm.obj_index = adapter_index;
221 hpi_send_recv(&hm, &hr); 131 hpi_send_recv(&hm, &hr);
222 return hr.error; 132 return hr.error;
223} 133}
224 134
225u16 hpi_subsys_get_num_adapters(const struct hpi_hsubsys *ph_subsys, 135u16 hpi_subsys_get_num_adapters(int *pn_num_adapters)
226 int *pn_num_adapters)
227{ 136{
228 struct hpi_message hm; 137 struct hpi_message hm;
229 struct hpi_response hr; 138 struct hpi_response hr;
@@ -234,35 +143,22 @@ u16 hpi_subsys_get_num_adapters(const struct hpi_hsubsys *ph_subsys,
234 return hr.error; 143 return hr.error;
235} 144}
236 145
237u16 hpi_subsys_get_adapter(const struct hpi_hsubsys *ph_subsys, int iterator, 146u16 hpi_subsys_get_adapter(int iterator, u32 *padapter_index,
238 u32 *padapter_index, u16 *pw_adapter_type) 147 u16 *pw_adapter_type)
239{ 148{
240 struct hpi_message hm; 149 struct hpi_message hm;
241 struct hpi_response hr; 150 struct hpi_response hr;
242 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM, 151 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM,
243 HPI_SUBSYS_GET_ADAPTER); 152 HPI_SUBSYS_GET_ADAPTER);
244 hm.adapter_index = (u16)iterator; 153 hm.obj_index = (u16)iterator;
245 hpi_send_recv(&hm, &hr); 154 hpi_send_recv(&hm, &hr);
246 *padapter_index = (int)hr.u.s.adapter_index; 155 *padapter_index = (int)hr.u.s.adapter_index;
247 *pw_adapter_type = hr.u.s.aw_adapter_list[0]; 156 *pw_adapter_type = hr.u.s.adapter_type;
248 return hr.error;
249}
250 157
251u16 hpi_subsys_set_host_network_interface(const struct hpi_hsubsys *ph_subsys,
252 const char *sz_interface)
253{
254 struct hpi_message hm;
255 struct hpi_response hr;
256 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM,
257 HPI_SUBSYS_SET_NETWORK_INTERFACE);
258 if (sz_interface == NULL)
259 return HPI_ERROR_INVALID_RESOURCE;
260 hm.u.s.resource.r.net_if = sz_interface;
261 hpi_send_recv(&hm, &hr);
262 return hr.error; 158 return hr.error;
263} 159}
264 160
265u16 hpi_adapter_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index) 161u16 hpi_adapter_open(u16 adapter_index)
266{ 162{
267 struct hpi_message hm; 163 struct hpi_message hm;
268 struct hpi_response hr; 164 struct hpi_response hr;
@@ -276,7 +172,7 @@ u16 hpi_adapter_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index)
276 172
277} 173}
278 174
279u16 hpi_adapter_close(const struct hpi_hsubsys *ph_subsys, u16 adapter_index) 175u16 hpi_adapter_close(u16 adapter_index)
280{ 176{
281 struct hpi_message hm; 177 struct hpi_message hm;
282 struct hpi_response hr; 178 struct hpi_response hr;
@@ -289,15 +185,14 @@ u16 hpi_adapter_close(const struct hpi_hsubsys *ph_subsys, u16 adapter_index)
289 return hr.error; 185 return hr.error;
290} 186}
291 187
292u16 hpi_adapter_set_mode(const struct hpi_hsubsys *ph_subsys, 188u16 hpi_adapter_set_mode(u16 adapter_index, u32 adapter_mode)
293 u16 adapter_index, u32 adapter_mode)
294{ 189{
295 return hpi_adapter_set_mode_ex(ph_subsys, adapter_index, adapter_mode, 190 return hpi_adapter_set_mode_ex(adapter_index, adapter_mode,
296 HPI_ADAPTER_MODE_SET); 191 HPI_ADAPTER_MODE_SET);
297} 192}
298 193
299u16 hpi_adapter_set_mode_ex(const struct hpi_hsubsys *ph_subsys, 194u16 hpi_adapter_set_mode_ex(u16 adapter_index, u32 adapter_mode,
300 u16 adapter_index, u32 adapter_mode, u16 query_or_set) 195 u16 query_or_set)
301{ 196{
302 struct hpi_message hm; 197 struct hpi_message hm;
303 struct hpi_response hr; 198 struct hpi_response hr;
@@ -305,14 +200,13 @@ u16 hpi_adapter_set_mode_ex(const struct hpi_hsubsys *ph_subsys,
305 hpi_init_message_response(&hm, &hr, HPI_OBJ_ADAPTER, 200 hpi_init_message_response(&hm, &hr, HPI_OBJ_ADAPTER,
306 HPI_ADAPTER_SET_MODE); 201 HPI_ADAPTER_SET_MODE);
307 hm.adapter_index = adapter_index; 202 hm.adapter_index = adapter_index;
308 hm.u.a.adapter_mode = adapter_mode; 203 hm.u.ax.mode.adapter_mode = adapter_mode;
309 hm.u.a.assert_id = query_or_set; 204 hm.u.ax.mode.query_or_set = query_or_set;
310 hpi_send_recv(&hm, &hr); 205 hpi_send_recv(&hm, &hr);
311 return hr.error; 206 return hr.error;
312} 207}
313 208
314u16 hpi_adapter_get_mode(const struct hpi_hsubsys *ph_subsys, 209u16 hpi_adapter_get_mode(u16 adapter_index, u32 *padapter_mode)
315 u16 adapter_index, u32 *padapter_mode)
316{ 210{
317 struct hpi_message hm; 211 struct hpi_message hm;
318 struct hpi_response hr; 212 struct hpi_response hr;
@@ -321,13 +215,13 @@ u16 hpi_adapter_get_mode(const struct hpi_hsubsys *ph_subsys,
321 hm.adapter_index = adapter_index; 215 hm.adapter_index = adapter_index;
322 hpi_send_recv(&hm, &hr); 216 hpi_send_recv(&hm, &hr);
323 if (padapter_mode) 217 if (padapter_mode)
324 *padapter_mode = hr.u.a.serial_number; 218 *padapter_mode = hr.u.ax.mode.adapter_mode;
325 return hr.error; 219 return hr.error;
326} 220}
327 221
328u16 hpi_adapter_get_info(const struct hpi_hsubsys *ph_subsys, 222u16 hpi_adapter_get_info(u16 adapter_index, u16 *pw_num_outstreams,
329 u16 adapter_index, u16 *pw_num_outstreams, u16 *pw_num_instreams, 223 u16 *pw_num_instreams, u16 *pw_version, u32 *pserial_number,
330 u16 *pw_version, u32 *pserial_number, u16 *pw_adapter_type) 224 u16 *pw_adapter_type)
331{ 225{
332 struct hpi_message hm; 226 struct hpi_message hm;
333 struct hpi_response hr; 227 struct hpi_response hr;
@@ -337,18 +231,17 @@ u16 hpi_adapter_get_info(const struct hpi_hsubsys *ph_subsys,
337 231
338 hpi_send_recv(&hm, &hr); 232 hpi_send_recv(&hm, &hr);
339 233
340 *pw_adapter_type = hr.u.a.adapter_type; 234 *pw_adapter_type = hr.u.ax.info.adapter_type;
341 *pw_num_outstreams = hr.u.a.num_outstreams; 235 *pw_num_outstreams = hr.u.ax.info.num_outstreams;
342 *pw_num_instreams = hr.u.a.num_instreams; 236 *pw_num_instreams = hr.u.ax.info.num_instreams;
343 *pw_version = hr.u.a.version; 237 *pw_version = hr.u.ax.info.version;
344 *pserial_number = hr.u.a.serial_number; 238 *pserial_number = hr.u.ax.info.serial_number;
345 return hr.error; 239 return hr.error;
346} 240}
347 241
348u16 hpi_adapter_get_module_by_index(const struct hpi_hsubsys *ph_subsys, 242u16 hpi_adapter_get_module_by_index(u16 adapter_index, u16 module_index,
349 u16 adapter_index, u16 module_index, u16 *pw_num_outputs, 243 u16 *pw_num_outputs, u16 *pw_num_inputs, u16 *pw_version,
350 u16 *pw_num_inputs, u16 *pw_version, u32 *pserial_number, 244 u32 *pserial_number, u16 *pw_module_type, u32 *ph_module)
351 u16 *pw_module_type, u32 *ph_module)
352{ 245{
353 struct hpi_message hm; 246 struct hpi_message hm;
354 struct hpi_response hr; 247 struct hpi_response hr;
@@ -360,173 +253,18 @@ u16 hpi_adapter_get_module_by_index(const struct hpi_hsubsys *ph_subsys,
360 253
361 hpi_send_recv(&hm, &hr); 254 hpi_send_recv(&hm, &hr);
362 255
363 *pw_module_type = hr.u.a.adapter_type; 256 *pw_module_type = hr.u.ax.info.adapter_type;
364 *pw_num_outputs = hr.u.a.num_outstreams; 257 *pw_num_outputs = hr.u.ax.info.num_outstreams;
365 *pw_num_inputs = hr.u.a.num_instreams; 258 *pw_num_inputs = hr.u.ax.info.num_instreams;
366 *pw_version = hr.u.a.version; 259 *pw_version = hr.u.ax.info.version;
367 *pserial_number = hr.u.a.serial_number; 260 *pserial_number = hr.u.ax.info.serial_number;
368 *ph_module = 0; 261 *ph_module = 0;
369 262
370 return hr.error; 263 return hr.error;
371} 264}
372 265
373u16 hpi_adapter_get_assert(const struct hpi_hsubsys *ph_subsys, 266u16 hpi_adapter_set_property(u16 adapter_index, u16 property, u16 parameter1,
374 u16 adapter_index, u16 *assert_present, char *psz_assert, 267 u16 parameter2)
375 u16 *pw_line_number)
376{
377 struct hpi_message hm;
378 struct hpi_response hr;
379 hpi_init_message_response(&hm, &hr, HPI_OBJ_ADAPTER,
380 HPI_ADAPTER_GET_ASSERT);
381 hm.adapter_index = adapter_index;
382 hpi_send_recv(&hm, &hr);
383
384 *assert_present = 0;
385
386 if (!hr.error) {
387
388 *pw_line_number = (u16)hr.u.a.serial_number;
389 if (*pw_line_number) {
390
391 int i;
392 char *src = (char *)hr.u.a.sz_adapter_assert;
393 char *dst = psz_assert;
394
395 *assert_present = 1;
396
397 for (i = 0; i < HPI_STRING_LEN; i++) {
398 char c;
399 c = *src++;
400 *dst++ = c;
401 if (c == 0)
402 break;
403 }
404
405 }
406 }
407 return hr.error;
408}
409
410u16 hpi_adapter_get_assert_ex(const struct hpi_hsubsys *ph_subsys,
411 u16 adapter_index, u16 *assert_present, char *psz_assert,
412 u32 *pline_number, u16 *pw_assert_on_dsp)
413{
414 struct hpi_message hm;
415 struct hpi_response hr;
416 hpi_init_message_response(&hm, &hr, HPI_OBJ_ADAPTER,
417 HPI_ADAPTER_GET_ASSERT);
418 hm.adapter_index = adapter_index;
419
420 hpi_send_recv(&hm, &hr);
421
422 *assert_present = 0;
423
424 if (!hr.error) {
425
426 *pline_number = hr.u.a.serial_number;
427
428 *assert_present = hr.u.a.adapter_type;
429
430 *pw_assert_on_dsp = hr.u.a.adapter_index;
431
432 if (!*assert_present && *pline_number)
433
434 *assert_present = 1;
435
436 if (*assert_present) {
437
438 int i;
439 char *src = (char *)hr.u.a.sz_adapter_assert;
440 char *dst = psz_assert;
441
442 for (i = 0; i < HPI_STRING_LEN; i++) {
443 char c;
444 c = *src++;
445 *dst++ = c;
446 if (c == 0)
447 break;
448 }
449
450 } else {
451 *psz_assert = 0;
452 }
453 }
454 return hr.error;
455}
456
457u16 hpi_adapter_test_assert(const struct hpi_hsubsys *ph_subsys,
458 u16 adapter_index, u16 assert_id)
459{
460 struct hpi_message hm;
461 struct hpi_response hr;
462 hpi_init_message_response(&hm, &hr, HPI_OBJ_ADAPTER,
463 HPI_ADAPTER_TEST_ASSERT);
464 hm.adapter_index = adapter_index;
465 hm.u.a.assert_id = assert_id;
466
467 hpi_send_recv(&hm, &hr);
468
469 return hr.error;
470}
471
472u16 hpi_adapter_enable_capability(const struct hpi_hsubsys *ph_subsys,
473 u16 adapter_index, u16 capability, u32 key)
474{
475 struct hpi_message hm;
476 struct hpi_response hr;
477 hpi_init_message_response(&hm, &hr, HPI_OBJ_ADAPTER,
478 HPI_ADAPTER_ENABLE_CAPABILITY);
479 hm.adapter_index = adapter_index;
480 hm.u.a.assert_id = capability;
481 hm.u.a.adapter_mode = key;
482
483 hpi_send_recv(&hm, &hr);
484
485 return hr.error;
486}
487
488u16 hpi_adapter_self_test(const struct hpi_hsubsys *ph_subsys,
489 u16 adapter_index)
490{
491 struct hpi_message hm;
492 struct hpi_response hr;
493 hpi_init_message_response(&hm, &hr, HPI_OBJ_ADAPTER,
494 HPI_ADAPTER_SELFTEST);
495 hm.adapter_index = adapter_index;
496 hpi_send_recv(&hm, &hr);
497 return hr.error;
498}
499
500u16 hpi_adapter_debug_read(const struct hpi_hsubsys *ph_subsys,
501 u16 adapter_index, u32 dsp_address, char *p_buffer, int *count_bytes)
502{
503 struct hpi_message hm;
504 struct hpi_response hr;
505 hpi_init_message_response(&hm, &hr, HPI_OBJ_ADAPTER,
506 HPI_ADAPTER_DEBUG_READ);
507
508 hr.size = sizeof(hr);
509
510 hm.adapter_index = adapter_index;
511 hm.u.ax.debug_read.dsp_address = dsp_address;
512
513 if (*count_bytes > (int)sizeof(hr.u.bytes))
514 *count_bytes = sizeof(hr.u.bytes);
515
516 hm.u.ax.debug_read.count_bytes = *count_bytes;
517
518 hpi_send_recv(&hm, &hr);
519
520 if (!hr.error) {
521 *count_bytes = hr.size - 12;
522 memcpy(p_buffer, &hr.u.bytes, *count_bytes);
523 } else
524 *count_bytes = 0;
525 return hr.error;
526}
527
528u16 hpi_adapter_set_property(const struct hpi_hsubsys *ph_subsys,
529 u16 adapter_index, u16 property, u16 parameter1, u16 parameter2)
530{ 268{
531 struct hpi_message hm; 269 struct hpi_message hm;
532 struct hpi_response hr; 270 struct hpi_response hr;
@@ -542,9 +280,8 @@ u16 hpi_adapter_set_property(const struct hpi_hsubsys *ph_subsys,
542 return hr.error; 280 return hr.error;
543} 281}
544 282
545u16 hpi_adapter_get_property(const struct hpi_hsubsys *ph_subsys, 283u16 hpi_adapter_get_property(u16 adapter_index, u16 property,
546 u16 adapter_index, u16 property, u16 *pw_parameter1, 284 u16 *pw_parameter1, u16 *pw_parameter2)
547 u16 *pw_parameter2)
548{ 285{
549 struct hpi_message hm; 286 struct hpi_message hm;
550 struct hpi_response hr; 287 struct hpi_response hr;
@@ -564,9 +301,8 @@ u16 hpi_adapter_get_property(const struct hpi_hsubsys *ph_subsys,
564 return hr.error; 301 return hr.error;
565} 302}
566 303
567u16 hpi_adapter_enumerate_property(const struct hpi_hsubsys *ph_subsys, 304u16 hpi_adapter_enumerate_property(u16 adapter_index, u16 index,
568 u16 adapter_index, u16 index, u16 what_to_enumerate, 305 u16 what_to_enumerate, u16 property_index, u32 *psetting)
569 u16 property_index, u32 *psetting)
570{ 306{
571 return 0; 307 return 0;
572} 308}
@@ -574,7 +310,7 @@ u16 hpi_adapter_enumerate_property(const struct hpi_hsubsys *ph_subsys,
574u16 hpi_format_create(struct hpi_format *p_format, u16 channels, u16 format, 310u16 hpi_format_create(struct hpi_format *p_format, u16 channels, u16 format,
575 u32 sample_rate, u32 bit_rate, u32 attributes) 311 u32 sample_rate, u32 bit_rate, u32 attributes)
576{ 312{
577 u16 error = 0; 313 u16 err = 0;
578 struct hpi_msg_format fmt; 314 struct hpi_msg_format fmt;
579 315
580 switch (channels) { 316 switch (channels) {
@@ -586,8 +322,8 @@ u16 hpi_format_create(struct hpi_format *p_format, u16 channels, u16 format,
586 case 16: 322 case 16:
587 break; 323 break;
588 default: 324 default:
589 error = HPI_ERROR_INVALID_CHANNELS; 325 err = HPI_ERROR_INVALID_CHANNELS;
590 return error; 326 return err;
591 } 327 }
592 fmt.channels = channels; 328 fmt.channels = channels;
593 329
@@ -610,17 +346,17 @@ u16 hpi_format_create(struct hpi_format *p_format, u16 channels, u16 format,
610 case HPI_FORMAT_OEM2: 346 case HPI_FORMAT_OEM2:
611 break; 347 break;
612 default: 348 default:
613 error = HPI_ERROR_INVALID_FORMAT; 349 err = HPI_ERROR_INVALID_FORMAT;
614 return error; 350 return err;
615 } 351 }
616 fmt.format = format; 352 fmt.format = format;
617 353
618 if (sample_rate < 8000L) { 354 if (sample_rate < 8000L) {
619 error = HPI_ERROR_INCOMPATIBLE_SAMPLERATE; 355 err = HPI_ERROR_INCOMPATIBLE_SAMPLERATE;
620 sample_rate = 8000L; 356 sample_rate = 8000L;
621 } 357 }
622 if (sample_rate > 200000L) { 358 if (sample_rate > 200000L) {
623 error = HPI_ERROR_INCOMPATIBLE_SAMPLERATE; 359 err = HPI_ERROR_INCOMPATIBLE_SAMPLERATE;
624 sample_rate = 200000L; 360 sample_rate = 200000L;
625 } 361 }
626 fmt.sample_rate = sample_rate; 362 fmt.sample_rate = sample_rate;
@@ -651,10 +387,10 @@ u16 hpi_format_create(struct hpi_format *p_format, u16 channels, u16 format,
651 if ((channels == 1) 387 if ((channels == 1)
652 && (attributes != HPI_MPEG_MODE_DEFAULT)) { 388 && (attributes != HPI_MPEG_MODE_DEFAULT)) {
653 attributes = HPI_MPEG_MODE_DEFAULT; 389 attributes = HPI_MPEG_MODE_DEFAULT;
654 error = HPI_ERROR_INVALID_FORMAT; 390 err = HPI_ERROR_INVALID_FORMAT;
655 } else if (attributes > HPI_MPEG_MODE_DUALCHANNEL) { 391 } else if (attributes > HPI_MPEG_MODE_DUALCHANNEL) {
656 attributes = HPI_MPEG_MODE_DEFAULT; 392 attributes = HPI_MPEG_MODE_DEFAULT;
657 error = HPI_ERROR_INVALID_FORMAT; 393 err = HPI_ERROR_INVALID_FORMAT;
658 } 394 }
659 fmt.attributes = attributes; 395 fmt.attributes = attributes;
660 break; 396 break;
@@ -663,7 +399,7 @@ u16 hpi_format_create(struct hpi_format *p_format, u16 channels, u16 format,
663 } 399 }
664 400
665 hpi_msg_to_format(p_format, &fmt); 401 hpi_msg_to_format(p_format, &fmt);
666 return error; 402 return err;
667} 403}
668 404
669u16 hpi_stream_estimate_buffer_size(struct hpi_format *p_format, 405u16 hpi_stream_estimate_buffer_size(struct hpi_format *p_format,
@@ -712,8 +448,8 @@ u16 hpi_stream_estimate_buffer_size(struct hpi_format *p_format,
712 return 0; 448 return 0;
713} 449}
714 450
715u16 hpi_outstream_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index, 451u16 hpi_outstream_open(u16 adapter_index, u16 outstream_index,
716 u16 outstream_index, u32 *ph_outstream) 452 u32 *ph_outstream)
717{ 453{
718 struct hpi_message hm; 454 struct hpi_message hm;
719 struct hpi_response hr; 455 struct hpi_response hr;
@@ -733,38 +469,41 @@ u16 hpi_outstream_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index,
733 return hr.error; 469 return hr.error;
734} 470}
735 471
736u16 hpi_outstream_close(const struct hpi_hsubsys *ph_subsys, u32 h_outstream) 472u16 hpi_outstream_close(u32 h_outstream)
737{ 473{
738 struct hpi_message hm; 474 struct hpi_message hm;
739 struct hpi_response hr; 475 struct hpi_response hr;
740 476
741 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 477 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
742 HPI_OSTREAM_HOSTBUFFER_FREE); 478 HPI_OSTREAM_HOSTBUFFER_FREE);
743 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 479 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
480 return HPI_ERROR_INVALID_HANDLE;
481
744 hpi_send_recv(&hm, &hr); 482 hpi_send_recv(&hm, &hr);
745 483
746 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 484 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
747 HPI_OSTREAM_GROUP_RESET); 485 HPI_OSTREAM_GROUP_RESET);
748 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 486 hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index);
749 hpi_send_recv(&hm, &hr); 487 hpi_send_recv(&hm, &hr);
750 488
751 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 489 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
752 HPI_OSTREAM_CLOSE); 490 HPI_OSTREAM_CLOSE);
753 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 491 hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index);
754 hpi_send_recv(&hm, &hr); 492 hpi_send_recv(&hm, &hr);
755 493
756 return hr.error; 494 return hr.error;
757} 495}
758 496
759u16 hpi_outstream_get_info_ex(const struct hpi_hsubsys *ph_subsys, 497u16 hpi_outstream_get_info_ex(u32 h_outstream, u16 *pw_state,
760 u32 h_outstream, u16 *pw_state, u32 *pbuffer_size, u32 *pdata_to_play, 498 u32 *pbuffer_size, u32 *pdata_to_play, u32 *psamples_played,
761 u32 *psamples_played, u32 *pauxiliary_data_to_play) 499 u32 *pauxiliary_data_to_play)
762{ 500{
763 struct hpi_message hm; 501 struct hpi_message hm;
764 struct hpi_response hr; 502 struct hpi_response hr;
765 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 503 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
766 HPI_OSTREAM_GET_INFO); 504 HPI_OSTREAM_GET_INFO);
767 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 505 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
506 return HPI_ERROR_INVALID_HANDLE;
768 507
769 hpi_send_recv(&hm, &hr); 508 hpi_send_recv(&hm, &hr);
770 509
@@ -782,15 +521,15 @@ u16 hpi_outstream_get_info_ex(const struct hpi_hsubsys *ph_subsys,
782 return hr.error; 521 return hr.error;
783} 522}
784 523
785u16 hpi_outstream_write_buf(const struct hpi_hsubsys *ph_subsys, 524u16 hpi_outstream_write_buf(u32 h_outstream, const u8 *pb_data,
786 u32 h_outstream, const u8 *pb_data, u32 bytes_to_write, 525 u32 bytes_to_write, const struct hpi_format *p_format)
787 const struct hpi_format *p_format)
788{ 526{
789 struct hpi_message hm; 527 struct hpi_message hm;
790 struct hpi_response hr; 528 struct hpi_response hr;
791 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 529 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
792 HPI_OSTREAM_WRITE); 530 HPI_OSTREAM_WRITE);
793 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 531 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
532 return HPI_ERROR_INVALID_HANDLE;
794 hm.u.d.u.data.pb_data = (u8 *)pb_data; 533 hm.u.d.u.data.pb_data = (u8 *)pb_data;
795 hm.u.d.u.data.data_size = bytes_to_write; 534 hm.u.d.u.data.data_size = bytes_to_write;
796 535
@@ -801,82 +540,85 @@ u16 hpi_outstream_write_buf(const struct hpi_hsubsys *ph_subsys,
801 return hr.error; 540 return hr.error;
802} 541}
803 542
804u16 hpi_outstream_start(const struct hpi_hsubsys *ph_subsys, u32 h_outstream) 543u16 hpi_outstream_start(u32 h_outstream)
805{ 544{
806 struct hpi_message hm; 545 struct hpi_message hm;
807 struct hpi_response hr; 546 struct hpi_response hr;
808 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 547 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
809 HPI_OSTREAM_START); 548 HPI_OSTREAM_START);
810 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 549 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
550 return HPI_ERROR_INVALID_HANDLE;
811 551
812 hpi_send_recv(&hm, &hr); 552 hpi_send_recv(&hm, &hr);
813 553
814 return hr.error; 554 return hr.error;
815} 555}
816 556
817u16 hpi_outstream_wait_start(const struct hpi_hsubsys *ph_subsys, 557u16 hpi_outstream_wait_start(u32 h_outstream)
818 u32 h_outstream)
819{ 558{
820 struct hpi_message hm; 559 struct hpi_message hm;
821 struct hpi_response hr; 560 struct hpi_response hr;
822 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 561 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
823 HPI_OSTREAM_WAIT_START); 562 HPI_OSTREAM_WAIT_START);
824 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 563 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
564 return HPI_ERROR_INVALID_HANDLE;
825 565
826 hpi_send_recv(&hm, &hr); 566 hpi_send_recv(&hm, &hr);
827 567
828 return hr.error; 568 return hr.error;
829} 569}
830 570
831u16 hpi_outstream_stop(const struct hpi_hsubsys *ph_subsys, u32 h_outstream) 571u16 hpi_outstream_stop(u32 h_outstream)
832{ 572{
833 struct hpi_message hm; 573 struct hpi_message hm;
834 struct hpi_response hr; 574 struct hpi_response hr;
835 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 575 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
836 HPI_OSTREAM_STOP); 576 HPI_OSTREAM_STOP);
837 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 577 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
578 return HPI_ERROR_INVALID_HANDLE;
838 579
839 hpi_send_recv(&hm, &hr); 580 hpi_send_recv(&hm, &hr);
840 581
841 return hr.error; 582 return hr.error;
842} 583}
843 584
844u16 hpi_outstream_sinegen(const struct hpi_hsubsys *ph_subsys, 585u16 hpi_outstream_sinegen(u32 h_outstream)
845 u32 h_outstream)
846{ 586{
847 struct hpi_message hm; 587 struct hpi_message hm;
848 struct hpi_response hr; 588 struct hpi_response hr;
849 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 589 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
850 HPI_OSTREAM_SINEGEN); 590 HPI_OSTREAM_SINEGEN);
851 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 591 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
592 return HPI_ERROR_INVALID_HANDLE;
852 593
853 hpi_send_recv(&hm, &hr); 594 hpi_send_recv(&hm, &hr);
854 595
855 return hr.error; 596 return hr.error;
856} 597}
857 598
858u16 hpi_outstream_reset(const struct hpi_hsubsys *ph_subsys, u32 h_outstream) 599u16 hpi_outstream_reset(u32 h_outstream)
859{ 600{
860 struct hpi_message hm; 601 struct hpi_message hm;
861 struct hpi_response hr; 602 struct hpi_response hr;
862 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 603 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
863 HPI_OSTREAM_RESET); 604 HPI_OSTREAM_RESET);
864 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 605 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
606 return HPI_ERROR_INVALID_HANDLE;
865 607
866 hpi_send_recv(&hm, &hr); 608 hpi_send_recv(&hm, &hr);
867 609
868 return hr.error; 610 return hr.error;
869} 611}
870 612
871u16 hpi_outstream_query_format(const struct hpi_hsubsys *ph_subsys, 613u16 hpi_outstream_query_format(u32 h_outstream, struct hpi_format *p_format)
872 u32 h_outstream, struct hpi_format *p_format)
873{ 614{
874 struct hpi_message hm; 615 struct hpi_message hm;
875 struct hpi_response hr; 616 struct hpi_response hr;
876 617
877 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 618 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
878 HPI_OSTREAM_QUERY_FORMAT); 619 HPI_OSTREAM_QUERY_FORMAT);
879 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 620 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
621 return HPI_ERROR_INVALID_HANDLE;
880 622
881 hpi_format_to_msg(&hm.u.d.u.data.format, p_format); 623 hpi_format_to_msg(&hm.u.d.u.data.format, p_format);
882 624
@@ -885,15 +627,15 @@ u16 hpi_outstream_query_format(const struct hpi_hsubsys *ph_subsys,
885 return hr.error; 627 return hr.error;
886} 628}
887 629
888u16 hpi_outstream_set_format(const struct hpi_hsubsys *ph_subsys, 630u16 hpi_outstream_set_format(u32 h_outstream, struct hpi_format *p_format)
889 u32 h_outstream, struct hpi_format *p_format)
890{ 631{
891 struct hpi_message hm; 632 struct hpi_message hm;
892 struct hpi_response hr; 633 struct hpi_response hr;
893 634
894 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 635 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
895 HPI_OSTREAM_SET_FORMAT); 636 HPI_OSTREAM_SET_FORMAT);
896 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 637 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
638 return HPI_ERROR_INVALID_HANDLE;
897 639
898 hpi_format_to_msg(&hm.u.d.u.data.format, p_format); 640 hpi_format_to_msg(&hm.u.d.u.data.format, p_format);
899 641
@@ -902,15 +644,15 @@ u16 hpi_outstream_set_format(const struct hpi_hsubsys *ph_subsys,
902 return hr.error; 644 return hr.error;
903} 645}
904 646
905u16 hpi_outstream_set_velocity(const struct hpi_hsubsys *ph_subsys, 647u16 hpi_outstream_set_velocity(u32 h_outstream, short velocity)
906 u32 h_outstream, short velocity)
907{ 648{
908 struct hpi_message hm; 649 struct hpi_message hm;
909 struct hpi_response hr; 650 struct hpi_response hr;
910 651
911 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 652 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
912 HPI_OSTREAM_SET_VELOCITY); 653 HPI_OSTREAM_SET_VELOCITY);
913 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 654 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
655 return HPI_ERROR_INVALID_HANDLE;
914 hm.u.d.u.velocity = velocity; 656 hm.u.d.u.velocity = velocity;
915 657
916 hpi_send_recv(&hm, &hr); 658 hpi_send_recv(&hm, &hr);
@@ -918,15 +660,16 @@ u16 hpi_outstream_set_velocity(const struct hpi_hsubsys *ph_subsys,
918 return hr.error; 660 return hr.error;
919} 661}
920 662
921u16 hpi_outstream_set_punch_in_out(const struct hpi_hsubsys *ph_subsys, 663u16 hpi_outstream_set_punch_in_out(u32 h_outstream, u32 punch_in_sample,
922 u32 h_outstream, u32 punch_in_sample, u32 punch_out_sample) 664 u32 punch_out_sample)
923{ 665{
924 struct hpi_message hm; 666 struct hpi_message hm;
925 struct hpi_response hr; 667 struct hpi_response hr;
926 668
927 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 669 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
928 HPI_OSTREAM_SET_PUNCHINOUT); 670 HPI_OSTREAM_SET_PUNCHINOUT);
929 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 671 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
672 return HPI_ERROR_INVALID_HANDLE;
930 673
931 hm.u.d.u.pio.punch_in_sample = punch_in_sample; 674 hm.u.d.u.pio.punch_in_sample = punch_in_sample;
932 hm.u.d.u.pio.punch_out_sample = punch_out_sample; 675 hm.u.d.u.pio.punch_out_sample = punch_out_sample;
@@ -936,29 +679,29 @@ u16 hpi_outstream_set_punch_in_out(const struct hpi_hsubsys *ph_subsys,
936 return hr.error; 679 return hr.error;
937} 680}
938 681
939u16 hpi_outstream_ancillary_reset(const struct hpi_hsubsys *ph_subsys, 682u16 hpi_outstream_ancillary_reset(u32 h_outstream, u16 mode)
940 u32 h_outstream, u16 mode)
941{ 683{
942 struct hpi_message hm; 684 struct hpi_message hm;
943 struct hpi_response hr; 685 struct hpi_response hr;
944 686
945 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 687 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
946 HPI_OSTREAM_ANC_RESET); 688 HPI_OSTREAM_ANC_RESET);
947 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 689 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
690 return HPI_ERROR_INVALID_HANDLE;
948 hm.u.d.u.data.format.channels = mode; 691 hm.u.d.u.data.format.channels = mode;
949 hpi_send_recv(&hm, &hr); 692 hpi_send_recv(&hm, &hr);
950 return hr.error; 693 return hr.error;
951} 694}
952 695
953u16 hpi_outstream_ancillary_get_info(const struct hpi_hsubsys *ph_subsys, 696u16 hpi_outstream_ancillary_get_info(u32 h_outstream, u32 *pframes_available)
954 u32 h_outstream, u32 *pframes_available)
955{ 697{
956 struct hpi_message hm; 698 struct hpi_message hm;
957 struct hpi_response hr; 699 struct hpi_response hr;
958 700
959 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 701 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
960 HPI_OSTREAM_ANC_GET_INFO); 702 HPI_OSTREAM_ANC_GET_INFO);
961 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 703 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
704 return HPI_ERROR_INVALID_HANDLE;
962 hpi_send_recv(&hm, &hr); 705 hpi_send_recv(&hm, &hr);
963 if (hr.error == 0) { 706 if (hr.error == 0) {
964 if (pframes_available) 707 if (pframes_available)
@@ -969,8 +712,8 @@ u16 hpi_outstream_ancillary_get_info(const struct hpi_hsubsys *ph_subsys,
969 return hr.error; 712 return hr.error;
970} 713}
971 714
972u16 hpi_outstream_ancillary_read(const struct hpi_hsubsys *ph_subsys, 715u16 hpi_outstream_ancillary_read(u32 h_outstream,
973 u32 h_outstream, struct hpi_anc_frame *p_anc_frame_buffer, 716 struct hpi_anc_frame *p_anc_frame_buffer,
974 u32 anc_frame_buffer_size_in_bytes, 717 u32 anc_frame_buffer_size_in_bytes,
975 u32 number_of_ancillary_frames_to_read) 718 u32 number_of_ancillary_frames_to_read)
976{ 719{
@@ -979,7 +722,8 @@ u16 hpi_outstream_ancillary_read(const struct hpi_hsubsys *ph_subsys,
979 722
980 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 723 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
981 HPI_OSTREAM_ANC_READ); 724 HPI_OSTREAM_ANC_READ);
982 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 725 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
726 return HPI_ERROR_INVALID_HANDLE;
983 hm.u.d.u.data.pb_data = (u8 *)p_anc_frame_buffer; 727 hm.u.d.u.data.pb_data = (u8 *)p_anc_frame_buffer;
984 hm.u.d.u.data.data_size = 728 hm.u.d.u.data.data_size =
985 number_of_ancillary_frames_to_read * 729 number_of_ancillary_frames_to_read *
@@ -987,19 +731,19 @@ u16 hpi_outstream_ancillary_read(const struct hpi_hsubsys *ph_subsys,
987 if (hm.u.d.u.data.data_size <= anc_frame_buffer_size_in_bytes) 731 if (hm.u.d.u.data.data_size <= anc_frame_buffer_size_in_bytes)
988 hpi_send_recv(&hm, &hr); 732 hpi_send_recv(&hm, &hr);
989 else 733 else
990 hr.error = HPI_ERROR_INVALID_DATA_TRANSFER; 734 hr.error = HPI_ERROR_INVALID_DATASIZE;
991 return hr.error; 735 return hr.error;
992} 736}
993 737
994u16 hpi_outstream_set_time_scale(const struct hpi_hsubsys *ph_subsys, 738u16 hpi_outstream_set_time_scale(u32 h_outstream, u32 time_scale)
995 u32 h_outstream, u32 time_scale)
996{ 739{
997 struct hpi_message hm; 740 struct hpi_message hm;
998 struct hpi_response hr; 741 struct hpi_response hr;
999 742
1000 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 743 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
1001 HPI_OSTREAM_SET_TIMESCALE); 744 HPI_OSTREAM_SET_TIMESCALE);
1002 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 745 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
746 return HPI_ERROR_INVALID_HANDLE;
1003 747
1004 hm.u.d.u.time_scale = time_scale; 748 hm.u.d.u.time_scale = time_scale;
1005 749
@@ -1008,22 +752,21 @@ u16 hpi_outstream_set_time_scale(const struct hpi_hsubsys *ph_subsys,
1008 return hr.error; 752 return hr.error;
1009} 753}
1010 754
1011u16 hpi_outstream_host_buffer_allocate(const struct hpi_hsubsys *ph_subsys, 755u16 hpi_outstream_host_buffer_allocate(u32 h_outstream, u32 size_in_bytes)
1012 u32 h_outstream, u32 size_in_bytes)
1013{ 756{
1014 struct hpi_message hm; 757 struct hpi_message hm;
1015 struct hpi_response hr; 758 struct hpi_response hr;
1016 759
1017 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 760 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
1018 HPI_OSTREAM_HOSTBUFFER_ALLOC); 761 HPI_OSTREAM_HOSTBUFFER_ALLOC);
1019 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 762 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
763 return HPI_ERROR_INVALID_HANDLE;
1020 hm.u.d.u.data.data_size = size_in_bytes; 764 hm.u.d.u.data.data_size = size_in_bytes;
1021 hpi_send_recv(&hm, &hr); 765 hpi_send_recv(&hm, &hr);
1022 return hr.error; 766 return hr.error;
1023} 767}
1024 768
1025u16 hpi_outstream_host_buffer_get_info(const struct hpi_hsubsys *ph_subsys, 769u16 hpi_outstream_host_buffer_get_info(u32 h_outstream, u8 **pp_buffer,
1026 u32 h_outstream, u8 **pp_buffer,
1027 struct hpi_hostbuffer_status **pp_status) 770 struct hpi_hostbuffer_status **pp_status)
1028{ 771{
1029 struct hpi_message hm; 772 struct hpi_message hm;
@@ -1031,7 +774,8 @@ u16 hpi_outstream_host_buffer_get_info(const struct hpi_hsubsys *ph_subsys,
1031 774
1032 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 775 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
1033 HPI_OSTREAM_HOSTBUFFER_GET_INFO); 776 HPI_OSTREAM_HOSTBUFFER_GET_INFO);
1034 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 777 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
778 return HPI_ERROR_INVALID_HANDLE;
1035 hpi_send_recv(&hm, &hr); 779 hpi_send_recv(&hm, &hr);
1036 780
1037 if (hr.error == 0) { 781 if (hr.error == 0) {
@@ -1043,21 +787,20 @@ u16 hpi_outstream_host_buffer_get_info(const struct hpi_hsubsys *ph_subsys,
1043 return hr.error; 787 return hr.error;
1044} 788}
1045 789
1046u16 hpi_outstream_host_buffer_free(const struct hpi_hsubsys *ph_subsys, 790u16 hpi_outstream_host_buffer_free(u32 h_outstream)
1047 u32 h_outstream)
1048{ 791{
1049 struct hpi_message hm; 792 struct hpi_message hm;
1050 struct hpi_response hr; 793 struct hpi_response hr;
1051 794
1052 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 795 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
1053 HPI_OSTREAM_HOSTBUFFER_FREE); 796 HPI_OSTREAM_HOSTBUFFER_FREE);
1054 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 797 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
798 return HPI_ERROR_INVALID_HANDLE;
1055 hpi_send_recv(&hm, &hr); 799 hpi_send_recv(&hm, &hr);
1056 return hr.error; 800 return hr.error;
1057} 801}
1058 802
1059u16 hpi_outstream_group_add(const struct hpi_hsubsys *ph_subsys, 803u16 hpi_outstream_group_add(u32 h_outstream, u32 h_stream)
1060 u32 h_outstream, u32 h_stream)
1061{ 804{
1062 struct hpi_message hm; 805 struct hpi_message hm;
1063 struct hpi_response hr; 806 struct hpi_response hr;
@@ -1066,22 +809,22 @@ u16 hpi_outstream_group_add(const struct hpi_hsubsys *ph_subsys,
1066 809
1067 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 810 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
1068 HPI_OSTREAM_GROUP_ADD); 811 HPI_OSTREAM_GROUP_ADD);
1069 hr.error = 0; 812
1070 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 813 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
814 return HPI_ERROR_INVALID_HANDLE;
815
816 if (hpi_handle_indexes(h_stream, &adapter,
817 &hm.u.d.u.stream.stream_index))
818 return HPI_ERROR_INVALID_HANDLE;
819
1071 c_obj_type = hpi_handle_object(h_stream); 820 c_obj_type = hpi_handle_object(h_stream);
1072 switch (c_obj_type) { 821 switch (c_obj_type) {
1073 case HPI_OBJ_OSTREAM: 822 case HPI_OBJ_OSTREAM:
1074 hm.u.d.u.stream.object_type = HPI_OBJ_OSTREAM;
1075 u32TOINDEXES(h_stream, &adapter,
1076 &hm.u.d.u.stream.stream_index);
1077 break;
1078 case HPI_OBJ_ISTREAM: 823 case HPI_OBJ_ISTREAM:
1079 hm.u.d.u.stream.object_type = HPI_OBJ_ISTREAM; 824 hm.u.d.u.stream.object_type = c_obj_type;
1080 u32TOINDEXES(h_stream, &adapter,
1081 &hm.u.d.u.stream.stream_index);
1082 break; 825 break;
1083 default: 826 default:
1084 return HPI_ERROR_INVALID_STREAM; 827 return HPI_ERROR_INVALID_OBJ;
1085 } 828 }
1086 if (adapter != hm.adapter_index) 829 if (adapter != hm.adapter_index)
1087 return HPI_ERROR_NO_INTERADAPTER_GROUPS; 830 return HPI_ERROR_NO_INTERADAPTER_GROUPS;
@@ -1090,15 +833,16 @@ u16 hpi_outstream_group_add(const struct hpi_hsubsys *ph_subsys,
1090 return hr.error; 833 return hr.error;
1091} 834}
1092 835
1093u16 hpi_outstream_group_get_map(const struct hpi_hsubsys *ph_subsys, 836u16 hpi_outstream_group_get_map(u32 h_outstream, u32 *poutstream_map,
1094 u32 h_outstream, u32 *poutstream_map, u32 *pinstream_map) 837 u32 *pinstream_map)
1095{ 838{
1096 struct hpi_message hm; 839 struct hpi_message hm;
1097 struct hpi_response hr; 840 struct hpi_response hr;
1098 841
1099 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 842 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
1100 HPI_OSTREAM_GROUP_GETMAP); 843 HPI_OSTREAM_GROUP_GETMAP);
1101 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 844 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
845 return HPI_ERROR_INVALID_HANDLE;
1102 hpi_send_recv(&hm, &hr); 846 hpi_send_recv(&hm, &hr);
1103 847
1104 if (poutstream_map) 848 if (poutstream_map)
@@ -1109,21 +853,20 @@ u16 hpi_outstream_group_get_map(const struct hpi_hsubsys *ph_subsys,
1109 return hr.error; 853 return hr.error;
1110} 854}
1111 855
1112u16 hpi_outstream_group_reset(const struct hpi_hsubsys *ph_subsys, 856u16 hpi_outstream_group_reset(u32 h_outstream)
1113 u32 h_outstream)
1114{ 857{
1115 struct hpi_message hm; 858 struct hpi_message hm;
1116 struct hpi_response hr; 859 struct hpi_response hr;
1117 860
1118 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 861 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
1119 HPI_OSTREAM_GROUP_RESET); 862 HPI_OSTREAM_GROUP_RESET);
1120 u32TOINDEXES(h_outstream, &hm.adapter_index, &hm.obj_index); 863 if (hpi_handle_indexes(h_outstream, &hm.adapter_index, &hm.obj_index))
864 return HPI_ERROR_INVALID_HANDLE;
1121 hpi_send_recv(&hm, &hr); 865 hpi_send_recv(&hm, &hr);
1122 return hr.error; 866 return hr.error;
1123} 867}
1124 868
1125u16 hpi_instream_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index, 869u16 hpi_instream_open(u16 adapter_index, u16 instream_index, u32 *ph_instream)
1126 u16 instream_index, u32 *ph_instream)
1127{ 870{
1128 struct hpi_message hm; 871 struct hpi_message hm;
1129 struct hpi_response hr; 872 struct hpi_response hr;
@@ -1145,38 +888,40 @@ u16 hpi_instream_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index,
1145 return hr.error; 888 return hr.error;
1146} 889}
1147 890
1148u16 hpi_instream_close(const struct hpi_hsubsys *ph_subsys, u32 h_instream) 891u16 hpi_instream_close(u32 h_instream)
1149{ 892{
1150 struct hpi_message hm; 893 struct hpi_message hm;
1151 struct hpi_response hr; 894 struct hpi_response hr;
1152 895
1153 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 896 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1154 HPI_ISTREAM_HOSTBUFFER_FREE); 897 HPI_ISTREAM_HOSTBUFFER_FREE);
1155 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 898 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
899 return HPI_ERROR_INVALID_HANDLE;
1156 hpi_send_recv(&hm, &hr); 900 hpi_send_recv(&hm, &hr);
1157 901
1158 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 902 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1159 HPI_ISTREAM_GROUP_RESET); 903 HPI_ISTREAM_GROUP_RESET);
1160 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 904 hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index);
1161 hpi_send_recv(&hm, &hr); 905 hpi_send_recv(&hm, &hr);
1162 906
1163 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 907 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1164 HPI_ISTREAM_CLOSE); 908 HPI_ISTREAM_CLOSE);
1165 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 909 hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index);
1166 hpi_send_recv(&hm, &hr); 910 hpi_send_recv(&hm, &hr);
1167 911
1168 return hr.error; 912 return hr.error;
1169} 913}
1170 914
1171u16 hpi_instream_query_format(const struct hpi_hsubsys *ph_subsys, 915u16 hpi_instream_query_format(u32 h_instream,
1172 u32 h_instream, const struct hpi_format *p_format) 916 const struct hpi_format *p_format)
1173{ 917{
1174 struct hpi_message hm; 918 struct hpi_message hm;
1175 struct hpi_response hr; 919 struct hpi_response hr;
1176 920
1177 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 921 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1178 HPI_ISTREAM_QUERY_FORMAT); 922 HPI_ISTREAM_QUERY_FORMAT);
1179 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 923 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
924 return HPI_ERROR_INVALID_HANDLE;
1180 hpi_format_to_msg(&hm.u.d.u.data.format, p_format); 925 hpi_format_to_msg(&hm.u.d.u.data.format, p_format);
1181 926
1182 hpi_send_recv(&hm, &hr); 927 hpi_send_recv(&hm, &hr);
@@ -1184,15 +929,15 @@ u16 hpi_instream_query_format(const struct hpi_hsubsys *ph_subsys,
1184 return hr.error; 929 return hr.error;
1185} 930}
1186 931
1187u16 hpi_instream_set_format(const struct hpi_hsubsys *ph_subsys, 932u16 hpi_instream_set_format(u32 h_instream, const struct hpi_format *p_format)
1188 u32 h_instream, const struct hpi_format *p_format)
1189{ 933{
1190 struct hpi_message hm; 934 struct hpi_message hm;
1191 struct hpi_response hr; 935 struct hpi_response hr;
1192 936
1193 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 937 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1194 HPI_ISTREAM_SET_FORMAT); 938 HPI_ISTREAM_SET_FORMAT);
1195 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 939 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
940 return HPI_ERROR_INVALID_HANDLE;
1196 hpi_format_to_msg(&hm.u.d.u.data.format, p_format); 941 hpi_format_to_msg(&hm.u.d.u.data.format, p_format);
1197 942
1198 hpi_send_recv(&hm, &hr); 943 hpi_send_recv(&hm, &hr);
@@ -1200,15 +945,15 @@ u16 hpi_instream_set_format(const struct hpi_hsubsys *ph_subsys,
1200 return hr.error; 945 return hr.error;
1201} 946}
1202 947
1203u16 hpi_instream_read_buf(const struct hpi_hsubsys *ph_subsys, u32 h_instream, 948u16 hpi_instream_read_buf(u32 h_instream, u8 *pb_data, u32 bytes_to_read)
1204 u8 *pb_data, u32 bytes_to_read)
1205{ 949{
1206 struct hpi_message hm; 950 struct hpi_message hm;
1207 struct hpi_response hr; 951 struct hpi_response hr;
1208 952
1209 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 953 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1210 HPI_ISTREAM_READ); 954 HPI_ISTREAM_READ);
1211 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 955 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
956 return HPI_ERROR_INVALID_HANDLE;
1212 hm.u.d.u.data.data_size = bytes_to_read; 957 hm.u.d.u.data.data_size = bytes_to_read;
1213 hm.u.d.u.data.pb_data = pb_data; 958 hm.u.d.u.data.pb_data = pb_data;
1214 959
@@ -1217,72 +962,76 @@ u16 hpi_instream_read_buf(const struct hpi_hsubsys *ph_subsys, u32 h_instream,
1217 return hr.error; 962 return hr.error;
1218} 963}
1219 964
1220u16 hpi_instream_start(const struct hpi_hsubsys *ph_subsys, u32 h_instream) 965u16 hpi_instream_start(u32 h_instream)
1221{ 966{
1222 struct hpi_message hm; 967 struct hpi_message hm;
1223 struct hpi_response hr; 968 struct hpi_response hr;
1224 969
1225 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 970 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1226 HPI_ISTREAM_START); 971 HPI_ISTREAM_START);
1227 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 972 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
973 return HPI_ERROR_INVALID_HANDLE;
1228 974
1229 hpi_send_recv(&hm, &hr); 975 hpi_send_recv(&hm, &hr);
1230 976
1231 return hr.error; 977 return hr.error;
1232} 978}
1233 979
1234u16 hpi_instream_wait_start(const struct hpi_hsubsys *ph_subsys, 980u16 hpi_instream_wait_start(u32 h_instream)
1235 u32 h_instream)
1236{ 981{
1237 struct hpi_message hm; 982 struct hpi_message hm;
1238 struct hpi_response hr; 983 struct hpi_response hr;
1239 984
1240 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 985 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1241 HPI_ISTREAM_WAIT_START); 986 HPI_ISTREAM_WAIT_START);
1242 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 987 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
988 return HPI_ERROR_INVALID_HANDLE;
1243 989
1244 hpi_send_recv(&hm, &hr); 990 hpi_send_recv(&hm, &hr);
1245 991
1246 return hr.error; 992 return hr.error;
1247} 993}
1248 994
1249u16 hpi_instream_stop(const struct hpi_hsubsys *ph_subsys, u32 h_instream) 995u16 hpi_instream_stop(u32 h_instream)
1250{ 996{
1251 struct hpi_message hm; 997 struct hpi_message hm;
1252 struct hpi_response hr; 998 struct hpi_response hr;
1253 999
1254 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1000 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1255 HPI_ISTREAM_STOP); 1001 HPI_ISTREAM_STOP);
1256 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1002 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1003 return HPI_ERROR_INVALID_HANDLE;
1257 1004
1258 hpi_send_recv(&hm, &hr); 1005 hpi_send_recv(&hm, &hr);
1259 1006
1260 return hr.error; 1007 return hr.error;
1261} 1008}
1262 1009
1263u16 hpi_instream_reset(const struct hpi_hsubsys *ph_subsys, u32 h_instream) 1010u16 hpi_instream_reset(u32 h_instream)
1264{ 1011{
1265 struct hpi_message hm; 1012 struct hpi_message hm;
1266 struct hpi_response hr; 1013 struct hpi_response hr;
1267 1014
1268 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1015 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1269 HPI_ISTREAM_RESET); 1016 HPI_ISTREAM_RESET);
1270 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1017 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1018 return HPI_ERROR_INVALID_HANDLE;
1271 1019
1272 hpi_send_recv(&hm, &hr); 1020 hpi_send_recv(&hm, &hr);
1273 1021
1274 return hr.error; 1022 return hr.error;
1275} 1023}
1276 1024
1277u16 hpi_instream_get_info_ex(const struct hpi_hsubsys *ph_subsys, 1025u16 hpi_instream_get_info_ex(u32 h_instream, u16 *pw_state, u32 *pbuffer_size,
1278 u32 h_instream, u16 *pw_state, u32 *pbuffer_size, u32 *pdata_recorded, 1026 u32 *pdata_recorded, u32 *psamples_recorded,
1279 u32 *psamples_recorded, u32 *pauxiliary_data_recorded) 1027 u32 *pauxiliary_data_recorded)
1280{ 1028{
1281 struct hpi_message hm; 1029 struct hpi_message hm;
1282 struct hpi_response hr; 1030 struct hpi_response hr;
1283 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1031 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1284 HPI_ISTREAM_GET_INFO); 1032 HPI_ISTREAM_GET_INFO);
1285 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1033 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1034 return HPI_ERROR_INVALID_HANDLE;
1286 1035
1287 hpi_send_recv(&hm, &hr); 1036 hpi_send_recv(&hm, &hr);
1288 1037
@@ -1300,15 +1049,15 @@ u16 hpi_instream_get_info_ex(const struct hpi_hsubsys *ph_subsys,
1300 return hr.error; 1049 return hr.error;
1301} 1050}
1302 1051
1303u16 hpi_instream_ancillary_reset(const struct hpi_hsubsys *ph_subsys, 1052u16 hpi_instream_ancillary_reset(u32 h_instream, u16 bytes_per_frame,
1304 u32 h_instream, u16 bytes_per_frame, u16 mode, u16 alignment, 1053 u16 mode, u16 alignment, u16 idle_bit)
1305 u16 idle_bit)
1306{ 1054{
1307 struct hpi_message hm; 1055 struct hpi_message hm;
1308 struct hpi_response hr; 1056 struct hpi_response hr;
1309 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1057 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1310 HPI_ISTREAM_ANC_RESET); 1058 HPI_ISTREAM_ANC_RESET);
1311 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1059 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1060 return HPI_ERROR_INVALID_HANDLE;
1312 hm.u.d.u.data.format.attributes = bytes_per_frame; 1061 hm.u.d.u.data.format.attributes = bytes_per_frame;
1313 hm.u.d.u.data.format.format = (mode << 8) | (alignment & 0xff); 1062 hm.u.d.u.data.format.format = (mode << 8) | (alignment & 0xff);
1314 hm.u.d.u.data.format.channels = idle_bit; 1063 hm.u.d.u.data.format.channels = idle_bit;
@@ -1316,14 +1065,14 @@ u16 hpi_instream_ancillary_reset(const struct hpi_hsubsys *ph_subsys,
1316 return hr.error; 1065 return hr.error;
1317} 1066}
1318 1067
1319u16 hpi_instream_ancillary_get_info(const struct hpi_hsubsys *ph_subsys, 1068u16 hpi_instream_ancillary_get_info(u32 h_instream, u32 *pframe_space)
1320 u32 h_instream, u32 *pframe_space)
1321{ 1069{
1322 struct hpi_message hm; 1070 struct hpi_message hm;
1323 struct hpi_response hr; 1071 struct hpi_response hr;
1324 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1072 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1325 HPI_ISTREAM_ANC_GET_INFO); 1073 HPI_ISTREAM_ANC_GET_INFO);
1326 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1074 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1075 return HPI_ERROR_INVALID_HANDLE;
1327 hpi_send_recv(&hm, &hr); 1076 hpi_send_recv(&hm, &hr);
1328 if (pframe_space) 1077 if (pframe_space)
1329 *pframe_space = 1078 *pframe_space =
@@ -1333,8 +1082,8 @@ u16 hpi_instream_ancillary_get_info(const struct hpi_hsubsys *ph_subsys,
1333 return hr.error; 1082 return hr.error;
1334} 1083}
1335 1084
1336u16 hpi_instream_ancillary_write(const struct hpi_hsubsys *ph_subsys, 1085u16 hpi_instream_ancillary_write(u32 h_instream,
1337 u32 h_instream, const struct hpi_anc_frame *p_anc_frame_buffer, 1086 const struct hpi_anc_frame *p_anc_frame_buffer,
1338 u32 anc_frame_buffer_size_in_bytes, 1087 u32 anc_frame_buffer_size_in_bytes,
1339 u32 number_of_ancillary_frames_to_write) 1088 u32 number_of_ancillary_frames_to_write)
1340{ 1089{
@@ -1343,7 +1092,8 @@ u16 hpi_instream_ancillary_write(const struct hpi_hsubsys *ph_subsys,
1343 1092
1344 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1093 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1345 HPI_ISTREAM_ANC_WRITE); 1094 HPI_ISTREAM_ANC_WRITE);
1346 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1095 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1096 return HPI_ERROR_INVALID_HANDLE;
1347 hm.u.d.u.data.pb_data = (u8 *)p_anc_frame_buffer; 1097 hm.u.d.u.data.pb_data = (u8 *)p_anc_frame_buffer;
1348 hm.u.d.u.data.data_size = 1098 hm.u.d.u.data.data_size =
1349 number_of_ancillary_frames_to_write * 1099 number_of_ancillary_frames_to_write *
@@ -1351,12 +1101,11 @@ u16 hpi_instream_ancillary_write(const struct hpi_hsubsys *ph_subsys,
1351 if (hm.u.d.u.data.data_size <= anc_frame_buffer_size_in_bytes) 1101 if (hm.u.d.u.data.data_size <= anc_frame_buffer_size_in_bytes)
1352 hpi_send_recv(&hm, &hr); 1102 hpi_send_recv(&hm, &hr);
1353 else 1103 else
1354 hr.error = HPI_ERROR_INVALID_DATA_TRANSFER; 1104 hr.error = HPI_ERROR_INVALID_DATASIZE;
1355 return hr.error; 1105 return hr.error;
1356} 1106}
1357 1107
1358u16 hpi_instream_host_buffer_allocate(const struct hpi_hsubsys *ph_subsys, 1108u16 hpi_instream_host_buffer_allocate(u32 h_instream, u32 size_in_bytes)
1359 u32 h_instream, u32 size_in_bytes)
1360{ 1109{
1361 1110
1362 struct hpi_message hm; 1111 struct hpi_message hm;
@@ -1364,14 +1113,14 @@ u16 hpi_instream_host_buffer_allocate(const struct hpi_hsubsys *ph_subsys,
1364 1113
1365 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1114 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1366 HPI_ISTREAM_HOSTBUFFER_ALLOC); 1115 HPI_ISTREAM_HOSTBUFFER_ALLOC);
1367 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1116 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1117 return HPI_ERROR_INVALID_HANDLE;
1368 hm.u.d.u.data.data_size = size_in_bytes; 1118 hm.u.d.u.data.data_size = size_in_bytes;
1369 hpi_send_recv(&hm, &hr); 1119 hpi_send_recv(&hm, &hr);
1370 return hr.error; 1120 return hr.error;
1371} 1121}
1372 1122
1373u16 hpi_instream_host_buffer_get_info(const struct hpi_hsubsys *ph_subsys, 1123u16 hpi_instream_host_buffer_get_info(u32 h_instream, u8 **pp_buffer,
1374 u32 h_instream, u8 **pp_buffer,
1375 struct hpi_hostbuffer_status **pp_status) 1124 struct hpi_hostbuffer_status **pp_status)
1376{ 1125{
1377 struct hpi_message hm; 1126 struct hpi_message hm;
@@ -1379,7 +1128,8 @@ u16 hpi_instream_host_buffer_get_info(const struct hpi_hsubsys *ph_subsys,
1379 1128
1380 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1129 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1381 HPI_ISTREAM_HOSTBUFFER_GET_INFO); 1130 HPI_ISTREAM_HOSTBUFFER_GET_INFO);
1382 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1131 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1132 return HPI_ERROR_INVALID_HANDLE;
1383 hpi_send_recv(&hm, &hr); 1133 hpi_send_recv(&hm, &hr);
1384 1134
1385 if (hr.error == 0) { 1135 if (hr.error == 0) {
@@ -1391,8 +1141,7 @@ u16 hpi_instream_host_buffer_get_info(const struct hpi_hsubsys *ph_subsys,
1391 return hr.error; 1141 return hr.error;
1392} 1142}
1393 1143
1394u16 hpi_instream_host_buffer_free(const struct hpi_hsubsys *ph_subsys, 1144u16 hpi_instream_host_buffer_free(u32 h_instream)
1395 u32 h_instream)
1396{ 1145{
1397 1146
1398 struct hpi_message hm; 1147 struct hpi_message hm;
@@ -1400,13 +1149,13 @@ u16 hpi_instream_host_buffer_free(const struct hpi_hsubsys *ph_subsys,
1400 1149
1401 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1150 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1402 HPI_ISTREAM_HOSTBUFFER_FREE); 1151 HPI_ISTREAM_HOSTBUFFER_FREE);
1403 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1152 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1153 return HPI_ERROR_INVALID_HANDLE;
1404 hpi_send_recv(&hm, &hr); 1154 hpi_send_recv(&hm, &hr);
1405 return hr.error; 1155 return hr.error;
1406} 1156}
1407 1157
1408u16 hpi_instream_group_add(const struct hpi_hsubsys *ph_subsys, 1158u16 hpi_instream_group_add(u32 h_instream, u32 h_stream)
1409 u32 h_instream, u32 h_stream)
1410{ 1159{
1411 struct hpi_message hm; 1160 struct hpi_message hm;
1412 struct hpi_response hr; 1161 struct hpi_response hr;
@@ -1416,22 +1165,23 @@ u16 hpi_instream_group_add(const struct hpi_hsubsys *ph_subsys,
1416 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1165 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1417 HPI_ISTREAM_GROUP_ADD); 1166 HPI_ISTREAM_GROUP_ADD);
1418 hr.error = 0; 1167 hr.error = 0;
1419 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1168
1169 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1170 return HPI_ERROR_INVALID_HANDLE;
1171
1172 if (hpi_handle_indexes(h_stream, &adapter,
1173 &hm.u.d.u.stream.stream_index))
1174 return HPI_ERROR_INVALID_HANDLE;
1175
1420 c_obj_type = hpi_handle_object(h_stream); 1176 c_obj_type = hpi_handle_object(h_stream);
1421 1177
1422 switch (c_obj_type) { 1178 switch (c_obj_type) {
1423 case HPI_OBJ_OSTREAM: 1179 case HPI_OBJ_OSTREAM:
1424 hm.u.d.u.stream.object_type = HPI_OBJ_OSTREAM;
1425 u32TOINDEXES(h_stream, &adapter,
1426 &hm.u.d.u.stream.stream_index);
1427 break;
1428 case HPI_OBJ_ISTREAM: 1180 case HPI_OBJ_ISTREAM:
1429 hm.u.d.u.stream.object_type = HPI_OBJ_ISTREAM; 1181 hm.u.d.u.stream.object_type = c_obj_type;
1430 u32TOINDEXES(h_stream, &adapter,
1431 &hm.u.d.u.stream.stream_index);
1432 break; 1182 break;
1433 default: 1183 default:
1434 return HPI_ERROR_INVALID_STREAM; 1184 return HPI_ERROR_INVALID_OBJ;
1435 } 1185 }
1436 1186
1437 if (adapter != hm.adapter_index) 1187 if (adapter != hm.adapter_index)
@@ -1441,15 +1191,16 @@ u16 hpi_instream_group_add(const struct hpi_hsubsys *ph_subsys,
1441 return hr.error; 1191 return hr.error;
1442} 1192}
1443 1193
1444u16 hpi_instream_group_get_map(const struct hpi_hsubsys *ph_subsys, 1194u16 hpi_instream_group_get_map(u32 h_instream, u32 *poutstream_map,
1445 u32 h_instream, u32 *poutstream_map, u32 *pinstream_map) 1195 u32 *pinstream_map)
1446{ 1196{
1447 struct hpi_message hm; 1197 struct hpi_message hm;
1448 struct hpi_response hr; 1198 struct hpi_response hr;
1449 1199
1450 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1200 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1451 HPI_ISTREAM_HOSTBUFFER_FREE); 1201 HPI_ISTREAM_HOSTBUFFER_FREE);
1452 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1202 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1203 return HPI_ERROR_INVALID_HANDLE;
1453 hpi_send_recv(&hm, &hr); 1204 hpi_send_recv(&hm, &hr);
1454 1205
1455 if (poutstream_map) 1206 if (poutstream_map)
@@ -1460,21 +1211,20 @@ u16 hpi_instream_group_get_map(const struct hpi_hsubsys *ph_subsys,
1460 return hr.error; 1211 return hr.error;
1461} 1212}
1462 1213
1463u16 hpi_instream_group_reset(const struct hpi_hsubsys *ph_subsys, 1214u16 hpi_instream_group_reset(u32 h_instream)
1464 u32 h_instream)
1465{ 1215{
1466 struct hpi_message hm; 1216 struct hpi_message hm;
1467 struct hpi_response hr; 1217 struct hpi_response hr;
1468 1218
1469 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 1219 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
1470 HPI_ISTREAM_GROUP_RESET); 1220 HPI_ISTREAM_GROUP_RESET);
1471 u32TOINDEXES(h_instream, &hm.adapter_index, &hm.obj_index); 1221 if (hpi_handle_indexes(h_instream, &hm.adapter_index, &hm.obj_index))
1222 return HPI_ERROR_INVALID_HANDLE;
1472 hpi_send_recv(&hm, &hr); 1223 hpi_send_recv(&hm, &hr);
1473 return hr.error; 1224 return hr.error;
1474} 1225}
1475 1226
1476u16 hpi_mixer_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index, 1227u16 hpi_mixer_open(u16 adapter_index, u32 *ph_mixer)
1477 u32 *ph_mixer)
1478{ 1228{
1479 struct hpi_message hm; 1229 struct hpi_message hm;
1480 struct hpi_response hr; 1230 struct hpi_response hr;
@@ -1492,25 +1242,29 @@ u16 hpi_mixer_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index,
1492 return hr.error; 1242 return hr.error;
1493} 1243}
1494 1244
1495u16 hpi_mixer_close(const struct hpi_hsubsys *ph_subsys, u32 h_mixer) 1245u16 hpi_mixer_close(u32 h_mixer)
1496{ 1246{
1497 struct hpi_message hm; 1247 struct hpi_message hm;
1498 struct hpi_response hr; 1248 struct hpi_response hr;
1249
1499 hpi_init_message_response(&hm, &hr, HPI_OBJ_MIXER, HPI_MIXER_CLOSE); 1250 hpi_init_message_response(&hm, &hr, HPI_OBJ_MIXER, HPI_MIXER_CLOSE);
1500 u32TOINDEX(h_mixer, &hm.adapter_index); 1251 if (hpi_handle_indexes(h_mixer, &hm.adapter_index, NULL))
1252 return HPI_ERROR_INVALID_HANDLE;
1253
1501 hpi_send_recv(&hm, &hr); 1254 hpi_send_recv(&hm, &hr);
1502 return hr.error; 1255 return hr.error;
1503} 1256}
1504 1257
1505u16 hpi_mixer_get_control(const struct hpi_hsubsys *ph_subsys, u32 h_mixer, 1258u16 hpi_mixer_get_control(u32 h_mixer, u16 src_node_type,
1506 u16 src_node_type, u16 src_node_type_index, u16 dst_node_type, 1259 u16 src_node_type_index, u16 dst_node_type, u16 dst_node_type_index,
1507 u16 dst_node_type_index, u16 control_type, u32 *ph_control) 1260 u16 control_type, u32 *ph_control)
1508{ 1261{
1509 struct hpi_message hm; 1262 struct hpi_message hm;
1510 struct hpi_response hr; 1263 struct hpi_response hr;
1511 hpi_init_message_response(&hm, &hr, HPI_OBJ_MIXER, 1264 hpi_init_message_response(&hm, &hr, HPI_OBJ_MIXER,
1512 HPI_MIXER_GET_CONTROL); 1265 HPI_MIXER_GET_CONTROL);
1513 u32TOINDEX(h_mixer, &hm.adapter_index); 1266 if (hpi_handle_indexes(h_mixer, &hm.adapter_index, NULL))
1267 return HPI_ERROR_INVALID_HANDLE;
1514 hm.u.m.node_type1 = src_node_type; 1268 hm.u.m.node_type1 = src_node_type;
1515 hm.u.m.node_index1 = src_node_type_index; 1269 hm.u.m.node_index1 = src_node_type_index;
1516 hm.u.m.node_type2 = dst_node_type; 1270 hm.u.m.node_type2 = dst_node_type;
@@ -1528,16 +1282,16 @@ u16 hpi_mixer_get_control(const struct hpi_hsubsys *ph_subsys, u32 h_mixer,
1528 return hr.error; 1282 return hr.error;
1529} 1283}
1530 1284
1531u16 hpi_mixer_get_control_by_index(const struct hpi_hsubsys *ph_subsys, 1285u16 hpi_mixer_get_control_by_index(u32 h_mixer, u16 control_index,
1532 u32 h_mixer, u16 control_index, u16 *pw_src_node_type, 1286 u16 *pw_src_node_type, u16 *pw_src_node_index, u16 *pw_dst_node_type,
1533 u16 *pw_src_node_index, u16 *pw_dst_node_type, u16 *pw_dst_node_index, 1287 u16 *pw_dst_node_index, u16 *pw_control_type, u32 *ph_control)
1534 u16 *pw_control_type, u32 *ph_control)
1535{ 1288{
1536 struct hpi_message hm; 1289 struct hpi_message hm;
1537 struct hpi_response hr; 1290 struct hpi_response hr;
1538 hpi_init_message_response(&hm, &hr, HPI_OBJ_MIXER, 1291 hpi_init_message_response(&hm, &hr, HPI_OBJ_MIXER,
1539 HPI_MIXER_GET_CONTROL_BY_INDEX); 1292 HPI_MIXER_GET_CONTROL_BY_INDEX);
1540 u32TOINDEX(h_mixer, &hm.adapter_index); 1293 if (hpi_handle_indexes(h_mixer, &hm.adapter_index, NULL))
1294 return HPI_ERROR_INVALID_HANDLE;
1541 hm.u.m.control_index = control_index; 1295 hm.u.m.control_index = control_index;
1542 hpi_send_recv(&hm, &hr); 1296 hpi_send_recv(&hm, &hr);
1543 1297
@@ -1562,13 +1316,14 @@ u16 hpi_mixer_get_control_by_index(const struct hpi_hsubsys *ph_subsys,
1562 return hr.error; 1316 return hr.error;
1563} 1317}
1564 1318
1565u16 hpi_mixer_store(const struct hpi_hsubsys *ph_subsys, u32 h_mixer, 1319u16 hpi_mixer_store(u32 h_mixer, enum HPI_MIXER_STORE_COMMAND command,
1566 enum HPI_MIXER_STORE_COMMAND command, u16 index) 1320 u16 index)
1567{ 1321{
1568 struct hpi_message hm; 1322 struct hpi_message hm;
1569 struct hpi_response hr; 1323 struct hpi_response hr;
1570 hpi_init_message_response(&hm, &hr, HPI_OBJ_MIXER, HPI_MIXER_STORE); 1324 hpi_init_message_response(&hm, &hr, HPI_OBJ_MIXER, HPI_MIXER_STORE);
1571 u32TOINDEX(h_mixer, &hm.adapter_index); 1325 if (hpi_handle_indexes(h_mixer, &hm.adapter_index, NULL))
1326 return HPI_ERROR_INVALID_HANDLE;
1572 hm.u.mx.store.command = command; 1327 hm.u.mx.store.command = command;
1573 hm.u.mx.store.index = index; 1328 hm.u.mx.store.index = index;
1574 hpi_send_recv(&hm, &hr); 1329 hpi_send_recv(&hm, &hr);
@@ -1576,16 +1331,16 @@ u16 hpi_mixer_store(const struct hpi_hsubsys *ph_subsys, u32 h_mixer,
1576} 1331}
1577 1332
1578static 1333static
1579u16 hpi_control_param_set(const struct hpi_hsubsys *ph_subsys, 1334u16 hpi_control_param_set(const u32 h_control, const u16 attrib,
1580 const u32 h_control, const u16 attrib, const u32 param1, 1335 const u32 param1, const u32 param2)
1581 const u32 param2)
1582{ 1336{
1583 struct hpi_message hm; 1337 struct hpi_message hm;
1584 struct hpi_response hr; 1338 struct hpi_response hr;
1585 1339
1586 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1340 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
1587 HPI_CONTROL_SET_STATE); 1341 HPI_CONTROL_SET_STATE);
1588 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1342 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1343 return HPI_ERROR_INVALID_HANDLE;
1589 hm.u.c.attribute = attrib; 1344 hm.u.c.attribute = attrib;
1590 hm.u.c.param1 = param1; 1345 hm.u.c.param1 = param1;
1591 hm.u.c.param2 = param2; 1346 hm.u.c.param2 = param2;
@@ -1601,7 +1356,8 @@ static u16 hpi_control_log_set2(u32 h_control, u16 attrib, short sv0,
1601 1356
1602 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1357 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
1603 HPI_CONTROL_SET_STATE); 1358 HPI_CONTROL_SET_STATE);
1604 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1359 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1360 return HPI_ERROR_INVALID_HANDLE;
1605 hm.u.c.attribute = attrib; 1361 hm.u.c.attribute = attrib;
1606 hm.u.c.an_log_value[0] = sv0; 1362 hm.u.c.an_log_value[0] = sv0;
1607 hm.u.c.an_log_value[1] = sv1; 1363 hm.u.c.an_log_value[1] = sv1;
@@ -1610,16 +1366,16 @@ static u16 hpi_control_log_set2(u32 h_control, u16 attrib, short sv0,
1610} 1366}
1611 1367
1612static 1368static
1613u16 hpi_control_param_get(const struct hpi_hsubsys *ph_subsys, 1369u16 hpi_control_param_get(const u32 h_control, const u16 attrib, u32 param1,
1614 const u32 h_control, const u16 attrib, u32 param1, u32 param2, 1370 u32 param2, u32 *pparam1, u32 *pparam2)
1615 u32 *pparam1, u32 *pparam2)
1616{ 1371{
1617 struct hpi_message hm; 1372 struct hpi_message hm;
1618 struct hpi_response hr; 1373 struct hpi_response hr;
1619 1374
1620 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1375 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
1621 HPI_CONTROL_GET_STATE); 1376 HPI_CONTROL_GET_STATE);
1622 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1377 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1378 return HPI_ERROR_INVALID_HANDLE;
1623 hm.u.c.attribute = attrib; 1379 hm.u.c.attribute = attrib;
1624 hm.u.c.param1 = param1; 1380 hm.u.c.param1 = param1;
1625 hm.u.c.param2 = param2; 1381 hm.u.c.param2 = param2;
@@ -1632,19 +1388,20 @@ u16 hpi_control_param_get(const struct hpi_hsubsys *ph_subsys,
1632 return hr.error; 1388 return hr.error;
1633} 1389}
1634 1390
1635#define hpi_control_param1_get(s, h, a, p1) \ 1391#define hpi_control_param1_get(h, a, p1) \
1636 hpi_control_param_get(s, h, a, 0, 0, p1, NULL) 1392 hpi_control_param_get(h, a, 0, 0, p1, NULL)
1637#define hpi_control_param2_get(s, h, a, p1, p2) \ 1393#define hpi_control_param2_get(h, a, p1, p2) \
1638 hpi_control_param_get(s, h, a, 0, 0, p1, p2) 1394 hpi_control_param_get(h, a, 0, 0, p1, p2)
1639 1395
1640static u16 hpi_control_log_get2(const struct hpi_hsubsys *ph_subsys, 1396static u16 hpi_control_log_get2(u32 h_control, u16 attrib, short *sv0,
1641 u32 h_control, u16 attrib, short *sv0, short *sv1) 1397 short *sv1)
1642{ 1398{
1643 struct hpi_message hm; 1399 struct hpi_message hm;
1644 struct hpi_response hr; 1400 struct hpi_response hr;
1645 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1401 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
1646 HPI_CONTROL_GET_STATE); 1402 HPI_CONTROL_GET_STATE);
1647 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1403 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1404 return HPI_ERROR_INVALID_HANDLE;
1648 hm.u.c.attribute = attrib; 1405 hm.u.c.attribute = attrib;
1649 1406
1650 hpi_send_recv(&hm, &hr); 1407 hpi_send_recv(&hm, &hr);
@@ -1655,8 +1412,7 @@ static u16 hpi_control_log_get2(const struct hpi_hsubsys *ph_subsys,
1655} 1412}
1656 1413
1657static 1414static
1658u16 hpi_control_query(const struct hpi_hsubsys *ph_subsys, 1415u16 hpi_control_query(const u32 h_control, const u16 attrib, const u32 index,
1659 const u32 h_control, const u16 attrib, const u32 index,
1660 const u32 param, u32 *psetting) 1416 const u32 param, u32 *psetting)
1661{ 1417{
1662 struct hpi_message hm; 1418 struct hpi_message hm;
@@ -1664,7 +1420,8 @@ u16 hpi_control_query(const struct hpi_hsubsys *ph_subsys,
1664 1420
1665 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1421 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
1666 HPI_CONTROL_GET_INFO); 1422 HPI_CONTROL_GET_INFO);
1667 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1423 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1424 return HPI_ERROR_INVALID_HANDLE;
1668 1425
1669 hm.u.c.attribute = attrib; 1426 hm.u.c.attribute = attrib;
1670 hm.u.c.param1 = index; 1427 hm.u.c.param1 = index;
@@ -1682,7 +1439,7 @@ static u16 hpi_control_get_string(const u32 h_control, const u16 attribute,
1682 unsigned int sub_string_index = 0, j = 0; 1439 unsigned int sub_string_index = 0, j = 0;
1683 char c = 0; 1440 char c = 0;
1684 unsigned int n = 0; 1441 unsigned int n = 0;
1685 u16 hE = 0; 1442 u16 err = 0;
1686 1443
1687 if ((string_length < 1) || (string_length > 256)) 1444 if ((string_length < 1) || (string_length > 256))
1688 return HPI_ERROR_INVALID_CONTROL_VALUE; 1445 return HPI_ERROR_INVALID_CONTROL_VALUE;
@@ -1693,7 +1450,9 @@ static u16 hpi_control_get_string(const u32 h_control, const u16 attribute,
1693 1450
1694 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1451 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
1695 HPI_CONTROL_GET_STATE); 1452 HPI_CONTROL_GET_STATE);
1696 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1453 if (hpi_handle_indexes(h_control, &hm.adapter_index,
1454 &hm.obj_index))
1455 return HPI_ERROR_INVALID_HANDLE;
1697 hm.u.c.attribute = attribute; 1456 hm.u.c.attribute = attribute;
1698 hm.u.c.param1 = sub_string_index; 1457 hm.u.c.param1 = sub_string_index;
1699 hm.u.c.param2 = 0; 1458 hm.u.c.param2 = 0;
@@ -1705,7 +1464,7 @@ static u16 hpi_control_get_string(const u32 h_control, const u16 attribute,
1705 return HPI_ERROR_INVALID_CONTROL_VALUE; 1464 return HPI_ERROR_INVALID_CONTROL_VALUE;
1706 1465
1707 if (hr.error) { 1466 if (hr.error) {
1708 hE = hr.error; 1467 err = hr.error;
1709 break; 1468 break;
1710 } 1469 }
1711 for (j = 0; j < 8; j++) { 1470 for (j = 0; j < 8; j++) {
@@ -1714,7 +1473,7 @@ static u16 hpi_control_get_string(const u32 h_control, const u16 attribute,
1714 n++; 1473 n++;
1715 if (n >= string_length) { 1474 if (n >= string_length) {
1716 psz_string[string_length - 1] = 0; 1475 psz_string[string_length - 1] = 0;
1717 hE = HPI_ERROR_INVALID_CONTROL_VALUE; 1476 err = HPI_ERROR_INVALID_CONTROL_VALUE;
1718 break; 1477 break;
1719 } 1478 }
1720 if (c == 0) 1479 if (c == 0)
@@ -1730,57 +1489,52 @@ static u16 hpi_control_get_string(const u32 h_control, const u16 attribute,
1730 if (c == 0) 1489 if (c == 0)
1731 break; 1490 break;
1732 } 1491 }
1733 return hE; 1492 return err;
1734} 1493}
1735 1494
1736u16 HPI_AESEBU__receiver_query_format(const struct hpi_hsubsys *ph_subsys, 1495u16 hpi_aesebu_receiver_query_format(const u32 h_aes_rx, const u32 index,
1737 const u32 h_aes_rx, const u32 index, u16 *pw_format) 1496 u16 *pw_format)
1738{ 1497{
1739 u32 qr; 1498 u32 qr;
1740 u16 err; 1499 u16 err;
1741 1500
1742 err = hpi_control_query(ph_subsys, h_aes_rx, HPI_AESEBURX_FORMAT, 1501 err = hpi_control_query(h_aes_rx, HPI_AESEBURX_FORMAT, index, 0, &qr);
1743 index, 0, &qr);
1744 *pw_format = (u16)qr; 1502 *pw_format = (u16)qr;
1745 return err; 1503 return err;
1746} 1504}
1747 1505
1748u16 HPI_AESEBU__receiver_set_format(const struct hpi_hsubsys *ph_subsys, 1506u16 hpi_aesebu_receiver_set_format(u32 h_control, u16 format)
1749 u32 h_control, u16 format)
1750{ 1507{
1751 return hpi_control_param_set(ph_subsys, h_control, 1508 return hpi_control_param_set(h_control, HPI_AESEBURX_FORMAT, format,
1752 HPI_AESEBURX_FORMAT, format, 0); 1509 0);
1753} 1510}
1754 1511
1755u16 HPI_AESEBU__receiver_get_format(const struct hpi_hsubsys *ph_subsys, 1512u16 hpi_aesebu_receiver_get_format(u32 h_control, u16 *pw_format)
1756 u32 h_control, u16 *pw_format)
1757{ 1513{
1758 u16 err; 1514 u16 err;
1759 u32 param; 1515 u32 param;
1760 1516
1761 err = hpi_control_param1_get(ph_subsys, h_control, 1517 err = hpi_control_param1_get(h_control, HPI_AESEBURX_FORMAT, &param);
1762 HPI_AESEBURX_FORMAT, &param);
1763 if (!err && pw_format) 1518 if (!err && pw_format)
1764 *pw_format = (u16)param; 1519 *pw_format = (u16)param;
1765 1520
1766 return err; 1521 return err;
1767} 1522}
1768 1523
1769u16 HPI_AESEBU__receiver_get_sample_rate(const struct hpi_hsubsys *ph_subsys, 1524u16 hpi_aesebu_receiver_get_sample_rate(u32 h_control, u32 *psample_rate)
1770 u32 h_control, u32 *psample_rate)
1771{ 1525{
1772 return hpi_control_param1_get(ph_subsys, h_control, 1526 return hpi_control_param1_get(h_control, HPI_AESEBURX_SAMPLERATE,
1773 HPI_AESEBURX_SAMPLERATE, psample_rate); 1527 psample_rate);
1774} 1528}
1775 1529
1776u16 HPI_AESEBU__receiver_get_user_data(const struct hpi_hsubsys *ph_subsys, 1530u16 hpi_aesebu_receiver_get_user_data(u32 h_control, u16 index, u16 *pw_data)
1777 u32 h_control, u16 index, u16 *pw_data)
1778{ 1531{
1779 struct hpi_message hm; 1532 struct hpi_message hm;
1780 struct hpi_response hr; 1533 struct hpi_response hr;
1781 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1534 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
1782 HPI_CONTROL_GET_STATE); 1535 HPI_CONTROL_GET_STATE);
1783 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1536 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1537 return HPI_ERROR_INVALID_HANDLE;
1784 hm.u.c.attribute = HPI_AESEBURX_USERDATA; 1538 hm.u.c.attribute = HPI_AESEBURX_USERDATA;
1785 hm.u.c.param1 = index; 1539 hm.u.c.param1 = index;
1786 1540
@@ -1791,14 +1545,15 @@ u16 HPI_AESEBU__receiver_get_user_data(const struct hpi_hsubsys *ph_subsys,
1791 return hr.error; 1545 return hr.error;
1792} 1546}
1793 1547
1794u16 HPI_AESEBU__receiver_get_channel_status(const struct hpi_hsubsys 1548u16 hpi_aesebu_receiver_get_channel_status(u32 h_control, u16 index,
1795 *ph_subsys, u32 h_control, u16 index, u16 *pw_data) 1549 u16 *pw_data)
1796{ 1550{
1797 struct hpi_message hm; 1551 struct hpi_message hm;
1798 struct hpi_response hr; 1552 struct hpi_response hr;
1799 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1553 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
1800 HPI_CONTROL_GET_STATE); 1554 HPI_CONTROL_GET_STATE);
1801 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1555 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1556 return HPI_ERROR_INVALID_HANDLE;
1802 hm.u.c.attribute = HPI_AESEBURX_CHANNELSTATUS; 1557 hm.u.c.attribute = HPI_AESEBURX_CHANNELSTATUS;
1803 hm.u.c.param1 = index; 1558 hm.u.c.param1 = index;
1804 1559
@@ -1809,101 +1564,93 @@ u16 HPI_AESEBU__receiver_get_channel_status(const struct hpi_hsubsys
1809 return hr.error; 1564 return hr.error;
1810} 1565}
1811 1566
1812u16 HPI_AESEBU__receiver_get_error_status(const struct hpi_hsubsys *ph_subsys, 1567u16 hpi_aesebu_receiver_get_error_status(u32 h_control, u16 *pw_error_data)
1813 u32 h_control, u16 *pw_error_data)
1814{ 1568{
1815 u32 error_data = 0; 1569 u32 error_data = 0;
1816 u16 error = 0; 1570 u16 err = 0;
1817 1571
1818 error = hpi_control_param1_get(ph_subsys, h_control, 1572 err = hpi_control_param1_get(h_control, HPI_AESEBURX_ERRORSTATUS,
1819 HPI_AESEBURX_ERRORSTATUS, &error_data); 1573 &error_data);
1820 if (pw_error_data) 1574 if (pw_error_data)
1821 *pw_error_data = (u16)error_data; 1575 *pw_error_data = (u16)error_data;
1822 return error; 1576 return err;
1823} 1577}
1824 1578
1825u16 HPI_AESEBU__transmitter_set_sample_rate(const struct hpi_hsubsys 1579u16 hpi_aesebu_transmitter_set_sample_rate(u32 h_control, u32 sample_rate)
1826 *ph_subsys, u32 h_control, u32 sample_rate)
1827{ 1580{
1828 return hpi_control_param_set(ph_subsys, h_control, 1581 return hpi_control_param_set(h_control, HPI_AESEBUTX_SAMPLERATE,
1829 HPI_AESEBUTX_SAMPLERATE, sample_rate, 0); 1582 sample_rate, 0);
1830} 1583}
1831 1584
1832u16 HPI_AESEBU__transmitter_set_user_data(const struct hpi_hsubsys *ph_subsys, 1585u16 hpi_aesebu_transmitter_set_user_data(u32 h_control, u16 index, u16 data)
1833 u32 h_control, u16 index, u16 data)
1834{ 1586{
1835 return hpi_control_param_set(ph_subsys, h_control, 1587 return hpi_control_param_set(h_control, HPI_AESEBUTX_USERDATA, index,
1836 HPI_AESEBUTX_USERDATA, index, data); 1588 data);
1837} 1589}
1838 1590
1839u16 HPI_AESEBU__transmitter_set_channel_status(const struct hpi_hsubsys 1591u16 hpi_aesebu_transmitter_set_channel_status(u32 h_control, u16 index,
1840 *ph_subsys, u32 h_control, u16 index, u16 data) 1592 u16 data)
1841{ 1593{
1842 return hpi_control_param_set(ph_subsys, h_control, 1594 return hpi_control_param_set(h_control, HPI_AESEBUTX_CHANNELSTATUS,
1843 HPI_AESEBUTX_CHANNELSTATUS, index, data); 1595 index, data);
1844} 1596}
1845 1597
1846u16 HPI_AESEBU__transmitter_get_channel_status(const struct hpi_hsubsys 1598u16 hpi_aesebu_transmitter_get_channel_status(u32 h_control, u16 index,
1847 *ph_subsys, u32 h_control, u16 index, u16 *pw_data) 1599 u16 *pw_data)
1848{ 1600{
1849 return HPI_ERROR_INVALID_OPERATION; 1601 return HPI_ERROR_INVALID_OPERATION;
1850} 1602}
1851 1603
1852u16 HPI_AESEBU__transmitter_query_format(const struct hpi_hsubsys *ph_subsys, 1604u16 hpi_aesebu_transmitter_query_format(const u32 h_aes_tx, const u32 index,
1853 const u32 h_aes_tx, const u32 index, u16 *pw_format) 1605 u16 *pw_format)
1854{ 1606{
1855 u32 qr; 1607 u32 qr;
1856 u16 err; 1608 u16 err;
1857 1609
1858 err = hpi_control_query(ph_subsys, h_aes_tx, HPI_AESEBUTX_FORMAT, 1610 err = hpi_control_query(h_aes_tx, HPI_AESEBUTX_FORMAT, index, 0, &qr);
1859 index, 0, &qr);
1860 *pw_format = (u16)qr; 1611 *pw_format = (u16)qr;
1861 return err; 1612 return err;
1862} 1613}
1863 1614
1864u16 HPI_AESEBU__transmitter_set_format(const struct hpi_hsubsys *ph_subsys, 1615u16 hpi_aesebu_transmitter_set_format(u32 h_control, u16 output_format)
1865 u32 h_control, u16 output_format)
1866{ 1616{
1867 return hpi_control_param_set(ph_subsys, h_control, 1617 return hpi_control_param_set(h_control, HPI_AESEBUTX_FORMAT,
1868 HPI_AESEBUTX_FORMAT, output_format, 0); 1618 output_format, 0);
1869} 1619}
1870 1620
1871u16 HPI_AESEBU__transmitter_get_format(const struct hpi_hsubsys *ph_subsys, 1621u16 hpi_aesebu_transmitter_get_format(u32 h_control, u16 *pw_output_format)
1872 u32 h_control, u16 *pw_output_format)
1873{ 1622{
1874 u16 err; 1623 u16 err;
1875 u32 param; 1624 u32 param;
1876 1625
1877 err = hpi_control_param1_get(ph_subsys, h_control, 1626 err = hpi_control_param1_get(h_control, HPI_AESEBUTX_FORMAT, &param);
1878 HPI_AESEBUTX_FORMAT, &param);
1879 if (!err && pw_output_format) 1627 if (!err && pw_output_format)
1880 *pw_output_format = (u16)param; 1628 *pw_output_format = (u16)param;
1881 1629
1882 return err; 1630 return err;
1883} 1631}
1884 1632
1885u16 hpi_bitstream_set_clock_edge(const struct hpi_hsubsys *ph_subsys, 1633u16 hpi_bitstream_set_clock_edge(u32 h_control, u16 edge_type)
1886 u32 h_control, u16 edge_type)
1887{ 1634{
1888 return hpi_control_param_set(ph_subsys, h_control, 1635 return hpi_control_param_set(h_control, HPI_BITSTREAM_CLOCK_EDGE,
1889 HPI_BITSTREAM_CLOCK_EDGE, edge_type, 0); 1636 edge_type, 0);
1890} 1637}
1891 1638
1892u16 hpi_bitstream_set_data_polarity(const struct hpi_hsubsys *ph_subsys, 1639u16 hpi_bitstream_set_data_polarity(u32 h_control, u16 polarity)
1893 u32 h_control, u16 polarity)
1894{ 1640{
1895 return hpi_control_param_set(ph_subsys, h_control, 1641 return hpi_control_param_set(h_control, HPI_BITSTREAM_DATA_POLARITY,
1896 HPI_BITSTREAM_DATA_POLARITY, polarity, 0); 1642 polarity, 0);
1897} 1643}
1898 1644
1899u16 hpi_bitstream_get_activity(const struct hpi_hsubsys *ph_subsys, 1645u16 hpi_bitstream_get_activity(u32 h_control, u16 *pw_clk_activity,
1900 u32 h_control, u16 *pw_clk_activity, u16 *pw_data_activity) 1646 u16 *pw_data_activity)
1901{ 1647{
1902 struct hpi_message hm; 1648 struct hpi_message hm;
1903 struct hpi_response hr; 1649 struct hpi_response hr;
1904 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1650 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
1905 HPI_CONTROL_GET_STATE); 1651 HPI_CONTROL_GET_STATE);
1906 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1652 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1653 return HPI_ERROR_INVALID_HANDLE;
1907 hm.u.c.attribute = HPI_BITSTREAM_ACTIVITY; 1654 hm.u.c.attribute = HPI_BITSTREAM_ACTIVITY;
1908 hpi_send_recv(&hm, &hr); 1655 hpi_send_recv(&hm, &hr);
1909 if (pw_clk_activity) 1656 if (pw_clk_activity)
@@ -1913,45 +1660,43 @@ u16 hpi_bitstream_get_activity(const struct hpi_hsubsys *ph_subsys,
1913 return hr.error; 1660 return hr.error;
1914} 1661}
1915 1662
1916u16 hpi_channel_mode_query_mode(const struct hpi_hsubsys *ph_subsys, 1663u16 hpi_channel_mode_query_mode(const u32 h_mode, const u32 index,
1917 const u32 h_mode, const u32 index, u16 *pw_mode) 1664 u16 *pw_mode)
1918{ 1665{
1919 u32 qr; 1666 u32 qr;
1920 u16 err; 1667 u16 err;
1921 1668
1922 err = hpi_control_query(ph_subsys, h_mode, HPI_CHANNEL_MODE_MODE, 1669 err = hpi_control_query(h_mode, HPI_CHANNEL_MODE_MODE, index, 0, &qr);
1923 index, 0, &qr);
1924 *pw_mode = (u16)qr; 1670 *pw_mode = (u16)qr;
1925 return err; 1671 return err;
1926} 1672}
1927 1673
1928u16 hpi_channel_mode_set(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1674u16 hpi_channel_mode_set(u32 h_control, u16 mode)
1929 u16 mode)
1930{ 1675{
1931 return hpi_control_param_set(ph_subsys, h_control, 1676 return hpi_control_param_set(h_control, HPI_CHANNEL_MODE_MODE, mode,
1932 HPI_CHANNEL_MODE_MODE, mode, 0); 1677 0);
1933} 1678}
1934 1679
1935u16 hpi_channel_mode_get(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1680u16 hpi_channel_mode_get(u32 h_control, u16 *mode)
1936 u16 *mode)
1937{ 1681{
1938 u32 mode32 = 0; 1682 u32 mode32 = 0;
1939 u16 error = hpi_control_param1_get(ph_subsys, h_control, 1683 u16 err = hpi_control_param1_get(h_control,
1940 HPI_CHANNEL_MODE_MODE, &mode32); 1684 HPI_CHANNEL_MODE_MODE, &mode32);
1941 if (mode) 1685 if (mode)
1942 *mode = (u16)mode32; 1686 *mode = (u16)mode32;
1943 return error; 1687 return err;
1944} 1688}
1945 1689
1946u16 hpi_cobranet_hmi_write(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1690u16 hpi_cobranet_hmi_write(u32 h_control, u32 hmi_address, u32 byte_count,
1947 u32 hmi_address, u32 byte_count, u8 *pb_data) 1691 u8 *pb_data)
1948{ 1692{
1949 struct hpi_message hm; 1693 struct hpi_message hm;
1950 struct hpi_response hr; 1694 struct hpi_response hr;
1951 1695
1952 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROLEX, 1696 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROLEX,
1953 HPI_CONTROL_SET_STATE); 1697 HPI_CONTROL_SET_STATE);
1954 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1698 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1699 return HPI_ERROR_INVALID_HANDLE;
1955 1700
1956 hm.u.cx.u.cobranet_data.byte_count = byte_count; 1701 hm.u.cx.u.cobranet_data.byte_count = byte_count;
1957 hm.u.cx.u.cobranet_data.hmi_address = hmi_address; 1702 hm.u.cx.u.cobranet_data.hmi_address = hmi_address;
@@ -1969,15 +1714,16 @@ u16 hpi_cobranet_hmi_write(const struct hpi_hsubsys *ph_subsys, u32 h_control,
1969 return hr.error; 1714 return hr.error;
1970} 1715}
1971 1716
1972u16 hpi_cobranet_hmi_read(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1717u16 hpi_cobranet_hmi_read(u32 h_control, u32 hmi_address, u32 max_byte_count,
1973 u32 hmi_address, u32 max_byte_count, u32 *pbyte_count, u8 *pb_data) 1718 u32 *pbyte_count, u8 *pb_data)
1974{ 1719{
1975 struct hpi_message hm; 1720 struct hpi_message hm;
1976 struct hpi_response hr; 1721 struct hpi_response hr;
1977 1722
1978 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROLEX, 1723 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROLEX,
1979 HPI_CONTROL_GET_STATE); 1724 HPI_CONTROL_GET_STATE);
1980 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1725 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1726 return HPI_ERROR_INVALID_HANDLE;
1981 1727
1982 hm.u.cx.u.cobranet_data.byte_count = max_byte_count; 1728 hm.u.cx.u.cobranet_data.byte_count = max_byte_count;
1983 hm.u.cx.u.cobranet_data.hmi_address = hmi_address; 1729 hm.u.cx.u.cobranet_data.hmi_address = hmi_address;
@@ -2008,16 +1754,16 @@ u16 hpi_cobranet_hmi_read(const struct hpi_hsubsys *ph_subsys, u32 h_control,
2008 return hr.error; 1754 return hr.error;
2009} 1755}
2010 1756
2011u16 hpi_cobranet_hmi_get_status(const struct hpi_hsubsys *ph_subsys, 1757u16 hpi_cobranet_hmi_get_status(u32 h_control, u32 *pstatus,
2012 u32 h_control, u32 *pstatus, u32 *preadable_size, 1758 u32 *preadable_size, u32 *pwriteable_size)
2013 u32 *pwriteable_size)
2014{ 1759{
2015 struct hpi_message hm; 1760 struct hpi_message hm;
2016 struct hpi_response hr; 1761 struct hpi_response hr;
2017 1762
2018 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROLEX, 1763 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROLEX,
2019 HPI_CONTROL_GET_STATE); 1764 HPI_CONTROL_GET_STATE);
2020 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1765 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1766 return HPI_ERROR_INVALID_HANDLE;
2021 1767
2022 hm.u.cx.attribute = HPI_COBRANET_GET_STATUS; 1768 hm.u.cx.attribute = HPI_COBRANET_GET_STATUS;
2023 1769
@@ -2035,177 +1781,176 @@ u16 hpi_cobranet_hmi_get_status(const struct hpi_hsubsys *ph_subsys,
2035 return hr.error; 1781 return hr.error;
2036} 1782}
2037 1783
2038u16 hpi_cobranet_getI_paddress(const struct hpi_hsubsys *ph_subsys, 1784u16 hpi_cobranet_get_ip_address(u32 h_control, u32 *pdw_ip_address)
2039 u32 h_control, u32 *pi_paddress)
2040{ 1785{
2041 u32 byte_count; 1786 u32 byte_count;
2042 u32 iP; 1787 u32 iP;
2043 u16 error; 1788 u16 err;
2044 1789
2045 error = hpi_cobranet_hmi_read(ph_subsys, h_control, 1790 err = hpi_cobranet_hmi_read(h_control,
2046 HPI_COBRANET_HMI_cobra_ip_mon_currentIP, 4, &byte_count, 1791 HPI_COBRANET_HMI_cobra_ip_mon_currentIP, 4, &byte_count,
2047 (u8 *)&iP); 1792 (u8 *)&iP);
2048 1793
2049 *pi_paddress = 1794 *pdw_ip_address =
2050 ((iP & 0xff000000) >> 8) | ((iP & 0x00ff0000) << 8) | ((iP & 1795 ((iP & 0xff000000) >> 8) | ((iP & 0x00ff0000) << 8) | ((iP &
2051 0x0000ff00) >> 8) | ((iP & 0x000000ff) << 8); 1796 0x0000ff00) >> 8) | ((iP & 0x000000ff) << 8);
2052 1797
2053 if (error) 1798 if (err)
2054 *pi_paddress = 0; 1799 *pdw_ip_address = 0;
2055 1800
2056 return error; 1801 return err;
2057 1802
2058} 1803}
2059 1804
2060u16 hpi_cobranet_setI_paddress(const struct hpi_hsubsys *ph_subsys, 1805u16 hpi_cobranet_set_ip_address(u32 h_control, u32 dw_ip_address)
2061 u32 h_control, u32 i_paddress)
2062{ 1806{
2063 u32 iP; 1807 u32 iP;
2064 u16 error; 1808 u16 err;
2065 1809
2066 iP = ((i_paddress & 0xff000000) >> 8) | ((i_paddress & 0x00ff0000) << 1810 iP = ((dw_ip_address & 0xff000000) >> 8) | ((dw_ip_address &
2067 8) | ((i_paddress & 0x0000ff00) >> 8) | ((i_paddress & 1811 0x00ff0000) << 8) | ((dw_ip_address & 0x0000ff00) >>
2068 0x000000ff) << 8); 1812 8) | ((dw_ip_address & 0x000000ff) << 8);
2069 1813
2070 error = hpi_cobranet_hmi_write(ph_subsys, h_control, 1814 err = hpi_cobranet_hmi_write(h_control,
2071 HPI_COBRANET_HMI_cobra_ip_mon_currentIP, 4, (u8 *)&iP); 1815 HPI_COBRANET_HMI_cobra_ip_mon_currentIP, 4, (u8 *)&iP);
2072 1816
2073 return error; 1817 return err;
2074 1818
2075} 1819}
2076 1820
2077u16 hpi_cobranet_get_staticI_paddress(const struct hpi_hsubsys *ph_subsys, 1821u16 hpi_cobranet_get_static_ip_address(u32 h_control, u32 *pdw_ip_address)
2078 u32 h_control, u32 *pi_paddress)
2079{ 1822{
2080 u32 byte_count; 1823 u32 byte_count;
2081 u32 iP; 1824 u32 iP;
2082 u16 error; 1825 u16 err;
2083 error = hpi_cobranet_hmi_read(ph_subsys, h_control, 1826 err = hpi_cobranet_hmi_read(h_control,
2084 HPI_COBRANET_HMI_cobra_ip_mon_staticIP, 4, &byte_count, 1827 HPI_COBRANET_HMI_cobra_ip_mon_staticIP, 4, &byte_count,
2085 (u8 *)&iP); 1828 (u8 *)&iP);
2086 1829
2087 *pi_paddress = 1830 *pdw_ip_address =
2088 ((iP & 0xff000000) >> 8) | ((iP & 0x00ff0000) << 8) | ((iP & 1831 ((iP & 0xff000000) >> 8) | ((iP & 0x00ff0000) << 8) | ((iP &
2089 0x0000ff00) >> 8) | ((iP & 0x000000ff) << 8); 1832 0x0000ff00) >> 8) | ((iP & 0x000000ff) << 8);
2090 1833
2091 if (error) 1834 if (err)
2092 *pi_paddress = 0; 1835 *pdw_ip_address = 0;
2093 1836
2094 return error; 1837 return err;
2095 1838
2096} 1839}
2097 1840
2098u16 hpi_cobranet_set_staticI_paddress(const struct hpi_hsubsys *ph_subsys, 1841u16 hpi_cobranet_set_static_ip_address(u32 h_control, u32 dw_ip_address)
2099 u32 h_control, u32 i_paddress)
2100{ 1842{
2101 u32 iP; 1843 u32 iP;
2102 u16 error; 1844 u16 err;
2103 1845
2104 iP = ((i_paddress & 0xff000000) >> 8) | ((i_paddress & 0x00ff0000) << 1846 iP = ((dw_ip_address & 0xff000000) >> 8) | ((dw_ip_address &
2105 8) | ((i_paddress & 0x0000ff00) >> 8) | ((i_paddress & 1847 0x00ff0000) << 8) | ((dw_ip_address & 0x0000ff00) >>
2106 0x000000ff) << 8); 1848 8) | ((dw_ip_address & 0x000000ff) << 8);
2107 1849
2108 error = hpi_cobranet_hmi_write(ph_subsys, h_control, 1850 err = hpi_cobranet_hmi_write(h_control,
2109 HPI_COBRANET_HMI_cobra_ip_mon_staticIP, 4, (u8 *)&iP); 1851 HPI_COBRANET_HMI_cobra_ip_mon_staticIP, 4, (u8 *)&iP);
2110 1852
2111 return error; 1853 return err;
2112 1854
2113} 1855}
2114 1856
2115u16 hpi_cobranet_getMA_caddress(const struct hpi_hsubsys *ph_subsys, 1857u16 hpi_cobranet_get_macaddress(u32 h_control, u32 *p_mac_msbs,
2116 u32 h_control, u32 *pmAC_MS_bs, u32 *pmAC_LS_bs) 1858 u32 *p_mac_lsbs)
2117{ 1859{
2118 u32 byte_count; 1860 u32 byte_count;
2119 u16 error; 1861 u16 err;
2120 u32 mAC; 1862 u32 mac;
2121 1863
2122 error = hpi_cobranet_hmi_read(ph_subsys, h_control, 1864 err = hpi_cobranet_hmi_read(h_control,
2123 HPI_COBRANET_HMI_cobra_if_phy_address, 4, &byte_count, 1865 HPI_COBRANET_HMI_cobra_if_phy_address, 4, &byte_count,
2124 (u8 *)&mAC); 1866 (u8 *)&mac);
2125 *pmAC_MS_bs = 1867
2126 ((mAC & 0xff000000) >> 8) | ((mAC & 0x00ff0000) << 8) | ((mAC 1868 if (!err) {
2127 & 0x0000ff00) >> 8) | ((mAC & 0x000000ff) << 8); 1869 *p_mac_msbs =
2128 error += hpi_cobranet_hmi_read(ph_subsys, h_control, 1870 ((mac & 0xff000000) >> 8) | ((mac & 0x00ff0000) << 8)
2129 HPI_COBRANET_HMI_cobra_if_phy_address + 1, 4, &byte_count, 1871 | ((mac & 0x0000ff00) >> 8) | ((mac & 0x000000ff) <<
2130 (u8 *)&mAC); 1872 8);
2131 *pmAC_LS_bs = 1873
2132 ((mAC & 0xff000000) >> 8) | ((mAC & 0x00ff0000) << 8) | ((mAC 1874 err = hpi_cobranet_hmi_read(h_control,
2133 & 0x0000ff00) >> 8) | ((mAC & 0x000000ff) << 8); 1875 HPI_COBRANET_HMI_cobra_if_phy_address + 1, 4,
2134 1876 &byte_count, (u8 *)&mac);
2135 if (error) {
2136 *pmAC_MS_bs = 0;
2137 *pmAC_LS_bs = 0;
2138 } 1877 }
2139 1878
2140 return error; 1879 if (!err) {
1880 *p_mac_lsbs =
1881 ((mac & 0xff000000) >> 8) | ((mac & 0x00ff0000) << 8)
1882 | ((mac & 0x0000ff00) >> 8) | ((mac & 0x000000ff) <<
1883 8);
1884 } else {
1885 *p_mac_msbs = 0;
1886 *p_mac_lsbs = 0;
1887 }
1888
1889 return err;
2141} 1890}
2142 1891
2143u16 hpi_compander_set_enable(const struct hpi_hsubsys *ph_subsys, 1892u16 hpi_compander_set_enable(u32 h_control, u32 enable)
2144 u32 h_control, u32 enable)
2145{ 1893{
2146 return hpi_control_param_set(ph_subsys, h_control, HPI_GENERIC_ENABLE, 1894 return hpi_control_param_set(h_control, HPI_GENERIC_ENABLE, enable,
2147 enable, 0); 1895 0);
2148} 1896}
2149 1897
2150u16 hpi_compander_get_enable(const struct hpi_hsubsys *ph_subsys, 1898u16 hpi_compander_get_enable(u32 h_control, u32 *enable)
2151 u32 h_control, u32 *enable)
2152{ 1899{
2153 return hpi_control_param1_get(ph_subsys, h_control, 1900 return hpi_control_param1_get(h_control, HPI_GENERIC_ENABLE, enable);
2154 HPI_GENERIC_ENABLE, enable);
2155} 1901}
2156 1902
2157u16 hpi_compander_set_makeup_gain(const struct hpi_hsubsys *ph_subsys, 1903u16 hpi_compander_set_makeup_gain(u32 h_control, short makeup_gain0_01dB)
2158 u32 h_control, short makeup_gain0_01dB)
2159{ 1904{
2160 return hpi_control_log_set2(h_control, HPI_COMPANDER_MAKEUPGAIN, 1905 return hpi_control_log_set2(h_control, HPI_COMPANDER_MAKEUPGAIN,
2161 makeup_gain0_01dB, 0); 1906 makeup_gain0_01dB, 0);
2162} 1907}
2163 1908
2164u16 hpi_compander_get_makeup_gain(const struct hpi_hsubsys *ph_subsys, 1909u16 hpi_compander_get_makeup_gain(u32 h_control, short *makeup_gain0_01dB)
2165 u32 h_control, short *makeup_gain0_01dB)
2166{ 1910{
2167 return hpi_control_log_get2(ph_subsys, h_control, 1911 return hpi_control_log_get2(h_control, HPI_COMPANDER_MAKEUPGAIN,
2168 HPI_COMPANDER_MAKEUPGAIN, makeup_gain0_01dB, NULL); 1912 makeup_gain0_01dB, NULL);
2169} 1913}
2170 1914
2171u16 hpi_compander_set_attack_time_constant(const struct hpi_hsubsys 1915u16 hpi_compander_set_attack_time_constant(u32 h_control, unsigned int index,
2172 *ph_subsys, u32 h_control, unsigned int index, u32 attack) 1916 u32 attack)
2173{ 1917{
2174 return hpi_control_param_set(ph_subsys, h_control, 1918 return hpi_control_param_set(h_control, HPI_COMPANDER_ATTACK, attack,
2175 HPI_COMPANDER_ATTACK, attack, index); 1919 index);
2176} 1920}
2177 1921
2178u16 hpi_compander_get_attack_time_constant(const struct hpi_hsubsys 1922u16 hpi_compander_get_attack_time_constant(u32 h_control, unsigned int index,
2179 *ph_subsys, u32 h_control, unsigned int index, u32 *attack) 1923 u32 *attack)
2180{ 1924{
2181 return hpi_control_param_get(ph_subsys, h_control, 1925 return hpi_control_param_get(h_control, HPI_COMPANDER_ATTACK, 0,
2182 HPI_COMPANDER_ATTACK, 0, index, attack, NULL); 1926 index, attack, NULL);
2183} 1927}
2184 1928
2185u16 hpi_compander_set_decay_time_constant(const struct hpi_hsubsys *ph_subsys, 1929u16 hpi_compander_set_decay_time_constant(u32 h_control, unsigned int index,
2186 u32 h_control, unsigned int index, u32 decay) 1930 u32 decay)
2187{ 1931{
2188 return hpi_control_param_set(ph_subsys, h_control, 1932 return hpi_control_param_set(h_control, HPI_COMPANDER_DECAY, decay,
2189 HPI_COMPANDER_DECAY, decay, index); 1933 index);
2190} 1934}
2191 1935
2192u16 hpi_compander_get_decay_time_constant(const struct hpi_hsubsys *ph_subsys, 1936u16 hpi_compander_get_decay_time_constant(u32 h_control, unsigned int index,
2193 u32 h_control, unsigned int index, u32 *decay) 1937 u32 *decay)
2194{ 1938{
2195 return hpi_control_param_get(ph_subsys, h_control, 1939 return hpi_control_param_get(h_control, HPI_COMPANDER_DECAY, 0, index,
2196 HPI_COMPANDER_DECAY, 0, index, decay, NULL); 1940 decay, NULL);
2197 1941
2198} 1942}
2199 1943
2200u16 hpi_compander_set_threshold(const struct hpi_hsubsys *ph_subsys, 1944u16 hpi_compander_set_threshold(u32 h_control, unsigned int index,
2201 u32 h_control, unsigned int index, short threshold0_01dB) 1945 short threshold0_01dB)
2202{ 1946{
2203 struct hpi_message hm; 1947 struct hpi_message hm;
2204 struct hpi_response hr; 1948 struct hpi_response hr;
2205 1949
2206 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1950 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2207 HPI_CONTROL_SET_STATE); 1951 HPI_CONTROL_SET_STATE);
2208 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1952 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1953 return HPI_ERROR_INVALID_HANDLE;
2209 hm.u.c.attribute = HPI_COMPANDER_THRESHOLD; 1954 hm.u.c.attribute = HPI_COMPANDER_THRESHOLD;
2210 hm.u.c.param2 = index; 1955 hm.u.c.param2 = index;
2211 hm.u.c.an_log_value[0] = threshold0_01dB; 1956 hm.u.c.an_log_value[0] = threshold0_01dB;
@@ -2215,15 +1960,16 @@ u16 hpi_compander_set_threshold(const struct hpi_hsubsys *ph_subsys,
2215 return hr.error; 1960 return hr.error;
2216} 1961}
2217 1962
2218u16 hpi_compander_get_threshold(const struct hpi_hsubsys *ph_subsys, 1963u16 hpi_compander_get_threshold(u32 h_control, unsigned int index,
2219 u32 h_control, unsigned int index, short *threshold0_01dB) 1964 short *threshold0_01dB)
2220{ 1965{
2221 struct hpi_message hm; 1966 struct hpi_message hm;
2222 struct hpi_response hr; 1967 struct hpi_response hr;
2223 1968
2224 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 1969 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2225 HPI_CONTROL_GET_STATE); 1970 HPI_CONTROL_GET_STATE);
2226 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 1971 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
1972 return HPI_ERROR_INVALID_HANDLE;
2227 hm.u.c.attribute = HPI_COMPANDER_THRESHOLD; 1973 hm.u.c.attribute = HPI_COMPANDER_THRESHOLD;
2228 hm.u.c.param2 = index; 1974 hm.u.c.param2 = index;
2229 1975
@@ -2233,29 +1979,28 @@ u16 hpi_compander_get_threshold(const struct hpi_hsubsys *ph_subsys,
2233 return hr.error; 1979 return hr.error;
2234} 1980}
2235 1981
2236u16 hpi_compander_set_ratio(const struct hpi_hsubsys *ph_subsys, 1982u16 hpi_compander_set_ratio(u32 h_control, u32 index, u32 ratio100)
2237 u32 h_control, u32 index, u32 ratio100)
2238{ 1983{
2239 return hpi_control_param_set(ph_subsys, h_control, 1984 return hpi_control_param_set(h_control, HPI_COMPANDER_RATIO, ratio100,
2240 HPI_COMPANDER_RATIO, ratio100, index); 1985 index);
2241} 1986}
2242 1987
2243u16 hpi_compander_get_ratio(const struct hpi_hsubsys *ph_subsys, 1988u16 hpi_compander_get_ratio(u32 h_control, u32 index, u32 *ratio100)
2244 u32 h_control, u32 index, u32 *ratio100)
2245{ 1989{
2246 return hpi_control_param_get(ph_subsys, h_control, 1990 return hpi_control_param_get(h_control, HPI_COMPANDER_RATIO, 0, index,
2247 HPI_COMPANDER_RATIO, 0, index, ratio100, NULL); 1991 ratio100, NULL);
2248} 1992}
2249 1993
2250u16 hpi_level_query_range(const struct hpi_hsubsys *ph_subsys, u32 h_control, 1994u16 hpi_level_query_range(u32 h_control, short *min_gain_01dB,
2251 short *min_gain_01dB, short *max_gain_01dB, short *step_gain_01dB) 1995 short *max_gain_01dB, short *step_gain_01dB)
2252{ 1996{
2253 struct hpi_message hm; 1997 struct hpi_message hm;
2254 struct hpi_response hr; 1998 struct hpi_response hr;
2255 1999
2256 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2000 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2257 HPI_CONTROL_GET_STATE); 2001 HPI_CONTROL_GET_STATE);
2258 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2002 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2003 return HPI_ERROR_INVALID_HANDLE;
2259 hm.u.c.attribute = HPI_LEVEL_RANGE; 2004 hm.u.c.attribute = HPI_LEVEL_RANGE;
2260 2005
2261 hpi_send_recv(&hm, &hr); 2006 hpi_send_recv(&hm, &hr);
@@ -2273,31 +2018,27 @@ u16 hpi_level_query_range(const struct hpi_hsubsys *ph_subsys, u32 h_control,
2273 return hr.error; 2018 return hr.error;
2274} 2019}
2275 2020
2276u16 hpi_level_set_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2021u16 hpi_level_set_gain(u32 h_control, short an_gain0_01dB[HPI_MAX_CHANNELS]
2277 short an_gain0_01dB[HPI_MAX_CHANNELS]
2278 ) 2022 )
2279{ 2023{
2280 return hpi_control_log_set2(h_control, HPI_LEVEL_GAIN, 2024 return hpi_control_log_set2(h_control, HPI_LEVEL_GAIN,
2281 an_gain0_01dB[0], an_gain0_01dB[1]); 2025 an_gain0_01dB[0], an_gain0_01dB[1]);
2282} 2026}
2283 2027
2284u16 hpi_level_get_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2028u16 hpi_level_get_gain(u32 h_control, short an_gain0_01dB[HPI_MAX_CHANNELS]
2285 short an_gain0_01dB[HPI_MAX_CHANNELS]
2286 ) 2029 )
2287{ 2030{
2288 return hpi_control_log_get2(ph_subsys, h_control, HPI_LEVEL_GAIN, 2031 return hpi_control_log_get2(h_control, HPI_LEVEL_GAIN,
2289 &an_gain0_01dB[0], &an_gain0_01dB[1]); 2032 &an_gain0_01dB[0], &an_gain0_01dB[1]);
2290} 2033}
2291 2034
2292u16 hpi_meter_query_channels(const struct hpi_hsubsys *ph_subsys, 2035u16 hpi_meter_query_channels(const u32 h_meter, u32 *p_channels)
2293 const u32 h_meter, u32 *p_channels)
2294{ 2036{
2295 return hpi_control_query(ph_subsys, h_meter, HPI_METER_NUM_CHANNELS, 2037 return hpi_control_query(h_meter, HPI_METER_NUM_CHANNELS, 0, 0,
2296 0, 0, p_channels); 2038 p_channels);
2297} 2039}
2298 2040
2299u16 hpi_meter_get_peak(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2041u16 hpi_meter_get_peak(u32 h_control, short an_peakdB[HPI_MAX_CHANNELS]
2300 short an_peakdB[HPI_MAX_CHANNELS]
2301 ) 2042 )
2302{ 2043{
2303 short i = 0; 2044 short i = 0;
@@ -2307,7 +2048,8 @@ u16 hpi_meter_get_peak(const struct hpi_hsubsys *ph_subsys, u32 h_control,
2307 2048
2308 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2049 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2309 HPI_CONTROL_GET_STATE); 2050 HPI_CONTROL_GET_STATE);
2310 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2051 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2052 return HPI_ERROR_INVALID_HANDLE;
2311 hm.obj_index = hm.obj_index; 2053 hm.obj_index = hm.obj_index;
2312 hm.u.c.attribute = HPI_METER_PEAK; 2054 hm.u.c.attribute = HPI_METER_PEAK;
2313 2055
@@ -2322,8 +2064,7 @@ u16 hpi_meter_get_peak(const struct hpi_hsubsys *ph_subsys, u32 h_control,
2322 return hr.error; 2064 return hr.error;
2323} 2065}
2324 2066
2325u16 hpi_meter_get_rms(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2067u16 hpi_meter_get_rms(u32 h_control, short an_rmsdB[HPI_MAX_CHANNELS]
2326 short an_rmsdB[HPI_MAX_CHANNELS]
2327 ) 2068 )
2328{ 2069{
2329 short i = 0; 2070 short i = 0;
@@ -2333,7 +2074,8 @@ u16 hpi_meter_get_rms(const struct hpi_hsubsys *ph_subsys, u32 h_control,
2333 2074
2334 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2075 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2335 HPI_CONTROL_GET_STATE); 2076 HPI_CONTROL_GET_STATE);
2336 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2077 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2078 return HPI_ERROR_INVALID_HANDLE;
2337 hm.u.c.attribute = HPI_METER_RMS; 2079 hm.u.c.attribute = HPI_METER_RMS;
2338 2080
2339 hpi_send_recv(&hm, &hr); 2081 hpi_send_recv(&hm, &hr);
@@ -2348,22 +2090,20 @@ u16 hpi_meter_get_rms(const struct hpi_hsubsys *ph_subsys, u32 h_control,
2348 return hr.error; 2090 return hr.error;
2349} 2091}
2350 2092
2351u16 hpi_meter_set_rms_ballistics(const struct hpi_hsubsys *ph_subsys, 2093u16 hpi_meter_set_rms_ballistics(u32 h_control, u16 attack, u16 decay)
2352 u32 h_control, u16 attack, u16 decay)
2353{ 2094{
2354 return hpi_control_param_set(ph_subsys, h_control, 2095 return hpi_control_param_set(h_control, HPI_METER_RMS_BALLISTICS,
2355 HPI_METER_RMS_BALLISTICS, attack, decay); 2096 attack, decay);
2356} 2097}
2357 2098
2358u16 hpi_meter_get_rms_ballistics(const struct hpi_hsubsys *ph_subsys, 2099u16 hpi_meter_get_rms_ballistics(u32 h_control, u16 *pn_attack, u16 *pn_decay)
2359 u32 h_control, u16 *pn_attack, u16 *pn_decay)
2360{ 2100{
2361 u32 attack; 2101 u32 attack;
2362 u32 decay; 2102 u32 decay;
2363 u16 error; 2103 u16 error;
2364 2104
2365 error = hpi_control_param2_get(ph_subsys, h_control, 2105 error = hpi_control_param2_get(h_control, HPI_METER_RMS_BALLISTICS,
2366 HPI_METER_RMS_BALLISTICS, &attack, &decay); 2106 &attack, &decay);
2367 2107
2368 if (pn_attack) 2108 if (pn_attack)
2369 *pn_attack = (unsigned short)attack; 2109 *pn_attack = (unsigned short)attack;
@@ -2373,22 +2113,21 @@ u16 hpi_meter_get_rms_ballistics(const struct hpi_hsubsys *ph_subsys,
2373 return error; 2113 return error;
2374} 2114}
2375 2115
2376u16 hpi_meter_set_peak_ballistics(const struct hpi_hsubsys *ph_subsys, 2116u16 hpi_meter_set_peak_ballistics(u32 h_control, u16 attack, u16 decay)
2377 u32 h_control, u16 attack, u16 decay)
2378{ 2117{
2379 return hpi_control_param_set(ph_subsys, h_control, 2118 return hpi_control_param_set(h_control, HPI_METER_PEAK_BALLISTICS,
2380 HPI_METER_PEAK_BALLISTICS, attack, decay); 2119 attack, decay);
2381} 2120}
2382 2121
2383u16 hpi_meter_get_peak_ballistics(const struct hpi_hsubsys *ph_subsys, 2122u16 hpi_meter_get_peak_ballistics(u32 h_control, u16 *pn_attack,
2384 u32 h_control, u16 *pn_attack, u16 *pn_decay) 2123 u16 *pn_decay)
2385{ 2124{
2386 u32 attack; 2125 u32 attack;
2387 u32 decay; 2126 u32 decay;
2388 u16 error; 2127 u16 error;
2389 2128
2390 error = hpi_control_param2_get(ph_subsys, h_control, 2129 error = hpi_control_param2_get(h_control, HPI_METER_PEAK_BALLISTICS,
2391 HPI_METER_PEAK_BALLISTICS, &attack, &decay); 2130 &attack, &decay);
2392 2131
2393 if (pn_attack) 2132 if (pn_attack)
2394 *pn_attack = (short)attack; 2133 *pn_attack = (short)attack;
@@ -2398,55 +2137,53 @@ u16 hpi_meter_get_peak_ballistics(const struct hpi_hsubsys *ph_subsys,
2398 return error; 2137 return error;
2399} 2138}
2400 2139
2401u16 hpi_microphone_set_phantom_power(const struct hpi_hsubsys *ph_subsys, 2140u16 hpi_microphone_set_phantom_power(u32 h_control, u16 on_off)
2402 u32 h_control, u16 on_off)
2403{ 2141{
2404 return hpi_control_param_set(ph_subsys, h_control, 2142 return hpi_control_param_set(h_control, HPI_MICROPHONE_PHANTOM_POWER,
2405 HPI_MICROPHONE_PHANTOM_POWER, (u32)on_off, 0); 2143 (u32)on_off, 0);
2406} 2144}
2407 2145
2408u16 hpi_microphone_get_phantom_power(const struct hpi_hsubsys *ph_subsys, 2146u16 hpi_microphone_get_phantom_power(u32 h_control, u16 *pw_on_off)
2409 u32 h_control, u16 *pw_on_off)
2410{ 2147{
2411 u16 error = 0; 2148 u16 error = 0;
2412 u32 on_off = 0; 2149 u32 on_off = 0;
2413 error = hpi_control_param1_get(ph_subsys, h_control, 2150 error = hpi_control_param1_get(h_control,
2414 HPI_MICROPHONE_PHANTOM_POWER, &on_off); 2151 HPI_MICROPHONE_PHANTOM_POWER, &on_off);
2415 if (pw_on_off) 2152 if (pw_on_off)
2416 *pw_on_off = (u16)on_off; 2153 *pw_on_off = (u16)on_off;
2417 return error; 2154 return error;
2418} 2155}
2419 2156
2420u16 hpi_multiplexer_set_source(const struct hpi_hsubsys *ph_subsys, 2157u16 hpi_multiplexer_set_source(u32 h_control, u16 source_node_type,
2421 u32 h_control, u16 source_node_type, u16 source_node_index) 2158 u16 source_node_index)
2422{ 2159{
2423 return hpi_control_param_set(ph_subsys, h_control, 2160 return hpi_control_param_set(h_control, HPI_MULTIPLEXER_SOURCE,
2424 HPI_MULTIPLEXER_SOURCE, source_node_type, source_node_index); 2161 source_node_type, source_node_index);
2425} 2162}
2426 2163
2427u16 hpi_multiplexer_get_source(const struct hpi_hsubsys *ph_subsys, 2164u16 hpi_multiplexer_get_source(u32 h_control, u16 *source_node_type,
2428 u32 h_control, u16 *source_node_type, u16 *source_node_index) 2165 u16 *source_node_index)
2429{ 2166{
2430 u32 node, index; 2167 u32 node, index;
2431 u16 error = hpi_control_param2_get(ph_subsys, h_control, 2168 u16 err = hpi_control_param2_get(h_control,
2432 HPI_MULTIPLEXER_SOURCE, &node, 2169 HPI_MULTIPLEXER_SOURCE, &node,
2433 &index); 2170 &index);
2434 if (source_node_type) 2171 if (source_node_type)
2435 *source_node_type = (u16)node; 2172 *source_node_type = (u16)node;
2436 if (source_node_index) 2173 if (source_node_index)
2437 *source_node_index = (u16)index; 2174 *source_node_index = (u16)index;
2438 return error; 2175 return err;
2439} 2176}
2440 2177
2441u16 hpi_multiplexer_query_source(const struct hpi_hsubsys *ph_subsys, 2178u16 hpi_multiplexer_query_source(u32 h_control, u16 index,
2442 u32 h_control, u16 index, u16 *source_node_type, 2179 u16 *source_node_type, u16 *source_node_index)
2443 u16 *source_node_index)
2444{ 2180{
2445 struct hpi_message hm; 2181 struct hpi_message hm;
2446 struct hpi_response hr; 2182 struct hpi_response hr;
2447 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2183 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2448 HPI_CONTROL_GET_STATE); 2184 HPI_CONTROL_GET_STATE);
2449 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2185 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2186 return HPI_ERROR_INVALID_HANDLE;
2450 hm.u.c.attribute = HPI_MULTIPLEXER_QUERYSOURCE; 2187 hm.u.c.attribute = HPI_MULTIPLEXER_QUERYSOURCE;
2451 hm.u.c.param1 = index; 2188 hm.u.c.param1 = index;
2452 2189
@@ -2459,15 +2196,15 @@ u16 hpi_multiplexer_query_source(const struct hpi_hsubsys *ph_subsys,
2459 return hr.error; 2196 return hr.error;
2460} 2197}
2461 2198
2462u16 hpi_parametricEQ__get_info(const struct hpi_hsubsys *ph_subsys, 2199u16 hpi_parametric_eq_get_info(u32 h_control, u16 *pw_number_of_bands,
2463 u32 h_control, u16 *pw_number_of_bands, u16 *pw_on_off) 2200 u16 *pw_on_off)
2464{ 2201{
2465 u32 oB = 0; 2202 u32 oB = 0;
2466 u32 oO = 0; 2203 u32 oO = 0;
2467 u16 error = 0; 2204 u16 error = 0;
2468 2205
2469 error = hpi_control_param2_get(ph_subsys, h_control, 2206 error = hpi_control_param2_get(h_control, HPI_EQUALIZER_NUM_FILTERS,
2470 HPI_EQUALIZER_NUM_FILTERS, &oO, &oB); 2207 &oO, &oB);
2471 if (pw_number_of_bands) 2208 if (pw_number_of_bands)
2472 *pw_number_of_bands = (u16)oB; 2209 *pw_number_of_bands = (u16)oB;
2473 if (pw_on_off) 2210 if (pw_on_off)
@@ -2475,23 +2212,22 @@ u16 hpi_parametricEQ__get_info(const struct hpi_hsubsys *ph_subsys,
2475 return error; 2212 return error;
2476} 2213}
2477 2214
2478u16 hpi_parametricEQ__set_state(const struct hpi_hsubsys *ph_subsys, 2215u16 hpi_parametric_eq_set_state(u32 h_control, u16 on_off)
2479 u32 h_control, u16 on_off)
2480{ 2216{
2481 return hpi_control_param_set(ph_subsys, h_control, 2217 return hpi_control_param_set(h_control, HPI_EQUALIZER_NUM_FILTERS,
2482 HPI_EQUALIZER_NUM_FILTERS, on_off, 0); 2218 on_off, 0);
2483} 2219}
2484 2220
2485u16 hpi_parametricEQ__get_band(const struct hpi_hsubsys *ph_subsys, 2221u16 hpi_parametric_eq_get_band(u32 h_control, u16 index, u16 *pn_type,
2486 u32 h_control, u16 index, u16 *pn_type, u32 *pfrequency_hz, 2222 u32 *pfrequency_hz, short *pnQ100, short *pn_gain0_01dB)
2487 short *pnQ100, short *pn_gain0_01dB)
2488{ 2223{
2489 struct hpi_message hm; 2224 struct hpi_message hm;
2490 struct hpi_response hr; 2225 struct hpi_response hr;
2491 2226
2492 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2227 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2493 HPI_CONTROL_GET_STATE); 2228 HPI_CONTROL_GET_STATE);
2494 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2229 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2230 return HPI_ERROR_INVALID_HANDLE;
2495 hm.u.c.attribute = HPI_EQUALIZER_FILTER; 2231 hm.u.c.attribute = HPI_EQUALIZER_FILTER;
2496 hm.u.c.param2 = index; 2232 hm.u.c.param2 = index;
2497 2233
@@ -2509,16 +2245,16 @@ u16 hpi_parametricEQ__get_band(const struct hpi_hsubsys *ph_subsys,
2509 return hr.error; 2245 return hr.error;
2510} 2246}
2511 2247
2512u16 hpi_parametricEQ__set_band(const struct hpi_hsubsys *ph_subsys, 2248u16 hpi_parametric_eq_set_band(u32 h_control, u16 index, u16 type,
2513 u32 h_control, u16 index, u16 type, u32 frequency_hz, short q100, 2249 u32 frequency_hz, short q100, short gain0_01dB)
2514 short gain0_01dB)
2515{ 2250{
2516 struct hpi_message hm; 2251 struct hpi_message hm;
2517 struct hpi_response hr; 2252 struct hpi_response hr;
2518 2253
2519 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2254 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2520 HPI_CONTROL_SET_STATE); 2255 HPI_CONTROL_SET_STATE);
2521 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2256 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2257 return HPI_ERROR_INVALID_HANDLE;
2522 2258
2523 hm.u.c.param1 = frequency_hz; 2259 hm.u.c.param1 = frequency_hz;
2524 hm.u.c.param2 = (index & 0xFFFFL) + ((u32)type << 16); 2260 hm.u.c.param2 = (index & 0xFFFFL) + ((u32)type << 16);
@@ -2531,8 +2267,7 @@ u16 hpi_parametricEQ__set_band(const struct hpi_hsubsys *ph_subsys,
2531 return hr.error; 2267 return hr.error;
2532} 2268}
2533 2269
2534u16 hpi_parametricEQ__get_coeffs(const struct hpi_hsubsys *ph_subsys, 2270u16 hpi_parametric_eq_get_coeffs(u32 h_control, u16 index, short coeffs[5]
2535 u32 h_control, u16 index, short coeffs[5]
2536 ) 2271 )
2537{ 2272{
2538 struct hpi_message hm; 2273 struct hpi_message hm;
@@ -2540,7 +2275,8 @@ u16 hpi_parametricEQ__get_coeffs(const struct hpi_hsubsys *ph_subsys,
2540 2275
2541 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2276 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2542 HPI_CONTROL_GET_STATE); 2277 HPI_CONTROL_GET_STATE);
2543 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2278 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2279 return HPI_ERROR_INVALID_HANDLE;
2544 hm.u.c.attribute = HPI_EQUALIZER_COEFFICIENTS; 2280 hm.u.c.attribute = HPI_EQUALIZER_COEFFICIENTS;
2545 hm.u.c.param2 = index; 2281 hm.u.c.param2 = index;
2546 2282
@@ -2555,444 +2291,388 @@ u16 hpi_parametricEQ__get_coeffs(const struct hpi_hsubsys *ph_subsys,
2555 return hr.error; 2291 return hr.error;
2556} 2292}
2557 2293
2558u16 hpi_sample_clock_query_source(const struct hpi_hsubsys *ph_subsys, 2294u16 hpi_sample_clock_query_source(const u32 h_clock, const u32 index,
2559 const u32 h_clock, const u32 index, u16 *pw_source) 2295 u16 *pw_source)
2560{ 2296{
2561 u32 qr; 2297 u32 qr;
2562 u16 err; 2298 u16 err;
2563 2299
2564 err = hpi_control_query(ph_subsys, h_clock, HPI_SAMPLECLOCK_SOURCE, 2300 err = hpi_control_query(h_clock, HPI_SAMPLECLOCK_SOURCE, index, 0,
2565 index, 0, &qr); 2301 &qr);
2566 *pw_source = (u16)qr; 2302 *pw_source = (u16)qr;
2567 return err; 2303 return err;
2568} 2304}
2569 2305
2570u16 hpi_sample_clock_set_source(const struct hpi_hsubsys *ph_subsys, 2306u16 hpi_sample_clock_set_source(u32 h_control, u16 source)
2571 u32 h_control, u16 source)
2572{ 2307{
2573 return hpi_control_param_set(ph_subsys, h_control, 2308 return hpi_control_param_set(h_control, HPI_SAMPLECLOCK_SOURCE,
2574 HPI_SAMPLECLOCK_SOURCE, source, 0); 2309 source, 0);
2575} 2310}
2576 2311
2577u16 hpi_sample_clock_get_source(const struct hpi_hsubsys *ph_subsys, 2312u16 hpi_sample_clock_get_source(u32 h_control, u16 *pw_source)
2578 u32 h_control, u16 *pw_source)
2579{ 2313{
2580 u16 error = 0; 2314 u16 err = 0;
2581 u32 source = 0; 2315 u32 source = 0;
2582 error = hpi_control_param1_get(ph_subsys, h_control, 2316 err = hpi_control_param1_get(h_control, HPI_SAMPLECLOCK_SOURCE,
2583 HPI_SAMPLECLOCK_SOURCE, &source); 2317 &source);
2584 if (!error) 2318 if (!err)
2585 if (pw_source) 2319 if (pw_source)
2586 *pw_source = (u16)source; 2320 *pw_source = (u16)source;
2587 return error; 2321 return err;
2588} 2322}
2589 2323
2590u16 hpi_sample_clock_query_source_index(const struct hpi_hsubsys *ph_subsys, 2324u16 hpi_sample_clock_query_source_index(const u32 h_clock, const u32 index,
2591 const u32 h_clock, const u32 index, const u32 source, 2325 const u32 source, u16 *pw_source_index)
2592 u16 *pw_source_index)
2593{ 2326{
2594 u32 qr; 2327 u32 qr;
2595 u16 err; 2328 u16 err;
2596 2329
2597 err = hpi_control_query(ph_subsys, h_clock, 2330 err = hpi_control_query(h_clock, HPI_SAMPLECLOCK_SOURCE_INDEX, index,
2598 HPI_SAMPLECLOCK_SOURCE_INDEX, index, source, &qr); 2331 source, &qr);
2599 *pw_source_index = (u16)qr; 2332 *pw_source_index = (u16)qr;
2600 return err; 2333 return err;
2601} 2334}
2602 2335
2603u16 hpi_sample_clock_set_source_index(const struct hpi_hsubsys *ph_subsys, 2336u16 hpi_sample_clock_set_source_index(u32 h_control, u16 source_index)
2604 u32 h_control, u16 source_index)
2605{ 2337{
2606 return hpi_control_param_set(ph_subsys, h_control, 2338 return hpi_control_param_set(h_control, HPI_SAMPLECLOCK_SOURCE_INDEX,
2607 HPI_SAMPLECLOCK_SOURCE_INDEX, source_index, 0); 2339 source_index, 0);
2608} 2340}
2609 2341
2610u16 hpi_sample_clock_get_source_index(const struct hpi_hsubsys *ph_subsys, 2342u16 hpi_sample_clock_get_source_index(u32 h_control, u16 *pw_source_index)
2611 u32 h_control, u16 *pw_source_index)
2612{ 2343{
2613 u16 error = 0; 2344 u16 err = 0;
2614 u32 source_index = 0; 2345 u32 source_index = 0;
2615 error = hpi_control_param1_get(ph_subsys, h_control, 2346 err = hpi_control_param1_get(h_control, HPI_SAMPLECLOCK_SOURCE_INDEX,
2616 HPI_SAMPLECLOCK_SOURCE_INDEX, &source_index); 2347 &source_index);
2617 if (!error) 2348 if (!err)
2618 if (pw_source_index) 2349 if (pw_source_index)
2619 *pw_source_index = (u16)source_index; 2350 *pw_source_index = (u16)source_index;
2620 return error; 2351 return err;
2621} 2352}
2622 2353
2623u16 hpi_sample_clock_query_local_rate(const struct hpi_hsubsys *ph_subsys, 2354u16 hpi_sample_clock_query_local_rate(const u32 h_clock, const u32 index,
2624 const u32 h_clock, const u32 index, u32 *prate) 2355 u32 *prate)
2625{ 2356{
2626 u16 err; 2357 u16 err;
2627 err = hpi_control_query(ph_subsys, h_clock, 2358 err = hpi_control_query(h_clock, HPI_SAMPLECLOCK_LOCAL_SAMPLERATE,
2628 HPI_SAMPLECLOCK_LOCAL_SAMPLERATE, index, 0, prate); 2359 index, 0, prate);
2629 2360
2630 return err; 2361 return err;
2631} 2362}
2632 2363
2633u16 hpi_sample_clock_set_local_rate(const struct hpi_hsubsys *ph_subsys, 2364u16 hpi_sample_clock_set_local_rate(u32 h_control, u32 sample_rate)
2634 u32 h_control, u32 sample_rate)
2635{ 2365{
2636 return hpi_control_param_set(ph_subsys, h_control, 2366 return hpi_control_param_set(h_control,
2637 HPI_SAMPLECLOCK_LOCAL_SAMPLERATE, sample_rate, 0); 2367 HPI_SAMPLECLOCK_LOCAL_SAMPLERATE, sample_rate, 0);
2638} 2368}
2639 2369
2640u16 hpi_sample_clock_get_local_rate(const struct hpi_hsubsys *ph_subsys, 2370u16 hpi_sample_clock_get_local_rate(u32 h_control, u32 *psample_rate)
2641 u32 h_control, u32 *psample_rate)
2642{ 2371{
2643 u16 error = 0; 2372 u16 err = 0;
2644 u32 sample_rate = 0; 2373 u32 sample_rate = 0;
2645 error = hpi_control_param1_get(ph_subsys, h_control, 2374 err = hpi_control_param1_get(h_control,
2646 HPI_SAMPLECLOCK_LOCAL_SAMPLERATE, &sample_rate); 2375 HPI_SAMPLECLOCK_LOCAL_SAMPLERATE, &sample_rate);
2647 if (!error) 2376 if (!err)
2648 if (psample_rate) 2377 if (psample_rate)
2649 *psample_rate = sample_rate; 2378 *psample_rate = sample_rate;
2650 return error; 2379 return err;
2651} 2380}
2652 2381
2653u16 hpi_sample_clock_get_sample_rate(const struct hpi_hsubsys *ph_subsys, 2382u16 hpi_sample_clock_get_sample_rate(u32 h_control, u32 *psample_rate)
2654 u32 h_control, u32 *psample_rate)
2655{ 2383{
2656 u16 error = 0; 2384 u16 err = 0;
2657 u32 sample_rate = 0; 2385 u32 sample_rate = 0;
2658 error = hpi_control_param1_get(ph_subsys, h_control, 2386 err = hpi_control_param1_get(h_control, HPI_SAMPLECLOCK_SAMPLERATE,
2659 HPI_SAMPLECLOCK_SAMPLERATE, &sample_rate); 2387 &sample_rate);
2660 if (!error) 2388 if (!err)
2661 if (psample_rate) 2389 if (psample_rate)
2662 *psample_rate = sample_rate; 2390 *psample_rate = sample_rate;
2663 return error; 2391 return err;
2664} 2392}
2665 2393
2666u16 hpi_sample_clock_set_auto(const struct hpi_hsubsys *ph_subsys, 2394u16 hpi_sample_clock_set_auto(u32 h_control, u32 enable)
2667 u32 h_control, u32 enable)
2668{ 2395{
2669 return hpi_control_param_set(ph_subsys, h_control, 2396 return hpi_control_param_set(h_control, HPI_SAMPLECLOCK_AUTO, enable,
2670 HPI_SAMPLECLOCK_AUTO, enable, 0); 2397 0);
2671} 2398}
2672 2399
2673u16 hpi_sample_clock_get_auto(const struct hpi_hsubsys *ph_subsys, 2400u16 hpi_sample_clock_get_auto(u32 h_control, u32 *penable)
2674 u32 h_control, u32 *penable)
2675{ 2401{
2676 return hpi_control_param1_get(ph_subsys, h_control, 2402 return hpi_control_param1_get(h_control, HPI_SAMPLECLOCK_AUTO,
2677 HPI_SAMPLECLOCK_AUTO, penable); 2403 penable);
2678} 2404}
2679 2405
2680u16 hpi_sample_clock_set_local_rate_lock(const struct hpi_hsubsys *ph_subsys, 2406u16 hpi_sample_clock_set_local_rate_lock(u32 h_control, u32 lock)
2681 u32 h_control, u32 lock)
2682{ 2407{
2683 return hpi_control_param_set(ph_subsys, h_control, 2408 return hpi_control_param_set(h_control, HPI_SAMPLECLOCK_LOCAL_LOCK,
2684 HPI_SAMPLECLOCK_LOCAL_LOCK, lock, 0); 2409 lock, 0);
2685} 2410}
2686 2411
2687u16 hpi_sample_clock_get_local_rate_lock(const struct hpi_hsubsys *ph_subsys, 2412u16 hpi_sample_clock_get_local_rate_lock(u32 h_control, u32 *plock)
2688 u32 h_control, u32 *plock)
2689{ 2413{
2690 return hpi_control_param1_get(ph_subsys, h_control, 2414 return hpi_control_param1_get(h_control, HPI_SAMPLECLOCK_LOCAL_LOCK,
2691 HPI_SAMPLECLOCK_LOCAL_LOCK, plock); 2415 plock);
2692} 2416}
2693 2417
2694u16 hpi_tone_detector_get_frequency(const struct hpi_hsubsys *ph_subsys, 2418u16 hpi_tone_detector_get_frequency(u32 h_control, u32 index, u32 *frequency)
2695 u32 h_control, u32 index, u32 *frequency)
2696{ 2419{
2697 return hpi_control_param_get(ph_subsys, h_control, 2420 return hpi_control_param_get(h_control, HPI_TONEDETECTOR_FREQUENCY,
2698 HPI_TONEDETECTOR_FREQUENCY, index, 0, frequency, NULL); 2421 index, 0, frequency, NULL);
2699} 2422}
2700 2423
2701u16 hpi_tone_detector_get_state(const struct hpi_hsubsys *ph_subsys, 2424u16 hpi_tone_detector_get_state(u32 h_control, u32 *state)
2702 u32 h_control, u32 *state)
2703{ 2425{
2704 return hpi_control_param1_get(ph_subsys, h_control, 2426 return hpi_control_param1_get(h_control, HPI_TONEDETECTOR_STATE,
2705 HPI_TONEDETECTOR_STATE, state); 2427 state);
2706} 2428}
2707 2429
2708u16 hpi_tone_detector_set_enable(const struct hpi_hsubsys *ph_subsys, 2430u16 hpi_tone_detector_set_enable(u32 h_control, u32 enable)
2709 u32 h_control, u32 enable)
2710{ 2431{
2711 return hpi_control_param_set(ph_subsys, h_control, HPI_GENERIC_ENABLE, 2432 return hpi_control_param_set(h_control, HPI_GENERIC_ENABLE, enable,
2712 (u32)enable, 0); 2433 0);
2713} 2434}
2714 2435
2715u16 hpi_tone_detector_get_enable(const struct hpi_hsubsys *ph_subsys, 2436u16 hpi_tone_detector_get_enable(u32 h_control, u32 *enable)
2716 u32 h_control, u32 *enable)
2717{ 2437{
2718 return hpi_control_param1_get(ph_subsys, h_control, 2438 return hpi_control_param1_get(h_control, HPI_GENERIC_ENABLE, enable);
2719 HPI_GENERIC_ENABLE, enable);
2720} 2439}
2721 2440
2722u16 hpi_tone_detector_set_event_enable(const struct hpi_hsubsys *ph_subsys, 2441u16 hpi_tone_detector_set_event_enable(u32 h_control, u32 event_enable)
2723 u32 h_control, u32 event_enable)
2724{ 2442{
2725 return hpi_control_param_set(ph_subsys, h_control, 2443 return hpi_control_param_set(h_control, HPI_GENERIC_EVENT_ENABLE,
2726 HPI_GENERIC_EVENT_ENABLE, (u32)event_enable, 0); 2444 (u32)event_enable, 0);
2727} 2445}
2728 2446
2729u16 hpi_tone_detector_get_event_enable(const struct hpi_hsubsys *ph_subsys, 2447u16 hpi_tone_detector_get_event_enable(u32 h_control, u32 *event_enable)
2730 u32 h_control, u32 *event_enable)
2731{ 2448{
2732 return hpi_control_param1_get(ph_subsys, h_control, 2449 return hpi_control_param1_get(h_control, HPI_GENERIC_EVENT_ENABLE,
2733 HPI_GENERIC_EVENT_ENABLE, event_enable); 2450 event_enable);
2734} 2451}
2735 2452
2736u16 hpi_tone_detector_set_threshold(const struct hpi_hsubsys *ph_subsys, 2453u16 hpi_tone_detector_set_threshold(u32 h_control, int threshold)
2737 u32 h_control, int threshold)
2738{ 2454{
2739 return hpi_control_param_set(ph_subsys, h_control, 2455 return hpi_control_param_set(h_control, HPI_TONEDETECTOR_THRESHOLD,
2740 HPI_TONEDETECTOR_THRESHOLD, (u32)threshold, 0); 2456 (u32)threshold, 0);
2741} 2457}
2742 2458
2743u16 hpi_tone_detector_get_threshold(const struct hpi_hsubsys *ph_subsys, 2459u16 hpi_tone_detector_get_threshold(u32 h_control, int *threshold)
2744 u32 h_control, int *threshold)
2745{ 2460{
2746 return hpi_control_param1_get(ph_subsys, h_control, 2461 return hpi_control_param1_get(h_control, HPI_TONEDETECTOR_THRESHOLD,
2747 HPI_TONEDETECTOR_THRESHOLD, (u32 *)threshold); 2462 (u32 *)threshold);
2748} 2463}
2749 2464
2750u16 hpi_silence_detector_get_state(const struct hpi_hsubsys *ph_subsys, 2465u16 hpi_silence_detector_get_state(u32 h_control, u32 *state)
2751 u32 h_control, u32 *state)
2752{ 2466{
2753 return hpi_control_param1_get(ph_subsys, h_control, 2467 return hpi_control_param1_get(h_control, HPI_SILENCEDETECTOR_STATE,
2754 HPI_SILENCEDETECTOR_STATE, state); 2468 state);
2755} 2469}
2756 2470
2757u16 hpi_silence_detector_set_enable(const struct hpi_hsubsys *ph_subsys, 2471u16 hpi_silence_detector_set_enable(u32 h_control, u32 enable)
2758 u32 h_control, u32 enable)
2759{ 2472{
2760 return hpi_control_param_set(ph_subsys, h_control, HPI_GENERIC_ENABLE, 2473 return hpi_control_param_set(h_control, HPI_GENERIC_ENABLE, enable,
2761 (u32)enable, 0); 2474 0);
2762} 2475}
2763 2476
2764u16 hpi_silence_detector_get_enable(const struct hpi_hsubsys *ph_subsys, 2477u16 hpi_silence_detector_get_enable(u32 h_control, u32 *enable)
2765 u32 h_control, u32 *enable)
2766{ 2478{
2767 return hpi_control_param1_get(ph_subsys, h_control, 2479 return hpi_control_param1_get(h_control, HPI_GENERIC_ENABLE, enable);
2768 HPI_GENERIC_ENABLE, enable);
2769} 2480}
2770 2481
2771u16 hpi_silence_detector_set_event_enable(const struct hpi_hsubsys *ph_subsys, 2482u16 hpi_silence_detector_set_event_enable(u32 h_control, u32 event_enable)
2772 u32 h_control, u32 event_enable)
2773{ 2483{
2774 return hpi_control_param_set(ph_subsys, h_control, 2484 return hpi_control_param_set(h_control, HPI_GENERIC_EVENT_ENABLE,
2775 HPI_GENERIC_EVENT_ENABLE, event_enable, 0); 2485 event_enable, 0);
2776} 2486}
2777 2487
2778u16 hpi_silence_detector_get_event_enable(const struct hpi_hsubsys *ph_subsys, 2488u16 hpi_silence_detector_get_event_enable(u32 h_control, u32 *event_enable)
2779 u32 h_control, u32 *event_enable)
2780{ 2489{
2781 return hpi_control_param1_get(ph_subsys, h_control, 2490 return hpi_control_param1_get(h_control, HPI_GENERIC_EVENT_ENABLE,
2782 HPI_GENERIC_EVENT_ENABLE, event_enable); 2491 event_enable);
2783} 2492}
2784 2493
2785u16 hpi_silence_detector_set_delay(const struct hpi_hsubsys *ph_subsys, 2494u16 hpi_silence_detector_set_delay(u32 h_control, u32 delay)
2786 u32 h_control, u32 delay)
2787{ 2495{
2788 return hpi_control_param_set(ph_subsys, h_control, 2496 return hpi_control_param_set(h_control, HPI_SILENCEDETECTOR_DELAY,
2789 HPI_SILENCEDETECTOR_DELAY, delay, 0); 2497 delay, 0);
2790} 2498}
2791 2499
2792u16 hpi_silence_detector_get_delay(const struct hpi_hsubsys *ph_subsys, 2500u16 hpi_silence_detector_get_delay(u32 h_control, u32 *delay)
2793 u32 h_control, u32 *delay)
2794{ 2501{
2795 return hpi_control_param1_get(ph_subsys, h_control, 2502 return hpi_control_param1_get(h_control, HPI_SILENCEDETECTOR_DELAY,
2796 HPI_SILENCEDETECTOR_DELAY, delay); 2503 delay);
2797} 2504}
2798 2505
2799u16 hpi_silence_detector_set_threshold(const struct hpi_hsubsys *ph_subsys, 2506u16 hpi_silence_detector_set_threshold(u32 h_control, int threshold)
2800 u32 h_control, int threshold)
2801{ 2507{
2802 return hpi_control_param_set(ph_subsys, h_control, 2508 return hpi_control_param_set(h_control, HPI_SILENCEDETECTOR_THRESHOLD,
2803 HPI_SILENCEDETECTOR_THRESHOLD, threshold, 0); 2509 threshold, 0);
2804} 2510}
2805 2511
2806u16 hpi_silence_detector_get_threshold(const struct hpi_hsubsys *ph_subsys, 2512u16 hpi_silence_detector_get_threshold(u32 h_control, int *threshold)
2807 u32 h_control, int *threshold)
2808{ 2513{
2809 return hpi_control_param1_get(ph_subsys, h_control, 2514 return hpi_control_param1_get(h_control,
2810 HPI_SILENCEDETECTOR_THRESHOLD, (u32 *)threshold); 2515 HPI_SILENCEDETECTOR_THRESHOLD, (u32 *)threshold);
2811} 2516}
2812 2517
2813u16 hpi_tuner_query_band(const struct hpi_hsubsys *ph_subsys, 2518u16 hpi_tuner_query_band(const u32 h_tuner, const u32 index, u16 *pw_band)
2814 const u32 h_tuner, const u32 index, u16 *pw_band)
2815{ 2519{
2816 u32 qr; 2520 u32 qr;
2817 u16 err; 2521 u16 err;
2818 2522
2819 err = hpi_control_query(ph_subsys, h_tuner, HPI_TUNER_BAND, index, 0, 2523 err = hpi_control_query(h_tuner, HPI_TUNER_BAND, index, 0, &qr);
2820 &qr);
2821 *pw_band = (u16)qr; 2524 *pw_band = (u16)qr;
2822 return err; 2525 return err;
2823} 2526}
2824 2527
2825u16 hpi_tuner_set_band(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2528u16 hpi_tuner_set_band(u32 h_control, u16 band)
2826 u16 band)
2827{ 2529{
2828 return hpi_control_param_set(ph_subsys, h_control, HPI_TUNER_BAND, 2530 return hpi_control_param_set(h_control, HPI_TUNER_BAND, band, 0);
2829 band, 0);
2830} 2531}
2831 2532
2832u16 hpi_tuner_get_band(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2533u16 hpi_tuner_get_band(u32 h_control, u16 *pw_band)
2833 u16 *pw_band)
2834{ 2534{
2835 u32 band = 0; 2535 u32 band = 0;
2836 u16 error = 0; 2536 u16 error = 0;
2837 2537
2838 error = hpi_control_param1_get(ph_subsys, h_control, HPI_TUNER_BAND, 2538 error = hpi_control_param1_get(h_control, HPI_TUNER_BAND, &band);
2839 &band);
2840 if (pw_band) 2539 if (pw_band)
2841 *pw_band = (u16)band; 2540 *pw_band = (u16)band;
2842 return error; 2541 return error;
2843} 2542}
2844 2543
2845u16 hpi_tuner_query_frequency(const struct hpi_hsubsys *ph_subsys, 2544u16 hpi_tuner_query_frequency(const u32 h_tuner, const u32 index,
2846 const u32 h_tuner, const u32 index, const u16 band, u32 *pfreq) 2545 const u16 band, u32 *pfreq)
2847{ 2546{
2848 return hpi_control_query(ph_subsys, h_tuner, HPI_TUNER_FREQ, index, 2547 return hpi_control_query(h_tuner, HPI_TUNER_FREQ, index, band, pfreq);
2849 band, pfreq);
2850} 2548}
2851 2549
2852u16 hpi_tuner_set_frequency(const struct hpi_hsubsys *ph_subsys, 2550u16 hpi_tuner_set_frequency(u32 h_control, u32 freq_ink_hz)
2853 u32 h_control, u32 freq_ink_hz)
2854{ 2551{
2855 return hpi_control_param_set(ph_subsys, h_control, HPI_TUNER_FREQ, 2552 return hpi_control_param_set(h_control, HPI_TUNER_FREQ, freq_ink_hz,
2856 freq_ink_hz, 0); 2553 0);
2857} 2554}
2858 2555
2859u16 hpi_tuner_get_frequency(const struct hpi_hsubsys *ph_subsys, 2556u16 hpi_tuner_get_frequency(u32 h_control, u32 *pw_freq_ink_hz)
2860 u32 h_control, u32 *pw_freq_ink_hz)
2861{ 2557{
2862 return hpi_control_param1_get(ph_subsys, h_control, HPI_TUNER_FREQ, 2558 return hpi_control_param1_get(h_control, HPI_TUNER_FREQ,
2863 pw_freq_ink_hz); 2559 pw_freq_ink_hz);
2864} 2560}
2865 2561
2866u16 hpi_tuner_query_gain(const struct hpi_hsubsys *ph_subsys, 2562u16 hpi_tuner_query_gain(const u32 h_tuner, const u32 index, u16 *pw_gain)
2867 const u32 h_tuner, const u32 index, u16 *pw_gain)
2868{ 2563{
2869 u32 qr; 2564 u32 qr;
2870 u16 err; 2565 u16 err;
2871 2566
2872 err = hpi_control_query(ph_subsys, h_tuner, HPI_TUNER_BAND, index, 0, 2567 err = hpi_control_query(h_tuner, HPI_TUNER_BAND, index, 0, &qr);
2873 &qr);
2874 *pw_gain = (u16)qr; 2568 *pw_gain = (u16)qr;
2875 return err; 2569 return err;
2876} 2570}
2877 2571
2878u16 hpi_tuner_set_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2572u16 hpi_tuner_set_gain(u32 h_control, short gain)
2879 short gain)
2880{ 2573{
2881 return hpi_control_param_set(ph_subsys, h_control, HPI_TUNER_GAIN, 2574 return hpi_control_param_set(h_control, HPI_TUNER_GAIN, gain, 0);
2882 gain, 0);
2883} 2575}
2884 2576
2885u16 hpi_tuner_get_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2577u16 hpi_tuner_get_gain(u32 h_control, short *pn_gain)
2886 short *pn_gain)
2887{ 2578{
2888 u32 gain = 0; 2579 u32 gain = 0;
2889 u16 error = 0; 2580 u16 error = 0;
2890 2581
2891 error = hpi_control_param1_get(ph_subsys, h_control, HPI_TUNER_GAIN, 2582 error = hpi_control_param1_get(h_control, HPI_TUNER_GAIN, &gain);
2892 &gain);
2893 if (pn_gain) 2583 if (pn_gain)
2894 *pn_gain = (u16)gain; 2584 *pn_gain = (u16)gain;
2895 return error; 2585 return error;
2896} 2586}
2897 2587
2898u16 hpi_tuner_getRF_level(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2588u16 hpi_tuner_get_rf_level(u32 h_control, short *pw_level)
2899 short *pw_level)
2900{ 2589{
2901 struct hpi_message hm; 2590 struct hpi_message hm;
2902 struct hpi_response hr; 2591 struct hpi_response hr;
2903 2592
2904 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2593 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2905 HPI_CONTROL_GET_STATE); 2594 HPI_CONTROL_GET_STATE);
2906 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2595 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2907 hm.u.c.attribute = HPI_TUNER_LEVEL; 2596 return HPI_ERROR_INVALID_HANDLE;
2908 hm.u.c.param1 = HPI_TUNER_LEVEL_AVERAGE; 2597 hm.u.cu.attribute = HPI_TUNER_LEVEL_AVG;
2909 hpi_send_recv(&hm, &hr); 2598 hpi_send_recv(&hm, &hr);
2910 if (pw_level) 2599 if (pw_level)
2911 *pw_level = (short)hr.u.c.param1; 2600 *pw_level = hr.u.cu.tuner.s_level;
2912 return hr.error; 2601 return hr.error;
2913} 2602}
2914 2603
2915u16 hpi_tuner_get_rawRF_level(const struct hpi_hsubsys *ph_subsys, 2604u16 hpi_tuner_get_raw_rf_level(u32 h_control, short *pw_level)
2916 u32 h_control, short *pw_level)
2917{ 2605{
2918 struct hpi_message hm; 2606 struct hpi_message hm;
2919 struct hpi_response hr; 2607 struct hpi_response hr;
2920 2608
2921 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2609 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
2922 HPI_CONTROL_GET_STATE); 2610 HPI_CONTROL_GET_STATE);
2923 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2611 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2924 hm.u.c.attribute = HPI_TUNER_LEVEL; 2612 return HPI_ERROR_INVALID_HANDLE;
2925 hm.u.c.param1 = HPI_TUNER_LEVEL_RAW; 2613 hm.u.cu.attribute = HPI_TUNER_LEVEL_RAW;
2926 hpi_send_recv(&hm, &hr); 2614 hpi_send_recv(&hm, &hr);
2927 if (pw_level) 2615 if (pw_level)
2928 *pw_level = (short)hr.u.c.param1; 2616 *pw_level = hr.u.cu.tuner.s_level;
2929 return hr.error; 2617 return hr.error;
2930} 2618}
2931 2619
2932u16 hpi_tuner_query_deemphasis(const struct hpi_hsubsys *ph_subsys, 2620u16 hpi_tuner_query_deemphasis(const u32 h_tuner, const u32 index,
2933 const u32 h_tuner, const u32 index, const u16 band, u32 *pdeemphasis) 2621 const u16 band, u32 *pdeemphasis)
2934{ 2622{
2935 return hpi_control_query(ph_subsys, h_tuner, HPI_TUNER_DEEMPHASIS, 2623 return hpi_control_query(h_tuner, HPI_TUNER_DEEMPHASIS, index, band,
2936 index, band, pdeemphasis); 2624 pdeemphasis);
2937} 2625}
2938 2626
2939u16 hpi_tuner_set_deemphasis(const struct hpi_hsubsys *ph_subsys, 2627u16 hpi_tuner_set_deemphasis(u32 h_control, u32 deemphasis)
2940 u32 h_control, u32 deemphasis)
2941{ 2628{
2942 return hpi_control_param_set(ph_subsys, h_control, 2629 return hpi_control_param_set(h_control, HPI_TUNER_DEEMPHASIS,
2943 HPI_TUNER_DEEMPHASIS, deemphasis, 0); 2630 deemphasis, 0);
2944} 2631}
2945 2632
2946u16 hpi_tuner_get_deemphasis(const struct hpi_hsubsys *ph_subsys, 2633u16 hpi_tuner_get_deemphasis(u32 h_control, u32 *pdeemphasis)
2947 u32 h_control, u32 *pdeemphasis)
2948{ 2634{
2949 return hpi_control_param1_get(ph_subsys, h_control, 2635 return hpi_control_param1_get(h_control, HPI_TUNER_DEEMPHASIS,
2950 HPI_TUNER_DEEMPHASIS, pdeemphasis); 2636 pdeemphasis);
2951} 2637}
2952 2638
2953u16 hpi_tuner_query_program(const struct hpi_hsubsys *ph_subsys, 2639u16 hpi_tuner_query_program(const u32 h_tuner, u32 *pbitmap_program)
2954 const u32 h_tuner, u32 *pbitmap_program)
2955{ 2640{
2956 return hpi_control_query(ph_subsys, h_tuner, HPI_TUNER_PROGRAM, 0, 0, 2641 return hpi_control_query(h_tuner, HPI_TUNER_PROGRAM, 0, 0,
2957 pbitmap_program); 2642 pbitmap_program);
2958} 2643}
2959 2644
2960u16 hpi_tuner_set_program(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2645u16 hpi_tuner_set_program(u32 h_control, u32 program)
2961 u32 program)
2962{ 2646{
2963 return hpi_control_param_set(ph_subsys, h_control, HPI_TUNER_PROGRAM, 2647 return hpi_control_param_set(h_control, HPI_TUNER_PROGRAM, program,
2964 program, 0); 2648 0);
2965} 2649}
2966 2650
2967u16 hpi_tuner_get_program(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2651u16 hpi_tuner_get_program(u32 h_control, u32 *pprogram)
2968 u32 *pprogram)
2969{ 2652{
2970 return hpi_control_param1_get(ph_subsys, h_control, HPI_TUNER_PROGRAM, 2653 return hpi_control_param1_get(h_control, HPI_TUNER_PROGRAM, pprogram);
2971 pprogram);
2972} 2654}
2973 2655
2974u16 hpi_tuner_get_hd_radio_dsp_version(const struct hpi_hsubsys *ph_subsys, 2656u16 hpi_tuner_get_hd_radio_dsp_version(u32 h_control, char *psz_dsp_version,
2975 u32 h_control, char *psz_dsp_version, const u32 string_size) 2657 const u32 string_size)
2976{ 2658{
2977 return hpi_control_get_string(h_control, 2659 return hpi_control_get_string(h_control,
2978 HPI_TUNER_HDRADIO_DSP_VERSION, psz_dsp_version, string_size); 2660 HPI_TUNER_HDRADIO_DSP_VERSION, psz_dsp_version, string_size);
2979} 2661}
2980 2662
2981u16 hpi_tuner_get_hd_radio_sdk_version(const struct hpi_hsubsys *ph_subsys, 2663u16 hpi_tuner_get_hd_radio_sdk_version(u32 h_control, char *psz_sdk_version,
2982 u32 h_control, char *psz_sdk_version, const u32 string_size) 2664 const u32 string_size)
2983{ 2665{
2984 return hpi_control_get_string(h_control, 2666 return hpi_control_get_string(h_control,
2985 HPI_TUNER_HDRADIO_SDK_VERSION, psz_sdk_version, string_size); 2667 HPI_TUNER_HDRADIO_SDK_VERSION, psz_sdk_version, string_size);
2986} 2668}
2987 2669
2988u16 hpi_tuner_get_status(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2670u16 hpi_tuner_get_status(u32 h_control, u16 *pw_status_mask, u16 *pw_status)
2989 u16 *pw_status_mask, u16 *pw_status)
2990{ 2671{
2991 u32 status = 0; 2672 u32 status = 0;
2992 u16 error = 0; 2673 u16 error = 0;
2993 2674
2994 error = hpi_control_param1_get(ph_subsys, h_control, HPI_TUNER_STATUS, 2675 error = hpi_control_param1_get(h_control, HPI_TUNER_STATUS, &status);
2995 &status);
2996 if (pw_status) { 2676 if (pw_status) {
2997 if (!error) { 2677 if (!error) {
2998 *pw_status_mask = (u16)(status >> 16); 2678 *pw_status_mask = (u16)(status >> 16);
@@ -3005,50 +2685,44 @@ u16 hpi_tuner_get_status(const struct hpi_hsubsys *ph_subsys, u32 h_control,
3005 return error; 2685 return error;
3006} 2686}
3007 2687
3008u16 hpi_tuner_set_mode(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2688u16 hpi_tuner_set_mode(u32 h_control, u32 mode, u32 value)
3009 u32 mode, u32 value)
3010{ 2689{
3011 return hpi_control_param_set(ph_subsys, h_control, HPI_TUNER_MODE, 2690 return hpi_control_param_set(h_control, HPI_TUNER_MODE, mode, value);
3012 mode, value);
3013} 2691}
3014 2692
3015u16 hpi_tuner_get_mode(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2693u16 hpi_tuner_get_mode(u32 h_control, u32 mode, u32 *pn_value)
3016 u32 mode, u32 *pn_value)
3017{ 2694{
3018 return hpi_control_param_get(ph_subsys, h_control, HPI_TUNER_MODE, 2695 return hpi_control_param_get(h_control, HPI_TUNER_MODE, mode, 0,
3019 mode, 0, pn_value, NULL); 2696 pn_value, NULL);
3020} 2697}
3021 2698
3022u16 hpi_tuner_get_hd_radio_signal_quality(const struct hpi_hsubsys *ph_subsys, 2699u16 hpi_tuner_get_hd_radio_signal_quality(u32 h_control, u32 *pquality)
3023 u32 h_control, u32 *pquality)
3024{ 2700{
3025 return hpi_control_param1_get(ph_subsys, h_control, 2701 return hpi_control_param1_get(h_control,
3026 HPI_TUNER_HDRADIO_SIGNAL_QUALITY, pquality); 2702 HPI_TUNER_HDRADIO_SIGNAL_QUALITY, pquality);
3027} 2703}
3028 2704
3029u16 hpi_tuner_get_hd_radio_signal_blend(const struct hpi_hsubsys *ph_subsys, 2705u16 hpi_tuner_get_hd_radio_signal_blend(u32 h_control, u32 *pblend)
3030 u32 h_control, u32 *pblend)
3031{ 2706{
3032 return hpi_control_param1_get(ph_subsys, h_control, 2707 return hpi_control_param1_get(h_control, HPI_TUNER_HDRADIO_BLEND,
3033 HPI_TUNER_HDRADIO_BLEND, pblend); 2708 pblend);
3034} 2709}
3035 2710
3036u16 hpi_tuner_set_hd_radio_signal_blend(const struct hpi_hsubsys *ph_subsys, 2711u16 hpi_tuner_set_hd_radio_signal_blend(u32 h_control, const u32 blend)
3037 u32 h_control, const u32 blend)
3038{ 2712{
3039 return hpi_control_param_set(ph_subsys, h_control, 2713 return hpi_control_param_set(h_control, HPI_TUNER_HDRADIO_BLEND,
3040 HPI_TUNER_HDRADIO_BLEND, blend, 0); 2714 blend, 0);
3041} 2715}
3042 2716
3043u16 hpi_tuner_getRDS(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2717u16 hpi_tuner_get_rds(u32 h_control, char *p_data)
3044 char *p_data)
3045{ 2718{
3046 struct hpi_message hm; 2719 struct hpi_message hm;
3047 struct hpi_response hr; 2720 struct hpi_response hr;
3048 2721
3049 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2722 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
3050 HPI_CONTROL_GET_STATE); 2723 HPI_CONTROL_GET_STATE);
3051 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2724 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2725 return HPI_ERROR_INVALID_HANDLE;
3052 hm.u.c.attribute = HPI_TUNER_RDS; 2726 hm.u.c.attribute = HPI_TUNER_RDS;
3053 hpi_send_recv(&hm, &hr); 2727 hpi_send_recv(&hm, &hr);
3054 if (p_data) { 2728 if (p_data) {
@@ -3059,80 +2733,82 @@ u16 hpi_tuner_getRDS(const struct hpi_hsubsys *ph_subsys, u32 h_control,
3059 return hr.error; 2733 return hr.error;
3060} 2734}
3061 2735
3062u16 HPI_PAD__get_channel_name(const struct hpi_hsubsys *ph_subsys, 2736u16 hpi_pad_get_channel_name(u32 h_control, char *psz_string,
3063 u32 h_control, char *psz_string, const u32 data_length) 2737 const u32 data_length)
3064{ 2738{
3065 return hpi_control_get_string(h_control, HPI_PAD_CHANNEL_NAME, 2739 return hpi_control_get_string(h_control, HPI_PAD_CHANNEL_NAME,
3066 psz_string, data_length); 2740 psz_string, data_length);
3067} 2741}
3068 2742
3069u16 HPI_PAD__get_artist(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2743u16 hpi_pad_get_artist(u32 h_control, char *psz_string, const u32 data_length)
3070 char *psz_string, const u32 data_length)
3071{ 2744{
3072 return hpi_control_get_string(h_control, HPI_PAD_ARTIST, psz_string, 2745 return hpi_control_get_string(h_control, HPI_PAD_ARTIST, psz_string,
3073 data_length); 2746 data_length);
3074} 2747}
3075 2748
3076u16 HPI_PAD__get_title(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2749u16 hpi_pad_get_title(u32 h_control, char *psz_string, const u32 data_length)
3077 char *psz_string, const u32 data_length)
3078{ 2750{
3079 return hpi_control_get_string(h_control, HPI_PAD_TITLE, psz_string, 2751 return hpi_control_get_string(h_control, HPI_PAD_TITLE, psz_string,
3080 data_length); 2752 data_length);
3081} 2753}
3082 2754
3083u16 HPI_PAD__get_comment(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2755u16 hpi_pad_get_comment(u32 h_control, char *psz_string,
3084 char *psz_string, const u32 data_length) 2756 const u32 data_length)
3085{ 2757{
3086 return hpi_control_get_string(h_control, HPI_PAD_COMMENT, psz_string, 2758 return hpi_control_get_string(h_control, HPI_PAD_COMMENT, psz_string,
3087 data_length); 2759 data_length);
3088} 2760}
3089 2761
3090u16 HPI_PAD__get_program_type(const struct hpi_hsubsys *ph_subsys, 2762u16 hpi_pad_get_program_type(u32 h_control, u32 *ppTY)
3091 u32 h_control, u32 *ppTY)
3092{ 2763{
3093 return hpi_control_param1_get(ph_subsys, h_control, 2764 return hpi_control_param1_get(h_control, HPI_PAD_PROGRAM_TYPE, ppTY);
3094 HPI_PAD_PROGRAM_TYPE, ppTY);
3095} 2765}
3096 2766
3097u16 HPI_PAD__get_rdsPI(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2767u16 hpi_pad_get_rdsPI(u32 h_control, u32 *ppI)
3098 u32 *ppI)
3099{ 2768{
3100 return hpi_control_param1_get(ph_subsys, h_control, 2769 return hpi_control_param1_get(h_control, HPI_PAD_PROGRAM_ID, ppI);
3101 HPI_PAD_PROGRAM_ID, ppI);
3102} 2770}
3103 2771
3104u16 hpi_volume_query_channels(const struct hpi_hsubsys *ph_subsys, 2772u16 hpi_volume_query_channels(const u32 h_volume, u32 *p_channels)
3105 const u32 h_volume, u32 *p_channels)
3106{ 2773{
3107 return hpi_control_query(ph_subsys, h_volume, HPI_VOLUME_NUM_CHANNELS, 2774 return hpi_control_query(h_volume, HPI_VOLUME_NUM_CHANNELS, 0, 0,
3108 0, 0, p_channels); 2775 p_channels);
3109} 2776}
3110 2777
3111u16 hpi_volume_set_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2778u16 hpi_volume_set_gain(u32 h_control, short an_log_gain[HPI_MAX_CHANNELS]
3112 short an_log_gain[HPI_MAX_CHANNELS]
3113 ) 2779 )
3114{ 2780{
3115 return hpi_control_log_set2(h_control, HPI_VOLUME_GAIN, 2781 return hpi_control_log_set2(h_control, HPI_VOLUME_GAIN,
3116 an_log_gain[0], an_log_gain[1]); 2782 an_log_gain[0], an_log_gain[1]);
3117} 2783}
3118 2784
3119u16 hpi_volume_get_gain(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2785u16 hpi_volume_get_gain(u32 h_control, short an_log_gain[HPI_MAX_CHANNELS]
3120 short an_log_gain[HPI_MAX_CHANNELS]
3121 ) 2786 )
3122{ 2787{
3123 return hpi_control_log_get2(ph_subsys, h_control, HPI_VOLUME_GAIN, 2788 return hpi_control_log_get2(h_control, HPI_VOLUME_GAIN,
3124 &an_log_gain[0], &an_log_gain[1]); 2789 &an_log_gain[0], &an_log_gain[1]);
3125} 2790}
3126 2791
3127u16 hpi_volume_query_range(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2792u16 hpi_volume_set_mute(u32 h_control, u32 mute)
3128 short *min_gain_01dB, short *max_gain_01dB, short *step_gain_01dB) 2793{
2794 return hpi_control_param_set(h_control, HPI_VOLUME_MUTE, mute, 0);
2795}
2796
2797u16 hpi_volume_get_mute(u32 h_control, u32 *mute)
2798{
2799 return hpi_control_param1_get(h_control, HPI_VOLUME_MUTE, mute);
2800}
2801
2802u16 hpi_volume_query_range(u32 h_control, short *min_gain_01dB,
2803 short *max_gain_01dB, short *step_gain_01dB)
3129{ 2804{
3130 struct hpi_message hm; 2805 struct hpi_message hm;
3131 struct hpi_response hr; 2806 struct hpi_response hr;
3132 2807
3133 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2808 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
3134 HPI_CONTROL_GET_STATE); 2809 HPI_CONTROL_GET_STATE);
3135 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2810 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2811 return HPI_ERROR_INVALID_HANDLE;
3136 hm.u.c.attribute = HPI_VOLUME_RANGE; 2812 hm.u.c.attribute = HPI_VOLUME_RANGE;
3137 2813
3138 hpi_send_recv(&hm, &hr); 2814 hpi_send_recv(&hm, &hr);
@@ -3150,16 +2826,17 @@ u16 hpi_volume_query_range(const struct hpi_hsubsys *ph_subsys, u32 h_control,
3150 return hr.error; 2826 return hr.error;
3151} 2827}
3152 2828
3153u16 hpi_volume_auto_fade_profile(const struct hpi_hsubsys *ph_subsys, 2829u16 hpi_volume_auto_fade_profile(u32 h_control,
3154 u32 h_control, short an_stop_gain0_01dB[HPI_MAX_CHANNELS], 2830 short an_stop_gain0_01dB[HPI_MAX_CHANNELS], u32 duration_ms,
3155 u32 duration_ms, u16 profile) 2831 u16 profile)
3156{ 2832{
3157 struct hpi_message hm; 2833 struct hpi_message hm;
3158 struct hpi_response hr; 2834 struct hpi_response hr;
3159 2835
3160 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2836 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
3161 HPI_CONTROL_SET_STATE); 2837 HPI_CONTROL_SET_STATE);
3162 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2838 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2839 return HPI_ERROR_INVALID_HANDLE;
3163 2840
3164 memcpy(hm.u.c.an_log_value, an_stop_gain0_01dB, 2841 memcpy(hm.u.c.an_log_value, an_stop_gain0_01dB,
3165 sizeof(short) * HPI_MAX_CHANNELS); 2842 sizeof(short) * HPI_MAX_CHANNELS);
@@ -3173,21 +2850,21 @@ u16 hpi_volume_auto_fade_profile(const struct hpi_hsubsys *ph_subsys,
3173 return hr.error; 2850 return hr.error;
3174} 2851}
3175 2852
3176u16 hpi_volume_auto_fade(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2853u16 hpi_volume_auto_fade(u32 h_control,
3177 short an_stop_gain0_01dB[HPI_MAX_CHANNELS], u32 duration_ms) 2854 short an_stop_gain0_01dB[HPI_MAX_CHANNELS], u32 duration_ms)
3178{ 2855{
3179 return hpi_volume_auto_fade_profile(ph_subsys, h_control, 2856 return hpi_volume_auto_fade_profile(h_control, an_stop_gain0_01dB,
3180 an_stop_gain0_01dB, duration_ms, HPI_VOLUME_AUTOFADE_LOG); 2857 duration_ms, HPI_VOLUME_AUTOFADE_LOG);
3181} 2858}
3182 2859
3183u16 hpi_vox_set_threshold(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2860u16 hpi_vox_set_threshold(u32 h_control, short an_gain0_01dB)
3184 short an_gain0_01dB)
3185{ 2861{
3186 struct hpi_message hm; 2862 struct hpi_message hm;
3187 struct hpi_response hr; 2863 struct hpi_response hr;
3188 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2864 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
3189 HPI_CONTROL_SET_STATE); 2865 HPI_CONTROL_SET_STATE);
3190 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2866 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2867 return HPI_ERROR_INVALID_HANDLE;
3191 hm.u.c.attribute = HPI_VOX_THRESHOLD; 2868 hm.u.c.attribute = HPI_VOX_THRESHOLD;
3192 2869
3193 hm.u.c.an_log_value[0] = an_gain0_01dB; 2870 hm.u.c.an_log_value[0] = an_gain0_01dB;
@@ -3197,14 +2874,14 @@ u16 hpi_vox_set_threshold(const struct hpi_hsubsys *ph_subsys, u32 h_control,
3197 return hr.error; 2874 return hr.error;
3198} 2875}
3199 2876
3200u16 hpi_vox_get_threshold(const struct hpi_hsubsys *ph_subsys, u32 h_control, 2877u16 hpi_vox_get_threshold(u32 h_control, short *an_gain0_01dB)
3201 short *an_gain0_01dB)
3202{ 2878{
3203 struct hpi_message hm; 2879 struct hpi_message hm;
3204 struct hpi_response hr; 2880 struct hpi_response hr;
3205 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL, 2881 hpi_init_message_response(&hm, &hr, HPI_OBJ_CONTROL,
3206 HPI_CONTROL_GET_STATE); 2882 HPI_CONTROL_GET_STATE);
3207 u32TOINDEXES(h_control, &hm.adapter_index, &hm.obj_index); 2883 if (hpi_handle_indexes(h_control, &hm.adapter_index, &hm.obj_index))
2884 return HPI_ERROR_INVALID_HANDLE;
3208 hm.u.c.attribute = HPI_VOX_THRESHOLD; 2885 hm.u.c.attribute = HPI_VOX_THRESHOLD;
3209 2886
3210 hpi_send_recv(&hm, &hr); 2887 hpi_send_recv(&hm, &hr);
@@ -3213,728 +2890,3 @@ u16 hpi_vox_get_threshold(const struct hpi_hsubsys *ph_subsys, u32 h_control,
3213 2890
3214 return hr.error; 2891 return hr.error;
3215} 2892}
3216
3217static size_t strv_packet_size = MIN_STRV_PACKET_SIZE;
3218
3219static size_t entity_type_to_size[LAST_ENTITY_TYPE] = {
3220 0,
3221 sizeof(struct hpi_entity),
3222 sizeof(void *),
3223
3224 sizeof(int),
3225 sizeof(float),
3226 sizeof(double),
3227
3228 sizeof(char),
3229 sizeof(char),
3230
3231 4 * sizeof(char),
3232 16 * sizeof(char),
3233 6 * sizeof(char),
3234};
3235
3236static inline size_t hpi_entity_size(struct hpi_entity *entity_ptr)
3237{
3238 return entity_ptr->header.size;
3239}
3240
3241static inline size_t hpi_entity_header_size(struct hpi_entity *entity_ptr)
3242{
3243 return sizeof(entity_ptr->header);
3244}
3245
3246static inline size_t hpi_entity_value_size(struct hpi_entity *entity_ptr)
3247{
3248 return hpi_entity_size(entity_ptr) -
3249 hpi_entity_header_size(entity_ptr);
3250}
3251
3252static inline size_t hpi_entity_item_count(struct hpi_entity *entity_ptr)
3253{
3254 return hpi_entity_value_size(entity_ptr) /
3255 entity_type_to_size[entity_ptr->header.type];
3256}
3257
3258static inline struct hpi_entity *hpi_entity_ptr_to_next(struct hpi_entity
3259 *entity_ptr)
3260{
3261 return (void *)(((u8 *)entity_ptr) + hpi_entity_size(entity_ptr));
3262}
3263
3264static inline u16 hpi_entity_check_type(const enum e_entity_type t)
3265{
3266 if (t >= 0 && t < STR_TYPE_FIELD_MAX)
3267 return 0;
3268 return HPI_ERROR_ENTITY_TYPE_INVALID;
3269}
3270
3271static inline u16 hpi_entity_check_role(const enum e_entity_role r)
3272{
3273 if (r >= 0 && r < STR_ROLE_FIELD_MAX)
3274 return 0;
3275 return HPI_ERROR_ENTITY_ROLE_INVALID;
3276}
3277
3278static u16 hpi_entity_get_next(struct hpi_entity *entity, int recursive_flag,
3279 void *guard_p, struct hpi_entity **next)
3280{
3281 HPI_DEBUG_ASSERT(entity != NULL);
3282 HPI_DEBUG_ASSERT(next != NULL);
3283 HPI_DEBUG_ASSERT(hpi_entity_size(entity) != 0);
3284
3285 if (guard_p <= (void *)entity) {
3286 *next = NULL;
3287 return 0;
3288 }
3289
3290 if (recursive_flag && entity->header.type == entity_type_sequence)
3291 *next = (struct hpi_entity *)entity->value;
3292 else
3293 *next = (struct hpi_entity *)hpi_entity_ptr_to_next(entity);
3294
3295 if (guard_p <= (void *)*next) {
3296 *next = NULL;
3297 return 0;
3298 }
3299
3300 HPI_DEBUG_ASSERT(guard_p >= (void *)hpi_entity_ptr_to_next(*next));
3301 return 0;
3302}
3303
3304u16 hpi_entity_find_next(struct hpi_entity *container_entity,
3305 enum e_entity_type type, enum e_entity_role role, int recursive_flag,
3306 struct hpi_entity **current_match)
3307{
3308 struct hpi_entity *tmp = NULL;
3309 void *guard_p = NULL;
3310
3311 HPI_DEBUG_ASSERT(container_entity != NULL);
3312 guard_p = hpi_entity_ptr_to_next(container_entity);
3313
3314 if (*current_match != NULL)
3315 hpi_entity_get_next(*current_match, recursive_flag, guard_p,
3316 &tmp);
3317 else
3318 hpi_entity_get_next(container_entity, 1, guard_p, &tmp);
3319
3320 while (tmp) {
3321 u16 err;
3322
3323 HPI_DEBUG_ASSERT((void *)tmp >= (void *)container_entity);
3324
3325 if ((!type || tmp->header.type == type) && (!role
3326 || tmp->header.role == role)) {
3327 *current_match = tmp;
3328 return 0;
3329 }
3330
3331 err = hpi_entity_get_next(tmp, recursive_flag, guard_p,
3332 current_match);
3333 if (err)
3334 return err;
3335
3336 tmp = *current_match;
3337 }
3338
3339 *current_match = NULL;
3340 return 0;
3341}
3342
3343void hpi_entity_free(struct hpi_entity *entity)
3344{
3345 kfree(entity);
3346}
3347
3348static u16 hpi_entity_alloc_and_copy(struct hpi_entity *src,
3349 struct hpi_entity **dst)
3350{
3351 size_t buf_size;
3352 HPI_DEBUG_ASSERT(dst != NULL);
3353 HPI_DEBUG_ASSERT(src != NULL);
3354
3355 buf_size = hpi_entity_size(src);
3356 *dst = kmalloc(buf_size, GFP_KERNEL);
3357 if (*dst == NULL)
3358 return HPI_ERROR_MEMORY_ALLOC;
3359 memcpy(*dst, src, buf_size);
3360 return 0;
3361}
3362
3363u16 hpi_universal_info(const struct hpi_hsubsys *ph_subsys, u32 hC,
3364 struct hpi_entity **info)
3365{
3366 struct hpi_msg_strv hm;
3367 struct hpi_res_strv *phr;
3368 u16 hpi_err;
3369 int remaining_attempts = 2;
3370 size_t resp_packet_size = 1024;
3371
3372 *info = NULL;
3373
3374 while (remaining_attempts--) {
3375 phr = kmalloc(resp_packet_size, GFP_KERNEL);
3376 HPI_DEBUG_ASSERT(phr != NULL);
3377
3378 hpi_init_message_responseV1(&hm.h, (u16)sizeof(hm), &phr->h,
3379 (u16)resp_packet_size, HPI_OBJ_CONTROL,
3380 HPI_CONTROL_GET_INFO);
3381 u32TOINDEXES(hC, &hm.h.adapter_index, &hm.h.obj_index);
3382
3383 hm.strv.header.size = sizeof(hm.strv);
3384 phr->strv.header.size = resp_packet_size - sizeof(phr->h);
3385
3386 hpi_send_recv((struct hpi_message *)&hm.h,
3387 (struct hpi_response *)&phr->h);
3388 if (phr->h.error == HPI_ERROR_RESPONSE_BUFFER_TOO_SMALL) {
3389
3390 HPI_DEBUG_ASSERT(phr->h.specific_error >
3391 MIN_STRV_PACKET_SIZE
3392 && phr->h.specific_error < 1500);
3393 resp_packet_size = phr->h.specific_error;
3394 } else {
3395 remaining_attempts = 0;
3396 if (!phr->h.error)
3397 hpi_entity_alloc_and_copy(&phr->strv, info);
3398 }
3399
3400 hpi_err = phr->h.error;
3401 kfree(phr);
3402 }
3403
3404 return hpi_err;
3405}
3406
3407u16 hpi_universal_get(const struct hpi_hsubsys *ph_subsys, u32 hC,
3408 struct hpi_entity **value)
3409{
3410 struct hpi_msg_strv hm;
3411 struct hpi_res_strv *phr;
3412 u16 hpi_err;
3413 int remaining_attempts = 2;
3414
3415 *value = NULL;
3416
3417 while (remaining_attempts--) {
3418 phr = kmalloc(strv_packet_size, GFP_KERNEL);
3419 if (!phr)
3420 return HPI_ERROR_MEMORY_ALLOC;
3421
3422 hpi_init_message_responseV1(&hm.h, (u16)sizeof(hm), &phr->h,
3423 (u16)strv_packet_size, HPI_OBJ_CONTROL,
3424 HPI_CONTROL_GET_STATE);
3425 u32TOINDEXES(hC, &hm.h.adapter_index, &hm.h.obj_index);
3426
3427 hm.strv.header.size = sizeof(hm.strv);
3428 phr->strv.header.size = strv_packet_size - sizeof(phr->h);
3429
3430 hpi_send_recv((struct hpi_message *)&hm.h,
3431 (struct hpi_response *)&phr->h);
3432 if (phr->h.error == HPI_ERROR_RESPONSE_BUFFER_TOO_SMALL) {
3433
3434 HPI_DEBUG_ASSERT(phr->h.specific_error >
3435 MIN_STRV_PACKET_SIZE
3436 && phr->h.specific_error < 1000);
3437 strv_packet_size = phr->h.specific_error;
3438 } else {
3439 remaining_attempts = 0;
3440 if (!phr->h.error)
3441 hpi_entity_alloc_and_copy(&phr->strv, value);
3442 }
3443
3444 hpi_err = phr->h.error;
3445 kfree(phr);
3446 }
3447
3448 return hpi_err;
3449}
3450
3451u16 hpi_universal_set(const struct hpi_hsubsys *ph_subsys, u32 hC,
3452 struct hpi_entity *value)
3453{
3454 struct hpi_msg_strv *phm;
3455 struct hpi_res_strv hr;
3456
3457 phm = kmalloc(sizeof(phm->h) + value->header.size, GFP_KERNEL);
3458 HPI_DEBUG_ASSERT(phm != NULL);
3459
3460 hpi_init_message_responseV1(&phm->h,
3461 sizeof(phm->h) + value->header.size, &hr.h, sizeof(hr),
3462 HPI_OBJ_CONTROL, HPI_CONTROL_SET_STATE);
3463 u32TOINDEXES(hC, &phm->h.adapter_index, &phm->h.obj_index);
3464 hr.strv.header.size = sizeof(hr.strv);
3465
3466 memcpy(&phm->strv, value, value->header.size);
3467 hpi_send_recv((struct hpi_message *)&phm->h,
3468 (struct hpi_response *)&hr.h);
3469
3470 return hr.h.error;
3471}
3472
3473u16 hpi_entity_alloc_and_pack(const enum e_entity_type type,
3474 const size_t item_count, const enum e_entity_role role, void *value,
3475 struct hpi_entity **entity)
3476{
3477 size_t bytes_to_copy, total_size;
3478 u16 hE = 0;
3479 *entity = NULL;
3480
3481 hE = hpi_entity_check_type(type);
3482 if (hE)
3483 return hE;
3484
3485 HPI_DEBUG_ASSERT(role > entity_role_null && type < LAST_ENTITY_TYPE);
3486
3487 bytes_to_copy = entity_type_to_size[type] * item_count;
3488 total_size = hpi_entity_header_size(*entity) + bytes_to_copy;
3489
3490 HPI_DEBUG_ASSERT(total_size >= hpi_entity_header_size(*entity)
3491 && total_size < STR_SIZE_FIELD_MAX);
3492
3493 *entity = kmalloc(total_size, GFP_KERNEL);
3494 if (*entity == NULL)
3495 return HPI_ERROR_MEMORY_ALLOC;
3496 memcpy((*entity)->value, value, bytes_to_copy);
3497 (*entity)->header.size =
3498 hpi_entity_header_size(*entity) + bytes_to_copy;
3499 (*entity)->header.type = type;
3500 (*entity)->header.role = role;
3501 return 0;
3502}
3503
3504u16 hpi_entity_copy_value_from(struct hpi_entity *entity,
3505 enum e_entity_type type, size_t item_count, void *value_dst_p)
3506{
3507 size_t bytes_to_copy;
3508
3509 if (entity->header.type != type)
3510 return HPI_ERROR_ENTITY_TYPE_MISMATCH;
3511
3512 if (hpi_entity_item_count(entity) != item_count)
3513 return HPI_ERROR_ENTITY_ITEM_COUNT;
3514
3515 bytes_to_copy = entity_type_to_size[type] * item_count;
3516 memcpy(value_dst_p, entity->value, bytes_to_copy);
3517 return 0;
3518}
3519
3520u16 hpi_entity_unpack(struct hpi_entity *entity, enum e_entity_type *type,
3521 size_t *item_count, enum e_entity_role *role, void **value)
3522{
3523 u16 err = 0;
3524 HPI_DEBUG_ASSERT(entity != NULL);
3525
3526 if (type)
3527 *type = entity->header.type;
3528
3529 if (role)
3530 *role = entity->header.role;
3531
3532 if (value)
3533 *value = entity->value;
3534
3535 if (item_count != NULL) {
3536 if (entity->header.type == entity_type_sequence) {
3537 void *guard_p = hpi_entity_ptr_to_next(entity);
3538 struct hpi_entity *next = NULL;
3539 void *contents = entity->value;
3540
3541 *item_count = 0;
3542 while (contents < guard_p) {
3543 (*item_count)++;
3544 err = hpi_entity_get_next(contents, 0,
3545 guard_p, &next);
3546 if (next == NULL || err)
3547 break;
3548 contents = next;
3549 }
3550 } else {
3551 *item_count = hpi_entity_item_count(entity);
3552 }
3553 }
3554 return err;
3555}
3556
3557u16 hpi_gpio_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index,
3558 u32 *ph_gpio, u16 *pw_number_input_bits, u16 *pw_number_output_bits)
3559{
3560 struct hpi_message hm;
3561 struct hpi_response hr;
3562 hpi_init_message_response(&hm, &hr, HPI_OBJ_GPIO, HPI_GPIO_OPEN);
3563 hm.adapter_index = adapter_index;
3564
3565 hpi_send_recv(&hm, &hr);
3566
3567 if (hr.error == 0) {
3568 *ph_gpio =
3569 hpi_indexes_to_handle(HPI_OBJ_GPIO, adapter_index, 0);
3570 if (pw_number_input_bits)
3571 *pw_number_input_bits = hr.u.l.number_input_bits;
3572 if (pw_number_output_bits)
3573 *pw_number_output_bits = hr.u.l.number_output_bits;
3574 } else
3575 *ph_gpio = 0;
3576 return hr.error;
3577}
3578
3579u16 hpi_gpio_read_bit(const struct hpi_hsubsys *ph_subsys, u32 h_gpio,
3580 u16 bit_index, u16 *pw_bit_data)
3581{
3582 struct hpi_message hm;
3583 struct hpi_response hr;
3584 hpi_init_message_response(&hm, &hr, HPI_OBJ_GPIO, HPI_GPIO_READ_BIT);
3585 u32TOINDEX(h_gpio, &hm.adapter_index);
3586 hm.u.l.bit_index = bit_index;
3587
3588 hpi_send_recv(&hm, &hr);
3589
3590 *pw_bit_data = hr.u.l.bit_data[0];
3591 return hr.error;
3592}
3593
3594u16 hpi_gpio_read_all_bits(const struct hpi_hsubsys *ph_subsys, u32 h_gpio,
3595 u16 aw_all_bit_data[4]
3596 )
3597{
3598 struct hpi_message hm;
3599 struct hpi_response hr;
3600 hpi_init_message_response(&hm, &hr, HPI_OBJ_GPIO, HPI_GPIO_READ_ALL);
3601 u32TOINDEX(h_gpio, &hm.adapter_index);
3602
3603 hpi_send_recv(&hm, &hr);
3604
3605 if (aw_all_bit_data) {
3606 aw_all_bit_data[0] = hr.u.l.bit_data[0];
3607 aw_all_bit_data[1] = hr.u.l.bit_data[1];
3608 aw_all_bit_data[2] = hr.u.l.bit_data[2];
3609 aw_all_bit_data[3] = hr.u.l.bit_data[3];
3610 }
3611 return hr.error;
3612}
3613
3614u16 hpi_gpio_write_bit(const struct hpi_hsubsys *ph_subsys, u32 h_gpio,
3615 u16 bit_index, u16 bit_data)
3616{
3617 struct hpi_message hm;
3618 struct hpi_response hr;
3619 hpi_init_message_response(&hm, &hr, HPI_OBJ_GPIO, HPI_GPIO_WRITE_BIT);
3620 u32TOINDEX(h_gpio, &hm.adapter_index);
3621 hm.u.l.bit_index = bit_index;
3622 hm.u.l.bit_data = bit_data;
3623
3624 hpi_send_recv(&hm, &hr);
3625
3626 return hr.error;
3627}
3628
3629u16 hpi_gpio_write_status(const struct hpi_hsubsys *ph_subsys, u32 h_gpio,
3630 u16 aw_all_bit_data[4]
3631 )
3632{
3633 struct hpi_message hm;
3634 struct hpi_response hr;
3635 hpi_init_message_response(&hm, &hr, HPI_OBJ_GPIO,
3636 HPI_GPIO_WRITE_STATUS);
3637 u32TOINDEX(h_gpio, &hm.adapter_index);
3638
3639 hpi_send_recv(&hm, &hr);
3640
3641 if (aw_all_bit_data) {
3642 aw_all_bit_data[0] = hr.u.l.bit_data[0];
3643 aw_all_bit_data[1] = hr.u.l.bit_data[1];
3644 aw_all_bit_data[2] = hr.u.l.bit_data[2];
3645 aw_all_bit_data[3] = hr.u.l.bit_data[3];
3646 }
3647 return hr.error;
3648}
3649
3650u16 hpi_async_event_open(const struct hpi_hsubsys *ph_subsys,
3651 u16 adapter_index, u32 *ph_async)
3652{
3653 struct hpi_message hm;
3654 struct hpi_response hr;
3655 hpi_init_message_response(&hm, &hr, HPI_OBJ_ASYNCEVENT,
3656 HPI_ASYNCEVENT_OPEN);
3657 hm.adapter_index = adapter_index;
3658
3659 hpi_send_recv(&hm, &hr);
3660
3661 if (hr.error == 0)
3662
3663 *ph_async =
3664 hpi_indexes_to_handle(HPI_OBJ_ASYNCEVENT,
3665 adapter_index, 0);
3666 else
3667 *ph_async = 0;
3668 return hr.error;
3669
3670}
3671
3672u16 hpi_async_event_close(const struct hpi_hsubsys *ph_subsys, u32 h_async)
3673{
3674 struct hpi_message hm;
3675 struct hpi_response hr;
3676 hpi_init_message_response(&hm, &hr, HPI_OBJ_ASYNCEVENT,
3677 HPI_ASYNCEVENT_OPEN);
3678 u32TOINDEX(h_async, &hm.adapter_index);
3679
3680 hpi_send_recv(&hm, &hr);
3681
3682 return hr.error;
3683}
3684
3685u16 hpi_async_event_wait(const struct hpi_hsubsys *ph_subsys, u32 h_async,
3686 u16 maximum_events, struct hpi_async_event *p_events,
3687 u16 *pw_number_returned)
3688{
3689
3690 return 0;
3691}
3692
3693u16 hpi_async_event_get_count(const struct hpi_hsubsys *ph_subsys,
3694 u32 h_async, u16 *pw_count)
3695{
3696 struct hpi_message hm;
3697 struct hpi_response hr;
3698 hpi_init_message_response(&hm, &hr, HPI_OBJ_ASYNCEVENT,
3699 HPI_ASYNCEVENT_GETCOUNT);
3700 u32TOINDEX(h_async, &hm.adapter_index);
3701
3702 hpi_send_recv(&hm, &hr);
3703
3704 if (hr.error == 0)
3705 if (pw_count)
3706 *pw_count = hr.u.as.u.count.count;
3707
3708 return hr.error;
3709}
3710
3711u16 hpi_async_event_get(const struct hpi_hsubsys *ph_subsys, u32 h_async,
3712 u16 maximum_events, struct hpi_async_event *p_events,
3713 u16 *pw_number_returned)
3714{
3715 struct hpi_message hm;
3716 struct hpi_response hr;
3717 hpi_init_message_response(&hm, &hr, HPI_OBJ_ASYNCEVENT,
3718 HPI_ASYNCEVENT_GET);
3719 u32TOINDEX(h_async, &hm.adapter_index);
3720
3721 hpi_send_recv(&hm, &hr);
3722 if (!hr.error) {
3723 memcpy(p_events, &hr.u.as.u.event,
3724 sizeof(struct hpi_async_event));
3725 *pw_number_returned = 1;
3726 }
3727
3728 return hr.error;
3729}
3730
3731u16 hpi_nv_memory_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index,
3732 u32 *ph_nv_memory, u16 *pw_size_in_bytes)
3733{
3734 struct hpi_message hm;
3735 struct hpi_response hr;
3736 hpi_init_message_response(&hm, &hr, HPI_OBJ_NVMEMORY,
3737 HPI_NVMEMORY_OPEN);
3738 hm.adapter_index = adapter_index;
3739
3740 hpi_send_recv(&hm, &hr);
3741
3742 if (hr.error == 0) {
3743 *ph_nv_memory =
3744 hpi_indexes_to_handle(HPI_OBJ_NVMEMORY, adapter_index,
3745 0);
3746 if (pw_size_in_bytes)
3747 *pw_size_in_bytes = hr.u.n.size_in_bytes;
3748 } else
3749 *ph_nv_memory = 0;
3750 return hr.error;
3751}
3752
3753u16 hpi_nv_memory_read_byte(const struct hpi_hsubsys *ph_subsys,
3754 u32 h_nv_memory, u16 index, u16 *pw_data)
3755{
3756 struct hpi_message hm;
3757 struct hpi_response hr;
3758 hpi_init_message_response(&hm, &hr, HPI_OBJ_NVMEMORY,
3759 HPI_NVMEMORY_READ_BYTE);
3760 u32TOINDEX(h_nv_memory, &hm.adapter_index);
3761 hm.u.n.address = index;
3762
3763 hpi_send_recv(&hm, &hr);
3764
3765 *pw_data = hr.u.n.data;
3766 return hr.error;
3767}
3768
3769u16 hpi_nv_memory_write_byte(const struct hpi_hsubsys *ph_subsys,
3770 u32 h_nv_memory, u16 index, u16 data)
3771{
3772 struct hpi_message hm;
3773 struct hpi_response hr;
3774 hpi_init_message_response(&hm, &hr, HPI_OBJ_NVMEMORY,
3775 HPI_NVMEMORY_WRITE_BYTE);
3776 u32TOINDEX(h_nv_memory, &hm.adapter_index);
3777 hm.u.n.address = index;
3778 hm.u.n.data = data;
3779
3780 hpi_send_recv(&hm, &hr);
3781
3782 return hr.error;
3783}
3784
3785u16 hpi_profile_open_all(const struct hpi_hsubsys *ph_subsys,
3786 u16 adapter_index, u16 profile_index, u32 *ph_profile,
3787 u16 *pw_max_profiles)
3788{
3789 struct hpi_message hm;
3790 struct hpi_response hr;
3791 hpi_init_message_response(&hm, &hr, HPI_OBJ_PROFILE,
3792 HPI_PROFILE_OPEN_ALL);
3793 hm.adapter_index = adapter_index;
3794 hm.obj_index = profile_index;
3795 hpi_send_recv(&hm, &hr);
3796
3797 *pw_max_profiles = hr.u.p.u.o.max_profiles;
3798 if (hr.error == 0)
3799 *ph_profile =
3800 hpi_indexes_to_handle(HPI_OBJ_PROFILE, adapter_index,
3801 profile_index);
3802 else
3803 *ph_profile = 0;
3804 return hr.error;
3805}
3806
3807u16 hpi_profile_get(const struct hpi_hsubsys *ph_subsys, u32 h_profile,
3808 u16 bin_index, u16 *pw_seconds, u32 *pmicro_seconds, u32 *pcall_count,
3809 u32 *pmax_micro_seconds, u32 *pmin_micro_seconds)
3810{
3811 struct hpi_message hm;
3812 struct hpi_response hr;
3813 hpi_init_message_response(&hm, &hr, HPI_OBJ_PROFILE, HPI_PROFILE_GET);
3814 u32TOINDEXES(h_profile, &hm.adapter_index, &hm.obj_index);
3815 hm.u.p.bin_index = bin_index;
3816 hpi_send_recv(&hm, &hr);
3817 if (pw_seconds)
3818 *pw_seconds = hr.u.p.u.t.seconds;
3819 if (pmicro_seconds)
3820 *pmicro_seconds = hr.u.p.u.t.micro_seconds;
3821 if (pcall_count)
3822 *pcall_count = hr.u.p.u.t.call_count;
3823 if (pmax_micro_seconds)
3824 *pmax_micro_seconds = hr.u.p.u.t.max_micro_seconds;
3825 if (pmin_micro_seconds)
3826 *pmin_micro_seconds = hr.u.p.u.t.min_micro_seconds;
3827 return hr.error;
3828}
3829
3830u16 hpi_profile_get_utilization(const struct hpi_hsubsys *ph_subsys,
3831 u32 h_profile, u32 *putilization)
3832{
3833 struct hpi_message hm;
3834 struct hpi_response hr;
3835 hpi_init_message_response(&hm, &hr, HPI_OBJ_PROFILE,
3836 HPI_PROFILE_GET_UTILIZATION);
3837 u32TOINDEXES(h_profile, &hm.adapter_index, &hm.obj_index);
3838 hpi_send_recv(&hm, &hr);
3839 if (hr.error) {
3840 if (putilization)
3841 *putilization = 0;
3842 } else {
3843 if (putilization)
3844 *putilization = hr.u.p.u.t.call_count;
3845 }
3846 return hr.error;
3847}
3848
3849u16 hpi_profile_get_name(const struct hpi_hsubsys *ph_subsys, u32 h_profile,
3850 u16 bin_index, char *sz_name, u16 name_length)
3851{
3852 struct hpi_message hm;
3853 struct hpi_response hr;
3854 hpi_init_message_response(&hm, &hr, HPI_OBJ_PROFILE,
3855 HPI_PROFILE_GET_NAME);
3856 u32TOINDEXES(h_profile, &hm.adapter_index, &hm.obj_index);
3857 hm.u.p.bin_index = bin_index;
3858 hpi_send_recv(&hm, &hr);
3859 if (hr.error) {
3860 if (sz_name)
3861 strcpy(sz_name, "??");
3862 } else {
3863 if (sz_name)
3864 memcpy(sz_name, (char *)hr.u.p.u.n.sz_name,
3865 name_length);
3866 }
3867 return hr.error;
3868}
3869
3870u16 hpi_profile_start_all(const struct hpi_hsubsys *ph_subsys, u32 h_profile)
3871{
3872 struct hpi_message hm;
3873 struct hpi_response hr;
3874 hpi_init_message_response(&hm, &hr, HPI_OBJ_PROFILE,
3875 HPI_PROFILE_START_ALL);
3876 u32TOINDEXES(h_profile, &hm.adapter_index, &hm.obj_index);
3877 hpi_send_recv(&hm, &hr);
3878
3879 return hr.error;
3880}
3881
3882u16 hpi_profile_stop_all(const struct hpi_hsubsys *ph_subsys, u32 h_profile)
3883{
3884 struct hpi_message hm;
3885 struct hpi_response hr;
3886 hpi_init_message_response(&hm, &hr, HPI_OBJ_PROFILE,
3887 HPI_PROFILE_STOP_ALL);
3888 u32TOINDEXES(h_profile, &hm.adapter_index, &hm.obj_index);
3889 hpi_send_recv(&hm, &hr);
3890
3891 return hr.error;
3892}
3893
3894u16 hpi_watchdog_open(const struct hpi_hsubsys *ph_subsys, u16 adapter_index,
3895 u32 *ph_watchdog)
3896{
3897 struct hpi_message hm;
3898 struct hpi_response hr;
3899 hpi_init_message_response(&hm, &hr, HPI_OBJ_WATCHDOG,
3900 HPI_WATCHDOG_OPEN);
3901 hm.adapter_index = adapter_index;
3902
3903 hpi_send_recv(&hm, &hr);
3904
3905 if (hr.error == 0)
3906 *ph_watchdog =
3907 hpi_indexes_to_handle(HPI_OBJ_WATCHDOG, adapter_index,
3908 0);
3909 else
3910 *ph_watchdog = 0;
3911 return hr.error;
3912}
3913
3914u16 hpi_watchdog_set_time(const struct hpi_hsubsys *ph_subsys, u32 h_watchdog,
3915 u32 time_millisec)
3916{
3917 struct hpi_message hm;
3918 struct hpi_response hr;
3919 hpi_init_message_response(&hm, &hr, HPI_OBJ_WATCHDOG,
3920 HPI_WATCHDOG_SET_TIME);
3921 u32TOINDEX(h_watchdog, &hm.adapter_index);
3922 hm.u.w.time_ms = time_millisec;
3923
3924 hpi_send_recv(&hm, &hr);
3925
3926 return hr.error;
3927}
3928
3929u16 hpi_watchdog_ping(const struct hpi_hsubsys *ph_subsys, u32 h_watchdog)
3930{
3931 struct hpi_message hm;
3932 struct hpi_response hr;
3933 hpi_init_message_response(&hm, &hr, HPI_OBJ_WATCHDOG,
3934 HPI_WATCHDOG_PING);
3935 u32TOINDEX(h_watchdog, &hm.adapter_index);
3936
3937 hpi_send_recv(&hm, &hr);
3938
3939 return hr.error;
3940}
diff --git a/sound/pci/asihpi/hpimsginit.c b/sound/pci/asihpi/hpimsginit.c
index 8e1d099ed7e4..628376ce4a49 100644
--- a/sound/pci/asihpi/hpimsginit.c
+++ b/sound/pci/asihpi/hpimsginit.c
@@ -32,21 +32,6 @@ static u16 res_size[HPI_OBJ_MAXINDEX + 1] = HPI_RESPONSE_SIZE_BY_OBJECT;
32static u16 gwSSX2_bypass; 32static u16 gwSSX2_bypass;
33 33
34/** \internal 34/** \internal
35 * Used by ASIO driver to disable SSX2 for a single process
36 * \param phSubSys Pointer to HPI subsystem handle.
37 * \param wBypass New bypass setting 0 = off, nonzero = on
38 * \return Previous bypass setting.
39 */
40u16 hpi_subsys_ssx2_bypass(const struct hpi_hsubsys *ph_subsys, u16 bypass)
41{
42 u16 old_value = gwSSX2_bypass;
43
44 gwSSX2_bypass = bypass;
45
46 return old_value;
47}
48
49/** \internal
50 * initialize the HPI message structure 35 * initialize the HPI message structure
51 */ 36 */
52static void hpi_init_message(struct hpi_message *phm, u16 object, 37static void hpi_init_message(struct hpi_message *phm, u16 object,
@@ -65,7 +50,8 @@ static void hpi_init_message(struct hpi_message *phm, u16 object,
65 phm->object = object; 50 phm->object = object;
66 phm->function = function; 51 phm->function = function;
67 phm->version = 0; 52 phm->version = 0;
68 /* Expect adapter index to be set by caller */ 53 phm->adapter_index = HPI_ADAPTER_INDEX_INVALID;
54 /* Expect actual adapter index to be set by caller */
69} 55}
70 56
71/** \internal 57/** \internal
diff --git a/sound/pci/asihpi/hpimsginit.h b/sound/pci/asihpi/hpimsginit.h
index 864ad020c9b3..bfd330d78b58 100644
--- a/sound/pci/asihpi/hpimsginit.h
+++ b/sound/pci/asihpi/hpimsginit.h
@@ -21,11 +21,15 @@
21 (C) Copyright AudioScience Inc. 2007 21 (C) Copyright AudioScience Inc. 2007
22*******************************************************************************/ 22*******************************************************************************/
23/* Initialise response headers, or msg/response pairs. 23/* Initialise response headers, or msg/response pairs.
24Note that it is valid to just init a response e.g. when a lower level is preparing 24Note that it is valid to just init a response e.g. when a lower level is
25a response to a message. 25preparing a response to a message.
26However, when sending a message, a matching response buffer always must be prepared 26However, when sending a message, a matching response buffer must always be
27prepared.
27*/ 28*/
28 29
30#ifndef _HPIMSGINIT_H_
31#define _HPIMSGINIT_H_
32
29void hpi_init_response(struct hpi_response *phr, u16 object, u16 function, 33void hpi_init_response(struct hpi_response *phr, u16 object, u16 function,
30 u16 error); 34 u16 error);
31 35
@@ -38,3 +42,5 @@ void hpi_init_responseV1(struct hpi_response_header *phr, u16 size,
38void hpi_init_message_responseV1(struct hpi_message_header *phm, u16 msg_size, 42void hpi_init_message_responseV1(struct hpi_message_header *phm, u16 msg_size,
39 struct hpi_response_header *phr, u16 res_size, u16 object, 43 struct hpi_response_header *phr, u16 res_size, u16 object,
40 u16 function); 44 u16 function);
45
46#endif /* _HPIMSGINIT_H_ */
diff --git a/sound/pci/asihpi/hpimsgx.c b/sound/pci/asihpi/hpimsgx.c
index f01ab964f602..bcbdf30a6aa0 100644
--- a/sound/pci/asihpi/hpimsgx.c
+++ b/sound/pci/asihpi/hpimsgx.c
@@ -23,6 +23,7 @@ Extended Message Function With Response Cacheing
23#define SOURCEFILE_NAME "hpimsgx.c" 23#define SOURCEFILE_NAME "hpimsgx.c"
24#include "hpi_internal.h" 24#include "hpi_internal.h"
25#include "hpimsginit.h" 25#include "hpimsginit.h"
26#include "hpicmn.h"
26#include "hpimsgx.h" 27#include "hpimsgx.h"
27#include "hpidebug.h" 28#include "hpidebug.h"
28 29
@@ -42,22 +43,24 @@ static hpi_handler_func *hpi_lookup_entry_point_function(const struct hpi_pci
42 43
43 for (i = 0; asihpi_pci_tbl[i].vendor != 0; i++) { 44 for (i = 0; asihpi_pci_tbl[i].vendor != 0; i++) {
44 if (asihpi_pci_tbl[i].vendor != PCI_ANY_ID 45 if (asihpi_pci_tbl[i].vendor != PCI_ANY_ID
45 && asihpi_pci_tbl[i].vendor != pci_info->vendor_id) 46 && asihpi_pci_tbl[i].vendor !=
47 pci_info->pci_dev->vendor)
46 continue; 48 continue;
47 if (asihpi_pci_tbl[i].device != PCI_ANY_ID 49 if (asihpi_pci_tbl[i].device != PCI_ANY_ID
48 && asihpi_pci_tbl[i].device != pci_info->device_id) 50 && asihpi_pci_tbl[i].device !=
51 pci_info->pci_dev->device)
49 continue; 52 continue;
50 if (asihpi_pci_tbl[i].subvendor != PCI_ANY_ID 53 if (asihpi_pci_tbl[i].subvendor != PCI_ANY_ID
51 && asihpi_pci_tbl[i].subvendor != 54 && asihpi_pci_tbl[i].subvendor !=
52 pci_info->subsys_vendor_id) 55 pci_info->pci_dev->subsystem_vendor)
53 continue; 56 continue;
54 if (asihpi_pci_tbl[i].subdevice != PCI_ANY_ID 57 if (asihpi_pci_tbl[i].subdevice != PCI_ANY_ID
55 && asihpi_pci_tbl[i].subdevice != 58 && asihpi_pci_tbl[i].subdevice !=
56 pci_info->subsys_device_id) 59 pci_info->pci_dev->subsystem_device)
57 continue; 60 continue;
58 61
59 HPI_DEBUG_LOG(DEBUG, " %x,%lu\n", i, 62 /* HPI_DEBUG_LOG(DEBUG, " %x,%lx\n", i,
60 asihpi_pci_tbl[i].driver_data); 63 asihpi_pci_tbl[i].driver_data); */
61 return (hpi_handler_func *) asihpi_pci_tbl[i].driver_data; 64 return (hpi_handler_func *) asihpi_pci_tbl[i].driver_data;
62 } 65 }
63 66
@@ -67,21 +70,12 @@ static hpi_handler_func *hpi_lookup_entry_point_function(const struct hpi_pci
67static inline void hw_entry_point(struct hpi_message *phm, 70static inline void hw_entry_point(struct hpi_message *phm,
68 struct hpi_response *phr) 71 struct hpi_response *phr)
69{ 72{
70 73 if ((phm->adapter_index < HPI_MAX_ADAPTERS)
71 hpi_handler_func *ep; 74 && hpi_entry_points[phm->adapter_index])
72 75 hpi_entry_points[phm->adapter_index] (phm, phr);
73 if (phm->adapter_index < HPI_MAX_ADAPTERS) { 76 else
74 ep = (hpi_handler_func *) hpi_entry_points[phm-> 77 hpi_init_response(phr, phm->object, phm->function,
75 adapter_index]; 78 HPI_ERROR_PROCESSING_MESSAGE);
76 if (ep) {
77 HPI_DEBUG_MESSAGE(DEBUG, phm);
78 ep(phm, phr);
79 HPI_DEBUG_RESPONSE(phr);
80 return;
81 }
82 }
83 hpi_init_response(phr, phm->object, phm->function,
84 HPI_ERROR_PROCESSING_MESSAGE);
85} 79}
86 80
87static void adapter_open(struct hpi_message *phm, struct hpi_response *phr); 81static void adapter_open(struct hpi_message *phm, struct hpi_response *phr);
@@ -100,6 +94,7 @@ static void instream_close(struct hpi_message *phm, struct hpi_response *phr,
100 void *h_owner); 94 void *h_owner);
101 95
102static void HPIMSGX__reset(u16 adapter_index); 96static void HPIMSGX__reset(u16 adapter_index);
97
103static u16 HPIMSGX__init(struct hpi_message *phm, struct hpi_response *phr); 98static u16 HPIMSGX__init(struct hpi_message *phm, struct hpi_response *phr);
104static void HPIMSGX__cleanup(u16 adapter_index, void *h_owner); 99static void HPIMSGX__cleanup(u16 adapter_index, void *h_owner);
105 100
@@ -153,8 +148,6 @@ static struct hpi_stream_response
153 148
154static struct hpi_mixer_response rESP_HPI_MIXER_OPEN[HPI_MAX_ADAPTERS]; 149static struct hpi_mixer_response rESP_HPI_MIXER_OPEN[HPI_MAX_ADAPTERS];
155 150
156static struct hpi_subsys_response gRESP_HPI_SUBSYS_FIND_ADAPTERS;
157
158static struct adapter_info aDAPTER_INFO[HPI_MAX_ADAPTERS]; 151static struct adapter_info aDAPTER_INFO[HPI_MAX_ADAPTERS];
159 152
160/* use these to keep track of opens from user mode apps/DLLs */ 153/* use these to keep track of opens from user mode apps/DLLs */
@@ -167,6 +160,11 @@ static struct asi_open_state
167static void subsys_message(struct hpi_message *phm, struct hpi_response *phr, 160static void subsys_message(struct hpi_message *phm, struct hpi_response *phr,
168 void *h_owner) 161 void *h_owner)
169{ 162{
163 if (phm->adapter_index != HPI_ADAPTER_INDEX_INVALID)
164 HPI_DEBUG_LOG(WARNING,
165 "suspicious adapter index %d in subsys message 0x%x.\n",
166 phm->adapter_index, phm->function);
167
170 switch (phm->function) { 168 switch (phm->function) {
171 case HPI_SUBSYS_GET_VERSION: 169 case HPI_SUBSYS_GET_VERSION:
172 hpi_init_response(phr, HPI_OBJ_SUBSYSTEM, 170 hpi_init_response(phr, HPI_OBJ_SUBSYSTEM,
@@ -204,85 +202,37 @@ static void subsys_message(struct hpi_message *phm, struct hpi_response *phr,
204 HPI_SUBSYS_DRIVER_UNLOAD, 0); 202 HPI_SUBSYS_DRIVER_UNLOAD, 0);
205 return; 203 return;
206 204
207 case HPI_SUBSYS_GET_INFO:
208 HPI_COMMON(phm, phr);
209 break;
210
211 case HPI_SUBSYS_FIND_ADAPTERS:
212 memcpy(phr, &gRESP_HPI_SUBSYS_FIND_ADAPTERS,
213 sizeof(gRESP_HPI_SUBSYS_FIND_ADAPTERS));
214 break;
215 case HPI_SUBSYS_GET_NUM_ADAPTERS: 205 case HPI_SUBSYS_GET_NUM_ADAPTERS:
216 memcpy(phr, &gRESP_HPI_SUBSYS_FIND_ADAPTERS,
217 sizeof(gRESP_HPI_SUBSYS_FIND_ADAPTERS));
218 phr->function = HPI_SUBSYS_GET_NUM_ADAPTERS;
219 break;
220 case HPI_SUBSYS_GET_ADAPTER: 206 case HPI_SUBSYS_GET_ADAPTER:
221 { 207 HPI_COMMON(phm, phr);
222 int count = phm->adapter_index; 208 break;
223 int index = 0;
224 hpi_init_response(phr, HPI_OBJ_SUBSYSTEM,
225 HPI_SUBSYS_GET_ADAPTER, 0);
226
227 /* This is complicated by the fact that we want to
228 * "skip" 0's in the adapter list.
229 * First, make sure we are pointing to a
230 * non-zero adapter type.
231 */
232 while (gRESP_HPI_SUBSYS_FIND_ADAPTERS.
233 s.aw_adapter_list[index] == 0) {
234 index++;
235 if (index >= HPI_MAX_ADAPTERS)
236 break;
237 }
238 while (count) {
239 /* move on to the next adapter */
240 index++;
241 if (index >= HPI_MAX_ADAPTERS)
242 break;
243 while (gRESP_HPI_SUBSYS_FIND_ADAPTERS.
244 s.aw_adapter_list[index] == 0) {
245 index++;
246 if (index >= HPI_MAX_ADAPTERS)
247 break;
248 }
249 count--;
250 }
251 209
252 if (index < HPI_MAX_ADAPTERS) {
253 phr->u.s.adapter_index = (u16)index;
254 phr->u.s.aw_adapter_list[0] =
255 gRESP_HPI_SUBSYS_FIND_ADAPTERS.
256 s.aw_adapter_list[index];
257 } else {
258 phr->u.s.adapter_index = 0;
259 phr->u.s.aw_adapter_list[0] = 0;
260 phr->error = HPI_ERROR_BAD_ADAPTER_NUMBER;
261 }
262 break;
263 }
264 case HPI_SUBSYS_CREATE_ADAPTER: 210 case HPI_SUBSYS_CREATE_ADAPTER:
265 HPIMSGX__init(phm, phr); 211 HPIMSGX__init(phm, phr);
266 break; 212 break;
213
267 case HPI_SUBSYS_DELETE_ADAPTER: 214 case HPI_SUBSYS_DELETE_ADAPTER:
268 HPIMSGX__cleanup(phm->adapter_index, h_owner); 215 HPIMSGX__cleanup(phm->obj_index, h_owner);
269 { 216 {
270 struct hpi_message hm; 217 struct hpi_message hm;
271 struct hpi_response hr; 218 struct hpi_response hr;
272 /* call to HPI_ADAPTER_CLOSE */
273 hpi_init_message_response(&hm, &hr, HPI_OBJ_ADAPTER, 219 hpi_init_message_response(&hm, &hr, HPI_OBJ_ADAPTER,
274 HPI_ADAPTER_CLOSE); 220 HPI_ADAPTER_CLOSE);
275 hm.adapter_index = phm->adapter_index; 221 hm.adapter_index = phm->obj_index;
276 hw_entry_point(&hm, &hr); 222 hw_entry_point(&hm, &hr);
277 } 223 }
278 hw_entry_point(phm, phr); 224 if ((phm->obj_index < HPI_MAX_ADAPTERS)
279 gRESP_HPI_SUBSYS_FIND_ADAPTERS.s. 225 && hpi_entry_points[phm->obj_index]) {
280 aw_adapter_list[phm->adapter_index] 226 hpi_entry_points[phm->obj_index] (phm, phr);
281 = 0; 227 hpi_entry_points[phm->obj_index] = NULL;
282 hpi_entry_points[phm->adapter_index] = NULL; 228 } else
229 phr->error = HPI_ERROR_INVALID_OBJ_INDEX;
230
283 break; 231 break;
284 default: 232 default:
285 hw_entry_point(phm, phr); 233 /* Must explicitly handle every subsys message in this switch */
234 hpi_init_response(phr, HPI_OBJ_SUBSYSTEM, phm->function,
235 HPI_ERROR_INVALID_FUNC);
286 break; 236 break;
287 } 237 }
288} 238}
@@ -409,33 +359,7 @@ void hpi_send_recv_ex(struct hpi_message *phm, struct hpi_response *phr,
409 break; 359 break;
410 } 360 }
411 HPI_DEBUG_RESPONSE(phr); 361 HPI_DEBUG_RESPONSE(phr);
412#if 1 362
413 if (phr->error >= HPI_ERROR_BACKEND_BASE) {
414 void *ep = NULL;
415 char *ep_name;
416
417 HPI_DEBUG_MESSAGE(ERROR, phm);
418
419 if (phm->adapter_index < HPI_MAX_ADAPTERS)
420 ep = hpi_entry_points[phm->adapter_index];
421
422 /* Don't need this? Have adapter index in debug info
423 Know at driver load time index->backend mapping */
424 if (ep == HPI_6000)
425 ep_name = "HPI_6000";
426 else if (ep == HPI_6205)
427 ep_name = "HPI_6205";
428 else
429 ep_name = "unknown";
430
431 HPI_DEBUG_LOG(ERROR, "HPI %s response - error# %d\n", ep_name,
432 phr->error);
433
434 if (hpi_debug_level >= HPI_DEBUG_LEVEL_VERBOSE)
435 hpi_debug_data((u16 *)phm,
436 sizeof(*phm) / sizeof(u16));
437 }
438#endif
439} 363}
440 364
441static void adapter_open(struct hpi_message *phm, struct hpi_response *phr) 365static void adapter_open(struct hpi_message *phm, struct hpi_response *phr)
@@ -484,7 +408,7 @@ static void instream_open(struct hpi_message *phm, struct hpi_response *phr,
484 else { 408 else {
485 instream_user_open[phm->adapter_index][phm-> 409 instream_user_open[phm->adapter_index][phm->
486 obj_index].open_flag = 1; 410 obj_index].open_flag = 1;
487 hpios_msgxlock_un_lock(&msgx_lock); 411 hpios_msgxlock_unlock(&msgx_lock);
488 412
489 /* issue a reset */ 413 /* issue a reset */
490 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 414 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
@@ -509,7 +433,7 @@ static void instream_open(struct hpi_message *phm, struct hpi_response *phr,
509 sizeof(rESP_HPI_ISTREAM_OPEN[0][0])); 433 sizeof(rESP_HPI_ISTREAM_OPEN[0][0]));
510 } 434 }
511 } 435 }
512 hpios_msgxlock_un_lock(&msgx_lock); 436 hpios_msgxlock_unlock(&msgx_lock);
513} 437}
514 438
515static void instream_close(struct hpi_message *phm, struct hpi_response *phr, 439static void instream_close(struct hpi_message *phm, struct hpi_response *phr,
@@ -530,7 +454,7 @@ static void instream_close(struct hpi_message *phm, struct hpi_response *phr,
530 phm->wAdapterIndex, phm->wObjIndex, hOwner); */ 454 phm->wAdapterIndex, phm->wObjIndex, hOwner); */
531 instream_user_open[phm->adapter_index][phm-> 455 instream_user_open[phm->adapter_index][phm->
532 obj_index].h_owner = NULL; 456 obj_index].h_owner = NULL;
533 hpios_msgxlock_un_lock(&msgx_lock); 457 hpios_msgxlock_unlock(&msgx_lock);
534 /* issue a reset */ 458 /* issue a reset */
535 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM, 459 hpi_init_message_response(&hm, &hr, HPI_OBJ_ISTREAM,
536 HPI_ISTREAM_RESET); 460 HPI_ISTREAM_RESET);
@@ -556,7 +480,7 @@ static void instream_close(struct hpi_message *phm, struct hpi_response *phr,
556 obj_index].h_owner); 480 obj_index].h_owner);
557 phr->error = HPI_ERROR_OBJ_NOT_OPEN; 481 phr->error = HPI_ERROR_OBJ_NOT_OPEN;
558 } 482 }
559 hpios_msgxlock_un_lock(&msgx_lock); 483 hpios_msgxlock_unlock(&msgx_lock);
560} 484}
561 485
562static void outstream_open(struct hpi_message *phm, struct hpi_response *phr, 486static void outstream_open(struct hpi_message *phm, struct hpi_response *phr,
@@ -581,7 +505,7 @@ static void outstream_open(struct hpi_message *phm, struct hpi_response *phr,
581 else { 505 else {
582 outstream_user_open[phm->adapter_index][phm-> 506 outstream_user_open[phm->adapter_index][phm->
583 obj_index].open_flag = 1; 507 obj_index].open_flag = 1;
584 hpios_msgxlock_un_lock(&msgx_lock); 508 hpios_msgxlock_unlock(&msgx_lock);
585 509
586 /* issue a reset */ 510 /* issue a reset */
587 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 511 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
@@ -606,7 +530,7 @@ static void outstream_open(struct hpi_message *phm, struct hpi_response *phr,
606 sizeof(rESP_HPI_OSTREAM_OPEN[0][0])); 530 sizeof(rESP_HPI_OSTREAM_OPEN[0][0]));
607 } 531 }
608 } 532 }
609 hpios_msgxlock_un_lock(&msgx_lock); 533 hpios_msgxlock_unlock(&msgx_lock);
610} 534}
611 535
612static void outstream_close(struct hpi_message *phm, struct hpi_response *phr, 536static void outstream_close(struct hpi_message *phm, struct hpi_response *phr,
@@ -628,7 +552,7 @@ static void outstream_close(struct hpi_message *phm, struct hpi_response *phr,
628 phm->wAdapterIndex, phm->wObjIndex, hOwner); */ 552 phm->wAdapterIndex, phm->wObjIndex, hOwner); */
629 outstream_user_open[phm->adapter_index][phm-> 553 outstream_user_open[phm->adapter_index][phm->
630 obj_index].h_owner = NULL; 554 obj_index].h_owner = NULL;
631 hpios_msgxlock_un_lock(&msgx_lock); 555 hpios_msgxlock_unlock(&msgx_lock);
632 /* issue a reset */ 556 /* issue a reset */
633 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM, 557 hpi_init_message_response(&hm, &hr, HPI_OBJ_OSTREAM,
634 HPI_OSTREAM_RESET); 558 HPI_OSTREAM_RESET);
@@ -654,7 +578,7 @@ static void outstream_close(struct hpi_message *phm, struct hpi_response *phr,
654 obj_index].h_owner); 578 obj_index].h_owner);
655 phr->error = HPI_ERROR_OBJ_NOT_OPEN; 579 phr->error = HPI_ERROR_OBJ_NOT_OPEN;
656 } 580 }
657 hpios_msgxlock_un_lock(&msgx_lock); 581 hpios_msgxlock_unlock(&msgx_lock);
658} 582}
659 583
660static u16 adapter_prepare(u16 adapter) 584static u16 adapter_prepare(u16 adapter)
@@ -683,16 +607,9 @@ static u16 adapter_prepare(u16 adapter)
683 if (hr.error) 607 if (hr.error)
684 return hr.error; 608 return hr.error;
685 609
686 aDAPTER_INFO[adapter].num_outstreams = hr.u.a.num_outstreams; 610 aDAPTER_INFO[adapter].num_outstreams = hr.u.ax.info.num_outstreams;
687 aDAPTER_INFO[adapter].num_instreams = hr.u.a.num_instreams; 611 aDAPTER_INFO[adapter].num_instreams = hr.u.ax.info.num_instreams;
688 aDAPTER_INFO[adapter].type = hr.u.a.adapter_type; 612 aDAPTER_INFO[adapter].type = hr.u.ax.info.adapter_type;
689
690 gRESP_HPI_SUBSYS_FIND_ADAPTERS.s.aw_adapter_list[adapter] =
691 hr.u.a.adapter_type;
692 gRESP_HPI_SUBSYS_FIND_ADAPTERS.s.num_adapters++;
693 if (gRESP_HPI_SUBSYS_FIND_ADAPTERS.s.num_adapters > HPI_MAX_ADAPTERS)
694 gRESP_HPI_SUBSYS_FIND_ADAPTERS.s.num_adapters =
695 HPI_MAX_ADAPTERS;
696 613
697 /* call to HPI_OSTREAM_OPEN */ 614 /* call to HPI_OSTREAM_OPEN */
698 for (i = 0; i < aDAPTER_INFO[adapter].num_outstreams; i++) { 615 for (i = 0; i < aDAPTER_INFO[adapter].num_outstreams; i++) {
@@ -727,7 +644,7 @@ static u16 adapter_prepare(u16 adapter)
727 memcpy(&rESP_HPI_MIXER_OPEN[adapter], &hr, 644 memcpy(&rESP_HPI_MIXER_OPEN[adapter], &hr,
728 sizeof(rESP_HPI_MIXER_OPEN[0])); 645 sizeof(rESP_HPI_MIXER_OPEN[0]));
729 646
730 return gRESP_HPI_SUBSYS_FIND_ADAPTERS.h.error; 647 return 0;
731} 648}
732 649
733static void HPIMSGX__reset(u16 adapter_index) 650static void HPIMSGX__reset(u16 adapter_index)
@@ -737,12 +654,6 @@ static void HPIMSGX__reset(u16 adapter_index)
737 struct hpi_response hr; 654 struct hpi_response hr;
738 655
739 if (adapter_index == HPIMSGX_ALLADAPTERS) { 656 if (adapter_index == HPIMSGX_ALLADAPTERS) {
740 /* reset all responses to contain errors */
741 hpi_init_response(&hr, HPI_OBJ_SUBSYSTEM,
742 HPI_SUBSYS_FIND_ADAPTERS, 0);
743 memcpy(&gRESP_HPI_SUBSYS_FIND_ADAPTERS, &hr,
744 sizeof(gRESP_HPI_SUBSYS_FIND_ADAPTERS));
745
746 for (adapter = 0; adapter < HPI_MAX_ADAPTERS; adapter++) { 657 for (adapter = 0; adapter < HPI_MAX_ADAPTERS; adapter++) {
747 658
748 hpi_init_response(&hr, HPI_OBJ_ADAPTER, 659 hpi_init_response(&hr, HPI_OBJ_ADAPTER,
@@ -783,12 +694,6 @@ static void HPIMSGX__reset(u16 adapter_index)
783 rESP_HPI_ISTREAM_OPEN[adapter_index][i].h.error = 694 rESP_HPI_ISTREAM_OPEN[adapter_index][i].h.error =
784 HPI_ERROR_INVALID_OBJ; 695 HPI_ERROR_INVALID_OBJ;
785 } 696 }
786 if (gRESP_HPI_SUBSYS_FIND_ADAPTERS.
787 s.aw_adapter_list[adapter_index]) {
788 gRESP_HPI_SUBSYS_FIND_ADAPTERS.
789 s.aw_adapter_list[adapter_index] = 0;
790 gRESP_HPI_SUBSYS_FIND_ADAPTERS.s.num_adapters--;
791 }
792 } 697 }
793} 698}
794 699
@@ -802,15 +707,9 @@ static u16 HPIMSGX__init(struct hpi_message *phm,
802 hpi_handler_func *entry_point_func; 707 hpi_handler_func *entry_point_func;
803 struct hpi_response hr; 708 struct hpi_response hr;
804 709
805 if (gRESP_HPI_SUBSYS_FIND_ADAPTERS.s.num_adapters >= HPI_MAX_ADAPTERS)
806 return HPI_ERROR_BAD_ADAPTER_NUMBER;
807
808 /* Init response here so we can pass in previous adapter list */ 710 /* Init response here so we can pass in previous adapter list */
809 hpi_init_response(&hr, phm->object, phm->function, 711 hpi_init_response(&hr, phm->object, phm->function,
810 HPI_ERROR_INVALID_OBJ); 712 HPI_ERROR_INVALID_OBJ);
811 memcpy(hr.u.s.aw_adapter_list,
812 gRESP_HPI_SUBSYS_FIND_ADAPTERS.s.aw_adapter_list,
813 sizeof(gRESP_HPI_SUBSYS_FIND_ADAPTERS.s.aw_adapter_list));
814 713
815 entry_point_func = 714 entry_point_func =
816 hpi_lookup_entry_point_function(phm->u.s.resource.r.pci); 715 hpi_lookup_entry_point_function(phm->u.s.resource.r.pci);
@@ -860,7 +759,7 @@ static void HPIMSGX__cleanup(u16 adapter_index, void *h_owner)
860 struct hpi_response hr; 759 struct hpi_response hr;
861 760
862 HPI_DEBUG_LOG(DEBUG, 761 HPI_DEBUG_LOG(DEBUG,
863 "close adapter %d ostream %d\n", 762 "Close adapter %d ostream %d\n",
864 adapter, i); 763 adapter, i);
865 764
866 hpi_init_message_response(&hm, &hr, 765 hpi_init_message_response(&hm, &hr,
@@ -884,7 +783,7 @@ static void HPIMSGX__cleanup(u16 adapter_index, void *h_owner)
884 struct hpi_response hr; 783 struct hpi_response hr;
885 784
886 HPI_DEBUG_LOG(DEBUG, 785 HPI_DEBUG_LOG(DEBUG,
887 "close adapter %d istream %d\n", 786 "Close adapter %d istream %d\n",
888 adapter, i); 787 adapter, i);
889 788
890 hpi_init_message_response(&hm, &hr, 789 hpi_init_message_response(&hm, &hr,
diff --git a/sound/pci/asihpi/hpioctl.c b/sound/pci/asihpi/hpioctl.c
index 22dbd91811a4..cd624f13ff8e 100644
--- a/sound/pci/asihpi/hpioctl.c
+++ b/sound/pci/asihpi/hpioctl.c
@@ -30,6 +30,7 @@ Common Linux HPI ioctl and module probe/remove functions
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/moduleparam.h> 31#include <linux/moduleparam.h>
32#include <asm/uaccess.h> 32#include <asm/uaccess.h>
33#include <linux/pci.h>
33#include <linux/stringify.h> 34#include <linux/stringify.h>
34 35
35#ifdef MODULE_FIRMWARE 36#ifdef MODULE_FIRMWARE
@@ -45,7 +46,7 @@ MODULE_FIRMWARE("asihpi/dsp8900.bin");
45static int prealloc_stream_buf; 46static int prealloc_stream_buf;
46module_param(prealloc_stream_buf, int, S_IRUGO); 47module_param(prealloc_stream_buf, int, S_IRUGO);
47MODULE_PARM_DESC(prealloc_stream_buf, 48MODULE_PARM_DESC(prealloc_stream_buf,
48 "preallocate size for per-adapter stream buffer"); 49 "Preallocate size for per-adapter stream buffer");
49 50
50/* Allow the debug level to be changed after module load. 51/* Allow the debug level to be changed after module load.
51 E.g. echo 2 > /sys/module/asihpi/parameters/hpiDebugLevel 52 E.g. echo 2 > /sys/module/asihpi/parameters/hpiDebugLevel
@@ -121,8 +122,8 @@ long asihpi_hpi_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
121 phpi_ioctl_data = (struct hpi_ioctl_linux __user *)arg; 122 phpi_ioctl_data = (struct hpi_ioctl_linux __user *)arg;
122 123
123 /* Read the message and response pointers from user space. */ 124 /* Read the message and response pointers from user space. */
124 if (get_user(puhm, &phpi_ioctl_data->phm) || 125 if (get_user(puhm, &phpi_ioctl_data->phm)
125 get_user(puhr, &phpi_ioctl_data->phr)) { 126 || get_user(puhr, &phpi_ioctl_data->phr)) {
126 err = -EFAULT; 127 err = -EFAULT;
127 goto out; 128 goto out;
128 } 129 }
@@ -135,7 +136,7 @@ long asihpi_hpi_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
135 if (hm->h.size > sizeof(*hm)) 136 if (hm->h.size > sizeof(*hm))
136 hm->h.size = sizeof(*hm); 137 hm->h.size = sizeof(*hm);
137 138
138 /*printk(KERN_INFO "message size %d\n", hm->h.wSize); */ 139 /* printk(KERN_INFO "message size %d\n", hm->h.wSize); */
139 140
140 uncopied_bytes = copy_from_user(hm, puhm, hm->h.size); 141 uncopied_bytes = copy_from_user(hm, puhm, hm->h.size);
141 if (uncopied_bytes) { 142 if (uncopied_bytes) {
@@ -155,8 +156,13 @@ long asihpi_hpi_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
155 goto out; 156 goto out;
156 } 157 }
157 158
159 if (hm->h.adapter_index >= HPI_MAX_ADAPTERS) {
160 err = -EINVAL;
161 goto out;
162 }
163
158 pa = &adapters[hm->h.adapter_index]; 164 pa = &adapters[hm->h.adapter_index];
159 hr->h.size = 0; 165 hr->h.size = res_max_size;
160 if (hm->h.object == HPI_OBJ_SUBSYSTEM) { 166 if (hm->h.object == HPI_OBJ_SUBSYSTEM) {
161 switch (hm->h.function) { 167 switch (hm->h.function) {
162 case HPI_SUBSYS_CREATE_ADAPTER: 168 case HPI_SUBSYS_CREATE_ADAPTER:
@@ -216,7 +222,7 @@ long asihpi_hpi_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
216 */ 222 */
217 if (pa->buffer_size < size) { 223 if (pa->buffer_size < size) {
218 HPI_DEBUG_LOG(DEBUG, 224 HPI_DEBUG_LOG(DEBUG,
219 "realloc adapter %d stream " 225 "Realloc adapter %d stream "
220 "buffer from %zd to %d\n", 226 "buffer from %zd to %d\n",
221 hm->h.adapter_index, 227 hm->h.adapter_index,
222 pa->buffer_size, size); 228 pa->buffer_size, size);
@@ -259,7 +265,7 @@ long asihpi_hpi_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
259 copy_from_user(pa->p_buffer, ptr, size); 265 copy_from_user(pa->p_buffer, ptr, size);
260 if (uncopied_bytes) 266 if (uncopied_bytes)
261 HPI_DEBUG_LOG(WARNING, 267 HPI_DEBUG_LOG(WARNING,
262 "missed %d of %d " 268 "Missed %d of %d "
263 "bytes from user\n", uncopied_bytes, 269 "bytes from user\n", uncopied_bytes,
264 size); 270 size);
265 } 271 }
@@ -271,7 +277,7 @@ long asihpi_hpi_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
271 copy_to_user(ptr, pa->p_buffer, size); 277 copy_to_user(ptr, pa->p_buffer, size);
272 if (uncopied_bytes) 278 if (uncopied_bytes)
273 HPI_DEBUG_LOG(WARNING, 279 HPI_DEBUG_LOG(WARNING,
274 "missed %d of %d " "bytes to user\n", 280 "Missed %d of %d " "bytes to user\n",
275 uncopied_bytes, size); 281 uncopied_bytes, size);
276 } 282 }
277 283
@@ -290,9 +296,9 @@ long asihpi_hpi_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
290 if (hr->h.size > res_max_size) { 296 if (hr->h.size > res_max_size) {
291 HPI_DEBUG_LOG(ERROR, "response too big %d %d\n", hr->h.size, 297 HPI_DEBUG_LOG(ERROR, "response too big %d %d\n", hr->h.size,
292 res_max_size); 298 res_max_size);
293 /*HPI_DEBUG_MESSAGE(ERROR, hm); */ 299 hr->h.error = HPI_ERROR_RESPONSE_BUFFER_TOO_SMALL;
294 err = -EFAULT; 300 hr->h.specific_error = hr->h.size;
295 goto out; 301 hr->h.size = sizeof(hr->h);
296 } 302 }
297 303
298 uncopied_bytes = copy_to_user(puhr, hr, hr->h.size); 304 uncopied_bytes = copy_to_user(puhr, hr, hr->h.size);
@@ -320,18 +326,26 @@ int __devinit asihpi_adapter_probe(struct pci_dev *pci_dev,
320 326
321 memset(&adapter, 0, sizeof(adapter)); 327 memset(&adapter, 0, sizeof(adapter));
322 328
323 printk(KERN_DEBUG "probe PCI device (%04x:%04x,%04x:%04x,%04x)\n", 329 dev_printk(KERN_DEBUG, &pci_dev->dev,
324 pci_dev->vendor, pci_dev->device, pci_dev->subsystem_vendor, 330 "probe %04x:%04x,%04x:%04x,%04x\n", pci_dev->vendor,
331 pci_dev->device, pci_dev->subsystem_vendor,
325 pci_dev->subsystem_device, pci_dev->devfn); 332 pci_dev->subsystem_device, pci_dev->devfn);
326 333
334 if (pci_enable_device(pci_dev) < 0) {
335 dev_printk(KERN_ERR, &pci_dev->dev,
336 "pci_enable_device failed, disabling device\n");
337 return -EIO;
338 }
339
340 pci_set_master(pci_dev); /* also sets latency timer if < 16 */
341
327 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM, 342 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM,
328 HPI_SUBSYS_CREATE_ADAPTER); 343 HPI_SUBSYS_CREATE_ADAPTER);
329 hpi_init_response(&hr, HPI_OBJ_SUBSYSTEM, HPI_SUBSYS_CREATE_ADAPTER, 344 hpi_init_response(&hr, HPI_OBJ_SUBSYSTEM, HPI_SUBSYS_CREATE_ADAPTER,
330 HPI_ERROR_PROCESSING_MESSAGE); 345 HPI_ERROR_PROCESSING_MESSAGE);
331 346
332 hm.adapter_index = -1; /* an invalid index */ 347 hm.adapter_index = HPI_ADAPTER_INDEX_INVALID;
333 348
334 /* fill in HPI_PCI information from kernel provided information */
335 adapter.pci = pci_dev; 349 adapter.pci = pci_dev;
336 350
337 nm = HPI_MAX_ADAPTER_MEM_SPACES; 351 nm = HPI_MAX_ADAPTER_MEM_SPACES;
@@ -359,19 +373,7 @@ int __devinit asihpi_adapter_probe(struct pci_dev *pci_dev,
359 pci.ap_mem_base[idx] = adapter.ap_remapped_mem_base[idx]; 373 pci.ap_mem_base[idx] = adapter.ap_remapped_mem_base[idx];
360 } 374 }
361 375
362 /* could replace Pci with direct pointer to pci_dev for linux 376 pci.pci_dev = pci_dev;
363 Instead wrap accessor functions for IDs etc.
364 Would it work for windows?
365 */
366 pci.bus_number = pci_dev->bus->number;
367 pci.vendor_id = (u16)pci_dev->vendor;
368 pci.device_id = (u16)pci_dev->device;
369 pci.subsys_vendor_id = (u16)(pci_dev->subsystem_vendor & 0xffff);
370 pci.subsys_device_id = (u16)(pci_dev->subsystem_device & 0xffff);
371 pci.device_number = pci_dev->devfn;
372 pci.interrupt = pci_dev->irq;
373 pci.p_os_data = pci_dev;
374
375 hm.u.s.resource.bus_type = HPI_BUS_PCI; 377 hm.u.s.resource.bus_type = HPI_BUS_PCI;
376 hm.u.s.resource.r.pci = &pci; 378 hm.u.s.resource.r.pci = &pci;
377 379
@@ -392,10 +394,10 @@ int __devinit asihpi_adapter_probe(struct pci_dev *pci_dev,
392 } 394 }
393 395
394 adapter.index = hr.u.s.adapter_index; 396 adapter.index = hr.u.s.adapter_index;
395 adapter.type = hr.u.s.aw_adapter_list[adapter.index]; 397 adapter.type = hr.u.s.adapter_type;
396 hm.adapter_index = adapter.index; 398 hm.adapter_index = adapter.index;
397 399
398 err = hpi_adapter_open(NULL, adapter.index); 400 err = hpi_adapter_open(adapter.index);
399 if (err) 401 if (err)
400 goto err; 402 goto err;
401 403
@@ -407,8 +409,9 @@ int __devinit asihpi_adapter_probe(struct pci_dev *pci_dev,
407 mutex_init(&adapters[adapter.index].mutex); 409 mutex_init(&adapters[adapter.index].mutex);
408 pci_set_drvdata(pci_dev, &adapters[adapter.index]); 410 pci_set_drvdata(pci_dev, &adapters[adapter.index]);
409 411
410 printk(KERN_INFO "probe found adapter ASI%04X HPI index #%d.\n", 412 dev_printk(KERN_INFO, &pci_dev->dev,
411 adapter.type, adapter.index); 413 "probe succeeded for ASI%04X HPI index %d\n", adapter.type,
414 adapter.index);
412 415
413 return 0; 416 return 0;
414 417
@@ -439,7 +442,8 @@ void __devexit asihpi_adapter_remove(struct pci_dev *pci_dev)
439 442
440 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM, 443 hpi_init_message_response(&hm, &hr, HPI_OBJ_SUBSYSTEM,
441 HPI_SUBSYS_DELETE_ADAPTER); 444 HPI_SUBSYS_DELETE_ADAPTER);
442 hm.adapter_index = pa->index; 445 hm.obj_index = pa->index;
446 hm.adapter_index = HPI_ADAPTER_INDEX_INVALID;
443 hpi_send_recv_ex(&hm, &hr, HOWNER_KERNEL); 447 hpi_send_recv_ex(&hm, &hr, HOWNER_KERNEL);
444 448
445 /* unmap PCI memory space, mapped during device init. */ 449 /* unmap PCI memory space, mapped during device init. */
@@ -450,20 +454,18 @@ void __devexit asihpi_adapter_remove(struct pci_dev *pci_dev)
450 } 454 }
451 } 455 }
452 456
453 if (pa->p_buffer) { 457 if (pa->p_buffer)
454 pa->buffer_size = 0;
455 vfree(pa->p_buffer); 458 vfree(pa->p_buffer);
456 }
457 459
458 pci_set_drvdata(pci_dev, NULL); 460 pci_set_drvdata(pci_dev, NULL);
459 /* 461 if (1)
460 printk(KERN_INFO "PCI device (%04x:%04x,%04x:%04x,%04x)," 462 dev_printk(KERN_INFO, &pci_dev->dev,
461 " HPI index # %d, removed.\n", 463 "remove %04x:%04x,%04x:%04x,%04x," " HPI index %d.\n",
462 pci_dev->vendor, pci_dev->device, 464 pci_dev->vendor, pci_dev->device,
463 pci_dev->subsystem_vendor, 465 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
464 pci_dev->subsystem_device, pci_dev->devfn, 466 pci_dev->devfn, pa->index);
465 pa->index); 467
466 */ 468 memset(pa, 0, sizeof(*pa));
467} 469}
468 470
469void __init asihpi_init(void) 471void __init asihpi_init(void)
diff --git a/sound/pci/asihpi/hpios.h b/sound/pci/asihpi/hpios.h
index 370f39b43f85..03273e729f99 100644
--- a/sound/pci/asihpi/hpios.h
+++ b/sound/pci/asihpi/hpios.h
@@ -27,9 +27,7 @@ HPI Operating System Specific macros for Linux Kernel driver
27#define HPI_OS_LINUX_KERNEL 27#define HPI_OS_LINUX_KERNEL
28 28
29#define HPI_OS_DEFINED 29#define HPI_OS_DEFINED
30#define HPI_KERNEL_MODE 30#define HPI_BUILD_KERNEL_MODE
31
32#define HPI_REASSIGN_DUPLICATE_ADAPTER_IDX
33 31
34#include <linux/io.h> 32#include <linux/io.h>
35#include <asm/system.h> 33#include <asm/system.h>
@@ -135,20 +133,20 @@ static inline void cond_unlock(struct hpios_spinlock *l)
135 133
136#define hpios_msgxlock_init(obj) spin_lock_init(&(obj)->lock) 134#define hpios_msgxlock_init(obj) spin_lock_init(&(obj)->lock)
137#define hpios_msgxlock_lock(obj) cond_lock(obj) 135#define hpios_msgxlock_lock(obj) cond_lock(obj)
138#define hpios_msgxlock_un_lock(obj) cond_unlock(obj) 136#define hpios_msgxlock_unlock(obj) cond_unlock(obj)
139 137
140#define hpios_dsplock_init(obj) spin_lock_init(&(obj)->dsp_lock.lock) 138#define hpios_dsplock_init(obj) spin_lock_init(&(obj)->dsp_lock.lock)
141#define hpios_dsplock_lock(obj) cond_lock(&(obj)->dsp_lock) 139#define hpios_dsplock_lock(obj) cond_lock(&(obj)->dsp_lock)
142#define hpios_dsplock_unlock(obj) cond_unlock(&(obj)->dsp_lock) 140#define hpios_dsplock_unlock(obj) cond_unlock(&(obj)->dsp_lock)
143 141
144#ifdef CONFIG_SND_DEBUG 142#ifdef CONFIG_SND_DEBUG
145#define HPI_DEBUG 143#define HPI_BUILD_DEBUG
146#endif 144#endif
147 145
148#define HPI_ALIST_LOCKING 146#define HPI_ALIST_LOCKING
149#define hpios_alistlock_init(obj) spin_lock_init(&((obj)->list_lock.lock)) 147#define hpios_alistlock_init(obj) spin_lock_init(&((obj)->list_lock.lock))
150#define hpios_alistlock_lock(obj) spin_lock(&((obj)->list_lock.lock)) 148#define hpios_alistlock_lock(obj) spin_lock(&((obj)->list_lock.lock))
151#define hpios_alistlock_un_lock(obj) spin_unlock(&((obj)->list_lock.lock)) 149#define hpios_alistlock_unlock(obj) spin_unlock(&((obj)->list_lock.lock))
152 150
153struct hpi_adapter { 151struct hpi_adapter {
154 /* mutex prevents contention for one card 152 /* mutex prevents contention for one card
diff --git a/sound/pci/atiixp.c b/sound/pci/atiixp.c
index 49d572a7b235..3119cd97a217 100644
--- a/sound/pci/atiixp.c
+++ b/sound/pci/atiixp.c
@@ -522,7 +522,7 @@ static int snd_atiixp_aclink_reset(struct atiixp *chip)
522 atiixp_read(chip, CMD); 522 atiixp_read(chip, CMD);
523 mdelay(1); 523 mdelay(1);
524 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); 524 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
525 if (--timeout) { 525 if (!--timeout) {
526 snd_printk(KERN_ERR "atiixp: codec reset timeout\n"); 526 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
527 break; 527 break;
528 } 528 }
diff --git a/sound/pci/atiixp_modem.c b/sound/pci/atiixp_modem.c
index 91d7036b6411..2f74c2fdf1ea 100644
--- a/sound/pci/atiixp_modem.c
+++ b/sound/pci/atiixp_modem.c
@@ -498,7 +498,7 @@ static int snd_atiixp_aclink_reset(struct atiixp_modem *chip)
498 atiixp_read(chip, CMD); 498 atiixp_read(chip, CMD);
499 msleep(1); 499 msleep(1);
500 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); 500 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
501 if (--timeout) { 501 if (!--timeout) {
502 snd_printk(KERN_ERR "atiixp-modem: codec reset timeout\n"); 502 snd_printk(KERN_ERR "atiixp-modem: codec reset timeout\n");
503 break; 503 break;
504 } 504 }
diff --git a/sound/pci/au88x0/au88x0_eq.c b/sound/pci/au88x0/au88x0_eq.c
index 38602b85874d..278ed8189fca 100644
--- a/sound/pci/au88x0/au88x0_eq.c
+++ b/sound/pci/au88x0/au88x0_eq.c
@@ -896,7 +896,8 @@ static int __devinit vortex_eq_init(vortex_t * vortex)
896 if ((kcontrol = 896 if ((kcontrol =
897 snd_ctl_new1(&vortex_eq_kcontrol, vortex)) == NULL) 897 snd_ctl_new1(&vortex_eq_kcontrol, vortex)) == NULL)
898 return -ENOMEM; 898 return -ENOMEM;
899 strcpy(kcontrol->id.name, EqBandLabels[i]); 899 snprintf(kcontrol->id.name, sizeof(kcontrol->id.name),
900 "%s Playback Volume", EqBandLabels[i]);
900 kcontrol->private_value = i; 901 kcontrol->private_value = i;
901 if ((err = snd_ctl_add(vortex->card, kcontrol)) < 0) 902 if ((err = snd_ctl_add(vortex->card, kcontrol)) < 0)
902 return err; 903 return err;
diff --git a/sound/pci/azt3328.c b/sound/pci/azt3328.c
index 573594bf3225..5715c4d05573 100644
--- a/sound/pci/azt3328.c
+++ b/sound/pci/azt3328.c
@@ -1,6 +1,5 @@
1/* 1/* azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
2 * azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168). 2 * Copyright (C) 2002, 2005 - 2011 by Andreas Mohr <andi AT lisas.de>
3 * Copyright (C) 2002, 2005 - 2010 by Andreas Mohr <andi AT lisas.de>
4 * 3 *
5 * Framework borrowed from Bart Hartgers's als4000.c. 4 * Framework borrowed from Bart Hartgers's als4000.c.
6 * Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801), 5 * Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
@@ -66,6 +65,13 @@
66 * addresses illegally. So far unfortunately it looks like the very flexible 65 * addresses illegally. So far unfortunately it looks like the very flexible
67 * ALSA AC97 support is still not enough to easily compensate for such a 66 * ALSA AC97 support is still not enough to easily compensate for such a
68 * grave layout violation despite all tweaks and quirks mechanisms it offers. 67 * grave layout violation despite all tweaks and quirks mechanisms it offers.
68 * Well, not quite: now ac97 layer is much improved (bus-specific ops!),
69 * thus I was able to implement support - it's actually working quite well.
70 * An interesting item might be Aztech AMR 2800-W, since it's an AC97
71 * modem card which might reveal the Aztech-specific codec ID which
72 * we might want to pretend, too. Dito PCI168's brother, PCI368,
73 * where the advertising datasheet says it's AC97-based and has a
74 * Digital Enhanced Game Port.
69 * - builtin genuine OPL3 - verified to work fine, 20080506 75 * - builtin genuine OPL3 - verified to work fine, 20080506
70 * - full duplex 16bit playback/record at independent sampling rate 76 * - full duplex 16bit playback/record at independent sampling rate
71 * - MPU401 (+ legacy address support, claimed by one official spec sheet) 77 * - MPU401 (+ legacy address support, claimed by one official spec sheet)
@@ -189,6 +195,16 @@
189#include <sound/mpu401.h> 195#include <sound/mpu401.h>
190#include <sound/opl3.h> 196#include <sound/opl3.h>
191#include <sound/initval.h> 197#include <sound/initval.h>
198/*
199 * Config switch, to use ALSA's AC97 layer instead of old custom mixer crap.
200 * If the AC97 compatibility parts we needed to implement locally turn out
201 * to work nicely, then remove the old implementation eventually.
202 */
203#define AZF_USE_AC97_LAYER 1
204
205#ifdef AZF_USE_AC97_LAYER
206#include <sound/ac97_codec.h>
207#endif
192#include "azt3328.h" 208#include "azt3328.h"
193 209
194MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>"); 210MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>");
@@ -328,6 +344,10 @@ struct snd_azf3328 {
328 /* playback, recording and I2S out codecs */ 344 /* playback, recording and I2S out codecs */
329 struct snd_azf3328_codec_data codecs[3]; 345 struct snd_azf3328_codec_data codecs[3];
330 346
347#ifdef AZF_USE_AC97_LAYER
348 struct snd_ac97 *ac97;
349#endif
350
331 struct snd_card *card; 351 struct snd_card *card;
332 struct snd_rawmidi *rmidi; 352 struct snd_rawmidi *rmidi;
333 353
@@ -506,7 +526,7 @@ snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, unsigned reg)
506#define AZF_MUTE_BIT 0x80 526#define AZF_MUTE_BIT 0x80
507 527
508static bool 528static bool
509snd_azf3328_mixer_set_mute(const struct snd_azf3328 *chip, 529snd_azf3328_mixer_mute_control(const struct snd_azf3328 *chip,
510 unsigned reg, bool do_mute 530 unsigned reg, bool do_mute
511) 531)
512{ 532{
@@ -521,6 +541,323 @@ snd_azf3328_mixer_set_mute(const struct snd_azf3328 *chip,
521 return (do_mute) ? !updated : updated; 541 return (do_mute) ? !updated : updated;
522} 542}
523 543
544static inline bool
545snd_azf3328_mixer_mute_control_master(const struct snd_azf3328 *chip,
546 bool do_mute
547)
548{
549 return snd_azf3328_mixer_mute_control(
550 chip,
551 IDX_MIXER_PLAY_MASTER,
552 do_mute
553 );
554}
555
556static inline bool
557snd_azf3328_mixer_mute_control_pcm(const struct snd_azf3328 *chip,
558 bool do_mute
559)
560{
561 return snd_azf3328_mixer_mute_control(
562 chip,
563 IDX_MIXER_WAVEOUT,
564 do_mute
565 );
566}
567
568static inline void
569snd_azf3328_mixer_reset(const struct snd_azf3328 *chip)
570{
571 /* reset (close) mixer:
572 * first mute master volume, then reset
573 */
574 snd_azf3328_mixer_mute_control_master(chip, 1);
575 snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
576}
577
578#ifdef AZF_USE_AC97_LAYER
579
580static inline void
581snd_azf3328_mixer_ac97_map_unsupported(unsigned short reg, const char *mode)
582{
583 /* need to add some more or less clever emulation? */
584 printk(KERN_WARNING
585 "azt3328: missing %s emulation for AC97 register 0x%02x!\n",
586 mode, reg);
587}
588
589/*
590 * Need to have _special_ AC97 mixer hardware register index mapper,
591 * to compensate for the issue of a rather AC97-incompatible hardware layout.
592 */
593#define AZF_REG_MASK 0x3f
594#define AZF_AC97_REG_UNSUPPORTED 0x8000
595#define AZF_AC97_REG_REAL_IO_READ 0x4000
596#define AZF_AC97_REG_REAL_IO_WRITE 0x2000
597#define AZF_AC97_REG_REAL_IO_RW \
598 (AZF_AC97_REG_REAL_IO_READ | AZF_AC97_REG_REAL_IO_WRITE)
599#define AZF_AC97_REG_EMU_IO_READ 0x0400
600#define AZF_AC97_REG_EMU_IO_WRITE 0x0200
601#define AZF_AC97_REG_EMU_IO_RW \
602 (AZF_AC97_REG_EMU_IO_READ | AZF_AC97_REG_EMU_IO_WRITE)
603static unsigned short
604snd_azf3328_mixer_ac97_map_reg_idx(unsigned short reg)
605{
606 static const struct {
607 unsigned short azf_reg;
608 } azf_reg_mapper[] = {
609 /* Especially when taking into consideration
610 * mono/stereo-based sequence of azf vs. AC97 control series,
611 * it's quite obvious that azf simply got rid
612 * of the AC97_HEADPHONE control at its intended offset,
613 * thus shifted _all_ controls by one,
614 * and _then_ simply added it as an FMSYNTH control at the end,
615 * to make up for the offset.
616 * This means we'll have to translate indices here as
617 * needed and then do some tiny AC97 patch action
618 * (snd_ac97_rename_vol_ctl() etc.) - that's it.
619 */
620 { /* AC97_RESET */ IDX_MIXER_RESET
621 | AZF_AC97_REG_REAL_IO_WRITE
622 | AZF_AC97_REG_EMU_IO_READ },
623 { /* AC97_MASTER */ IDX_MIXER_PLAY_MASTER },
624 /* note large shift: AC97_HEADPHONE to IDX_MIXER_FMSYNTH! */
625 { /* AC97_HEADPHONE */ IDX_MIXER_FMSYNTH },
626 { /* AC97_MASTER_MONO */ IDX_MIXER_MODEMOUT },
627 { /* AC97_MASTER_TONE */ IDX_MIXER_BASSTREBLE },
628 { /* AC97_PC_BEEP */ IDX_MIXER_PCBEEP },
629 { /* AC97_PHONE */ IDX_MIXER_MODEMIN },
630 { /* AC97_MIC */ IDX_MIXER_MIC },
631 { /* AC97_LINE */ IDX_MIXER_LINEIN },
632 { /* AC97_CD */ IDX_MIXER_CDAUDIO },
633 { /* AC97_VIDEO */ IDX_MIXER_VIDEO },
634 { /* AC97_AUX */ IDX_MIXER_AUX },
635 { /* AC97_PCM */ IDX_MIXER_WAVEOUT },
636 { /* AC97_REC_SEL */ IDX_MIXER_REC_SELECT },
637 { /* AC97_REC_GAIN */ IDX_MIXER_REC_VOLUME },
638 { /* AC97_REC_GAIN_MIC */ AZF_AC97_REG_EMU_IO_RW },
639 { /* AC97_GENERAL_PURPOSE */ IDX_MIXER_ADVCTL2 },
640 { /* AC97_3D_CONTROL */ IDX_MIXER_ADVCTL1 },
641 };
642
643 unsigned short reg_azf = AZF_AC97_REG_UNSUPPORTED;
644
645 /* azf3328 supports the low-numbered and low-spec:ed range
646 of AC97 regs only */
647 if (reg <= AC97_3D_CONTROL) {
648 unsigned short reg_idx = reg / 2;
649 reg_azf = azf_reg_mapper[reg_idx].azf_reg;
650 /* a translation-only entry means it's real read/write: */
651 if (!(reg_azf & ~AZF_REG_MASK))
652 reg_azf |= AZF_AC97_REG_REAL_IO_RW;
653 } else {
654 switch (reg) {
655 case AC97_POWERDOWN:
656 reg_azf = AZF_AC97_REG_EMU_IO_RW;
657 break;
658 case AC97_EXTENDED_ID:
659 reg_azf = AZF_AC97_REG_EMU_IO_READ;
660 break;
661 case AC97_EXTENDED_STATUS:
662 /* I don't know what the h*ll AC97 layer
663 * would consult this _extended_ register for
664 * given a base-AC97-advertised card,
665 * but let's just emulate it anyway :-P
666 */
667 reg_azf = AZF_AC97_REG_EMU_IO_RW;
668 break;
669 case AC97_VENDOR_ID1:
670 case AC97_VENDOR_ID2:
671 reg_azf = AZF_AC97_REG_EMU_IO_READ;
672 break;
673 }
674 }
675 return reg_azf;
676}
677
678static const unsigned short
679azf_emulated_ac97_caps =
680 AC97_BC_DEDICATED_MIC |
681 AC97_BC_BASS_TREBLE |
682 /* Headphone is an FM Synth control here */
683 AC97_BC_HEADPHONE |
684 /* no AC97_BC_LOUDNESS! */
685 /* mask 0x7c00 is
686 vendor-specific 3D enhancement
687 vendor indicator.
688 Since there actually _is_ an
689 entry for Aztech Labs
690 (13), make damn sure
691 to indicate it. */
692 (13 << 10);
693
694static const unsigned short
695azf_emulated_ac97_powerdown =
696 /* pretend everything to be active */
697 AC97_PD_ADC_STATUS |
698 AC97_PD_DAC_STATUS |
699 AC97_PD_MIXER_STATUS |
700 AC97_PD_VREF_STATUS;
701
702/*
703 * Emulated, _inofficial_ vendor ID
704 * (there might be some devices such as the MR 2800-W
705 * which could reveal the real Aztech AC97 ID).
706 * We choose to use "AZT" prefix, and then use 1 to indicate PCI168
707 * (better don't use 0x68 since there's a PCI368 as well).
708 */
709static const unsigned int
710azf_emulated_ac97_vendor_id = 0x415a5401;
711
712static unsigned short
713snd_azf3328_mixer_ac97_read(struct snd_ac97 *ac97, unsigned short reg_ac97)
714{
715 const struct snd_azf3328 *chip = ac97->private_data;
716 unsigned short reg_azf = snd_azf3328_mixer_ac97_map_reg_idx(reg_ac97);
717 unsigned short reg_val = 0;
718 bool unsupported = 0;
719
720 snd_azf3328_dbgmixer(
721 "snd_azf3328_mixer_ac97_read reg_ac97 %u\n",
722 reg_ac97
723 );
724 if (reg_azf & AZF_AC97_REG_UNSUPPORTED)
725 unsupported = 1;
726 else {
727 if (reg_azf & AZF_AC97_REG_REAL_IO_READ)
728 reg_val = snd_azf3328_mixer_inw(chip,
729 reg_azf & AZF_REG_MASK);
730 else {
731 /*
732 * Proceed with dummy I/O read,
733 * to ensure compatible timing where this may matter.
734 * (ALSA AC97 layer usually doesn't call I/O functions
735 * due to intelligent I/O caching anyway)
736 * Choose a mixer register that's thoroughly unrelated
737 * to common audio (try to minimize distortion).
738 */
739 snd_azf3328_mixer_inw(chip, IDX_MIXER_SOMETHING30H);
740 }
741
742 if (reg_azf & AZF_AC97_REG_EMU_IO_READ) {
743 switch (reg_ac97) {
744 case AC97_RESET:
745 reg_val |= azf_emulated_ac97_caps;
746 break;
747 case AC97_POWERDOWN:
748 reg_val |= azf_emulated_ac97_powerdown;
749 break;
750 case AC97_EXTENDED_ID:
751 case AC97_EXTENDED_STATUS:
752 /* AFAICS we simply can't support anything: */
753 reg_val |= 0;
754 break;
755 case AC97_VENDOR_ID1:
756 reg_val = azf_emulated_ac97_vendor_id >> 16;
757 break;
758 case AC97_VENDOR_ID2:
759 reg_val = azf_emulated_ac97_vendor_id & 0xffff;
760 break;
761 default:
762 unsupported = 1;
763 break;
764 }
765 }
766 }
767 if (unsupported)
768 snd_azf3328_mixer_ac97_map_unsupported(reg_ac97, "read");
769
770 return reg_val;
771}
772
773static void
774snd_azf3328_mixer_ac97_write(struct snd_ac97 *ac97,
775 unsigned short reg_ac97, unsigned short val)
776{
777 const struct snd_azf3328 *chip = ac97->private_data;
778 unsigned short reg_azf = snd_azf3328_mixer_ac97_map_reg_idx(reg_ac97);
779 bool unsupported = 0;
780
781 snd_azf3328_dbgmixer(
782 "snd_azf3328_mixer_ac97_write reg_ac97 %u val %u\n",
783 reg_ac97, val
784 );
785 if (reg_azf & AZF_AC97_REG_UNSUPPORTED)
786 unsupported = 1;
787 else {
788 if (reg_azf & AZF_AC97_REG_REAL_IO_WRITE)
789 snd_azf3328_mixer_outw(
790 chip,
791 reg_azf & AZF_REG_MASK,
792 val
793 );
794 else
795 if (reg_azf & AZF_AC97_REG_EMU_IO_WRITE) {
796 switch (reg_ac97) {
797 case AC97_REC_GAIN_MIC:
798 case AC97_POWERDOWN:
799 case AC97_EXTENDED_STATUS:
800 /*
801 * Silently swallow these writes.
802 * Since for most registers our card doesn't
803 * actually support a comparable feature,
804 * this is exactly what we should do here.
805 * The AC97 layer's I/O caching probably
806 * automatically takes care of all the rest...
807 * (remembers written values etc.)
808 */
809 break;
810 default:
811 unsupported = 1;
812 break;
813 }
814 }
815 }
816 if (unsupported)
817 snd_azf3328_mixer_ac97_map_unsupported(reg_ac97, "write");
818}
819
820static int __devinit
821snd_azf3328_mixer_new(struct snd_azf3328 *chip)
822{
823 struct snd_ac97_bus *bus;
824 struct snd_ac97_template ac97;
825 static struct snd_ac97_bus_ops ops = {
826 .write = snd_azf3328_mixer_ac97_write,
827 .read = snd_azf3328_mixer_ac97_read,
828 };
829 int rc;
830
831 memset(&ac97, 0, sizeof(ac97));
832 ac97.scaps = AC97_SCAP_SKIP_MODEM
833 | AC97_SCAP_AUDIO /* we support audio! */
834 | AC97_SCAP_NO_SPDIF;
835 ac97.private_data = chip;
836 ac97.pci = chip->pci;
837
838 /*
839 * ALSA's AC97 layer has terrible init crackling issues,
840 * unfortunately, and since it makes use of AC97_RESET,
841 * there's no use trying to mute Master Playback proactively.
842 */
843
844 rc = snd_ac97_bus(chip->card, 0, &ops, NULL, &bus);
845 if (!rc)
846 rc = snd_ac97_mixer(bus, &ac97, &chip->ac97);
847 /*
848 * Make sure to complain loudly in case of AC97 init failure,
849 * since failure may happen quite often,
850 * due to this card being a very quirky AC97 "lookalike".
851 */
852 if (rc)
853 printk(KERN_ERR "azt3328: AC97 init failed, err %d!\n", rc);
854
855 /* If we return an error here, then snd_card_free() should
856 * free up any ac97 codecs that got created, as well as the bus.
857 */
858 return rc;
859}
860#else /* AZF_USE_AC97_LAYER */
524static void 861static void
525snd_azf3328_mixer_write_volume_gradually(const struct snd_azf3328 *chip, 862snd_azf3328_mixer_write_volume_gradually(const struct snd_azf3328 *chip,
526 unsigned reg, 863 unsigned reg,
@@ -945,6 +1282,7 @@ snd_azf3328_mixer_new(struct snd_azf3328 *chip)
945 snd_azf3328_dbgcallleave(); 1282 snd_azf3328_dbgcallleave();
946 return 0; 1283 return 0;
947} 1284}
1285#endif /* AZF_USE_AC97_LAYER */
948 1286
949static int 1287static int
950snd_azf3328_hw_params(struct snd_pcm_substream *substream, 1288snd_azf3328_hw_params(struct snd_pcm_substream *substream,
@@ -1233,8 +1571,8 @@ snd_azf3328_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1233 if (is_main_mixer_playback_codec) { 1571 if (is_main_mixer_playback_codec) {
1234 /* mute WaveOut (avoid clicking during setup) */ 1572 /* mute WaveOut (avoid clicking during setup) */
1235 previously_muted = 1573 previously_muted =
1236 snd_azf3328_mixer_set_mute( 1574 snd_azf3328_mixer_mute_control_pcm(
1237 chip, IDX_MIXER_WAVEOUT, 1 1575 chip, 1
1238 ); 1576 );
1239 } 1577 }
1240 1578
@@ -1290,8 +1628,8 @@ snd_azf3328_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1290 if (is_main_mixer_playback_codec) { 1628 if (is_main_mixer_playback_codec) {
1291 /* now unmute WaveOut */ 1629 /* now unmute WaveOut */
1292 if (!previously_muted) 1630 if (!previously_muted)
1293 snd_azf3328_mixer_set_mute( 1631 snd_azf3328_mixer_mute_control_pcm(
1294 chip, IDX_MIXER_WAVEOUT, 0 1632 chip, 0
1295 ); 1633 );
1296 } 1634 }
1297 1635
@@ -1315,8 +1653,8 @@ snd_azf3328_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1315 if (is_main_mixer_playback_codec) { 1653 if (is_main_mixer_playback_codec) {
1316 /* mute WaveOut (avoid clicking during setup) */ 1654 /* mute WaveOut (avoid clicking during setup) */
1317 previously_muted = 1655 previously_muted =
1318 snd_azf3328_mixer_set_mute( 1656 snd_azf3328_mixer_mute_control_pcm(
1319 chip, IDX_MIXER_WAVEOUT, 1 1657 chip, 1
1320 ); 1658 );
1321 } 1659 }
1322 1660
@@ -1341,8 +1679,8 @@ snd_azf3328_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1341 if (is_main_mixer_playback_codec) { 1679 if (is_main_mixer_playback_codec) {
1342 /* now unmute WaveOut */ 1680 /* now unmute WaveOut */
1343 if (!previously_muted) 1681 if (!previously_muted)
1344 snd_azf3328_mixer_set_mute( 1682 snd_azf3328_mixer_mute_control_pcm(
1345 chip, IDX_MIXER_WAVEOUT, 0 1683 chip, 0
1346 ); 1684 );
1347 } 1685 }
1348 1686
@@ -2050,11 +2388,7 @@ snd_azf3328_free(struct snd_azf3328 *chip)
2050 if (chip->irq < 0) 2388 if (chip->irq < 0)
2051 goto __end_hw; 2389 goto __end_hw;
2052 2390
2053 /* reset (close) mixer: 2391 snd_azf3328_mixer_reset(chip);
2054 * first mute master volume, then reset
2055 */
2056 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1);
2057 snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
2058 2392
2059 snd_azf3328_timer_stop(chip->timer); 2393 snd_azf3328_timer_stop(chip->timer);
2060 snd_azf3328_gameport_free(chip); 2394 snd_azf3328_gameport_free(chip);
@@ -2407,6 +2741,55 @@ snd_azf3328_suspend_regs(unsigned long io_addr, unsigned count, u32 *saved_regs)
2407 } 2741 }
2408} 2742}
2409 2743
2744static inline void
2745snd_azf3328_resume_regs(const u32 *saved_regs,
2746 unsigned long io_addr,
2747 unsigned count
2748)
2749{
2750 unsigned reg;
2751
2752 for (reg = 0; reg < count; ++reg) {
2753 outl(*saved_regs, io_addr);
2754 snd_azf3328_dbgpm("resume: io 0x%04lx: 0x%08x --> 0x%08x\n",
2755 io_addr, *saved_regs, inl(io_addr));
2756 ++saved_regs;
2757 io_addr += sizeof(*saved_regs);
2758 }
2759}
2760
2761static inline void
2762snd_azf3328_suspend_ac97(struct snd_azf3328 *chip)
2763{
2764#ifdef AZF_USE_AC97_LAYER
2765 snd_ac97_suspend(chip->ac97);
2766#else
2767 snd_azf3328_suspend_regs(chip->mixer_io,
2768 ARRAY_SIZE(chip->saved_regs_mixer), chip->saved_regs_mixer);
2769
2770 /* make sure to disable master volume etc. to prevent looping sound */
2771 snd_azf3328_mixer_mute_control_master(chip, 1);
2772 snd_azf3328_mixer_mute_control_pcm(chip, 1);
2773#endif /* AZF_USE_AC97_LAYER */
2774}
2775
2776static inline void
2777snd_azf3328_resume_ac97(const struct snd_azf3328 *chip)
2778{
2779#ifdef AZF_USE_AC97_LAYER
2780 snd_ac97_resume(chip->ac97);
2781#else
2782 snd_azf3328_resume_regs(chip->saved_regs_mixer, chip->mixer_io,
2783 ARRAY_SIZE(chip->saved_regs_mixer));
2784
2785 /* unfortunately with 32bit transfers, IDX_MIXER_PLAY_MASTER (0x02)
2786 and IDX_MIXER_RESET (offset 0x00) get touched at the same time,
2787 resulting in a mixer reset condition persisting until _after_
2788 master vol was restored. Thus master vol needs an extra restore. */
2789 outw(((u16 *)chip->saved_regs_mixer)[1], chip->mixer_io + 2);
2790#endif /* AZF_USE_AC97_LAYER */
2791}
2792
2410static int 2793static int
2411snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state) 2794snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state)
2412{ 2795{
@@ -2420,12 +2803,7 @@ snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state)
2420 snd_pcm_suspend_all(chip->pcm[AZF_CODEC_PLAYBACK]); 2803 snd_pcm_suspend_all(chip->pcm[AZF_CODEC_PLAYBACK]);
2421 snd_pcm_suspend_all(chip->pcm[AZF_CODEC_I2S_OUT]); 2804 snd_pcm_suspend_all(chip->pcm[AZF_CODEC_I2S_OUT]);
2422 2805
2423 snd_azf3328_suspend_regs(chip->mixer_io, 2806 snd_azf3328_suspend_ac97(chip);
2424 ARRAY_SIZE(chip->saved_regs_mixer), chip->saved_regs_mixer);
2425
2426 /* make sure to disable master volume etc. to prevent looping sound */
2427 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1);
2428 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
2429 2807
2430 snd_azf3328_suspend_regs(chip->ctrl_io, 2808 snd_azf3328_suspend_regs(chip->ctrl_io,
2431 ARRAY_SIZE(chip->saved_regs_ctrl), chip->saved_regs_ctrl); 2809 ARRAY_SIZE(chip->saved_regs_ctrl), chip->saved_regs_ctrl);
@@ -2447,23 +2825,6 @@ snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state)
2447 return 0; 2825 return 0;
2448} 2826}
2449 2827
2450static inline void
2451snd_azf3328_resume_regs(const u32 *saved_regs,
2452 unsigned long io_addr,
2453 unsigned count
2454)
2455{
2456 unsigned reg;
2457
2458 for (reg = 0; reg < count; ++reg) {
2459 outl(*saved_regs, io_addr);
2460 snd_azf3328_dbgpm("resume: io 0x%04lx: 0x%08x --> 0x%08x\n",
2461 io_addr, *saved_regs, inl(io_addr));
2462 ++saved_regs;
2463 io_addr += sizeof(*saved_regs);
2464 }
2465}
2466
2467static int 2828static int
2468snd_azf3328_resume(struct pci_dev *pci) 2829snd_azf3328_resume(struct pci_dev *pci)
2469{ 2830{
@@ -2487,14 +2848,7 @@ snd_azf3328_resume(struct pci_dev *pci)
2487 snd_azf3328_resume_regs(chip->saved_regs_opl3, chip->opl3_io, 2848 snd_azf3328_resume_regs(chip->saved_regs_opl3, chip->opl3_io,
2488 ARRAY_SIZE(chip->saved_regs_opl3)); 2849 ARRAY_SIZE(chip->saved_regs_opl3));
2489 2850
2490 snd_azf3328_resume_regs(chip->saved_regs_mixer, chip->mixer_io, 2851 snd_azf3328_resume_ac97(chip);
2491 ARRAY_SIZE(chip->saved_regs_mixer));
2492
2493 /* unfortunately with 32bit transfers, IDX_MIXER_PLAY_MASTER (0x02)
2494 and IDX_MIXER_RESET (offset 0x00) get touched at the same time,
2495 resulting in a mixer reset condition persisting until _after_
2496 master vol was restored. Thus master vol needs an extra restore. */
2497 outw(((u16 *)chip->saved_regs_mixer)[1], chip->mixer_io + 2);
2498 2852
2499 snd_azf3328_resume_regs(chip->saved_regs_ctrl, chip->ctrl_io, 2853 snd_azf3328_resume_regs(chip->saved_regs_ctrl, chip->ctrl_io,
2500 ARRAY_SIZE(chip->saved_regs_ctrl)); 2854 ARRAY_SIZE(chip->saved_regs_ctrl));
diff --git a/sound/pci/ctxfi/ctatc.c b/sound/pci/ctxfi/ctatc.c
index 1bff80cde0a2..b9321544c31c 100644
--- a/sound/pci/ctxfi/ctatc.c
+++ b/sound/pci/ctxfi/ctatc.c
@@ -869,7 +869,7 @@ spdif_passthru_playback_setup(struct ct_atc *atc, struct ct_atc_pcm *apcm)
869 mutex_lock(&atc->atc_mutex); 869 mutex_lock(&atc->atc_mutex);
870 dao->ops->get_spos(dao, &status); 870 dao->ops->get_spos(dao, &status);
871 if (((status >> 24) & IEC958_AES3_CON_FS) != iec958_con_fs) { 871 if (((status >> 24) & IEC958_AES3_CON_FS) != iec958_con_fs) {
872 status &= ((~IEC958_AES3_CON_FS) << 24); 872 status &= ~(IEC958_AES3_CON_FS << 24);
873 status |= (iec958_con_fs << 24); 873 status |= (iec958_con_fs << 24);
874 dao->ops->set_spos(dao, status); 874 dao->ops->set_spos(dao, status);
875 dao->ops->commit_write(dao); 875 dao->ops->commit_write(dao);
diff --git a/sound/pci/ctxfi/ctdaio.c b/sound/pci/ctxfi/ctdaio.c
index af56eb949bde..47d9ea97de02 100644
--- a/sound/pci/ctxfi/ctdaio.c
+++ b/sound/pci/ctxfi/ctdaio.c
@@ -176,6 +176,7 @@ static int dao_set_left_input(struct dao *dao, struct rsc *input)
176 if (!entry) 176 if (!entry)
177 return -ENOMEM; 177 return -ENOMEM;
178 178
179 dao->ops->clear_left_input(dao);
179 /* Program master and conjugate resources */ 180 /* Program master and conjugate resources */
180 input->ops->master(input); 181 input->ops->master(input);
181 daio->rscl.ops->master(&daio->rscl); 182 daio->rscl.ops->master(&daio->rscl);
@@ -204,6 +205,7 @@ static int dao_set_right_input(struct dao *dao, struct rsc *input)
204 if (!entry) 205 if (!entry)
205 return -ENOMEM; 206 return -ENOMEM;
206 207
208 dao->ops->clear_right_input(dao);
207 /* Program master and conjugate resources */ 209 /* Program master and conjugate resources */
208 input->ops->master(input); 210 input->ops->master(input);
209 daio->rscr.ops->master(&daio->rscr); 211 daio->rscr.ops->master(&daio->rscr);
diff --git a/sound/pci/ctxfi/cthw20k2.c b/sound/pci/ctxfi/cthw20k2.c
index b6b11bfe7574..5364164674e4 100644
--- a/sound/pci/ctxfi/cthw20k2.c
+++ b/sound/pci/ctxfi/cthw20k2.c
@@ -1307,10 +1307,10 @@ static int hw_pll_init(struct hw *hw, unsigned int rsr)
1307 set_field(&pllctl, PLLCTL_B, 0); 1307 set_field(&pllctl, PLLCTL_B, 0);
1308 if (48000 == rsr) { 1308 if (48000 == rsr) {
1309 set_field(&pllctl, PLLCTL_FD, 16 - 2); 1309 set_field(&pllctl, PLLCTL_FD, 16 - 2);
1310 set_field(&pllctl, PLLCTL_RD, 1 - 1); 1310 set_field(&pllctl, PLLCTL_RD, 1 - 1); /* 3000*16/1 = 48000 */
1311 } else { /* 44100 */ 1311 } else { /* 44100 */
1312 set_field(&pllctl, PLLCTL_FD, 147 - 2); 1312 set_field(&pllctl, PLLCTL_FD, 147 - 2);
1313 set_field(&pllctl, PLLCTL_RD, 10 - 1); 1313 set_field(&pllctl, PLLCTL_RD, 10 - 1); /* 3000*147/10 = 44100 */
1314 } 1314 }
1315 hw_write_20kx(hw, PLL_CTL, pllctl); 1315 hw_write_20kx(hw, PLL_CTL, pllctl);
1316 mdelay(40); 1316 mdelay(40);
@@ -1740,6 +1740,10 @@ static int hw_is_adc_input_selected(struct hw *hw, enum ADCSRC type)
1740 return data; 1740 return data;
1741} 1741}
1742 1742
1743#define MIC_BOOST_0DB 0xCF
1744#define MIC_BOOST_STEPS_PER_DB 2
1745#define MIC_BOOST_20DB (MIC_BOOST_0DB + 20 * MIC_BOOST_STEPS_PER_DB)
1746
1743static int hw_adc_input_select(struct hw *hw, enum ADCSRC type) 1747static int hw_adc_input_select(struct hw *hw, enum ADCSRC type)
1744{ 1748{
1745 u32 data; 1749 u32 data;
@@ -1751,10 +1755,12 @@ static int hw_adc_input_select(struct hw *hw, enum ADCSRC type)
1751 hw_write_20kx(hw, GPIO_DATA, data); 1755 hw_write_20kx(hw, GPIO_DATA, data);
1752 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_ADCMC, 0x101), 1756 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_ADCMC, 0x101),
1753 MAKE_WM8775_DATA(0x101)); /* Mic-in */ 1757 MAKE_WM8775_DATA(0x101)); /* Mic-in */
1754 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCL, 0xE7), 1758 hw20k2_i2c_write(hw,
1755 MAKE_WM8775_DATA(0xE7)); /* +12dB boost */ 1759 MAKE_WM8775_ADDR(WM8775_AADCL, MIC_BOOST_20DB),
1756 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCR, 0xE7), 1760 MAKE_WM8775_DATA(MIC_BOOST_20DB)); /* +20dB */
1757 MAKE_WM8775_DATA(0xE7)); /* +12dB boost */ 1761 hw20k2_i2c_write(hw,
1762 MAKE_WM8775_ADDR(WM8775_AADCR, MIC_BOOST_20DB),
1763 MAKE_WM8775_DATA(MIC_BOOST_20DB)); /* +20dB */
1758 break; 1764 break;
1759 case ADC_LINEIN: 1765 case ADC_LINEIN:
1760 data &= ~(0x1 << 14); 1766 data &= ~(0x1 << 14);
@@ -1827,10 +1833,12 @@ static int hw_adc_init(struct hw *hw, const struct adc_conf *info)
1827 1833
1828 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_ADCMC, 0x101), 1834 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_ADCMC, 0x101),
1829 MAKE_WM8775_DATA(0x101)); /* Mic-in */ 1835 MAKE_WM8775_DATA(0x101)); /* Mic-in */
1830 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCL, 0xE7), 1836 hw20k2_i2c_write(hw,
1831 MAKE_WM8775_DATA(0xE7)); /* +12dB boost */ 1837 MAKE_WM8775_ADDR(WM8775_AADCL, MIC_BOOST_20DB),
1832 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCR, 0xE7), 1838 MAKE_WM8775_DATA(MIC_BOOST_20DB)); /* +20dB */
1833 MAKE_WM8775_DATA(0xE7)); /* +12dB boost */ 1839 hw20k2_i2c_write(hw,
1840 MAKE_WM8775_ADDR(WM8775_AADCR, MIC_BOOST_20DB),
1841 MAKE_WM8775_DATA(MIC_BOOST_20DB)); /* +20dB */
1834 } else if (mux == 2) { 1842 } else if (mux == 2) {
1835 /* Configures GPIO data to select Line-in */ 1843 /* Configures GPIO data to select Line-in */
1836 data &= ~(0x1 << 14); 1844 data &= ~(0x1 << 14);
diff --git a/sound/pci/ctxfi/ctmixer.c b/sound/pci/ctxfi/ctmixer.c
index 15c1e7271ea8..c3519ff42fbb 100644
--- a/sound/pci/ctxfi/ctmixer.c
+++ b/sound/pci/ctxfi/ctmixer.c
@@ -566,19 +566,6 @@ static int ct_spdif_get_mask(struct snd_kcontrol *kcontrol,
566 return 0; 566 return 0;
567} 567}
568 568
569static int ct_spdif_default_get(struct snd_kcontrol *kcontrol,
570 struct snd_ctl_elem_value *ucontrol)
571{
572 unsigned int status = SNDRV_PCM_DEFAULT_CON_SPDIF;
573
574 ucontrol->value.iec958.status[0] = (status >> 0) & 0xff;
575 ucontrol->value.iec958.status[1] = (status >> 8) & 0xff;
576 ucontrol->value.iec958.status[2] = (status >> 16) & 0xff;
577 ucontrol->value.iec958.status[3] = (status >> 24) & 0xff;
578
579 return 0;
580}
581
582static int ct_spdif_get(struct snd_kcontrol *kcontrol, 569static int ct_spdif_get(struct snd_kcontrol *kcontrol,
583 struct snd_ctl_elem_value *ucontrol) 570 struct snd_ctl_elem_value *ucontrol)
584{ 571{
@@ -586,6 +573,10 @@ static int ct_spdif_get(struct snd_kcontrol *kcontrol,
586 unsigned int status; 573 unsigned int status;
587 574
588 atc->spdif_out_get_status(atc, &status); 575 atc->spdif_out_get_status(atc, &status);
576
577 if (status == 0)
578 status = SNDRV_PCM_DEFAULT_CON_SPDIF;
579
589 ucontrol->value.iec958.status[0] = (status >> 0) & 0xff; 580 ucontrol->value.iec958.status[0] = (status >> 0) & 0xff;
590 ucontrol->value.iec958.status[1] = (status >> 8) & 0xff; 581 ucontrol->value.iec958.status[1] = (status >> 8) & 0xff;
591 ucontrol->value.iec958.status[2] = (status >> 16) & 0xff; 582 ucontrol->value.iec958.status[2] = (status >> 16) & 0xff;
@@ -629,7 +620,7 @@ static struct snd_kcontrol_new iec958_default_ctl = {
629 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 620 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
630 .count = 1, 621 .count = 1,
631 .info = ct_spdif_info, 622 .info = ct_spdif_info,
632 .get = ct_spdif_default_get, 623 .get = ct_spdif_get,
633 .put = ct_spdif_put, 624 .put = ct_spdif_put,
634 .private_value = MIXER_IEC958_DEFAULT 625 .private_value = MIXER_IEC958_DEFAULT
635}; 626};
diff --git a/sound/pci/ctxfi/ctvmem.c b/sound/pci/ctxfi/ctvmem.c
index 65da6e466f80..b78f3fc3c33c 100644
--- a/sound/pci/ctxfi/ctvmem.c
+++ b/sound/pci/ctxfi/ctvmem.c
@@ -52,8 +52,7 @@ get_vm_block(struct ct_vm *vm, unsigned int size)
52 52
53 if (entry->size == size) { 53 if (entry->size == size) {
54 /* Move the vm node from unused list to used list directly */ 54 /* Move the vm node from unused list to used list directly */
55 list_del(&entry->list); 55 list_move(&entry->list, &vm->used);
56 list_add(&entry->list, &vm->used);
57 vm->size -= size; 56 vm->size -= size;
58 block = entry; 57 block = entry;
59 goto out; 58 goto out;
diff --git a/sound/pci/emu10k1/emu10k1_main.c b/sound/pci/emu10k1/emu10k1_main.c
index 66c7fb3ced3e..5e619a84da06 100644
--- a/sound/pci/emu10k1/emu10k1_main.c
+++ b/sound/pci/emu10k1/emu10k1_main.c
@@ -926,7 +926,7 @@ static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
926 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); 926 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
927 /* Unknown. */ 927 /* Unknown. */
928 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); 928 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
929 /* IRQ Enable: Alll on */ 929 /* IRQ Enable: All on */
930 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */ 930 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
931 /* IRQ Enable: All off */ 931 /* IRQ Enable: All off */
932 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00); 932 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c
index ae5c5d5e4b7c..2c79e96d0324 100644
--- a/sound/pci/hda/hda_codec.c
+++ b/sound/pci/hda/hda_codec.c
@@ -29,6 +29,7 @@
29#include <sound/asoundef.h> 29#include <sound/asoundef.h>
30#include <sound/tlv.h> 30#include <sound/tlv.h>
31#include <sound/initval.h> 31#include <sound/initval.h>
32#include <sound/jack.h>
32#include "hda_local.h" 33#include "hda_local.h"
33#include "hda_beep.h" 34#include "hda_beep.h"
34#include <sound/hda_hwdep.h> 35#include <sound/hda_hwdep.h>
@@ -4959,5 +4960,109 @@ void snd_print_pcm_bits(int pcm, char *buf, int buflen)
4959} 4960}
4960EXPORT_SYMBOL_HDA(snd_print_pcm_bits); 4961EXPORT_SYMBOL_HDA(snd_print_pcm_bits);
4961 4962
4963#ifdef CONFIG_SND_HDA_INPUT_JACK
4964/*
4965 * Input-jack notification support
4966 */
4967struct hda_jack_item {
4968 hda_nid_t nid;
4969 int type;
4970 struct snd_jack *jack;
4971};
4972
4973static const char *get_jack_default_name(struct hda_codec *codec, hda_nid_t nid,
4974 int type)
4975{
4976 switch (type) {
4977 case SND_JACK_HEADPHONE:
4978 return "Headphone";
4979 case SND_JACK_MICROPHONE:
4980 return "Mic";
4981 case SND_JACK_LINEOUT:
4982 return "Line-out";
4983 case SND_JACK_HEADSET:
4984 return "Headset";
4985 default:
4986 return "Misc";
4987 }
4988}
4989
4990static void hda_free_jack_priv(struct snd_jack *jack)
4991{
4992 struct hda_jack_item *jacks = jack->private_data;
4993 jacks->nid = 0;
4994 jacks->jack = NULL;
4995}
4996
4997int snd_hda_input_jack_add(struct hda_codec *codec, hda_nid_t nid, int type,
4998 const char *name)
4999{
5000 struct hda_jack_item *jack;
5001 int err;
5002
5003 snd_array_init(&codec->jacks, sizeof(*jack), 32);
5004 jack = snd_array_new(&codec->jacks);
5005 if (!jack)
5006 return -ENOMEM;
5007
5008 jack->nid = nid;
5009 jack->type = type;
5010 if (!name)
5011 name = get_jack_default_name(codec, nid, type);
5012 err = snd_jack_new(codec->bus->card, name, type, &jack->jack);
5013 if (err < 0) {
5014 jack->nid = 0;
5015 return err;
5016 }
5017 jack->jack->private_data = jack;
5018 jack->jack->private_free = hda_free_jack_priv;
5019 return 0;
5020}
5021EXPORT_SYMBOL_HDA(snd_hda_input_jack_add);
5022
5023void snd_hda_input_jack_report(struct hda_codec *codec, hda_nid_t nid)
5024{
5025 struct hda_jack_item *jacks = codec->jacks.list;
5026 int i;
5027
5028 if (!jacks)
5029 return;
5030
5031 for (i = 0; i < codec->jacks.used; i++, jacks++) {
5032 unsigned int pin_ctl;
5033 unsigned int present;
5034 int type;
5035
5036 if (jacks->nid != nid)
5037 continue;
5038 present = snd_hda_jack_detect(codec, nid);
5039 type = jacks->type;
5040 if (type == (SND_JACK_HEADPHONE | SND_JACK_LINEOUT)) {
5041 pin_ctl = snd_hda_codec_read(codec, nid, 0,
5042 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
5043 type = (pin_ctl & AC_PINCTL_HP_EN) ?
5044 SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
5045 }
5046 snd_jack_report(jacks->jack, present ? type : 0);
5047 }
5048}
5049EXPORT_SYMBOL_HDA(snd_hda_input_jack_report);
5050
5051/* free jack instances manually when clearing/reconfiguring */
5052void snd_hda_input_jack_free(struct hda_codec *codec)
5053{
5054 if (!codec->bus->shutdown && codec->jacks.list) {
5055 struct hda_jack_item *jacks = codec->jacks.list;
5056 int i;
5057 for (i = 0; i < codec->jacks.used; i++, jacks++) {
5058 if (jacks->jack)
5059 snd_device_free(codec->bus->card, jacks->jack);
5060 }
5061 }
5062 snd_array_free(&codec->jacks);
5063}
5064EXPORT_SYMBOL_HDA(snd_hda_input_jack_free);
5065#endif /* CONFIG_SND_HDA_INPUT_JACK */
5066
4962MODULE_DESCRIPTION("HDA codec core"); 5067MODULE_DESCRIPTION("HDA codec core");
4963MODULE_LICENSE("GPL"); 5068MODULE_LICENSE("GPL");
diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h
index fdf8d44f8b6b..e46d5420a9f2 100644
--- a/sound/pci/hda/hda_codec.h
+++ b/sound/pci/hda/hda_codec.h
@@ -866,6 +866,11 @@ struct hda_codec {
866 /* codec-specific additional proc output */ 866 /* codec-specific additional proc output */
867 void (*proc_widget_hook)(struct snd_info_buffer *buffer, 867 void (*proc_widget_hook)(struct snd_info_buffer *buffer,
868 struct hda_codec *codec, hda_nid_t nid); 868 struct hda_codec *codec, hda_nid_t nid);
869
870#ifdef CONFIG_SND_HDA_INPUT_JACK
871 /* jack detection */
872 struct snd_array jacks;
873#endif
869}; 874};
870 875
871/* direction */ 876/* direction */
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index fcedad9a5fef..70a9d32f0e96 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1052,9 +1052,12 @@ static void azx_init_pci(struct azx *chip)
1052 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44) 1052 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
1053 * TCSEL == Traffic Class Select Register, which sets PCI express QOS 1053 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
1054 * Ensuring these bits are 0 clears playback static on some HD Audio 1054 * Ensuring these bits are 0 clears playback static on some HD Audio
1055 * codecs 1055 * codecs.
1056 * The PCI register TCSEL is defined in the Intel manuals.
1056 */ 1057 */
1057 update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0); 1058 if (chip->driver_type != AZX_DRIVER_ATI &&
1059 chip->driver_type != AZX_DRIVER_ATIHDMI)
1060 update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0);
1058 1061
1059 switch (chip->driver_type) { 1062 switch (chip->driver_type) {
1060 case AZX_DRIVER_ATI: 1063 case AZX_DRIVER_ATI:
diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h
index 3ab5e7a303db..ff5e2ac2239a 100644
--- a/sound/pci/hda/hda_local.h
+++ b/sound/pci/hda/hda_local.h
@@ -656,4 +656,28 @@ static inline void snd_hda_eld_proc_free(struct hda_codec *codec,
656#define SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE 80 656#define SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE 80
657void snd_print_channel_allocation(int spk_alloc, char *buf, int buflen); 657void snd_print_channel_allocation(int spk_alloc, char *buf, int buflen);
658 658
659/*
660 * Input-jack notification support
661 */
662#ifdef CONFIG_SND_HDA_INPUT_JACK
663int snd_hda_input_jack_add(struct hda_codec *codec, hda_nid_t nid, int type,
664 const char *name);
665void snd_hda_input_jack_report(struct hda_codec *codec, hda_nid_t nid);
666void snd_hda_input_jack_free(struct hda_codec *codec);
667#else /* CONFIG_SND_HDA_INPUT_JACK */
668static inline int snd_hda_input_jack_add(struct hda_codec *codec,
669 hda_nid_t nid, int type,
670 const char *name)
671{
672 return 0;
673}
674static inline void snd_hda_input_jack_report(struct hda_codec *codec,
675 hda_nid_t nid)
676{
677}
678static inline void snd_hda_input_jack_free(struct hda_codec *codec)
679{
680}
681#endif /* CONFIG_SND_HDA_INPUT_JACK */
682
659#endif /* __SOUND_HDA_LOCAL_H */ 683#endif /* __SOUND_HDA_LOCAL_H */
diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c
index 8dabab798689..734c6ee55d8a 100644
--- a/sound/pci/hda/patch_analog.c
+++ b/sound/pci/hda/patch_analog.c
@@ -30,10 +30,10 @@
30#include "hda_beep.h" 30#include "hda_beep.h"
31 31
32struct ad198x_spec { 32struct ad198x_spec {
33 struct snd_kcontrol_new *mixers[5]; 33 struct snd_kcontrol_new *mixers[6];
34 int num_mixers; 34 int num_mixers;
35 unsigned int beep_amp; /* beep amp value, set via set_beep_amp() */ 35 unsigned int beep_amp; /* beep amp value, set via set_beep_amp() */
36 const struct hda_verb *init_verbs[5]; /* initialization verbs 36 const struct hda_verb *init_verbs[6]; /* initialization verbs
37 * don't forget NULL termination! 37 * don't forget NULL termination!
38 */ 38 */
39 unsigned int num_init_verbs; 39 unsigned int num_init_verbs;
@@ -331,36 +331,11 @@ static int ad198x_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
331 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout); 331 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
332} 332}
333 333
334static int ad198x_alt_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
335 struct hda_codec *codec,
336 unsigned int stream_tag,
337 unsigned int format,
338 struct snd_pcm_substream *substream)
339{
340 struct ad198x_spec *spec = codec->spec;
341 snd_hda_codec_setup_stream(codec, spec->alt_dac_nid[0], stream_tag,
342 0, format);
343 return 0;
344}
345
346static int ad198x_alt_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
347 struct hda_codec *codec,
348 struct snd_pcm_substream *substream)
349{
350 struct ad198x_spec *spec = codec->spec;
351 snd_hda_codec_cleanup_stream(codec, spec->alt_dac_nid[0]);
352 return 0;
353}
354
355static struct hda_pcm_stream ad198x_pcm_analog_alt_playback = { 334static struct hda_pcm_stream ad198x_pcm_analog_alt_playback = {
356 .substreams = 1, 335 .substreams = 1,
357 .channels_min = 2, 336 .channels_min = 2,
358 .channels_max = 2, 337 .channels_max = 2,
359 /* NID is set in ad198x_build_pcms */ 338 /* NID is set in ad198x_build_pcms */
360 .ops = {
361 .prepare = ad198x_alt_playback_pcm_prepare,
362 .cleanup = ad198x_alt_playback_pcm_cleanup
363 },
364}; 339};
365 340
366/* 341/*
@@ -2239,29 +2214,6 @@ static struct snd_kcontrol_new ad1988_6stack_mixers2[] = {
2239static struct snd_kcontrol_new ad1988_6stack_fp_mixers[] = { 2214static struct snd_kcontrol_new ad1988_6stack_fp_mixers[] = {
2240 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x03, 0x0, HDA_OUTPUT), 2215 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x03, 0x0, HDA_OUTPUT),
2241 2216
2242 HDA_BIND_MUTE("Front Playback Switch", 0x29, 2, HDA_INPUT),
2243 HDA_BIND_MUTE("Surround Playback Switch", 0x2a, 2, HDA_INPUT),
2244 HDA_BIND_MUTE_MONO("Center Playback Switch", 0x27, 1, 2, HDA_INPUT),
2245 HDA_BIND_MUTE_MONO("LFE Playback Switch", 0x27, 2, 2, HDA_INPUT),
2246 HDA_BIND_MUTE("Side Playback Switch", 0x28, 2, HDA_INPUT),
2247 HDA_BIND_MUTE("Headphone Playback Switch", 0x22, 2, HDA_INPUT),
2248 HDA_BIND_MUTE("Mono Playback Switch", 0x1e, 2, HDA_INPUT),
2249
2250 HDA_CODEC_VOLUME("CD Playback Volume", 0x20, 0x6, HDA_INPUT),
2251 HDA_CODEC_MUTE("CD Playback Switch", 0x20, 0x6, HDA_INPUT),
2252 HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x20, 0x0, HDA_INPUT),
2253 HDA_CODEC_MUTE("Front Mic Playback Switch", 0x20, 0x0, HDA_INPUT),
2254 HDA_CODEC_VOLUME("Line Playback Volume", 0x20, 0x1, HDA_INPUT),
2255 HDA_CODEC_MUTE("Line Playback Switch", 0x20, 0x1, HDA_INPUT),
2256 HDA_CODEC_VOLUME("Mic Playback Volume", 0x20, 0x4, HDA_INPUT),
2257 HDA_CODEC_MUTE("Mic Playback Switch", 0x20, 0x4, HDA_INPUT),
2258
2259 HDA_CODEC_VOLUME("Analog Mix Playback Volume", 0x21, 0x0, HDA_OUTPUT),
2260 HDA_CODEC_MUTE("Analog Mix Playback Switch", 0x21, 0x0, HDA_OUTPUT),
2261
2262 HDA_CODEC_VOLUME("Front Mic Boost Volume", 0x39, 0x0, HDA_OUTPUT),
2263 HDA_CODEC_VOLUME("Mic Boost Volume", 0x3c, 0x0, HDA_OUTPUT),
2264
2265 { } /* end */ 2217 { } /* end */
2266}; 2218};
2267 2219
@@ -2545,11 +2497,6 @@ static struct hda_verb ad1988_6stack_init_verbs[] = {
2545}; 2497};
2546 2498
2547static struct hda_verb ad1988_6stack_fp_init_verbs[] = { 2499static struct hda_verb ad1988_6stack_fp_init_verbs[] = {
2548 /* Front, Surround, CLFE, side DAC; unmute as default */
2549 {0x04, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
2550 {0x06, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
2551 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
2552 {0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
2553 /* Headphone; unmute as default */ 2500 /* Headphone; unmute as default */
2554 {0x03, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, 2501 {0x03, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
2555 /* Port-A front headphon path */ 2502 /* Port-A front headphon path */
@@ -2558,50 +2505,6 @@ static struct hda_verb ad1988_6stack_fp_init_verbs[] = {
2558 {0x22, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)}, 2505 {0x22, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
2559 {0x11, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, 2506 {0x11, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
2560 {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP}, 2507 {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP},
2561 /* Port-D line-out path */
2562 {0x29, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
2563 {0x29, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
2564 {0x12, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
2565 {0x12, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
2566 /* Port-F surround path */
2567 {0x2a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
2568 {0x2a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
2569 {0x16, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
2570 {0x16, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
2571 /* Port-G CLFE path */
2572 {0x27, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
2573 {0x27, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
2574 {0x24, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
2575 {0x24, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
2576 /* Port-H side path */
2577 {0x28, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
2578 {0x28, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
2579 {0x25, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
2580 {0x25, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
2581 /* Mono out path */
2582 {0x36, AC_VERB_SET_CONNECT_SEL, 0x1}, /* DAC1:04h */
2583 {0x1e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
2584 {0x1e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
2585 {0x13, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
2586 {0x13, AC_VERB_SET_AMP_GAIN_MUTE, 0xb01f}, /* unmute, 0dB */
2587 /* Port-B front mic-in path */
2588 {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
2589 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
2590 {0x39, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
2591 /* Port-C line-in path */
2592 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
2593 {0x15, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN},
2594 {0x3a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
2595 {0x33, AC_VERB_SET_CONNECT_SEL, 0x0},
2596 /* Port-E mic-in path */
2597 {0x17, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
2598 {0x17, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
2599 {0x3c, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
2600 {0x34, AC_VERB_SET_CONNECT_SEL, 0x0},
2601 /* Analog CD Input */
2602 {0x18, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN},
2603 /* Analog Mix output amp */
2604 {0x21, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE | 0x1f}, /* 0dB */
2605 2508
2606 { } 2509 { }
2607}; 2510};
@@ -3316,20 +3219,20 @@ static int patch_ad1988(struct hda_codec *codec)
3316 spec->mixers[0] = ad1988_6stack_mixers1_rev2; 3219 spec->mixers[0] = ad1988_6stack_mixers1_rev2;
3317 else 3220 else
3318 spec->mixers[0] = ad1988_6stack_mixers1; 3221 spec->mixers[0] = ad1988_6stack_mixers1;
3222 spec->mixers[1] = ad1988_6stack_mixers2;
3223 spec->num_init_verbs = 1;
3224 spec->init_verbs[0] = ad1988_6stack_init_verbs;
3319 if (board_config == AD1988_6STACK_DIG_FP) { 3225 if (board_config == AD1988_6STACK_DIG_FP) {
3320 spec->mixers[1] = ad1988_6stack_fp_mixers; 3226 spec->num_mixers++;
3227 spec->mixers[2] = ad1988_6stack_fp_mixers;
3228 spec->num_init_verbs++;
3229 spec->init_verbs[1] = ad1988_6stack_fp_init_verbs;
3321 spec->slave_vols = ad1988_6stack_fp_slave_vols; 3230 spec->slave_vols = ad1988_6stack_fp_slave_vols;
3322 spec->slave_sws = ad1988_6stack_fp_slave_sws; 3231 spec->slave_sws = ad1988_6stack_fp_slave_sws;
3323 spec->alt_dac_nid = ad1988_alt_dac_nid; 3232 spec->alt_dac_nid = ad1988_alt_dac_nid;
3324 spec->stream_analog_alt_playback = 3233 spec->stream_analog_alt_playback =
3325 &ad198x_pcm_analog_alt_playback; 3234 &ad198x_pcm_analog_alt_playback;
3326 } else 3235 }
3327 spec->mixers[1] = ad1988_6stack_mixers2;
3328 spec->num_init_verbs = 1;
3329 if (board_config == AD1988_6STACK_DIG_FP)
3330 spec->init_verbs[0] = ad1988_6stack_fp_init_verbs;
3331 else
3332 spec->init_verbs[0] = ad1988_6stack_init_verbs;
3333 if ((board_config == AD1988_6STACK_DIG) || 3236 if ((board_config == AD1988_6STACK_DIG) ||
3334 (board_config == AD1988_6STACK_DIG_FP)) { 3237 (board_config == AD1988_6STACK_DIG_FP)) {
3335 spec->multiout.dig_out_nid = AD1988_SPDIF_OUT; 3238 spec->multiout.dig_out_nid = AD1988_SPDIF_OUT;
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index 4d5004e693f0..d08cf31596f3 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -49,14 +49,6 @@
49#define AUTO_MIC_PORTB (1 << 1) 49#define AUTO_MIC_PORTB (1 << 1)
50#define AUTO_MIC_PORTC (1 << 2) 50#define AUTO_MIC_PORTC (1 << 2)
51 51
52struct conexant_jack {
53
54 hda_nid_t nid;
55 int type;
56 struct snd_jack *jack;
57
58};
59
60struct pin_dac_pair { 52struct pin_dac_pair {
61 hda_nid_t pin; 53 hda_nid_t pin;
62 hda_nid_t dac; 54 hda_nid_t dac;
@@ -111,9 +103,6 @@ struct conexant_spec {
111 103
112 unsigned int spdif_route; 104 unsigned int spdif_route;
113 105
114 /* jack detection */
115 struct snd_array jacks;
116
117 /* dynamic controls, init_verbs and input_mux */ 106 /* dynamic controls, init_verbs and input_mux */
118 struct auto_pin_cfg autocfg; 107 struct auto_pin_cfg autocfg;
119 struct hda_input_mux private_imux; 108 struct hda_input_mux private_imux;
@@ -393,71 +382,9 @@ static int conexant_mux_enum_put(struct snd_kcontrol *kcontrol,
393 &spec->cur_mux[adc_idx]); 382 &spec->cur_mux[adc_idx]);
394} 383}
395 384
396#ifdef CONFIG_SND_HDA_INPUT_JACK
397static void conexant_free_jack_priv(struct snd_jack *jack)
398{
399 struct conexant_jack *jacks = jack->private_data;
400 jacks->nid = 0;
401 jacks->jack = NULL;
402}
403
404static int conexant_add_jack(struct hda_codec *codec,
405 hda_nid_t nid, int type)
406{
407 struct conexant_spec *spec;
408 struct conexant_jack *jack;
409 const char *name;
410 int i, err;
411
412 spec = codec->spec;
413 snd_array_init(&spec->jacks, sizeof(*jack), 32);
414
415 jack = spec->jacks.list;
416 for (i = 0; i < spec->jacks.used; i++, jack++)
417 if (jack->nid == nid)
418 return 0 ; /* already present */
419
420 jack = snd_array_new(&spec->jacks);
421 name = (type == SND_JACK_HEADPHONE) ? "Headphone" : "Mic" ;
422
423 if (!jack)
424 return -ENOMEM;
425
426 jack->nid = nid;
427 jack->type = type;
428
429 err = snd_jack_new(codec->bus->card, name, type, &jack->jack);
430 if (err < 0)
431 return err;
432 jack->jack->private_data = jack;
433 jack->jack->private_free = conexant_free_jack_priv;
434 return 0;
435}
436
437static void conexant_report_jack(struct hda_codec *codec, hda_nid_t nid)
438{
439 struct conexant_spec *spec = codec->spec;
440 struct conexant_jack *jacks = spec->jacks.list;
441
442 if (jacks) {
443 int i;
444 for (i = 0; i < spec->jacks.used; i++) {
445 if (jacks->nid == nid) {
446 unsigned int present;
447 present = snd_hda_jack_detect(codec, nid);
448
449 present = (present) ? jacks->type : 0 ;
450
451 snd_jack_report(jacks->jack,
452 present);
453 }
454 jacks++;
455 }
456 }
457}
458
459static int conexant_init_jacks(struct hda_codec *codec) 385static int conexant_init_jacks(struct hda_codec *codec)
460{ 386{
387#ifdef CONFIG_SND_HDA_INPUT_JACK
461 struct conexant_spec *spec = codec->spec; 388 struct conexant_spec *spec = codec->spec;
462 int i; 389 int i;
463 390
@@ -469,15 +396,15 @@ static int conexant_init_jacks(struct hda_codec *codec)
469 int err = 0; 396 int err = 0;
470 switch (hv->param ^ AC_USRSP_EN) { 397 switch (hv->param ^ AC_USRSP_EN) {
471 case CONEXANT_HP_EVENT: 398 case CONEXANT_HP_EVENT:
472 err = conexant_add_jack(codec, hv->nid, 399 err = snd_hda_input_jack_add(codec, hv->nid,
473 SND_JACK_HEADPHONE); 400 SND_JACK_HEADPHONE, NULL);
474 conexant_report_jack(codec, hv->nid); 401 snd_hda_input_jack_report(codec, hv->nid);
475 break; 402 break;
476 case CXT5051_PORTC_EVENT: 403 case CXT5051_PORTC_EVENT:
477 case CONEXANT_MIC_EVENT: 404 case CONEXANT_MIC_EVENT:
478 err = conexant_add_jack(codec, hv->nid, 405 err = snd_hda_input_jack_add(codec, hv->nid,
479 SND_JACK_MICROPHONE); 406 SND_JACK_MICROPHONE, NULL);
480 conexant_report_jack(codec, hv->nid); 407 snd_hda_input_jack_report(codec, hv->nid);
481 break; 408 break;
482 } 409 }
483 if (err < 0) 410 if (err < 0)
@@ -485,19 +412,9 @@ static int conexant_init_jacks(struct hda_codec *codec)
485 ++hv; 412 ++hv;
486 } 413 }
487 } 414 }
488 return 0; 415#endif /* CONFIG_SND_HDA_INPUT_JACK */
489
490}
491#else
492static inline void conexant_report_jack(struct hda_codec *codec, hda_nid_t nid)
493{
494}
495
496static inline int conexant_init_jacks(struct hda_codec *codec)
497{
498 return 0; 416 return 0;
499} 417}
500#endif
501 418
502static int conexant_init(struct hda_codec *codec) 419static int conexant_init(struct hda_codec *codec)
503{ 420{
@@ -511,18 +428,7 @@ static int conexant_init(struct hda_codec *codec)
511 428
512static void conexant_free(struct hda_codec *codec) 429static void conexant_free(struct hda_codec *codec)
513{ 430{
514#ifdef CONFIG_SND_HDA_INPUT_JACK 431 snd_hda_input_jack_free(codec);
515 struct conexant_spec *spec = codec->spec;
516 if (spec->jacks.list) {
517 struct conexant_jack *jacks = spec->jacks.list;
518 int i;
519 for (i = 0; i < spec->jacks.used; i++, jacks++) {
520 if (jacks->jack)
521 snd_device_free(codec->bus->card, jacks->jack);
522 }
523 snd_array_free(&spec->jacks);
524 }
525#endif
526 snd_hda_detach_beep_device(codec); 432 snd_hda_detach_beep_device(codec);
527 kfree(codec->spec); 433 kfree(codec->spec);
528} 434}
@@ -1787,7 +1693,7 @@ static void cxt5051_hp_unsol_event(struct hda_codec *codec,
1787 cxt5051_portc_automic(codec); 1693 cxt5051_portc_automic(codec);
1788 break; 1694 break;
1789 } 1695 }
1790 conexant_report_jack(codec, nid); 1696 snd_hda_input_jack_report(codec, nid);
1791} 1697}
1792 1698
1793static struct snd_kcontrol_new cxt5051_playback_mixers[] = { 1699static struct snd_kcontrol_new cxt5051_playback_mixers[] = {
@@ -1959,10 +1865,8 @@ static void cxt5051_init_mic_port(struct hda_codec *codec, hda_nid_t nid,
1959 snd_hda_codec_write(codec, nid, 0, 1865 snd_hda_codec_write(codec, nid, 0,
1960 AC_VERB_SET_UNSOLICITED_ENABLE, 1866 AC_VERB_SET_UNSOLICITED_ENABLE,
1961 AC_USRSP_EN | event); 1867 AC_USRSP_EN | event);
1962#ifdef CONFIG_SND_HDA_INPUT_JACK 1868 snd_hda_input_jack_add(codec, nid, SND_JACK_MICROPHONE, NULL);
1963 conexant_add_jack(codec, nid, SND_JACK_MICROPHONE); 1869 snd_hda_input_jack_report(codec, nid);
1964 conexant_report_jack(codec, nid);
1965#endif
1966} 1870}
1967 1871
1968static struct hda_verb cxt5051_ideapad_init_verbs[] = { 1872static struct hda_verb cxt5051_ideapad_init_verbs[] = {
@@ -3477,11 +3381,11 @@ static void cx_auto_unsol_event(struct hda_codec *codec, unsigned int res)
3477 switch (res >> 26) { 3381 switch (res >> 26) {
3478 case CONEXANT_HP_EVENT: 3382 case CONEXANT_HP_EVENT:
3479 cx_auto_hp_automute(codec); 3383 cx_auto_hp_automute(codec);
3480 conexant_report_jack(codec, nid); 3384 snd_hda_input_jack_report(codec, nid);
3481 break; 3385 break;
3482 case CONEXANT_MIC_EVENT: 3386 case CONEXANT_MIC_EVENT:
3483 cx_auto_automic(codec); 3387 cx_auto_automic(codec);
3484 conexant_report_jack(codec, nid); 3388 snd_hda_input_jack_report(codec, nid);
3485 break; 3389 break;
3486 } 3390 }
3487} 3391}
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index ec0fa2dd0a27..251773e45f61 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -110,6 +110,12 @@ struct dp_audio_infoframe {
110 u8 LFEPBL01_LSV36_DM_INH7; 110 u8 LFEPBL01_LSV36_DM_INH7;
111}; 111};
112 112
113union audio_infoframe {
114 struct hdmi_audio_infoframe hdmi;
115 struct dp_audio_infoframe dp;
116 u8 bytes[0];
117};
118
113/* 119/*
114 * CEA speaker placement: 120 * CEA speaker placement:
115 * 121 *
@@ -620,8 +626,7 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
620 int channels = substream->runtime->channels; 626 int channels = substream->runtime->channels;
621 int ca; 627 int ca;
622 int i; 628 int i;
623 u8 ai[max(sizeof(struct hdmi_audio_infoframe), 629 union audio_infoframe ai;
624 sizeof(struct dp_audio_infoframe))];
625 630
626 ca = hdmi_channel_allocation(codec, nid, channels); 631 ca = hdmi_channel_allocation(codec, nid, channels);
627 632
@@ -633,11 +638,10 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
633 638
634 pin_nid = spec->pin[i]; 639 pin_nid = spec->pin[i];
635 640
636 memset(ai, 0, sizeof(ai)); 641 memset(&ai, 0, sizeof(ai));
637 if (spec->sink_eld[i].conn_type == 0) { /* HDMI */ 642 if (spec->sink_eld[i].conn_type == 0) { /* HDMI */
638 struct hdmi_audio_infoframe *hdmi_ai; 643 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
639 644
640 hdmi_ai = (struct hdmi_audio_infoframe *)ai;
641 hdmi_ai->type = 0x84; 645 hdmi_ai->type = 0x84;
642 hdmi_ai->ver = 0x01; 646 hdmi_ai->ver = 0x01;
643 hdmi_ai->len = 0x0a; 647 hdmi_ai->len = 0x0a;
@@ -645,9 +649,8 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
645 hdmi_ai->CA = ca; 649 hdmi_ai->CA = ca;
646 hdmi_checksum_audio_infoframe(hdmi_ai); 650 hdmi_checksum_audio_infoframe(hdmi_ai);
647 } else if (spec->sink_eld[i].conn_type == 1) { /* DisplayPort */ 651 } else if (spec->sink_eld[i].conn_type == 1) { /* DisplayPort */
648 struct dp_audio_infoframe *dp_ai; 652 struct dp_audio_infoframe *dp_ai = &ai.dp;
649 653
650 dp_ai = (struct dp_audio_infoframe *)ai;
651 dp_ai->type = 0x84; 654 dp_ai->type = 0x84;
652 dp_ai->len = 0x1b; 655 dp_ai->len = 0x1b;
653 dp_ai->ver = 0x11 << 2; 656 dp_ai->ver = 0x11 << 2;
@@ -664,7 +667,8 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
664 * sizeof(*dp_ai) to avoid partial match/update problems when 667 * sizeof(*dp_ai) to avoid partial match/update problems when
665 * the user switches between HDMI/DP monitors. 668 * the user switches between HDMI/DP monitors.
666 */ 669 */
667 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai, sizeof(ai))) { 670 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
671 sizeof(ai))) {
668 snd_printdd("hdmi_setup_audio_infoframe: " 672 snd_printdd("hdmi_setup_audio_infoframe: "
669 "cvt=%d pin=%d channels=%d\n", 673 "cvt=%d pin=%d channels=%d\n",
670 nid, pin_nid, 674 nid, pin_nid,
@@ -672,7 +676,7 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
672 hdmi_setup_channel_mapping(codec, pin_nid, ca); 676 hdmi_setup_channel_mapping(codec, pin_nid, ca);
673 hdmi_stop_infoframe_trans(codec, pin_nid); 677 hdmi_stop_infoframe_trans(codec, pin_nid);
674 hdmi_fill_audio_infoframe(codec, pin_nid, 678 hdmi_fill_audio_infoframe(codec, pin_nid,
675 ai, sizeof(ai)); 679 ai.bytes, sizeof(ai));
676 hdmi_start_infoframe_trans(codec, pin_nid); 680 hdmi_start_infoframe_trans(codec, pin_nid);
677 } 681 }
678 } 682 }
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 4261bb8eec1d..f1a03f223495 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -282,12 +282,6 @@ struct alc_mic_route {
282 unsigned char amix_idx; 282 unsigned char amix_idx;
283}; 283};
284 284
285struct alc_jack {
286 hda_nid_t nid;
287 int type;
288 struct snd_jack *jack;
289};
290
291#define MUX_IDX_UNDEF ((unsigned char)-1) 285#define MUX_IDX_UNDEF ((unsigned char)-1)
292 286
293struct alc_customize_define { 287struct alc_customize_define {
@@ -366,9 +360,6 @@ struct alc_spec {
366 /* PCM information */ 360 /* PCM information */
367 struct hda_pcm pcm_rec[3]; /* used in alc_build_pcms() */ 361 struct hda_pcm pcm_rec[3]; /* used in alc_build_pcms() */
368 362
369 /* jack detection */
370 struct snd_array jacks;
371
372 /* dynamic controls, init_verbs and input_mux */ 363 /* dynamic controls, init_verbs and input_mux */
373 struct auto_pin_cfg autocfg; 364 struct auto_pin_cfg autocfg;
374 struct alc_customize_define cdefine; 365 struct alc_customize_define cdefine;
@@ -394,6 +385,7 @@ struct alc_spec {
394 /* other flags */ 385 /* other flags */
395 unsigned int no_analog :1; /* digital I/O only */ 386 unsigned int no_analog :1; /* digital I/O only */
396 unsigned int dual_adc_switch:1; /* switch ADCs (for ALC275) */ 387 unsigned int dual_adc_switch:1; /* switch ADCs (for ALC275) */
388 unsigned int single_input_src:1;
397 int init_amp; 389 int init_amp;
398 int codec_variant; /* flag for other variants */ 390 int codec_variant; /* flag for other variants */
399 391
@@ -1032,94 +1024,32 @@ static void alc_fix_pll_init(struct hda_codec *codec, hda_nid_t nid,
1032 alc_fix_pll(codec); 1024 alc_fix_pll(codec);
1033} 1025}
1034 1026
1035#ifdef CONFIG_SND_HDA_INPUT_JACK
1036static void alc_free_jack_priv(struct snd_jack *jack)
1037{
1038 struct alc_jack *jacks = jack->private_data;
1039 jacks->nid = 0;
1040 jacks->jack = NULL;
1041}
1042
1043static int alc_add_jack(struct hda_codec *codec,
1044 hda_nid_t nid, int type)
1045{
1046 struct alc_spec *spec;
1047 struct alc_jack *jack;
1048 const char *name;
1049 int err;
1050
1051 spec = codec->spec;
1052 snd_array_init(&spec->jacks, sizeof(*jack), 32);
1053 jack = snd_array_new(&spec->jacks);
1054 if (!jack)
1055 return -ENOMEM;
1056
1057 jack->nid = nid;
1058 jack->type = type;
1059 name = (type == SND_JACK_HEADPHONE) ? "Headphone" : "Mic" ;
1060
1061 err = snd_jack_new(codec->bus->card, name, type, &jack->jack);
1062 if (err < 0)
1063 return err;
1064 jack->jack->private_data = jack;
1065 jack->jack->private_free = alc_free_jack_priv;
1066 return 0;
1067}
1068
1069static void alc_report_jack(struct hda_codec *codec, hda_nid_t nid)
1070{
1071 struct alc_spec *spec = codec->spec;
1072 struct alc_jack *jacks = spec->jacks.list;
1073
1074 if (jacks) {
1075 int i;
1076 for (i = 0; i < spec->jacks.used; i++) {
1077 if (jacks->nid == nid) {
1078 unsigned int present;
1079 present = snd_hda_jack_detect(codec, nid);
1080
1081 present = (present) ? jacks->type : 0;
1082
1083 snd_jack_report(jacks->jack, present);
1084 }
1085 jacks++;
1086 }
1087 }
1088}
1089
1090static int alc_init_jacks(struct hda_codec *codec) 1027static int alc_init_jacks(struct hda_codec *codec)
1091{ 1028{
1029#ifdef CONFIG_SND_HDA_INPUT_JACK
1092 struct alc_spec *spec = codec->spec; 1030 struct alc_spec *spec = codec->spec;
1093 int err; 1031 int err;
1094 unsigned int hp_nid = spec->autocfg.hp_pins[0]; 1032 unsigned int hp_nid = spec->autocfg.hp_pins[0];
1095 unsigned int mic_nid = spec->ext_mic.pin; 1033 unsigned int mic_nid = spec->ext_mic.pin;
1096 1034
1097 if (hp_nid) { 1035 if (hp_nid) {
1098 err = alc_add_jack(codec, hp_nid, SND_JACK_HEADPHONE); 1036 err = snd_hda_input_jack_add(codec, hp_nid,
1037 SND_JACK_HEADPHONE, NULL);
1099 if (err < 0) 1038 if (err < 0)
1100 return err; 1039 return err;
1101 alc_report_jack(codec, hp_nid); 1040 snd_hda_input_jack_report(codec, hp_nid);
1102 } 1041 }
1103 1042
1104 if (mic_nid) { 1043 if (mic_nid) {
1105 err = alc_add_jack(codec, mic_nid, SND_JACK_MICROPHONE); 1044 err = snd_hda_input_jack_add(codec, mic_nid,
1045 SND_JACK_MICROPHONE, NULL);
1106 if (err < 0) 1046 if (err < 0)
1107 return err; 1047 return err;
1108 alc_report_jack(codec, mic_nid); 1048 snd_hda_input_jack_report(codec, mic_nid);
1109 } 1049 }
1110 1050#endif /* CONFIG_SND_HDA_INPUT_JACK */
1111 return 0;
1112}
1113#else
1114static inline void alc_report_jack(struct hda_codec *codec, hda_nid_t nid)
1115{
1116}
1117
1118static inline int alc_init_jacks(struct hda_codec *codec)
1119{
1120 return 0; 1051 return 0;
1121} 1052}
1122#endif
1123 1053
1124static void alc_automute_speaker(struct hda_codec *codec, int pinctl) 1054static void alc_automute_speaker(struct hda_codec *codec, int pinctl)
1125{ 1055{
@@ -1133,7 +1063,7 @@ static void alc_automute_speaker(struct hda_codec *codec, int pinctl)
1133 nid = spec->autocfg.hp_pins[i]; 1063 nid = spec->autocfg.hp_pins[i];
1134 if (!nid) 1064 if (!nid)
1135 break; 1065 break;
1136 alc_report_jack(codec, nid); 1066 snd_hda_input_jack_report(codec, nid);
1137 spec->jack_present |= snd_hda_jack_detect(codec, nid); 1067 spec->jack_present |= snd_hda_jack_detect(codec, nid);
1138 } 1068 }
1139 1069
@@ -1240,7 +1170,7 @@ static void alc_mic_automute(struct hda_codec *codec)
1240 AC_VERB_SET_CONNECT_SEL, 1170 AC_VERB_SET_CONNECT_SEL,
1241 alive->mux_idx); 1171 alive->mux_idx);
1242 } 1172 }
1243 alc_report_jack(codec, spec->ext_mic.pin); 1173 snd_hda_input_jack_report(codec, spec->ext_mic.pin);
1244 1174
1245 /* FIXME: analog mixer */ 1175 /* FIXME: analog mixer */
1246} 1176}
@@ -2292,13 +2222,13 @@ static struct snd_kcontrol_new alc888_acer_aspire_4930g_mixer[] = {
2292 HDA_BIND_MUTE("Front Playback Switch", 0x0c, 2, HDA_INPUT), 2222 HDA_BIND_MUTE("Front Playback Switch", 0x0c, 2, HDA_INPUT),
2293 HDA_CODEC_VOLUME("Surround Playback Volume", 0x0d, 0x0, HDA_OUTPUT), 2223 HDA_CODEC_VOLUME("Surround Playback Volume", 0x0d, 0x0, HDA_OUTPUT),
2294 HDA_BIND_MUTE("Surround Playback Switch", 0x0d, 2, HDA_INPUT), 2224 HDA_BIND_MUTE("Surround Playback Switch", 0x0d, 2, HDA_INPUT),
2295 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x0f, 2, 0x0, 2225 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x0e, 1, 0x0,
2296 HDA_OUTPUT), 2226 HDA_OUTPUT),
2297 HDA_BIND_MUTE_MONO("Center Playback Switch", 0x0f, 2, 2, HDA_INPUT), 2227 HDA_BIND_MUTE_MONO("Center Playback Switch", 0x0e, 1, 2, HDA_INPUT),
2298 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x0f, 1, 0x0, HDA_OUTPUT), 2228 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x0e, 2, 0x0, HDA_OUTPUT),
2299 HDA_BIND_MUTE_MONO("LFE Playback Switch", 0x0f, 1, 2, HDA_INPUT), 2229 HDA_BIND_MUTE_MONO("LFE Playback Switch", 0x0e, 2, 2, HDA_INPUT),
2300 HDA_CODEC_VOLUME("Side Playback Volume", 0x0e, 0x0, HDA_OUTPUT), 2230 HDA_CODEC_VOLUME_MONO("Internal LFE Playback Volume", 0x0f, 1, 0x0, HDA_OUTPUT),
2301 HDA_BIND_MUTE("Side Playback Switch", 0x0e, 2, HDA_INPUT), 2231 HDA_BIND_MUTE_MONO("Internal LFE Playback Switch", 0x0f, 1, 2, HDA_INPUT),
2302 HDA_CODEC_VOLUME("CD Playback Volume", 0x0b, 0x04, HDA_INPUT), 2232 HDA_CODEC_VOLUME("CD Playback Volume", 0x0b, 0x04, HDA_INPUT),
2303 HDA_CODEC_MUTE("CD Playback Switch", 0x0b, 0x04, HDA_INPUT), 2233 HDA_CODEC_MUTE("CD Playback Switch", 0x0b, 0x04, HDA_INPUT),
2304 HDA_CODEC_VOLUME("Line Playback Volume", 0x0b, 0x02, HDA_INPUT), 2234 HDA_CODEC_VOLUME("Line Playback Volume", 0x0b, 0x02, HDA_INPUT),
@@ -2309,7 +2239,6 @@ static struct snd_kcontrol_new alc888_acer_aspire_4930g_mixer[] = {
2309 { } /* end */ 2239 { } /* end */
2310}; 2240};
2311 2241
2312
2313static struct snd_kcontrol_new alc889_acer_aspire_8930g_mixer[] = { 2242static struct snd_kcontrol_new alc889_acer_aspire_8930g_mixer[] = {
2314 HDA_CODEC_VOLUME("Front Playback Volume", 0x0c, 0x0, HDA_OUTPUT), 2243 HDA_CODEC_VOLUME("Front Playback Volume", 0x0c, 0x0, HDA_OUTPUT),
2315 HDA_BIND_MUTE("Front Playback Switch", 0x0c, 2, HDA_INPUT), 2244 HDA_BIND_MUTE("Front Playback Switch", 0x0c, 2, HDA_INPUT),
@@ -3919,6 +3848,8 @@ static struct hda_amp_list alc880_lg_loopbacks[] = {
3919 * Common callbacks 3848 * Common callbacks
3920 */ 3849 */
3921 3850
3851static void alc_init_special_input_src(struct hda_codec *codec);
3852
3922static int alc_init(struct hda_codec *codec) 3853static int alc_init(struct hda_codec *codec)
3923{ 3854{
3924 struct alc_spec *spec = codec->spec; 3855 struct alc_spec *spec = codec->spec;
@@ -3929,6 +3860,7 @@ static int alc_init(struct hda_codec *codec)
3929 3860
3930 for (i = 0; i < spec->num_init_verbs; i++) 3861 for (i = 0; i < spec->num_init_verbs; i++)
3931 snd_hda_sequence_write(codec, spec->init_verbs[i]); 3862 snd_hda_sequence_write(codec, spec->init_verbs[i]);
3863 alc_init_special_input_src(codec);
3932 3864
3933 if (spec->init_hook) 3865 if (spec->init_hook)
3934 spec->init_hook(codec); 3866 spec->init_hook(codec);
@@ -4284,6 +4216,7 @@ static void alc_free(struct hda_codec *codec)
4284 return; 4216 return;
4285 4217
4286 alc_shutup(codec); 4218 alc_shutup(codec);
4219 snd_hda_input_jack_free(codec);
4287 alc_free_kctls(codec); 4220 alc_free_kctls(codec);
4288 kfree(spec); 4221 kfree(spec);
4289 snd_hda_detach_beep_device(codec); 4222 snd_hda_detach_beep_device(codec);
@@ -4702,7 +4635,7 @@ static struct snd_pci_quirk alc880_cfg_tbl[] = {
4702 SND_PCI_QUIRK(0x1558, 0x5401, "ASUS", ALC880_ASUS_DIG2), 4635 SND_PCI_QUIRK(0x1558, 0x5401, "ASUS", ALC880_ASUS_DIG2),
4703 SND_PCI_QUIRK(0x1565, 0x8202, "Biostar", ALC880_5ST_DIG), 4636 SND_PCI_QUIRK(0x1565, 0x8202, "Biostar", ALC880_5ST_DIG),
4704 SND_PCI_QUIRK(0x1584, 0x9050, "Uniwill", ALC880_UNIWILL_DIG), 4637 SND_PCI_QUIRK(0x1584, 0x9050, "Uniwill", ALC880_UNIWILL_DIG),
4705 SND_PCI_QUIRK(0x1584, 0x9054, "Uniwlll", ALC880_F1734), 4638 SND_PCI_QUIRK(0x1584, 0x9054, "Uniwill", ALC880_F1734),
4706 SND_PCI_QUIRK(0x1584, 0x9070, "Uniwill", ALC880_UNIWILL), 4639 SND_PCI_QUIRK(0x1584, 0x9070, "Uniwill", ALC880_UNIWILL),
4707 SND_PCI_QUIRK(0x1584, 0x9077, "Uniwill P53", ALC880_UNIWILL_P53), 4640 SND_PCI_QUIRK(0x1584, 0x9077, "Uniwill P53", ALC880_UNIWILL_P53),
4708 SND_PCI_QUIRK(0x161f, 0x203d, "W810", ALC880_W810), 4641 SND_PCI_QUIRK(0x161f, 0x203d, "W810", ALC880_W810),
@@ -5151,7 +5084,9 @@ static const char *alc_get_line_out_pfx(const struct auto_pin_cfg *cfg,
5151 5084
5152 switch (cfg->line_out_type) { 5085 switch (cfg->line_out_type) {
5153 case AUTO_PIN_SPEAKER_OUT: 5086 case AUTO_PIN_SPEAKER_OUT:
5154 return "Speaker"; 5087 if (cfg->line_outs == 1)
5088 return "Speaker";
5089 break;
5155 case AUTO_PIN_HP_OUT: 5090 case AUTO_PIN_HP_OUT:
5156 return "Headphone"; 5091 return "Headphone";
5157 default: 5092 default:
@@ -5205,16 +5140,19 @@ static int alc880_auto_create_multi_out_ctls(struct alc_spec *spec,
5205 return err; 5140 return err;
5206 } else { 5141 } else {
5207 const char *name = pfx; 5142 const char *name = pfx;
5208 if (!name) 5143 int index = i;
5144 if (!name) {
5209 name = chname[i]; 5145 name = chname[i];
5146 index = 0;
5147 }
5210 err = __add_pb_vol_ctrl(spec, ALC_CTL_WIDGET_VOL, 5148 err = __add_pb_vol_ctrl(spec, ALC_CTL_WIDGET_VOL,
5211 name, i, 5149 name, index,
5212 HDA_COMPOSE_AMP_VAL(nid, 3, 0, 5150 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
5213 HDA_OUTPUT)); 5151 HDA_OUTPUT));
5214 if (err < 0) 5152 if (err < 0)
5215 return err; 5153 return err;
5216 err = __add_pb_sw_ctrl(spec, ALC_CTL_BIND_MUTE, 5154 err = __add_pb_sw_ctrl(spec, ALC_CTL_BIND_MUTE,
5217 name, i, 5155 name, index,
5218 HDA_COMPOSE_AMP_VAL(nid, 3, 2, 5156 HDA_COMPOSE_AMP_VAL(nid, 3, 2,
5219 HDA_INPUT)); 5157 HDA_INPUT));
5220 if (err < 0) 5158 if (err < 0)
@@ -5585,6 +5523,7 @@ static void fixup_single_adc(struct hda_codec *codec)
5585 spec->capsrc_nids += i; 5523 spec->capsrc_nids += i;
5586 spec->adc_nids += i; 5524 spec->adc_nids += i;
5587 spec->num_adc_nids = 1; 5525 spec->num_adc_nids = 1;
5526 spec->single_input_src = 1;
5588 } 5527 }
5589} 5528}
5590 5529
@@ -5596,6 +5535,16 @@ static void fixup_dual_adc_switch(struct hda_codec *codec)
5596 init_capsrc_for_pin(codec, spec->int_mic.pin); 5535 init_capsrc_for_pin(codec, spec->int_mic.pin);
5597} 5536}
5598 5537
5538/* initialize some special cases for input sources */
5539static void alc_init_special_input_src(struct hda_codec *codec)
5540{
5541 struct alc_spec *spec = codec->spec;
5542 if (spec->dual_adc_switch)
5543 fixup_dual_adc_switch(codec);
5544 else if (spec->single_input_src)
5545 init_capsrc_for_pin(codec, spec->autocfg.inputs[0].pin);
5546}
5547
5599static void set_capture_mixer(struct hda_codec *codec) 5548static void set_capture_mixer(struct hda_codec *codec)
5600{ 5549{
5601 struct alc_spec *spec = codec->spec; 5550 struct alc_spec *spec = codec->spec;
@@ -5611,7 +5560,7 @@ static void set_capture_mixer(struct hda_codec *codec)
5611 int mux = 0; 5560 int mux = 0;
5612 int num_adcs = spec->num_adc_nids; 5561 int num_adcs = spec->num_adc_nids;
5613 if (spec->dual_adc_switch) 5562 if (spec->dual_adc_switch)
5614 fixup_dual_adc_switch(codec); 5563 num_adcs = 1;
5615 else if (spec->auto_mic) 5564 else if (spec->auto_mic)
5616 fixup_automic_adc(codec); 5565 fixup_automic_adc(codec);
5617 else if (spec->input_mux) { 5566 else if (spec->input_mux) {
@@ -5620,8 +5569,6 @@ static void set_capture_mixer(struct hda_codec *codec)
5620 else if (spec->input_mux->num_items == 1) 5569 else if (spec->input_mux->num_items == 1)
5621 fixup_single_adc(codec); 5570 fixup_single_adc(codec);
5622 } 5571 }
5623 if (spec->dual_adc_switch)
5624 num_adcs = 1;
5625 spec->cap_mixer = caps[mux][num_adcs - 1]; 5572 spec->cap_mixer = caps[mux][num_adcs - 1];
5626 } 5573 }
5627} 5574}
@@ -10748,6 +10695,7 @@ static struct alc_config_preset alc882_presets[] = {
10748 */ 10695 */
10749enum { 10696enum {
10750 PINFIX_ABIT_AW9D_MAX, 10697 PINFIX_ABIT_AW9D_MAX,
10698 PINFIX_LENOVO_Y530,
10751 PINFIX_PB_M5210, 10699 PINFIX_PB_M5210,
10752 PINFIX_ACER_ASPIRE_7736, 10700 PINFIX_ACER_ASPIRE_7736,
10753}; 10701};
@@ -10762,6 +10710,14 @@ static const struct alc_fixup alc882_fixups[] = {
10762 { } 10710 { }
10763 } 10711 }
10764 }, 10712 },
10713 [PINFIX_LENOVO_Y530] = {
10714 .type = ALC_FIXUP_PINS,
10715 .v.pins = (const struct alc_pincfg[]) {
10716 { 0x15, 0x99130112 }, /* rear int speakers */
10717 { 0x16, 0x99130111 }, /* subwoofer */
10718 { }
10719 }
10720 },
10765 [PINFIX_PB_M5210] = { 10721 [PINFIX_PB_M5210] = {
10766 .type = ALC_FIXUP_VERBS, 10722 .type = ALC_FIXUP_VERBS,
10767 .v.verbs = (const struct hda_verb[]) { 10723 .v.verbs = (const struct hda_verb[]) {
@@ -10777,6 +10733,7 @@ static const struct alc_fixup alc882_fixups[] = {
10777 10733
10778static struct snd_pci_quirk alc882_fixup_tbl[] = { 10734static struct snd_pci_quirk alc882_fixup_tbl[] = {
10779 SND_PCI_QUIRK(0x1025, 0x0155, "Packard-Bell M5120", PINFIX_PB_M5210), 10735 SND_PCI_QUIRK(0x1025, 0x0155, "Packard-Bell M5120", PINFIX_PB_M5210),
10736 SND_PCI_QUIRK(0x17aa, 0x3a0d, "Lenovo Y530", PINFIX_LENOVO_Y530),
10780 SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", PINFIX_ABIT_AW9D_MAX), 10737 SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", PINFIX_ABIT_AW9D_MAX),
10781 SND_PCI_QUIRK(0x1025, 0x0296, "Acer Aspire 7736z", PINFIX_ACER_ASPIRE_7736), 10738 SND_PCI_QUIRK(0x1025, 0x0296, "Acer Aspire 7736z", PINFIX_ACER_ASPIRE_7736),
10782 {} 10739 {}
@@ -10829,23 +10786,28 @@ static void alc882_auto_init_hp_out(struct hda_codec *codec)
10829 hda_nid_t pin, dac; 10786 hda_nid_t pin, dac;
10830 int i; 10787 int i;
10831 10788
10832 for (i = 0; i < ARRAY_SIZE(spec->autocfg.hp_pins); i++) { 10789 if (spec->autocfg.line_out_type != AUTO_PIN_HP_OUT) {
10833 pin = spec->autocfg.hp_pins[i]; 10790 for (i = 0; i < ARRAY_SIZE(spec->autocfg.hp_pins); i++) {
10834 if (!pin) 10791 pin = spec->autocfg.hp_pins[i];
10835 break; 10792 if (!pin)
10836 dac = spec->multiout.hp_nid; 10793 break;
10837 if (!dac) 10794 dac = spec->multiout.hp_nid;
10838 dac = spec->multiout.dac_nids[0]; /* to front */ 10795 if (!dac)
10839 alc882_auto_set_output_and_unmute(codec, pin, PIN_HP, dac); 10796 dac = spec->multiout.dac_nids[0]; /* to front */
10797 alc882_auto_set_output_and_unmute(codec, pin, PIN_HP, dac);
10798 }
10840 } 10799 }
10841 for (i = 0; i < ARRAY_SIZE(spec->autocfg.speaker_pins); i++) { 10800
10842 pin = spec->autocfg.speaker_pins[i]; 10801 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT) {
10843 if (!pin) 10802 for (i = 0; i < ARRAY_SIZE(spec->autocfg.speaker_pins); i++) {
10844 break; 10803 pin = spec->autocfg.speaker_pins[i];
10845 dac = spec->multiout.extra_out_nid[0]; 10804 if (!pin)
10846 if (!dac) 10805 break;
10847 dac = spec->multiout.dac_nids[0]; /* to front */ 10806 dac = spec->multiout.extra_out_nid[0];
10848 alc882_auto_set_output_and_unmute(codec, pin, PIN_OUT, dac); 10807 if (!dac)
10808 dac = spec->multiout.dac_nids[0]; /* to front */
10809 alc882_auto_set_output_and_unmute(codec, pin, PIN_OUT, dac);
10810 }
10849 } 10811 }
10850} 10812}
10851 10813
@@ -13796,6 +13758,7 @@ static int alc268_parse_auto_config(struct hda_codec *codec)
13796} 13758}
13797 13759
13798#define alc268_auto_init_analog_input alc882_auto_init_analog_input 13760#define alc268_auto_init_analog_input alc882_auto_init_analog_input
13761#define alc268_auto_init_input_src alc882_auto_init_input_src
13799 13762
13800/* init callback for auto-configuration model -- overriding the default init */ 13763/* init callback for auto-configuration model -- overriding the default init */
13801static void alc268_auto_init(struct hda_codec *codec) 13764static void alc268_auto_init(struct hda_codec *codec)
@@ -13805,6 +13768,7 @@ static void alc268_auto_init(struct hda_codec *codec)
13805 alc268_auto_init_hp_out(codec); 13768 alc268_auto_init_hp_out(codec);
13806 alc268_auto_init_mono_speaker_out(codec); 13769 alc268_auto_init_mono_speaker_out(codec);
13807 alc268_auto_init_analog_input(codec); 13770 alc268_auto_init_analog_input(codec);
13771 alc268_auto_init_input_src(codec);
13808 alc_auto_init_digital(codec); 13772 alc_auto_init_digital(codec);
13809 if (spec->unsol_event) 13773 if (spec->unsol_event)
13810 alc_inithook(codec); 13774 alc_inithook(codec);
@@ -14092,7 +14056,6 @@ static int patch_alc268(struct hda_codec *codec)
14092 if (!spec->no_analog && !spec->adc_nids && spec->input_mux) { 14056 if (!spec->no_analog && !spec->adc_nids && spec->input_mux) {
14093 /* check whether NID 0x07 is valid */ 14057 /* check whether NID 0x07 is valid */
14094 unsigned int wcap = get_wcaps(codec, 0x07); 14058 unsigned int wcap = get_wcaps(codec, 0x07);
14095 int i;
14096 14059
14097 spec->capsrc_nids = alc268_capsrc_nids; 14060 spec->capsrc_nids = alc268_capsrc_nids;
14098 /* get type */ 14061 /* get type */
@@ -14112,13 +14075,6 @@ static int patch_alc268(struct hda_codec *codec)
14112 spec->num_adc_nids = ARRAY_SIZE(alc268_adc_nids); 14075 spec->num_adc_nids = ARRAY_SIZE(alc268_adc_nids);
14113 add_mixer(spec, alc268_capture_mixer); 14076 add_mixer(spec, alc268_capture_mixer);
14114 } 14077 }
14115 /* set default input source */
14116 for (i = 0; i < spec->num_adc_nids; i++)
14117 snd_hda_codec_write_cache(codec, alc268_capsrc_nids[i],
14118 0, AC_VERB_SET_CONNECT_SEL,
14119 i < spec->num_mux_defs ?
14120 spec->input_mux[i].items[0].index :
14121 spec->input_mux->items[0].index);
14122 } 14078 }
14123 14079
14124 spec->vmaster_nid = 0x02; 14080 spec->vmaster_nid = 0x02;
@@ -14495,7 +14451,7 @@ static void alc269_speaker_automute(struct hda_codec *codec)
14495 HDA_AMP_MUTE, bits); 14451 HDA_AMP_MUTE, bits);
14496 snd_hda_codec_amp_stereo(codec, 0x0c, HDA_INPUT, 1, 14452 snd_hda_codec_amp_stereo(codec, 0x0c, HDA_INPUT, 1,
14497 HDA_AMP_MUTE, bits); 14453 HDA_AMP_MUTE, bits);
14498 alc_report_jack(codec, nid); 14454 snd_hda_input_jack_report(codec, nid);
14499} 14455}
14500 14456
14501/* unsolicited event for HP jack sensing */ 14457/* unsolicited event for HP jack sensing */
@@ -14807,11 +14763,6 @@ static int alc269_parse_auto_config(struct hda_codec *codec)
14807 fillup_priv_adc_nids(codec, alc269_adc_candidates, 14763 fillup_priv_adc_nids(codec, alc269_adc_candidates,
14808 sizeof(alc269_adc_candidates)); 14764 sizeof(alc269_adc_candidates));
14809 14765
14810 /* set default input source */
14811 if (!spec->dual_adc_switch)
14812 select_or_unmute_capsrc(codec, spec->capsrc_nids[0],
14813 spec->input_mux->items[0].index);
14814
14815 err = alc_auto_add_mic_boost(codec); 14766 err = alc_auto_add_mic_boost(codec);
14816 if (err < 0) 14767 if (err < 0)
14817 return err; 14768 return err;
@@ -14825,6 +14776,7 @@ static int alc269_parse_auto_config(struct hda_codec *codec)
14825#define alc269_auto_init_multi_out alc268_auto_init_multi_out 14776#define alc269_auto_init_multi_out alc268_auto_init_multi_out
14826#define alc269_auto_init_hp_out alc268_auto_init_hp_out 14777#define alc269_auto_init_hp_out alc268_auto_init_hp_out
14827#define alc269_auto_init_analog_input alc882_auto_init_analog_input 14778#define alc269_auto_init_analog_input alc882_auto_init_analog_input
14779#define alc269_auto_init_input_src alc882_auto_init_input_src
14828 14780
14829 14781
14830/* init callback for auto-configuration model -- overriding the default init */ 14782/* init callback for auto-configuration model -- overriding the default init */
@@ -14834,6 +14786,8 @@ static void alc269_auto_init(struct hda_codec *codec)
14834 alc269_auto_init_multi_out(codec); 14786 alc269_auto_init_multi_out(codec);
14835 alc269_auto_init_hp_out(codec); 14787 alc269_auto_init_hp_out(codec);
14836 alc269_auto_init_analog_input(codec); 14788 alc269_auto_init_analog_input(codec);
14789 if (!spec->dual_adc_switch)
14790 alc269_auto_init_input_src(codec);
14837 alc_auto_init_digital(codec); 14791 alc_auto_init_digital(codec);
14838 if (spec->unsol_event) 14792 if (spec->unsol_event)
14839 alc_inithook(codec); 14793 alc_inithook(codec);
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
index bd7b123f6440..05fcd60cc46f 100644
--- a/sound/pci/hda/patch_sigmatel.c
+++ b/sound/pci/hda/patch_sigmatel.c
@@ -180,18 +180,16 @@ struct sigmatel_event {
180 int data; 180 int data;
181}; 181};
182 182
183struct sigmatel_jack {
184 hda_nid_t nid;
185 int type;
186 struct snd_jack *jack;
187};
188
189struct sigmatel_mic_route { 183struct sigmatel_mic_route {
190 hda_nid_t pin; 184 hda_nid_t pin;
191 signed char mux_idx; 185 signed char mux_idx;
192 signed char dmux_idx; 186 signed char dmux_idx;
193}; 187};
194 188
189#define MAX_PINS_NUM 16
190#define MAX_ADCS_NUM 4
191#define MAX_DMICS_NUM 4
192
195struct sigmatel_spec { 193struct sigmatel_spec {
196 struct snd_kcontrol_new *mixers[4]; 194 struct snd_kcontrol_new *mixers[4];
197 unsigned int num_mixers; 195 unsigned int num_mixers;
@@ -229,9 +227,6 @@ struct sigmatel_spec {
229 hda_nid_t *pwr_nids; 227 hda_nid_t *pwr_nids;
230 hda_nid_t *dac_list; 228 hda_nid_t *dac_list;
231 229
232 /* jack detection */
233 struct snd_array jacks;
234
235 /* events */ 230 /* events */
236 struct snd_array events; 231 struct snd_array events;
237 232
@@ -309,6 +304,17 @@ struct sigmatel_spec {
309 struct hda_input_mux private_imux; 304 struct hda_input_mux private_imux;
310 struct hda_input_mux private_smux; 305 struct hda_input_mux private_smux;
311 struct hda_input_mux private_mono_mux; 306 struct hda_input_mux private_mono_mux;
307
308 /* auto spec */
309 unsigned auto_pin_cnt;
310 hda_nid_t auto_pin_nids[MAX_PINS_NUM];
311 unsigned auto_adc_cnt;
312 hda_nid_t auto_adc_nids[MAX_ADCS_NUM];
313 hda_nid_t auto_mux_nids[MAX_ADCS_NUM];
314 hda_nid_t auto_dmux_nids[MAX_ADCS_NUM];
315 unsigned long auto_capvols[MAX_ADCS_NUM];
316 unsigned auto_dmic_cnt;
317 hda_nid_t auto_dmic_nids[MAX_DMICS_NUM];
312}; 318};
313 319
314static hda_nid_t stac9200_adc_nids[1] = { 320static hda_nid_t stac9200_adc_nids[1] = {
@@ -364,14 +370,6 @@ static unsigned long stac92hd73xx_capvols[] = {
364 370
365#define STAC92HD83_DAC_COUNT 3 371#define STAC92HD83_DAC_COUNT 3
366 372
367static hda_nid_t stac92hd83xxx_mux_nids[2] = {
368 0x17, 0x18,
369};
370
371static hda_nid_t stac92hd83xxx_adc_nids[2] = {
372 0x15, 0x16,
373};
374
375static hda_nid_t stac92hd83xxx_pwr_nids[4] = { 373static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
376 0xa, 0xb, 0xd, 0xe, 374 0xa, 0xb, 0xd, 0xe,
377}; 375};
@@ -384,25 +382,9 @@ static unsigned int stac92hd83xxx_pwr_mapping[4] = {
384 0x03, 0x0c, 0x20, 0x40, 382 0x03, 0x0c, 0x20, 0x40,
385}; 383};
386 384
387#define STAC92HD83XXX_NUM_DMICS 2 385static hda_nid_t stac92hd83xxx_dmic_nids[] = {
388static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = { 386 0x11, 0x20,
389 0x11, 0x20, 0
390};
391
392#define STAC92HD88XXX_NUM_DMICS STAC92HD83XXX_NUM_DMICS
393#define stac92hd88xxx_dmic_nids stac92hd83xxx_dmic_nids
394
395#define STAC92HD87B_NUM_DMICS 1
396static hda_nid_t stac92hd87b_dmic_nids[STAC92HD87B_NUM_DMICS + 1] = {
397 0x11, 0
398};
399
400#define STAC92HD83XXX_NUM_CAPS 2
401static unsigned long stac92hd83xxx_capvols[] = {
402 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_OUTPUT),
403 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_OUTPUT),
404}; 387};
405#define stac92hd83xxx_capsws stac92hd83xxx_capvols
406 388
407static hda_nid_t stac92hd71bxx_pwr_nids[3] = { 389static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
408 0x0a, 0x0d, 0x0f 390 0x0a, 0x0d, 0x0f
@@ -581,21 +563,6 @@ static hda_nid_t stac92hd73xx_pin_nids[13] = {
581 0x14, 0x22, 0x23 563 0x14, 0x22, 0x23
582}; 564};
583 565
584static hda_nid_t stac92hd83xxx_pin_nids[10] = {
585 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
586 0x0f, 0x10, 0x11, 0x1f, 0x20,
587};
588
589static hda_nid_t stac92hd87xxx_pin_nids[6] = {
590 0x0a, 0x0b, 0x0c, 0x0d,
591 0x0f, 0x11,
592};
593
594static hda_nid_t stac92hd88xxx_pin_nids[8] = {
595 0x0a, 0x0b, 0x0c, 0x0d,
596 0x0f, 0x11, 0x1f, 0x20,
597};
598
599#define STAC92HD71BXX_NUM_PINS 13 566#define STAC92HD71BXX_NUM_PINS 13
600static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = { 567static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
601 0x0a, 0x0b, 0x0c, 0x0d, 0x00, 568 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
@@ -757,7 +724,7 @@ static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_e
757 struct sigmatel_spec *spec = codec->spec; 724 struct sigmatel_spec *spec = codec->spec;
758 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 725 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
759 const struct hda_input_mux *imux = spec->input_mux; 726 const struct hda_input_mux *imux = spec->input_mux;
760 unsigned int idx, prev_idx; 727 unsigned int idx, prev_idx, didx;
761 728
762 idx = ucontrol->value.enumerated.item[0]; 729 idx = ucontrol->value.enumerated.item[0];
763 if (idx >= imux->num_items) 730 if (idx >= imux->num_items)
@@ -769,7 +736,8 @@ static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_e
769 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0, 736 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
770 AC_VERB_SET_CONNECT_SEL, 737 AC_VERB_SET_CONNECT_SEL,
771 imux->items[idx].index); 738 imux->items[idx].index);
772 if (prev_idx >= spec->num_analog_muxes) { 739 if (prev_idx >= spec->num_analog_muxes &&
740 spec->mux_nids[adc_idx] != spec->dmux_nids[adc_idx]) {
773 imux = spec->dinput_mux; 741 imux = spec->dinput_mux;
774 /* 0 = analog */ 742 /* 0 = analog */
775 snd_hda_codec_write_cache(codec, 743 snd_hda_codec_write_cache(codec,
@@ -779,9 +747,13 @@ static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_e
779 } 747 }
780 } else { 748 } else {
781 imux = spec->dinput_mux; 749 imux = spec->dinput_mux;
750 /* first dimux item is hardcoded to select analog imux,
751 * so lets skip it
752 */
753 didx = idx - spec->num_analog_muxes + 1;
782 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0, 754 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
783 AC_VERB_SET_CONNECT_SEL, 755 AC_VERB_SET_CONNECT_SEL,
784 imux->items[idx - 1].index); 756 imux->items[didx].index);
785 } 757 }
786 spec->cur_mux[adc_idx] = idx; 758 spec->cur_mux[adc_idx] = idx;
787 return 1; 759 return 1;
@@ -3419,6 +3391,17 @@ static const char * const stac92xx_dmic_labels[5] = {
3419 "Digital Mic 3", "Digital Mic 4" 3391 "Digital Mic 3", "Digital Mic 4"
3420}; 3392};
3421 3393
3394static hda_nid_t get_connected_node(struct hda_codec *codec, hda_nid_t mux,
3395 int idx)
3396{
3397 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3398 int nums;
3399 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3400 if (idx >= 0 && idx < nums)
3401 return conn[idx];
3402 return 0;
3403}
3404
3422static int get_connection_index(struct hda_codec *codec, hda_nid_t mux, 3405static int get_connection_index(struct hda_codec *codec, hda_nid_t mux,
3423 hda_nid_t nid) 3406 hda_nid_t nid)
3424{ 3407{
@@ -3429,6 +3412,15 @@ static int get_connection_index(struct hda_codec *codec, hda_nid_t mux,
3429 for (i = 0; i < nums; i++) 3412 for (i = 0; i < nums; i++)
3430 if (conn[i] == nid) 3413 if (conn[i] == nid)
3431 return i; 3414 return i;
3415
3416 for (i = 0; i < nums; i++) {
3417 unsigned int wid_caps = get_wcaps(codec, conn[i]);
3418 unsigned int wid_type = get_wcaps_type(wid_caps);
3419
3420 if (wid_type != AC_WID_PIN && wid_type != AC_WID_AUD_MIX)
3421 if (get_connection_index(codec, conn[i], nid) >= 0)
3422 return i;
3423 }
3432 return -1; 3424 return -1;
3433} 3425}
3434 3426
@@ -3501,6 +3493,16 @@ static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3501 type_idx, HDA_OUTPUT); 3493 type_idx, HDA_OUTPUT);
3502 if (err < 0) 3494 if (err < 0)
3503 return err; 3495 return err;
3496 if (!err) {
3497 nid = get_connected_node(codec,
3498 spec->dmux_nids[0], index);
3499 if (nid)
3500 err = create_elem_capture_vol(codec,
3501 nid, label,
3502 type_idx, HDA_INPUT);
3503 if (err < 0)
3504 return err;
3505 }
3504 } 3506 }
3505 } 3507 }
3506 3508
@@ -4054,21 +4056,10 @@ static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4054 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */ 4056 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
4055} 4057}
4056 4058
4057#ifdef CONFIG_SND_HDA_INPUT_JACK
4058static void stac92xx_free_jack_priv(struct snd_jack *jack)
4059{
4060 struct sigmatel_jack *jacks = jack->private_data;
4061 jacks->nid = 0;
4062 jacks->jack = NULL;
4063}
4064#endif
4065
4066static int stac92xx_add_jack(struct hda_codec *codec, 4059static int stac92xx_add_jack(struct hda_codec *codec,
4067 hda_nid_t nid, int type) 4060 hda_nid_t nid, int type)
4068{ 4061{
4069#ifdef CONFIG_SND_HDA_INPUT_JACK 4062#ifdef CONFIG_SND_HDA_INPUT_JACK
4070 struct sigmatel_spec *spec = codec->spec;
4071 struct sigmatel_jack *jack;
4072 int def_conf = snd_hda_codec_get_pincfg(codec, nid); 4063 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
4073 int connectivity = get_defcfg_connect(def_conf); 4064 int connectivity = get_defcfg_connect(def_conf);
4074 char name[32]; 4065 char name[32];
@@ -4077,26 +4068,15 @@ static int stac92xx_add_jack(struct hda_codec *codec,
4077 if (connectivity && connectivity != AC_JACK_PORT_FIXED) 4068 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
4078 return 0; 4069 return 0;
4079 4070
4080 snd_array_init(&spec->jacks, sizeof(*jack), 32);
4081 jack = snd_array_new(&spec->jacks);
4082 if (!jack)
4083 return -ENOMEM;
4084 jack->nid = nid;
4085 jack->type = type;
4086
4087 snprintf(name, sizeof(name), "%s at %s %s Jack", 4071 snprintf(name, sizeof(name), "%s at %s %s Jack",
4088 snd_hda_get_jack_type(def_conf), 4072 snd_hda_get_jack_type(def_conf),
4089 snd_hda_get_jack_connectivity(def_conf), 4073 snd_hda_get_jack_connectivity(def_conf),
4090 snd_hda_get_jack_location(def_conf)); 4074 snd_hda_get_jack_location(def_conf));
4091 4075
4092 err = snd_jack_new(codec->bus->card, name, type, &jack->jack); 4076 err = snd_hda_input_jack_add(codec, nid, type, name);
4093 if (err < 0) { 4077 if (err < 0)
4094 jack->nid = 0;
4095 return err; 4078 return err;
4096 } 4079#endif /* CONFIG_SND_HDA_INPUT_JACK */
4097 jack->jack->private_data = jack;
4098 jack->jack->private_free = stac92xx_free_jack_priv;
4099#endif
4100 return 0; 4080 return 0;
4101} 4081}
4102 4082
@@ -4399,23 +4379,6 @@ static int stac92xx_init(struct hda_codec *codec)
4399 return 0; 4379 return 0;
4400} 4380}
4401 4381
4402static void stac92xx_free_jacks(struct hda_codec *codec)
4403{
4404#ifdef CONFIG_SND_HDA_INPUT_JACK
4405 /* free jack instances manually when clearing/reconfiguring */
4406 struct sigmatel_spec *spec = codec->spec;
4407 if (!codec->bus->shutdown && spec->jacks.list) {
4408 struct sigmatel_jack *jacks = spec->jacks.list;
4409 int i;
4410 for (i = 0; i < spec->jacks.used; i++, jacks++) {
4411 if (jacks->jack)
4412 snd_device_free(codec->bus->card, jacks->jack);
4413 }
4414 }
4415 snd_array_free(&spec->jacks);
4416#endif
4417}
4418
4419static void stac92xx_free_kctls(struct hda_codec *codec) 4382static void stac92xx_free_kctls(struct hda_codec *codec)
4420{ 4383{
4421 struct sigmatel_spec *spec = codec->spec; 4384 struct sigmatel_spec *spec = codec->spec;
@@ -4449,7 +4412,7 @@ static void stac92xx_free(struct hda_codec *codec)
4449 return; 4412 return;
4450 4413
4451 stac92xx_shutup(codec); 4414 stac92xx_shutup(codec);
4452 stac92xx_free_jacks(codec); 4415 snd_hda_input_jack_free(codec);
4453 snd_array_free(&spec->events); 4416 snd_array_free(&spec->events);
4454 4417
4455 kfree(spec); 4418 kfree(spec);
@@ -4667,33 +4630,6 @@ static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4667 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid)); 4630 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
4668} 4631}
4669 4632
4670static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4671{
4672 struct sigmatel_spec *spec = codec->spec;
4673 struct sigmatel_jack *jacks = spec->jacks.list;
4674
4675 if (jacks) {
4676 int i;
4677 for (i = 0; i < spec->jacks.used; i++) {
4678 if (jacks->nid == nid) {
4679 unsigned int pin_ctl =
4680 snd_hda_codec_read(codec, nid,
4681 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4682 0x00);
4683 int type = jacks->type;
4684 if (type == (SND_JACK_LINEOUT
4685 | SND_JACK_HEADPHONE))
4686 type = (pin_ctl & AC_PINCTL_HP_EN)
4687 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4688 snd_jack_report(jacks->jack,
4689 get_pin_presence(codec, nid)
4690 ? type : 0);
4691 }
4692 jacks++;
4693 }
4694 }
4695}
4696
4697/* get the pin connection (fixed, none, etc) */ 4633/* get the pin connection (fixed, none, etc) */
4698static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx) 4634static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4699{ 4635{
@@ -4782,7 +4718,7 @@ static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4782 case STAC_PWR_EVENT: 4718 case STAC_PWR_EVENT:
4783 if (spec->num_pwrs > 0) 4719 if (spec->num_pwrs > 0)
4784 stac92xx_pin_sense(codec, event->nid); 4720 stac92xx_pin_sense(codec, event->nid);
4785 stac92xx_report_jack(codec, event->nid); 4721 snd_hda_input_jack_report(codec, event->nid);
4786 4722
4787 switch (codec->subsystem_id) { 4723 switch (codec->subsystem_id) {
4788 case 0x103c308f: 4724 case 0x103c308f:
@@ -5378,6 +5314,105 @@ static int hp_bnb2011_with_dock(struct hda_codec *codec)
5378 return 0; 5314 return 0;
5379} 5315}
5380 5316
5317static void stac92hd8x_add_pin(struct hda_codec *codec, hda_nid_t nid)
5318{
5319 struct sigmatel_spec *spec = codec->spec;
5320 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
5321 int i;
5322
5323 spec->auto_pin_nids[spec->auto_pin_cnt] = nid;
5324 spec->auto_pin_cnt++;
5325
5326 if (get_defcfg_device(def_conf) == AC_JACK_MIC_IN &&
5327 get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE) {
5328 for (i = 0; i < ARRAY_SIZE(stac92hd83xxx_dmic_nids); i++) {
5329 if (nid == stac92hd83xxx_dmic_nids[i]) {
5330 spec->auto_dmic_nids[spec->auto_dmic_cnt] = nid;
5331 spec->auto_dmic_cnt++;
5332 }
5333 }
5334 }
5335}
5336
5337static void stac92hd8x_add_adc(struct hda_codec *codec, hda_nid_t nid)
5338{
5339 struct sigmatel_spec *spec = codec->spec;
5340
5341 spec->auto_adc_nids[spec->auto_adc_cnt] = nid;
5342 spec->auto_adc_cnt++;
5343}
5344
5345static void stac92hd8x_add_mux(struct hda_codec *codec, hda_nid_t nid)
5346{
5347 int i, j;
5348 struct sigmatel_spec *spec = codec->spec;
5349
5350 for (i = 0; i < spec->auto_adc_cnt; i++) {
5351 if (get_connection_index(codec,
5352 spec->auto_adc_nids[i], nid) >= 0) {
5353 /* mux and volume for adc_nids[i] */
5354 if (!spec->auto_mux_nids[i]) {
5355 spec->auto_mux_nids[i] = nid;
5356 /* 92hd codecs capture volume is in mux */
5357 spec->auto_capvols[i] = HDA_COMPOSE_AMP_VAL(nid,
5358 3, 0, HDA_OUTPUT);
5359 }
5360 for (j = 0; j < spec->auto_dmic_cnt; j++) {
5361 if (get_connection_index(codec, nid,
5362 spec->auto_dmic_nids[j]) >= 0) {
5363 /* dmux for adc_nids[i] */
5364 if (!spec->auto_dmux_nids[i])
5365 spec->auto_dmux_nids[i] = nid;
5366 break;
5367 }
5368 }
5369 break;
5370 }
5371 }
5372}
5373
5374static void stac92hd8x_fill_auto_spec(struct hda_codec *codec)
5375{
5376 hda_nid_t nid, end_nid;
5377 unsigned int wid_caps, wid_type;
5378 struct sigmatel_spec *spec = codec->spec;
5379
5380 end_nid = codec->start_nid + codec->num_nodes;
5381
5382 for (nid = codec->start_nid; nid < end_nid; nid++) {
5383 wid_caps = get_wcaps(codec, nid);
5384 wid_type = get_wcaps_type(wid_caps);
5385
5386 if (wid_type == AC_WID_PIN)
5387 stac92hd8x_add_pin(codec, nid);
5388
5389 if (wid_type == AC_WID_AUD_IN && !(wid_caps & AC_WCAP_DIGITAL))
5390 stac92hd8x_add_adc(codec, nid);
5391 }
5392
5393 for (nid = codec->start_nid; nid < end_nid; nid++) {
5394 wid_caps = get_wcaps(codec, nid);
5395 wid_type = get_wcaps_type(wid_caps);
5396
5397 if (wid_type == AC_WID_AUD_SEL)
5398 stac92hd8x_add_mux(codec, nid);
5399 }
5400
5401 spec->pin_nids = spec->auto_pin_nids;
5402 spec->num_pins = spec->auto_pin_cnt;
5403 spec->adc_nids = spec->auto_adc_nids;
5404 spec->num_adcs = spec->auto_adc_cnt;
5405 spec->capvols = spec->auto_capvols;
5406 spec->capsws = spec->auto_capvols;
5407 spec->num_caps = spec->auto_adc_cnt;
5408 spec->mux_nids = spec->auto_mux_nids;
5409 spec->num_muxes = spec->auto_adc_cnt;
5410 spec->dmux_nids = spec->auto_dmux_nids;
5411 spec->num_dmuxes = spec->auto_adc_cnt;
5412 spec->dmic_nids = spec->auto_dmic_nids;
5413 spec->num_dmics = spec->auto_dmic_cnt;
5414}
5415
5381static int patch_stac92hd83xxx(struct hda_codec *codec) 5416static int patch_stac92hd83xxx(struct hda_codec *codec)
5382{ 5417{
5383 struct sigmatel_spec *spec; 5418 struct sigmatel_spec *spec;
@@ -5399,26 +5434,17 @@ static int patch_stac92hd83xxx(struct hda_codec *codec)
5399 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7ED, 0); 5434 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7ED, 0);
5400 codec->no_trigger_sense = 1; 5435 codec->no_trigger_sense = 1;
5401 codec->spec = spec; 5436 codec->spec = spec;
5437
5438 stac92hd8x_fill_auto_spec(codec);
5439
5402 spec->linear_tone_beep = 0; 5440 spec->linear_tone_beep = 0;
5403 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs; 5441 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
5404 spec->digbeep_nid = 0x21; 5442 spec->digbeep_nid = 0x21;
5405 spec->dmic_nids = stac92hd83xxx_dmic_nids;
5406 spec->dmux_nids = stac92hd83xxx_mux_nids;
5407 spec->mux_nids = stac92hd83xxx_mux_nids;
5408 spec->num_muxes = ARRAY_SIZE(stac92hd83xxx_mux_nids);
5409 spec->adc_nids = stac92hd83xxx_adc_nids;
5410 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
5411 spec->pwr_nids = stac92hd83xxx_pwr_nids; 5443 spec->pwr_nids = stac92hd83xxx_pwr_nids;
5412 spec->pwr_mapping = stac92hd83xxx_pwr_mapping; 5444 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
5413 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids); 5445 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
5414 spec->multiout.dac_nids = spec->dac_nids; 5446 spec->multiout.dac_nids = spec->dac_nids;
5415
5416 spec->init = stac92hd83xxx_core_init; 5447 spec->init = stac92hd83xxx_core_init;
5417 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
5418 spec->pin_nids = stac92hd83xxx_pin_nids;
5419 spec->num_caps = STAC92HD83XXX_NUM_CAPS;
5420 spec->capvols = stac92hd83xxx_capvols;
5421 spec->capsws = stac92hd83xxx_capsws;
5422 5448
5423 spec->board_config = snd_hda_check_board_config(codec, 5449 spec->board_config = snd_hda_check_board_config(codec,
5424 STAC_92HD83XXX_MODELS, 5450 STAC_92HD83XXX_MODELS,
@@ -5436,28 +5462,11 @@ again:
5436 case 0x111d76d1: 5462 case 0x111d76d1:
5437 case 0x111d76d9: 5463 case 0x111d76d9:
5438 case 0x111d76e5: 5464 case 0x111d76e5:
5439 spec->dmic_nids = stac92hd87b_dmic_nids;
5440 spec->num_dmics = stac92xx_connected_ports(codec,
5441 stac92hd87b_dmic_nids,
5442 STAC92HD87B_NUM_DMICS);
5443 spec->num_pins = ARRAY_SIZE(stac92hd87xxx_pin_nids);
5444 spec->pin_nids = stac92hd87xxx_pin_nids;
5445 spec->mono_nid = 0;
5446 spec->num_pwrs = 0;
5447 break;
5448 case 0x111d7666: 5465 case 0x111d7666:
5449 case 0x111d7667: 5466 case 0x111d7667:
5450 case 0x111d7668: 5467 case 0x111d7668:
5451 case 0x111d7669: 5468 case 0x111d7669:
5452 case 0x111d76e3: 5469 case 0x111d76e3:
5453 spec->num_dmics = stac92xx_connected_ports(codec,
5454 stac92hd88xxx_dmic_nids,
5455 STAC92HD88XXX_NUM_DMICS);
5456 spec->num_pins = ARRAY_SIZE(stac92hd88xxx_pin_nids);
5457 spec->pin_nids = stac92hd88xxx_pin_nids;
5458 spec->mono_nid = 0;
5459 spec->num_pwrs = 0;
5460 break;
5461 case 0x111d7604: 5470 case 0x111d7604:
5462 case 0x111d76d4: 5471 case 0x111d76d4:
5463 case 0x111d7605: 5472 case 0x111d7605:
@@ -5466,9 +5475,6 @@ again:
5466 if (spec->board_config == STAC_92HD83XXX_PWR_REF) 5475 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
5467 break; 5476 break;
5468 spec->num_pwrs = 0; 5477 spec->num_pwrs = 0;
5469 spec->num_dmics = stac92xx_connected_ports(codec,
5470 stac92hd83xxx_dmic_nids,
5471 STAC92HD83XXX_NUM_DMICS);
5472 break; 5478 break;
5473 } 5479 }
5474 5480
diff --git a/sound/pci/intel8x0m.c b/sound/pci/intel8x0m.c
index 13cec1e5ced9..2ae8d29500a8 100644
--- a/sound/pci/intel8x0m.c
+++ b/sound/pci/intel8x0m.c
@@ -341,9 +341,9 @@ static int snd_intel8x0m_codec_semaphore(struct intel8x0m *chip, unsigned int co
341 return -EBUSY; 341 return -EBUSY;
342} 342}
343 343
344static void snd_intel8x0_codec_write(struct snd_ac97 *ac97, 344static void snd_intel8x0m_codec_write(struct snd_ac97 *ac97,
345 unsigned short reg, 345 unsigned short reg,
346 unsigned short val) 346 unsigned short val)
347{ 347{
348 struct intel8x0m *chip = ac97->private_data; 348 struct intel8x0m *chip = ac97->private_data;
349 349
@@ -354,8 +354,8 @@ static void snd_intel8x0_codec_write(struct snd_ac97 *ac97,
354 iaputword(chip, reg + ac97->num * 0x80, val); 354 iaputword(chip, reg + ac97->num * 0x80, val);
355} 355}
356 356
357static unsigned short snd_intel8x0_codec_read(struct snd_ac97 *ac97, 357static unsigned short snd_intel8x0m_codec_read(struct snd_ac97 *ac97,
358 unsigned short reg) 358 unsigned short reg)
359{ 359{
360 struct intel8x0m *chip = ac97->private_data; 360 struct intel8x0m *chip = ac97->private_data;
361 unsigned short res; 361 unsigned short res;
@@ -385,7 +385,7 @@ static unsigned short snd_intel8x0_codec_read(struct snd_ac97 *ac97,
385/* 385/*
386 * DMA I/O 386 * DMA I/O
387 */ 387 */
388static void snd_intel8x0_setup_periods(struct intel8x0m *chip, struct ichdev *ichdev) 388static void snd_intel8x0m_setup_periods(struct intel8x0m *chip, struct ichdev *ichdev)
389{ 389{
390 int idx; 390 int idx;
391 u32 *bdbar = ichdev->bdbar; 391 u32 *bdbar = ichdev->bdbar;
@@ -437,7 +437,7 @@ static void snd_intel8x0_setup_periods(struct intel8x0m *chip, struct ichdev *ic
437 * Interrupt handler 437 * Interrupt handler
438 */ 438 */
439 439
440static inline void snd_intel8x0_update(struct intel8x0m *chip, struct ichdev *ichdev) 440static inline void snd_intel8x0m_update(struct intel8x0m *chip, struct ichdev *ichdev)
441{ 441{
442 unsigned long port = ichdev->reg_offset; 442 unsigned long port = ichdev->reg_offset;
443 int civ, i, step; 443 int civ, i, step;
@@ -489,7 +489,7 @@ static inline void snd_intel8x0_update(struct intel8x0m *chip, struct ichdev *ic
489 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); 489 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
490} 490}
491 491
492static irqreturn_t snd_intel8x0_interrupt(int irq, void *dev_id) 492static irqreturn_t snd_intel8x0m_interrupt(int irq, void *dev_id)
493{ 493{
494 struct intel8x0m *chip = dev_id; 494 struct intel8x0m *chip = dev_id;
495 struct ichdev *ichdev; 495 struct ichdev *ichdev;
@@ -512,7 +512,7 @@ static irqreturn_t snd_intel8x0_interrupt(int irq, void *dev_id)
512 for (i = 0; i < chip->bdbars_count; i++) { 512 for (i = 0; i < chip->bdbars_count; i++) {
513 ichdev = &chip->ichd[i]; 513 ichdev = &chip->ichd[i];
514 if (status & ichdev->int_sta_mask) 514 if (status & ichdev->int_sta_mask)
515 snd_intel8x0_update(chip, ichdev); 515 snd_intel8x0m_update(chip, ichdev);
516 } 516 }
517 517
518 /* ack them */ 518 /* ack them */
@@ -526,7 +526,7 @@ static irqreturn_t snd_intel8x0_interrupt(int irq, void *dev_id)
526 * PCM part 526 * PCM part
527 */ 527 */
528 528
529static int snd_intel8x0_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 529static int snd_intel8x0m_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
530{ 530{
531 struct intel8x0m *chip = snd_pcm_substream_chip(substream); 531 struct intel8x0m *chip = snd_pcm_substream_chip(substream);
532 struct ichdev *ichdev = get_ichdev(substream); 532 struct ichdev *ichdev = get_ichdev(substream);
@@ -561,18 +561,18 @@ static int snd_intel8x0_pcm_trigger(struct snd_pcm_substream *substream, int cmd
561 return 0; 561 return 0;
562} 562}
563 563
564static int snd_intel8x0_hw_params(struct snd_pcm_substream *substream, 564static int snd_intel8x0m_hw_params(struct snd_pcm_substream *substream,
565 struct snd_pcm_hw_params *hw_params) 565 struct snd_pcm_hw_params *hw_params)
566{ 566{
567 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 567 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
568} 568}
569 569
570static int snd_intel8x0_hw_free(struct snd_pcm_substream *substream) 570static int snd_intel8x0m_hw_free(struct snd_pcm_substream *substream)
571{ 571{
572 return snd_pcm_lib_free_pages(substream); 572 return snd_pcm_lib_free_pages(substream);
573} 573}
574 574
575static snd_pcm_uframes_t snd_intel8x0_pcm_pointer(struct snd_pcm_substream *substream) 575static snd_pcm_uframes_t snd_intel8x0m_pcm_pointer(struct snd_pcm_substream *substream)
576{ 576{
577 struct intel8x0m *chip = snd_pcm_substream_chip(substream); 577 struct intel8x0m *chip = snd_pcm_substream_chip(substream);
578 struct ichdev *ichdev = get_ichdev(substream); 578 struct ichdev *ichdev = get_ichdev(substream);
@@ -600,7 +600,7 @@ static int snd_intel8x0m_pcm_prepare(struct snd_pcm_substream *substream)
600 ichdev->fragsize = snd_pcm_lib_period_bytes(substream); 600 ichdev->fragsize = snd_pcm_lib_period_bytes(substream);
601 snd_ac97_write(ichdev->ac97, AC97_LINE1_RATE, runtime->rate); 601 snd_ac97_write(ichdev->ac97, AC97_LINE1_RATE, runtime->rate);
602 snd_ac97_write(ichdev->ac97, AC97_LINE1_LEVEL, 0); 602 snd_ac97_write(ichdev->ac97, AC97_LINE1_LEVEL, 0);
603 snd_intel8x0_setup_periods(chip, ichdev); 603 snd_intel8x0m_setup_periods(chip, ichdev);
604 return 0; 604 return 0;
605} 605}
606 606
@@ -682,22 +682,22 @@ static struct snd_pcm_ops snd_intel8x0m_playback_ops = {
682 .open = snd_intel8x0m_playback_open, 682 .open = snd_intel8x0m_playback_open,
683 .close = snd_intel8x0m_playback_close, 683 .close = snd_intel8x0m_playback_close,
684 .ioctl = snd_pcm_lib_ioctl, 684 .ioctl = snd_pcm_lib_ioctl,
685 .hw_params = snd_intel8x0_hw_params, 685 .hw_params = snd_intel8x0m_hw_params,
686 .hw_free = snd_intel8x0_hw_free, 686 .hw_free = snd_intel8x0m_hw_free,
687 .prepare = snd_intel8x0m_pcm_prepare, 687 .prepare = snd_intel8x0m_pcm_prepare,
688 .trigger = snd_intel8x0_pcm_trigger, 688 .trigger = snd_intel8x0m_pcm_trigger,
689 .pointer = snd_intel8x0_pcm_pointer, 689 .pointer = snd_intel8x0m_pcm_pointer,
690}; 690};
691 691
692static struct snd_pcm_ops snd_intel8x0m_capture_ops = { 692static struct snd_pcm_ops snd_intel8x0m_capture_ops = {
693 .open = snd_intel8x0m_capture_open, 693 .open = snd_intel8x0m_capture_open,
694 .close = snd_intel8x0m_capture_close, 694 .close = snd_intel8x0m_capture_close,
695 .ioctl = snd_pcm_lib_ioctl, 695 .ioctl = snd_pcm_lib_ioctl,
696 .hw_params = snd_intel8x0_hw_params, 696 .hw_params = snd_intel8x0m_hw_params,
697 .hw_free = snd_intel8x0_hw_free, 697 .hw_free = snd_intel8x0m_hw_free,
698 .prepare = snd_intel8x0m_pcm_prepare, 698 .prepare = snd_intel8x0m_pcm_prepare,
699 .trigger = snd_intel8x0_pcm_trigger, 699 .trigger = snd_intel8x0m_pcm_trigger,
700 .pointer = snd_intel8x0_pcm_pointer, 700 .pointer = snd_intel8x0m_pcm_pointer,
701}; 701};
702 702
703 703
@@ -710,7 +710,7 @@ struct ich_pcm_table {
710 int ac97_idx; 710 int ac97_idx;
711}; 711};
712 712
713static int __devinit snd_intel8x0_pcm1(struct intel8x0m *chip, int device, 713static int __devinit snd_intel8x0m_pcm1(struct intel8x0m *chip, int device,
714 struct ich_pcm_table *rec) 714 struct ich_pcm_table *rec)
715{ 715{
716 struct snd_pcm *pcm; 716 struct snd_pcm *pcm;
@@ -759,7 +759,7 @@ static struct ich_pcm_table intel_pcms[] __devinitdata = {
759 }, 759 },
760}; 760};
761 761
762static int __devinit snd_intel8x0_pcm(struct intel8x0m *chip) 762static int __devinit snd_intel8x0m_pcm(struct intel8x0m *chip)
763{ 763{
764 int i, tblsize, device, err; 764 int i, tblsize, device, err;
765 struct ich_pcm_table *tbl, *rec; 765 struct ich_pcm_table *tbl, *rec;
@@ -791,7 +791,7 @@ static int __devinit snd_intel8x0_pcm(struct intel8x0m *chip)
791 if (! chip->ichd[rec->ac97_idx].ac97) 791 if (! chip->ichd[rec->ac97_idx].ac97)
792 continue; 792 continue;
793 } 793 }
794 err = snd_intel8x0_pcm1(chip, device, rec); 794 err = snd_intel8x0m_pcm1(chip, device, rec);
795 if (err < 0) 795 if (err < 0)
796 return err; 796 return err;
797 device++; 797 device++;
@@ -806,20 +806,20 @@ static int __devinit snd_intel8x0_pcm(struct intel8x0m *chip)
806 * Mixer part 806 * Mixer part
807 */ 807 */
808 808
809static void snd_intel8x0_mixer_free_ac97_bus(struct snd_ac97_bus *bus) 809static void snd_intel8x0m_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
810{ 810{
811 struct intel8x0m *chip = bus->private_data; 811 struct intel8x0m *chip = bus->private_data;
812 chip->ac97_bus = NULL; 812 chip->ac97_bus = NULL;
813} 813}
814 814
815static void snd_intel8x0_mixer_free_ac97(struct snd_ac97 *ac97) 815static void snd_intel8x0m_mixer_free_ac97(struct snd_ac97 *ac97)
816{ 816{
817 struct intel8x0m *chip = ac97->private_data; 817 struct intel8x0m *chip = ac97->private_data;
818 chip->ac97 = NULL; 818 chip->ac97 = NULL;
819} 819}
820 820
821 821
822static int __devinit snd_intel8x0_mixer(struct intel8x0m *chip, int ac97_clock) 822static int __devinit snd_intel8x0m_mixer(struct intel8x0m *chip, int ac97_clock)
823{ 823{
824 struct snd_ac97_bus *pbus; 824 struct snd_ac97_bus *pbus;
825 struct snd_ac97_template ac97; 825 struct snd_ac97_template ac97;
@@ -827,22 +827,22 @@ static int __devinit snd_intel8x0_mixer(struct intel8x0m *chip, int ac97_clock)
827 int err; 827 int err;
828 unsigned int glob_sta = 0; 828 unsigned int glob_sta = 0;
829 static struct snd_ac97_bus_ops ops = { 829 static struct snd_ac97_bus_ops ops = {
830 .write = snd_intel8x0_codec_write, 830 .write = snd_intel8x0m_codec_write,
831 .read = snd_intel8x0_codec_read, 831 .read = snd_intel8x0m_codec_read,
832 }; 832 };
833 833
834 chip->in_ac97_init = 1; 834 chip->in_ac97_init = 1;
835 835
836 memset(&ac97, 0, sizeof(ac97)); 836 memset(&ac97, 0, sizeof(ac97));
837 ac97.private_data = chip; 837 ac97.private_data = chip;
838 ac97.private_free = snd_intel8x0_mixer_free_ac97; 838 ac97.private_free = snd_intel8x0m_mixer_free_ac97;
839 ac97.scaps = AC97_SCAP_SKIP_AUDIO | AC97_SCAP_POWER_SAVE; 839 ac97.scaps = AC97_SCAP_SKIP_AUDIO | AC97_SCAP_POWER_SAVE;
840 840
841 glob_sta = igetdword(chip, ICHREG(GLOB_STA)); 841 glob_sta = igetdword(chip, ICHREG(GLOB_STA));
842 842
843 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) 843 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
844 goto __err; 844 goto __err;
845 pbus->private_free = snd_intel8x0_mixer_free_ac97_bus; 845 pbus->private_free = snd_intel8x0m_mixer_free_ac97_bus;
846 if (ac97_clock >= 8000 && ac97_clock <= 48000) 846 if (ac97_clock >= 8000 && ac97_clock <= 48000)
847 pbus->clock = ac97_clock; 847 pbus->clock = ac97_clock;
848 chip->ac97_bus = pbus; 848 chip->ac97_bus = pbus;
@@ -894,7 +894,8 @@ static int snd_intel8x0m_ich_chip_init(struct intel8x0m *chip, int probing)
894 /* finish cold or do warm reset */ 894 /* finish cold or do warm reset */
895 cnt |= (cnt & ICH_AC97COLD) == 0 ? ICH_AC97COLD : ICH_AC97WARM; 895 cnt |= (cnt & ICH_AC97COLD) == 0 ? ICH_AC97COLD : ICH_AC97WARM;
896 iputdword(chip, ICHREG(GLOB_CNT), cnt); 896 iputdword(chip, ICHREG(GLOB_CNT), cnt);
897 end_time = (jiffies + (HZ / 4)) + 1; 897 usleep_range(500, 1000); /* give warm reset some time */
898 end_time = jiffies + HZ / 4;
898 do { 899 do {
899 if ((igetdword(chip, ICHREG(GLOB_CNT)) & ICH_AC97WARM) == 0) 900 if ((igetdword(chip, ICHREG(GLOB_CNT)) & ICH_AC97WARM) == 0)
900 goto __ok; 901 goto __ok;
@@ -959,7 +960,7 @@ static int snd_intel8x0m_ich_chip_init(struct intel8x0m *chip, int probing)
959 return 0; 960 return 0;
960} 961}
961 962
962static int snd_intel8x0_chip_init(struct intel8x0m *chip, int probing) 963static int snd_intel8x0m_chip_init(struct intel8x0m *chip, int probing)
963{ 964{
964 unsigned int i; 965 unsigned int i;
965 int err; 966 int err;
@@ -980,7 +981,7 @@ static int snd_intel8x0_chip_init(struct intel8x0m *chip, int probing)
980 return 0; 981 return 0;
981} 982}
982 983
983static int snd_intel8x0_free(struct intel8x0m *chip) 984static int snd_intel8x0m_free(struct intel8x0m *chip)
984{ 985{
985 unsigned int i; 986 unsigned int i;
986 987
@@ -1045,7 +1046,7 @@ static int intel8x0m_resume(struct pci_dev *pci)
1045 return -EIO; 1046 return -EIO;
1046 } 1047 }
1047 pci_set_master(pci); 1048 pci_set_master(pci);
1048 if (request_irq(pci->irq, snd_intel8x0_interrupt, 1049 if (request_irq(pci->irq, snd_intel8x0m_interrupt,
1049 IRQF_SHARED, card->shortname, chip)) { 1050 IRQF_SHARED, card->shortname, chip)) {
1050 printk(KERN_ERR "intel8x0m: unable to grab IRQ %d, " 1051 printk(KERN_ERR "intel8x0m: unable to grab IRQ %d, "
1051 "disabling device\n", pci->irq); 1052 "disabling device\n", pci->irq);
@@ -1053,7 +1054,7 @@ static int intel8x0m_resume(struct pci_dev *pci)
1053 return -EIO; 1054 return -EIO;
1054 } 1055 }
1055 chip->irq = pci->irq; 1056 chip->irq = pci->irq;
1056 snd_intel8x0_chip_init(chip, 0); 1057 snd_intel8x0m_chip_init(chip, 0);
1057 snd_ac97_resume(chip->ac97); 1058 snd_ac97_resume(chip->ac97);
1058 1059
1059 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1060 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
@@ -1094,10 +1095,10 @@ static void __devinit snd_intel8x0m_proc_init(struct intel8x0m * chip)
1094#endif /* CONFIG_PROC_FS */ 1095#endif /* CONFIG_PROC_FS */
1095 1096
1096 1097
1097static int snd_intel8x0_dev_free(struct snd_device *device) 1098static int snd_intel8x0m_dev_free(struct snd_device *device)
1098{ 1099{
1099 struct intel8x0m *chip = device->device_data; 1100 struct intel8x0m *chip = device->device_data;
1100 return snd_intel8x0_free(chip); 1101 return snd_intel8x0m_free(chip);
1101} 1102}
1102 1103
1103struct ich_reg_info { 1104struct ich_reg_info {
@@ -1108,7 +1109,7 @@ struct ich_reg_info {
1108static int __devinit snd_intel8x0m_create(struct snd_card *card, 1109static int __devinit snd_intel8x0m_create(struct snd_card *card,
1109 struct pci_dev *pci, 1110 struct pci_dev *pci,
1110 unsigned long device_type, 1111 unsigned long device_type,
1111 struct intel8x0m ** r_intel8x0) 1112 struct intel8x0m **r_intel8x0m)
1112{ 1113{
1113 struct intel8x0m *chip; 1114 struct intel8x0m *chip;
1114 int err; 1115 int err;
@@ -1116,7 +1117,7 @@ static int __devinit snd_intel8x0m_create(struct snd_card *card,
1116 unsigned int int_sta_masks; 1117 unsigned int int_sta_masks;
1117 struct ichdev *ichdev; 1118 struct ichdev *ichdev;
1118 static struct snd_device_ops ops = { 1119 static struct snd_device_ops ops = {
1119 .dev_free = snd_intel8x0_dev_free, 1120 .dev_free = snd_intel8x0m_dev_free,
1120 }; 1121 };
1121 static struct ich_reg_info intel_regs[2] = { 1122 static struct ich_reg_info intel_regs[2] = {
1122 { ICH_MIINT, 0 }, 1123 { ICH_MIINT, 0 },
@@ -1124,7 +1125,7 @@ static int __devinit snd_intel8x0m_create(struct snd_card *card,
1124 }; 1125 };
1125 struct ich_reg_info *tbl; 1126 struct ich_reg_info *tbl;
1126 1127
1127 *r_intel8x0 = NULL; 1128 *r_intel8x0m = NULL;
1128 1129
1129 if ((err = pci_enable_device(pci)) < 0) 1130 if ((err = pci_enable_device(pci)) < 0)
1130 return err; 1131 return err;
@@ -1158,7 +1159,7 @@ static int __devinit snd_intel8x0m_create(struct snd_card *card,
1158 chip->addr = pci_iomap(pci, 0, 0); 1159 chip->addr = pci_iomap(pci, 0, 0);
1159 if (!chip->addr) { 1160 if (!chip->addr) {
1160 snd_printk(KERN_ERR "AC'97 space ioremap problem\n"); 1161 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1161 snd_intel8x0_free(chip); 1162 snd_intel8x0m_free(chip);
1162 return -EIO; 1163 return -EIO;
1163 } 1164 }
1164 if (pci_resource_flags(pci, 3) & IORESOURCE_MEM) /* ICH4 */ 1165 if (pci_resource_flags(pci, 3) & IORESOURCE_MEM) /* ICH4 */
@@ -1167,15 +1168,15 @@ static int __devinit snd_intel8x0m_create(struct snd_card *card,
1167 chip->bmaddr = pci_iomap(pci, 1, 0); 1168 chip->bmaddr = pci_iomap(pci, 1, 0);
1168 if (!chip->bmaddr) { 1169 if (!chip->bmaddr) {
1169 snd_printk(KERN_ERR "Controller space ioremap problem\n"); 1170 snd_printk(KERN_ERR "Controller space ioremap problem\n");
1170 snd_intel8x0_free(chip); 1171 snd_intel8x0m_free(chip);
1171 return -EIO; 1172 return -EIO;
1172 } 1173 }
1173 1174
1174 port_inited: 1175 port_inited:
1175 if (request_irq(pci->irq, snd_intel8x0_interrupt, IRQF_SHARED, 1176 if (request_irq(pci->irq, snd_intel8x0m_interrupt, IRQF_SHARED,
1176 card->shortname, chip)) { 1177 card->shortname, chip)) {
1177 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 1178 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1178 snd_intel8x0_free(chip); 1179 snd_intel8x0m_free(chip);
1179 return -EBUSY; 1180 return -EBUSY;
1180 } 1181 }
1181 chip->irq = pci->irq; 1182 chip->irq = pci->irq;
@@ -1210,7 +1211,7 @@ static int __devinit snd_intel8x0m_create(struct snd_card *card,
1210 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 1211 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1211 chip->bdbars_count * sizeof(u32) * ICH_MAX_FRAGS * 2, 1212 chip->bdbars_count * sizeof(u32) * ICH_MAX_FRAGS * 2,
1212 &chip->bdbars) < 0) { 1213 &chip->bdbars) < 0) {
1213 snd_intel8x0_free(chip); 1214 snd_intel8x0m_free(chip);
1214 return -ENOMEM; 1215 return -ENOMEM;
1215 } 1216 }
1216 /* tables must be aligned to 8 bytes here, but the kernel pages 1217 /* tables must be aligned to 8 bytes here, but the kernel pages
@@ -1225,19 +1226,19 @@ static int __devinit snd_intel8x0m_create(struct snd_card *card,
1225 chip->int_sta_reg = ICH_REG_GLOB_STA; 1226 chip->int_sta_reg = ICH_REG_GLOB_STA;
1226 chip->int_sta_mask = int_sta_masks; 1227 chip->int_sta_mask = int_sta_masks;
1227 1228
1228 if ((err = snd_intel8x0_chip_init(chip, 1)) < 0) { 1229 if ((err = snd_intel8x0m_chip_init(chip, 1)) < 0) {
1229 snd_intel8x0_free(chip); 1230 snd_intel8x0m_free(chip);
1230 return err; 1231 return err;
1231 } 1232 }
1232 1233
1233 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1234 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1234 snd_intel8x0_free(chip); 1235 snd_intel8x0m_free(chip);
1235 return err; 1236 return err;
1236 } 1237 }
1237 1238
1238 snd_card_set_dev(card, &pci->dev); 1239 snd_card_set_dev(card, &pci->dev);
1239 1240
1240 *r_intel8x0 = chip; 1241 *r_intel8x0m = chip;
1241 return 0; 1242 return 0;
1242} 1243}
1243 1244
@@ -1295,11 +1296,11 @@ static int __devinit snd_intel8x0m_probe(struct pci_dev *pci,
1295 } 1296 }
1296 card->private_data = chip; 1297 card->private_data = chip;
1297 1298
1298 if ((err = snd_intel8x0_mixer(chip, ac97_clock)) < 0) { 1299 if ((err = snd_intel8x0m_mixer(chip, ac97_clock)) < 0) {
1299 snd_card_free(card); 1300 snd_card_free(card);
1300 return err; 1301 return err;
1301 } 1302 }
1302 if ((err = snd_intel8x0_pcm(chip)) < 0) { 1303 if ((err = snd_intel8x0m_pcm(chip)) < 0) {
1303 snd_card_free(card); 1304 snd_card_free(card);
1304 return err; 1305 return err;
1305 } 1306 }
diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c
index f5eadfc0672a..a323eafb9e03 100644
--- a/sound/pci/rme9652/hdspm.c
+++ b/sound/pci/rme9652/hdspm.c
@@ -8,6 +8,21 @@
8 * Modified 2006-06-01 for AES32 support by Remy Bruno 8 * Modified 2006-06-01 for AES32 support by Remy Bruno
9 * <remy.bruno@trinnov.com> 9 * <remy.bruno@trinnov.com>
10 * 10 *
11 * Modified 2009-04-13 for proper metering by Florian Faber
12 * <faber@faberman.de>
13 *
14 * Modified 2009-04-14 for native float support by Florian Faber
15 * <faber@faberman.de>
16 *
17 * Modified 2009-04-26 fixed bug in rms metering by Florian Faber
18 * <faber@faberman.de>
19 *
20 * Modified 2009-04-30 added hw serial number support by Florian Faber
21 *
22 * Modified 2011-01-14 added S/PDIF input on RayDATs by Adrian Knoth
23 *
24 * Modified 2011-01-25 variable period sizes on RayDAT/AIO by Adrian Knoth
25 *
11 * This program is free software; you can redistribute it and/or modify 26 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by 27 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or 28 * the Free Software Foundation; either version 2 of the License, or
@@ -35,6 +50,7 @@
35#include <sound/core.h> 50#include <sound/core.h>
36#include <sound/control.h> 51#include <sound/control.h>
37#include <sound/pcm.h> 52#include <sound/pcm.h>
53#include <sound/pcm_params.h>
38#include <sound/info.h> 54#include <sound/info.h>
39#include <sound/asoundef.h> 55#include <sound/asoundef.h>
40#include <sound/rawmidi.h> 56#include <sound/rawmidi.h>
@@ -47,15 +63,6 @@ static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
47static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 63static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
48static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ 64static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
49 65
50/* Disable precise pointer at start */
51static int precise_ptr[SNDRV_CARDS];
52
53/* Send all playback to line outs */
54static int line_outs_monitor[SNDRV_CARDS];
55
56/* Enable Analog Outs on Channel 63/64 by default */
57static int enable_monitor[SNDRV_CARDS];
58
59module_param_array(index, int, NULL, 0444); 66module_param_array(index, int, NULL, 0444);
60MODULE_PARM_DESC(index, "Index value for RME HDSPM interface."); 67MODULE_PARM_DESC(index, "Index value for RME HDSPM interface.");
61 68
@@ -65,42 +72,39 @@ MODULE_PARM_DESC(id, "ID string for RME HDSPM interface.");
65module_param_array(enable, bool, NULL, 0444); 72module_param_array(enable, bool, NULL, 0444);
66MODULE_PARM_DESC(enable, "Enable/disable specific HDSPM soundcards."); 73MODULE_PARM_DESC(enable, "Enable/disable specific HDSPM soundcards.");
67 74
68module_param_array(precise_ptr, bool, NULL, 0444);
69MODULE_PARM_DESC(precise_ptr, "Enable or disable precise pointer.");
70
71module_param_array(line_outs_monitor, bool, NULL, 0444);
72MODULE_PARM_DESC(line_outs_monitor,
73 "Send playback streams to analog outs by default.");
74
75module_param_array(enable_monitor, bool, NULL, 0444);
76MODULE_PARM_DESC(enable_monitor,
77 "Enable Analog Out on Channel 63/64 by default.");
78 75
79MODULE_AUTHOR 76MODULE_AUTHOR
80 ("Winfried Ritsch <ritsch_AT_iem.at>, " 77(
81 "Paul Davis <paul@linuxaudiosystems.com>, " 78 "Winfried Ritsch <ritsch_AT_iem.at>, "
82 "Marcus Andersson, Thomas Charbonnel <thomas@undata.org>, " 79 "Paul Davis <paul@linuxaudiosystems.com>, "
83 "Remy Bruno <remy.bruno@trinnov.com>"); 80 "Marcus Andersson, Thomas Charbonnel <thomas@undata.org>, "
81 "Remy Bruno <remy.bruno@trinnov.com>, "
82 "Florian Faber <faberman@linuxproaudio.org>, "
83 "Adrian Knoth <adi@drcomp.erfurt.thur.de>"
84);
84MODULE_DESCRIPTION("RME HDSPM"); 85MODULE_DESCRIPTION("RME HDSPM");
85MODULE_LICENSE("GPL"); 86MODULE_LICENSE("GPL");
86MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}"); 87MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
87 88
88/* --- Write registers. --- 89/* --- Write registers. ---
89 These are defined as byte-offsets from the iobase value. */ 90 These are defined as byte-offsets from the iobase value. */
90 91
92#define HDSPM_WR_SETTINGS 0
93#define HDSPM_outputBufferAddress 32
94#define HDSPM_inputBufferAddress 36
91#define HDSPM_controlRegister 64 95#define HDSPM_controlRegister 64
92#define HDSPM_interruptConfirmation 96 96#define HDSPM_interruptConfirmation 96
93#define HDSPM_control2Reg 256 /* not in specs ???????? */ 97#define HDSPM_control2Reg 256 /* not in specs ???????? */
94#define HDSPM_freqReg 256 /* for AES32 */ 98#define HDSPM_freqReg 256 /* for AES32 */
95#define HDSPM_midiDataOut0 352 /* just believe in old code */ 99#define HDSPM_midiDataOut0 352 /* just believe in old code */
96#define HDSPM_midiDataOut1 356 100#define HDSPM_midiDataOut1 356
97#define HDSPM_eeprom_wr 384 /* for AES32 */ 101#define HDSPM_eeprom_wr 384 /* for AES32 */
98 102
99/* DMA enable for 64 channels, only Bit 0 is relevant */ 103/* DMA enable for 64 channels, only Bit 0 is relevant */
100#define HDSPM_outputEnableBase 512 /* 512-767 input DMA */ 104#define HDSPM_outputEnableBase 512 /* 512-767 input DMA */
101#define HDSPM_inputEnableBase 768 /* 768-1023 output DMA */ 105#define HDSPM_inputEnableBase 768 /* 768-1023 output DMA */
102 106
103/* 16 page addresses for each of the 64 channels DMA buffer in and out 107/* 16 page addresses for each of the 64 channels DMA buffer in and out
104 (each 64k=16*4k) Buffer must be 4k aligned (which is default i386 ????) */ 108 (each 64k=16*4k) Buffer must be 4k aligned (which is default i386 ????) */
105#define HDSPM_pageAddressBufferOut 8192 109#define HDSPM_pageAddressBufferOut 8192
106#define HDSPM_pageAddressBufferIn (HDSPM_pageAddressBufferOut+64*16*4) 110#define HDSPM_pageAddressBufferIn (HDSPM_pageAddressBufferOut+64*16*4)
@@ -119,22 +123,84 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
119#define HDSPM_statusRegister2 192 123#define HDSPM_statusRegister2 192
120#define HDSPM_timecodeRegister 128 124#define HDSPM_timecodeRegister 128
121 125
126/* AIO, RayDAT */
127#define HDSPM_RD_STATUS_0 0
128#define HDSPM_RD_STATUS_1 64
129#define HDSPM_RD_STATUS_2 128
130#define HDSPM_RD_STATUS_3 192
131
132#define HDSPM_RD_TCO 256
133#define HDSPM_RD_PLL_FREQ 512
134#define HDSPM_WR_TCO 128
135
136#define HDSPM_TCO1_TCO_lock 0x00000001
137#define HDSPM_TCO1_WCK_Input_Range_LSB 0x00000002
138#define HDSPM_TCO1_WCK_Input_Range_MSB 0x00000004
139#define HDSPM_TCO1_LTC_Input_valid 0x00000008
140#define HDSPM_TCO1_WCK_Input_valid 0x00000010
141#define HDSPM_TCO1_Video_Input_Format_NTSC 0x00000020
142#define HDSPM_TCO1_Video_Input_Format_PAL 0x00000040
143
144#define HDSPM_TCO1_set_TC 0x00000100
145#define HDSPM_TCO1_set_drop_frame_flag 0x00000200
146#define HDSPM_TCO1_LTC_Format_LSB 0x00000400
147#define HDSPM_TCO1_LTC_Format_MSB 0x00000800
148
149#define HDSPM_TCO2_TC_run 0x00010000
150#define HDSPM_TCO2_WCK_IO_ratio_LSB 0x00020000
151#define HDSPM_TCO2_WCK_IO_ratio_MSB 0x00040000
152#define HDSPM_TCO2_set_num_drop_frames_LSB 0x00080000
153#define HDSPM_TCO2_set_num_drop_frames_MSB 0x00100000
154#define HDSPM_TCO2_set_jam_sync 0x00200000
155#define HDSPM_TCO2_set_flywheel 0x00400000
156
157#define HDSPM_TCO2_set_01_4 0x01000000
158#define HDSPM_TCO2_set_pull_down 0x02000000
159#define HDSPM_TCO2_set_pull_up 0x04000000
160#define HDSPM_TCO2_set_freq 0x08000000
161#define HDSPM_TCO2_set_term_75R 0x10000000
162#define HDSPM_TCO2_set_input_LSB 0x20000000
163#define HDSPM_TCO2_set_input_MSB 0x40000000
164#define HDSPM_TCO2_set_freq_from_app 0x80000000
165
166
167#define HDSPM_midiDataOut0 352
168#define HDSPM_midiDataOut1 356
169#define HDSPM_midiDataOut2 368
170
122#define HDSPM_midiDataIn0 360 171#define HDSPM_midiDataIn0 360
123#define HDSPM_midiDataIn1 364 172#define HDSPM_midiDataIn1 364
173#define HDSPM_midiDataIn2 372
174#define HDSPM_midiDataIn3 376
124 175
125/* status is data bytes in MIDI-FIFO (0-128) */ 176/* status is data bytes in MIDI-FIFO (0-128) */
126#define HDSPM_midiStatusOut0 384 177#define HDSPM_midiStatusOut0 384
127#define HDSPM_midiStatusOut1 388 178#define HDSPM_midiStatusOut1 388
128#define HDSPM_midiStatusIn0 392 179#define HDSPM_midiStatusOut2 400
129#define HDSPM_midiStatusIn1 396 180
181#define HDSPM_midiStatusIn0 392
182#define HDSPM_midiStatusIn1 396
183#define HDSPM_midiStatusIn2 404
184#define HDSPM_midiStatusIn3 408
130 185
131 186
132/* the meters are regular i/o-mapped registers, but offset 187/* the meters are regular i/o-mapped registers, but offset
133 considerably from the rest. the peak registers are reset 188 considerably from the rest. the peak registers are reset
134 when read; the least-significant 4 bits are full-scale counters; 189 when read; the least-significant 4 bits are full-scale counters;
135 the actual peak value is in the most-significant 24 bits. 190 the actual peak value is in the most-significant 24 bits.
136*/ 191*/
137#define HDSPM_MADI_peakrmsbase 4096 /* 4096-8191 2x64x32Bit Meters */ 192
193#define HDSPM_MADI_INPUT_PEAK 4096
194#define HDSPM_MADI_PLAYBACK_PEAK 4352
195#define HDSPM_MADI_OUTPUT_PEAK 4608
196
197#define HDSPM_MADI_INPUT_RMS_L 6144
198#define HDSPM_MADI_PLAYBACK_RMS_L 6400
199#define HDSPM_MADI_OUTPUT_RMS_L 6656
200
201#define HDSPM_MADI_INPUT_RMS_H 7168
202#define HDSPM_MADI_PLAYBACK_RMS_H 7424
203#define HDSPM_MADI_OUTPUT_RMS_H 7680
138 204
139/* --- Control Register bits --------- */ 205/* --- Control Register bits --------- */
140#define HDSPM_Start (1<<0) /* start engine */ 206#define HDSPM_Start (1<<0) /* start engine */
@@ -143,7 +209,9 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
143#define HDSPM_Latency1 (1<<2) /* where n is defined */ 209#define HDSPM_Latency1 (1<<2) /* where n is defined */
144#define HDSPM_Latency2 (1<<3) /* by Latency{2,1,0} */ 210#define HDSPM_Latency2 (1<<3) /* by Latency{2,1,0} */
145 211
146#define HDSPM_ClockModeMaster (1<<4) /* 1=Master, 0=Slave/Autosync */ 212#define HDSPM_ClockModeMaster (1<<4) /* 1=Master, 0=Autosync */
213#define HDSPM_c0Master 0x1 /* Master clock bit in settings
214 register [RayDAT, AIO] */
147 215
148#define HDSPM_AudioInterruptEnable (1<<5) /* what do you think ? */ 216#define HDSPM_AudioInterruptEnable (1<<5) /* what do you think ? */
149 217
@@ -157,7 +225,7 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
157 56channelMODE=0 */ /* MADI ONLY*/ 225 56channelMODE=0 */ /* MADI ONLY*/
158#define HDSPM_Emphasis (1<<10) /* Emphasis */ /* AES32 ONLY */ 226#define HDSPM_Emphasis (1<<10) /* Emphasis */ /* AES32 ONLY */
159 227
160#define HDSPM_AutoInp (1<<11) /* Auto Input (takeover) == Safe Mode, 228#define HDSPM_AutoInp (1<<11) /* Auto Input (takeover) == Safe Mode,
161 0=off, 1=on */ /* MADI ONLY */ 229 0=off, 1=on */ /* MADI ONLY */
162#define HDSPM_Dolby (1<<11) /* Dolby = "NonAudio" ?? */ /* AES32 ONLY */ 230#define HDSPM_Dolby (1<<11) /* Dolby = "NonAudio" ?? */ /* AES32 ONLY */
163 231
@@ -166,22 +234,23 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
166 */ 234 */
167#define HDSPM_InputSelect1 (1<<15) /* should be 0 */ 235#define HDSPM_InputSelect1 (1<<15) /* should be 0 */
168 236
169#define HDSPM_SyncRef0 (1<<16) /* 0=WOrd, 1=MADI */
170#define HDSPM_SyncRef1 (1<<17) /* for AES32: SyncRefN codes the AES # */
171#define HDSPM_SyncRef2 (1<<13) 237#define HDSPM_SyncRef2 (1<<13)
172#define HDSPM_SyncRef3 (1<<25) 238#define HDSPM_SyncRef3 (1<<25)
173 239
174#define HDSPM_SMUX (1<<18) /* Frame ??? */ /* MADI ONY */ 240#define HDSPM_SMUX (1<<18) /* Frame ??? */ /* MADI ONY */
175#define HDSPM_clr_tms (1<<19) /* clear track marker, do not use 241#define HDSPM_clr_tms (1<<19) /* clear track marker, do not use
176 AES additional bits in 242 AES additional bits in
177 lower 5 Audiodatabits ??? */ 243 lower 5 Audiodatabits ??? */
178#define HDSPM_taxi_reset (1<<20) /* ??? */ /* MADI ONLY ? */ 244#define HDSPM_taxi_reset (1<<20) /* ??? */ /* MADI ONLY ? */
179#define HDSPM_WCK48 (1<<20) /* Frame ??? = HDSPM_SMUX */ /* AES32 ONLY */ 245#define HDSPM_WCK48 (1<<20) /* Frame ??? = HDSPM_SMUX */ /* AES32 ONLY */
180 246
181#define HDSPM_Midi0InterruptEnable (1<<22) 247#define HDSPM_Midi0InterruptEnable 0x0400000
182#define HDSPM_Midi1InterruptEnable (1<<23) 248#define HDSPM_Midi1InterruptEnable 0x0800000
249#define HDSPM_Midi2InterruptEnable 0x0200000
250#define HDSPM_Midi3InterruptEnable 0x4000000
183 251
184#define HDSPM_LineOut (1<<24) /* Analog Out on channel 63/64 on=1, mute=0 */ 252#define HDSPM_LineOut (1<<24) /* Analog Out on channel 63/64 on=1, mute=0 */
253#define HDSPe_FLOAT_FORMAT 0x2000000
185 254
186#define HDSPM_DS_DoubleWire (1<<26) /* AES32 ONLY */ 255#define HDSPM_DS_DoubleWire (1<<26) /* AES32 ONLY */
187#define HDSPM_QS_DoubleWire (1<<27) /* AES32 ONLY */ 256#define HDSPM_QS_DoubleWire (1<<27) /* AES32 ONLY */
@@ -198,11 +267,18 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
198#define HDSPM_InputCoaxial (HDSPM_InputSelect0) 267#define HDSPM_InputCoaxial (HDSPM_InputSelect0)
199#define HDSPM_SyncRefMask (HDSPM_SyncRef0|HDSPM_SyncRef1|\ 268#define HDSPM_SyncRefMask (HDSPM_SyncRef0|HDSPM_SyncRef1|\
200 HDSPM_SyncRef2|HDSPM_SyncRef3) 269 HDSPM_SyncRef2|HDSPM_SyncRef3)
201#define HDSPM_SyncRef_Word 0
202#define HDSPM_SyncRef_MADI (HDSPM_SyncRef0)
203 270
204#define HDSPM_SYNC_FROM_WORD 0 /* Preferred sync reference */ 271#define HDSPM_c0_SyncRef0 0x2
205#define HDSPM_SYNC_FROM_MADI 1 /* choices - used by "pref_sync_ref" */ 272#define HDSPM_c0_SyncRef1 0x4
273#define HDSPM_c0_SyncRef2 0x8
274#define HDSPM_c0_SyncRef3 0x10
275#define HDSPM_c0_SyncRefMask (HDSPM_c0_SyncRef0 | HDSPM_c0_SyncRef1 |\
276 HDSPM_c0_SyncRef2 | HDSPM_c0_SyncRef3)
277
278#define HDSPM_SYNC_FROM_WORD 0 /* Preferred sync reference */
279#define HDSPM_SYNC_FROM_MADI 1 /* choices - used by "pref_sync_ref" */
280#define HDSPM_SYNC_FROM_TCO 2
281#define HDSPM_SYNC_FROM_SYNC_IN 3
206 282
207#define HDSPM_Frequency32KHz HDSPM_Frequency0 283#define HDSPM_Frequency32KHz HDSPM_Frequency0
208#define HDSPM_Frequency44_1KHz HDSPM_Frequency1 284#define HDSPM_Frequency44_1KHz HDSPM_Frequency1
@@ -216,17 +292,6 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
216#define HDSPM_Frequency192KHz (HDSPM_QuadSpeed|HDSPM_Frequency1|\ 292#define HDSPM_Frequency192KHz (HDSPM_QuadSpeed|HDSPM_Frequency1|\
217 HDSPM_Frequency0) 293 HDSPM_Frequency0)
218 294
219/* --- for internal discrimination */
220#define HDSPM_CLOCK_SOURCE_AUTOSYNC 0 /* Sample Clock Sources */
221#define HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ 1
222#define HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ 2
223#define HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ 3
224#define HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ 4
225#define HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ 5
226#define HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ 6
227#define HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ 7
228#define HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ 8
229#define HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ 9
230 295
231/* Synccheck Status */ 296/* Synccheck Status */
232#define HDSPM_SYNC_CHECK_NO_LOCK 0 297#define HDSPM_SYNC_CHECK_NO_LOCK 0
@@ -236,14 +301,16 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
236/* AutoSync References - used by "autosync_ref" control switch */ 301/* AutoSync References - used by "autosync_ref" control switch */
237#define HDSPM_AUTOSYNC_FROM_WORD 0 302#define HDSPM_AUTOSYNC_FROM_WORD 0
238#define HDSPM_AUTOSYNC_FROM_MADI 1 303#define HDSPM_AUTOSYNC_FROM_MADI 1
239#define HDSPM_AUTOSYNC_FROM_NONE 2 304#define HDSPM_AUTOSYNC_FROM_TCO 2
305#define HDSPM_AUTOSYNC_FROM_SYNC_IN 3
306#define HDSPM_AUTOSYNC_FROM_NONE 4
240 307
241/* Possible sources of MADI input */ 308/* Possible sources of MADI input */
242#define HDSPM_OPTICAL 0 /* optical */ 309#define HDSPM_OPTICAL 0 /* optical */
243#define HDSPM_COAXIAL 1 /* BNC */ 310#define HDSPM_COAXIAL 1 /* BNC */
244 311
245#define hdspm_encode_latency(x) (((x)<<1) & HDSPM_LatencyMask) 312#define hdspm_encode_latency(x) (((x)<<1) & HDSPM_LatencyMask)
246#define hdspm_decode_latency(x) (((x) & HDSPM_LatencyMask)>>1) 313#define hdspm_decode_latency(x) ((((x) & HDSPM_LatencyMask)>>1))
247 314
248#define hdspm_encode_in(x) (((x)&0x3)<<14) 315#define hdspm_encode_in(x) (((x)&0x3)<<14)
249#define hdspm_decode_in(x) (((x)>>14)&0x3) 316#define hdspm_decode_in(x) (((x)>>14)&0x3)
@@ -270,13 +337,21 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
270#define HDSPM_AB_int (1<<2) /* InputChannel Opt=0, Coax=1 337#define HDSPM_AB_int (1<<2) /* InputChannel Opt=0, Coax=1
271 * (like inp0) 338 * (like inp0)
272 */ 339 */
340
273#define HDSPM_madiLock (1<<3) /* MADI Locked =1, no=0 */ 341#define HDSPM_madiLock (1<<3) /* MADI Locked =1, no=0 */
342#define HDSPM_madiSync (1<<18) /* MADI is in sync */
343
344#define HDSPM_tcoLock 0x00000020 /* Optional TCO locked status FOR HDSPe MADI! */
345#define HDSPM_tcoSync 0x10000000 /* Optional TCO sync status */
346
347#define HDSPM_syncInLock 0x00010000 /* Sync In lock status FOR HDSPe MADI! */
348#define HDSPM_syncInSync 0x00020000 /* Sync In sync status FOR HDSPe MADI! */
274 349
275#define HDSPM_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */ 350#define HDSPM_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
276 /* since 64byte accurate last 6 bits 351 /* since 64byte accurate, last 6 bits are not used */
277 are not used */ 352
353
278 354
279#define HDSPM_madiSync (1<<18) /* MADI is in sync */
280#define HDSPM_DoubleSpeedStatus (1<<19) /* (input) card in double speed */ 355#define HDSPM_DoubleSpeedStatus (1<<19) /* (input) card in double speed */
281 356
282#define HDSPM_madiFreq0 (1<<22) /* system freq 0=error */ 357#define HDSPM_madiFreq0 (1<<22) /* system freq 0=error */
@@ -287,8 +362,19 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
287#define HDSPM_BufferID (1<<26) /* (Double)Buffer ID toggles with 362#define HDSPM_BufferID (1<<26) /* (Double)Buffer ID toggles with
288 * Interrupt 363 * Interrupt
289 */ 364 */
290#define HDSPM_midi0IRQPending (1<<30) /* MIDI IRQ is pending */ 365#define HDSPM_tco_detect 0x08000000
291#define HDSPM_midi1IRQPending (1<<31) /* and aktiv */ 366#define HDSPM_tco_lock 0x20000000
367
368#define HDSPM_s2_tco_detect 0x00000040
369#define HDSPM_s2_AEBO_D 0x00000080
370#define HDSPM_s2_AEBI_D 0x00000100
371
372
373#define HDSPM_midi0IRQPending 0x40000000
374#define HDSPM_midi1IRQPending 0x80000000
375#define HDSPM_midi2IRQPending 0x20000000
376#define HDSPM_midi2IRQPendingAES 0x00000020
377#define HDSPM_midi3IRQPending 0x00200000
292 378
293/* --- status bit helpers */ 379/* --- status bit helpers */
294#define HDSPM_madiFreqMask (HDSPM_madiFreq0|HDSPM_madiFreq1|\ 380#define HDSPM_madiFreqMask (HDSPM_madiFreq0|HDSPM_madiFreq1|\
@@ -317,7 +403,10 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
317#define HDSPM_wc_freq2 (1<<7) /* 100=64, 101=88.2, 110=96, */ 403#define HDSPM_wc_freq2 (1<<7) /* 100=64, 101=88.2, 110=96, */
318/* missing Bit for 111=128, 1000=176.4, 1001=192 */ 404/* missing Bit for 111=128, 1000=176.4, 1001=192 */
319 405
320#define HDSPM_SelSyncRef0 (1<<8) /* Sync Source in slave mode */ 406#define HDSPM_SyncRef0 0x10000 /* Sync Reference */
407#define HDSPM_SyncRef1 0x20000
408
409#define HDSPM_SelSyncRef0 (1<<8) /* AutoSync Source */
321#define HDSPM_SelSyncRef1 (1<<9) /* 000=word, 001=MADI, */ 410#define HDSPM_SelSyncRef1 (1<<9) /* 000=word, 001=MADI, */
322#define HDSPM_SelSyncRef2 (1<<10) /* 111=no valid signal */ 411#define HDSPM_SelSyncRef2 (1<<10) /* 111=no valid signal */
323 412
@@ -331,11 +420,19 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
331#define HDSPM_wcFreq88_2 (HDSPM_wc_freq0|HDSPM_wc_freq2) 420#define HDSPM_wcFreq88_2 (HDSPM_wc_freq0|HDSPM_wc_freq2)
332#define HDSPM_wcFreq96 (HDSPM_wc_freq1|HDSPM_wc_freq2) 421#define HDSPM_wcFreq96 (HDSPM_wc_freq1|HDSPM_wc_freq2)
333 422
423#define HDSPM_status1_F_0 0x0400000
424#define HDSPM_status1_F_1 0x0800000
425#define HDSPM_status1_F_2 0x1000000
426#define HDSPM_status1_F_3 0x2000000
427#define HDSPM_status1_freqMask (HDSPM_status1_F_0|HDSPM_status1_F_1|HDSPM_status1_F_2|HDSPM_status1_F_3)
428
334 429
335#define HDSPM_SelSyncRefMask (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|\ 430#define HDSPM_SelSyncRefMask (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|\
336 HDSPM_SelSyncRef2) 431 HDSPM_SelSyncRef2)
337#define HDSPM_SelSyncRef_WORD 0 432#define HDSPM_SelSyncRef_WORD 0
338#define HDSPM_SelSyncRef_MADI (HDSPM_SelSyncRef0) 433#define HDSPM_SelSyncRef_MADI (HDSPM_SelSyncRef0)
434#define HDSPM_SelSyncRef_TCO (HDSPM_SelSyncRef1)
435#define HDSPM_SelSyncRef_SyncIn (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1)
339#define HDSPM_SelSyncRef_NVALID (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|\ 436#define HDSPM_SelSyncRef_NVALID (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|\
340 HDSPM_SelSyncRef2) 437 HDSPM_SelSyncRef2)
341 438
@@ -345,7 +442,7 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
345/* status */ 442/* status */
346#define HDSPM_AES32_wcLock 0x0200000 443#define HDSPM_AES32_wcLock 0x0200000
347#define HDSPM_AES32_wcFreq_bit 22 444#define HDSPM_AES32_wcFreq_bit 22
348/* (status >> HDSPM_AES32_wcFreq_bit) & 0xF gives WC frequency (cf function 445/* (status >> HDSPM_AES32_wcFreq_bit) & 0xF gives WC frequency (cf function
349 HDSPM_bit2freq */ 446 HDSPM_bit2freq */
350#define HDSPM_AES32_syncref_bit 16 447#define HDSPM_AES32_syncref_bit 16
351/* (status >> HDSPM_AES32_syncref_bit) & 0xF gives sync source */ 448/* (status >> HDSPM_AES32_syncref_bit) & 0xF gives sync source */
@@ -398,28 +495,348 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
398#define MADI_DS_CHANNELS 32 495#define MADI_DS_CHANNELS 32
399#define MADI_QS_CHANNELS 16 496#define MADI_QS_CHANNELS 16
400 497
498#define RAYDAT_SS_CHANNELS 36
499#define RAYDAT_DS_CHANNELS 20
500#define RAYDAT_QS_CHANNELS 12
501
502#define AIO_IN_SS_CHANNELS 14
503#define AIO_IN_DS_CHANNELS 10
504#define AIO_IN_QS_CHANNELS 8
505#define AIO_OUT_SS_CHANNELS 16
506#define AIO_OUT_DS_CHANNELS 12
507#define AIO_OUT_QS_CHANNELS 10
508
509#define AES32_CHANNELS 16
510
401/* the size of a substream (1 mono data stream) */ 511/* the size of a substream (1 mono data stream) */
402#define HDSPM_CHANNEL_BUFFER_SAMPLES (16*1024) 512#define HDSPM_CHANNEL_BUFFER_SAMPLES (16*1024)
403#define HDSPM_CHANNEL_BUFFER_BYTES (4*HDSPM_CHANNEL_BUFFER_SAMPLES) 513#define HDSPM_CHANNEL_BUFFER_BYTES (4*HDSPM_CHANNEL_BUFFER_SAMPLES)
404 514
405/* the size of the area we need to allocate for DMA transfers. the 515/* the size of the area we need to allocate for DMA transfers. the
406 size is the same regardless of the number of channels, and 516 size is the same regardless of the number of channels, and
407 also the latency to use. 517 also the latency to use.
408 for one direction !!! 518 for one direction !!!
409*/ 519*/
410#define HDSPM_DMA_AREA_BYTES (HDSPM_MAX_CHANNELS * HDSPM_CHANNEL_BUFFER_BYTES) 520#define HDSPM_DMA_AREA_BYTES (HDSPM_MAX_CHANNELS * HDSPM_CHANNEL_BUFFER_BYTES)
411#define HDSPM_DMA_AREA_KILOBYTES (HDSPM_DMA_AREA_BYTES/1024) 521#define HDSPM_DMA_AREA_KILOBYTES (HDSPM_DMA_AREA_BYTES/1024)
412 522
413/* revisions >= 230 indicate AES32 card */ 523/* revisions >= 230 indicate AES32 card */
414#define HDSPM_AESREVISION 230 524#define HDSPM_MADI_REV 210
525#define HDSPM_RAYDAT_REV 211
526#define HDSPM_AIO_REV 212
527#define HDSPM_MADIFACE_REV 213
528#define HDSPM_AES_REV 240
529#define HDSPM_AES32_REV 234
530#define HDSPM_AES32_OLD_REV 233
415 531
416/* speed factor modes */ 532/* speed factor modes */
417#define HDSPM_SPEED_SINGLE 0 533#define HDSPM_SPEED_SINGLE 0
418#define HDSPM_SPEED_DOUBLE 1 534#define HDSPM_SPEED_DOUBLE 1
419#define HDSPM_SPEED_QUAD 2 535#define HDSPM_SPEED_QUAD 2
536
420/* names for speed modes */ 537/* names for speed modes */
421static char *hdspm_speed_names[] = { "single", "double", "quad" }; 538static char *hdspm_speed_names[] = { "single", "double", "quad" };
422 539
540static char *texts_autosync_aes_tco[] = { "Word Clock",
541 "AES1", "AES2", "AES3", "AES4",
542 "AES5", "AES6", "AES7", "AES8",
543 "TCO" };
544static char *texts_autosync_aes[] = { "Word Clock",
545 "AES1", "AES2", "AES3", "AES4",
546 "AES5", "AES6", "AES7", "AES8" };
547static char *texts_autosync_madi_tco[] = { "Word Clock",
548 "MADI", "TCO", "Sync In" };
549static char *texts_autosync_madi[] = { "Word Clock",
550 "MADI", "Sync In" };
551
552static char *texts_autosync_raydat_tco[] = {
553 "Word Clock",
554 "ADAT 1", "ADAT 2", "ADAT 3", "ADAT 4",
555 "AES", "SPDIF", "TCO", "Sync In"
556};
557static char *texts_autosync_raydat[] = {
558 "Word Clock",
559 "ADAT 1", "ADAT 2", "ADAT 3", "ADAT 4",
560 "AES", "SPDIF", "Sync In"
561};
562static char *texts_autosync_aio_tco[] = {
563 "Word Clock",
564 "ADAT", "AES", "SPDIF", "TCO", "Sync In"
565};
566static char *texts_autosync_aio[] = { "Word Clock",
567 "ADAT", "AES", "SPDIF", "Sync In" };
568
569static char *texts_freq[] = {
570 "No Lock",
571 "32 kHz",
572 "44.1 kHz",
573 "48 kHz",
574 "64 kHz",
575 "88.2 kHz",
576 "96 kHz",
577 "128 kHz",
578 "176.4 kHz",
579 "192 kHz"
580};
581
582static char *texts_ports_madi[] = {
583 "MADI.1", "MADI.2", "MADI.3", "MADI.4", "MADI.5", "MADI.6",
584 "MADI.7", "MADI.8", "MADI.9", "MADI.10", "MADI.11", "MADI.12",
585 "MADI.13", "MADI.14", "MADI.15", "MADI.16", "MADI.17", "MADI.18",
586 "MADI.19", "MADI.20", "MADI.21", "MADI.22", "MADI.23", "MADI.24",
587 "MADI.25", "MADI.26", "MADI.27", "MADI.28", "MADI.29", "MADI.30",
588 "MADI.31", "MADI.32", "MADI.33", "MADI.34", "MADI.35", "MADI.36",
589 "MADI.37", "MADI.38", "MADI.39", "MADI.40", "MADI.41", "MADI.42",
590 "MADI.43", "MADI.44", "MADI.45", "MADI.46", "MADI.47", "MADI.48",
591 "MADI.49", "MADI.50", "MADI.51", "MADI.52", "MADI.53", "MADI.54",
592 "MADI.55", "MADI.56", "MADI.57", "MADI.58", "MADI.59", "MADI.60",
593 "MADI.61", "MADI.62", "MADI.63", "MADI.64",
594};
595
596
597static char *texts_ports_raydat_ss[] = {
598 "ADAT1.1", "ADAT1.2", "ADAT1.3", "ADAT1.4", "ADAT1.5", "ADAT1.6",
599 "ADAT1.7", "ADAT1.8", "ADAT2.1", "ADAT2.2", "ADAT2.3", "ADAT2.4",
600 "ADAT2.5", "ADAT2.6", "ADAT2.7", "ADAT2.8", "ADAT3.1", "ADAT3.2",
601 "ADAT3.3", "ADAT3.4", "ADAT3.5", "ADAT3.6", "ADAT3.7", "ADAT3.8",
602 "ADAT4.1", "ADAT4.2", "ADAT4.3", "ADAT4.4", "ADAT4.5", "ADAT4.6",
603 "ADAT4.7", "ADAT4.8",
604 "AES.L", "AES.R",
605 "SPDIF.L", "SPDIF.R"
606};
607
608static char *texts_ports_raydat_ds[] = {
609 "ADAT1.1", "ADAT1.2", "ADAT1.3", "ADAT1.4",
610 "ADAT2.1", "ADAT2.2", "ADAT2.3", "ADAT2.4",
611 "ADAT3.1", "ADAT3.2", "ADAT3.3", "ADAT3.4",
612 "ADAT4.1", "ADAT4.2", "ADAT4.3", "ADAT4.4",
613 "AES.L", "AES.R",
614 "SPDIF.L", "SPDIF.R"
615};
616
617static char *texts_ports_raydat_qs[] = {
618 "ADAT1.1", "ADAT1.2",
619 "ADAT2.1", "ADAT2.2",
620 "ADAT3.1", "ADAT3.2",
621 "ADAT4.1", "ADAT4.2",
622 "AES.L", "AES.R",
623 "SPDIF.L", "SPDIF.R"
624};
625
626
627static char *texts_ports_aio_in_ss[] = {
628 "Analogue.L", "Analogue.R",
629 "AES.L", "AES.R",
630 "SPDIF.L", "SPDIF.R",
631 "ADAT.1", "ADAT.2", "ADAT.3", "ADAT.4", "ADAT.5", "ADAT.6",
632 "ADAT.7", "ADAT.8"
633};
634
635static char *texts_ports_aio_out_ss[] = {
636 "Analogue.L", "Analogue.R",
637 "AES.L", "AES.R",
638 "SPDIF.L", "SPDIF.R",
639 "ADAT.1", "ADAT.2", "ADAT.3", "ADAT.4", "ADAT.5", "ADAT.6",
640 "ADAT.7", "ADAT.8",
641 "Phone.L", "Phone.R"
642};
643
644static char *texts_ports_aio_in_ds[] = {
645 "Analogue.L", "Analogue.R",
646 "AES.L", "AES.R",
647 "SPDIF.L", "SPDIF.R",
648 "ADAT.1", "ADAT.2", "ADAT.3", "ADAT.4"
649};
650
651static char *texts_ports_aio_out_ds[] = {
652 "Analogue.L", "Analogue.R",
653 "AES.L", "AES.R",
654 "SPDIF.L", "SPDIF.R",
655 "ADAT.1", "ADAT.2", "ADAT.3", "ADAT.4",
656 "Phone.L", "Phone.R"
657};
658
659static char *texts_ports_aio_in_qs[] = {
660 "Analogue.L", "Analogue.R",
661 "AES.L", "AES.R",
662 "SPDIF.L", "SPDIF.R",
663 "ADAT.1", "ADAT.2", "ADAT.3", "ADAT.4"
664};
665
666static char *texts_ports_aio_out_qs[] = {
667 "Analogue.L", "Analogue.R",
668 "AES.L", "AES.R",
669 "SPDIF.L", "SPDIF.R",
670 "ADAT.1", "ADAT.2", "ADAT.3", "ADAT.4",
671 "Phone.L", "Phone.R"
672};
673
674static char *texts_ports_aes32[] = {
675 "AES.1", "AES.2", "AES.3", "AES.4", "AES.5", "AES.6", "AES.7",
676 "AES.8", "AES.9.", "AES.10", "AES.11", "AES.12", "AES.13", "AES.14",
677 "AES.15", "AES.16"
678};
679
680/* These tables map the ALSA channels 1..N to the channels that we
681 need to use in order to find the relevant channel buffer. RME
682 refers to this kind of mapping as between "the ADAT channel and
683 the DMA channel." We index it using the logical audio channel,
684 and the value is the DMA channel (i.e. channel buffer number)
685 where the data for that channel can be read/written from/to.
686*/
687
688static char channel_map_unity_ss[HDSPM_MAX_CHANNELS] = {
689 0, 1, 2, 3, 4, 5, 6, 7,
690 8, 9, 10, 11, 12, 13, 14, 15,
691 16, 17, 18, 19, 20, 21, 22, 23,
692 24, 25, 26, 27, 28, 29, 30, 31,
693 32, 33, 34, 35, 36, 37, 38, 39,
694 40, 41, 42, 43, 44, 45, 46, 47,
695 48, 49, 50, 51, 52, 53, 54, 55,
696 56, 57, 58, 59, 60, 61, 62, 63
697};
698
699static char channel_map_raydat_ss[HDSPM_MAX_CHANNELS] = {
700 4, 5, 6, 7, 8, 9, 10, 11, /* ADAT 1 */
701 12, 13, 14, 15, 16, 17, 18, 19, /* ADAT 2 */
702 20, 21, 22, 23, 24, 25, 26, 27, /* ADAT 3 */
703 28, 29, 30, 31, 32, 33, 34, 35, /* ADAT 4 */
704 0, 1, /* AES */
705 2, 3, /* SPDIF */
706 -1, -1, -1, -1,
707 -1, -1, -1, -1, -1, -1, -1, -1,
708 -1, -1, -1, -1, -1, -1, -1, -1,
709 -1, -1, -1, -1, -1, -1, -1, -1,
710};
711
712static char channel_map_raydat_ds[HDSPM_MAX_CHANNELS] = {
713 4, 5, 6, 7, /* ADAT 1 */
714 8, 9, 10, 11, /* ADAT 2 */
715 12, 13, 14, 15, /* ADAT 3 */
716 16, 17, 18, 19, /* ADAT 4 */
717 0, 1, /* AES */
718 2, 3, /* SPDIF */
719 -1, -1, -1, -1,
720 -1, -1, -1, -1, -1, -1, -1, -1,
721 -1, -1, -1, -1, -1, -1, -1, -1,
722 -1, -1, -1, -1, -1, -1, -1, -1,
723 -1, -1, -1, -1, -1, -1, -1, -1,
724 -1, -1, -1, -1, -1, -1, -1, -1,
725};
726
727static char channel_map_raydat_qs[HDSPM_MAX_CHANNELS] = {
728 4, 5, /* ADAT 1 */
729 6, 7, /* ADAT 2 */
730 8, 9, /* ADAT 3 */
731 10, 11, /* ADAT 4 */
732 0, 1, /* AES */
733 2, 3, /* SPDIF */
734 -1, -1, -1, -1,
735 -1, -1, -1, -1, -1, -1, -1, -1,
736 -1, -1, -1, -1, -1, -1, -1, -1,
737 -1, -1, -1, -1, -1, -1, -1, -1,
738 -1, -1, -1, -1, -1, -1, -1, -1,
739 -1, -1, -1, -1, -1, -1, -1, -1,
740 -1, -1, -1, -1, -1, -1, -1, -1,
741};
742
743static char channel_map_aio_in_ss[HDSPM_MAX_CHANNELS] = {
744 0, 1, /* line in */
745 8, 9, /* aes in, */
746 10, 11, /* spdif in */
747 12, 13, 14, 15, 16, 17, 18, 19, /* ADAT in */
748 -1, -1,
749 -1, -1, -1, -1, -1, -1, -1, -1,
750 -1, -1, -1, -1, -1, -1, -1, -1,
751 -1, -1, -1, -1, -1, -1, -1, -1,
752 -1, -1, -1, -1, -1, -1, -1, -1,
753 -1, -1, -1, -1, -1, -1, -1, -1,
754 -1, -1, -1, -1, -1, -1, -1, -1,
755};
756
757static char channel_map_aio_out_ss[HDSPM_MAX_CHANNELS] = {
758 0, 1, /* line out */
759 8, 9, /* aes out */
760 10, 11, /* spdif out */
761 12, 13, 14, 15, 16, 17, 18, 19, /* ADAT out */
762 6, 7, /* phone out */
763 -1, -1, -1, -1, -1, -1, -1, -1,
764 -1, -1, -1, -1, -1, -1, -1, -1,
765 -1, -1, -1, -1, -1, -1, -1, -1,
766 -1, -1, -1, -1, -1, -1, -1, -1,
767 -1, -1, -1, -1, -1, -1, -1, -1,
768 -1, -1, -1, -1, -1, -1, -1, -1,
769};
770
771static char channel_map_aio_in_ds[HDSPM_MAX_CHANNELS] = {
772 0, 1, /* line in */
773 8, 9, /* aes in */
774 10, 11, /* spdif in */
775 12, 14, 16, 18, /* adat in */
776 -1, -1, -1, -1, -1, -1,
777 -1, -1, -1, -1, -1, -1, -1, -1,
778 -1, -1, -1, -1, -1, -1, -1, -1,
779 -1, -1, -1, -1, -1, -1, -1, -1,
780 -1, -1, -1, -1, -1, -1, -1, -1,
781 -1, -1, -1, -1, -1, -1, -1, -1,
782 -1, -1, -1, -1, -1, -1, -1, -1
783};
784
785static char channel_map_aio_out_ds[HDSPM_MAX_CHANNELS] = {
786 0, 1, /* line out */
787 8, 9, /* aes out */
788 10, 11, /* spdif out */
789 12, 14, 16, 18, /* adat out */
790 6, 7, /* phone out */
791 -1, -1, -1, -1,
792 -1, -1, -1, -1, -1, -1, -1, -1,
793 -1, -1, -1, -1, -1, -1, -1, -1,
794 -1, -1, -1, -1, -1, -1, -1, -1,
795 -1, -1, -1, -1, -1, -1, -1, -1,
796 -1, -1, -1, -1, -1, -1, -1, -1,
797 -1, -1, -1, -1, -1, -1, -1, -1
798};
799
800static char channel_map_aio_in_qs[HDSPM_MAX_CHANNELS] = {
801 0, 1, /* line in */
802 8, 9, /* aes in */
803 10, 11, /* spdif in */
804 12, 16, /* adat in */
805 -1, -1, -1, -1, -1, -1, -1, -1,
806 -1, -1, -1, -1, -1, -1, -1, -1,
807 -1, -1, -1, -1, -1, -1, -1, -1,
808 -1, -1, -1, -1, -1, -1, -1, -1,
809 -1, -1, -1, -1, -1, -1, -1, -1,
810 -1, -1, -1, -1, -1, -1, -1, -1,
811 -1, -1, -1, -1, -1, -1, -1, -1
812};
813
814static char channel_map_aio_out_qs[HDSPM_MAX_CHANNELS] = {
815 0, 1, /* line out */
816 8, 9, /* aes out */
817 10, 11, /* spdif out */
818 12, 16, /* adat out */
819 6, 7, /* phone out */
820 -1, -1, -1, -1, -1, -1,
821 -1, -1, -1, -1, -1, -1, -1, -1,
822 -1, -1, -1, -1, -1, -1, -1, -1,
823 -1, -1, -1, -1, -1, -1, -1, -1,
824 -1, -1, -1, -1, -1, -1, -1, -1,
825 -1, -1, -1, -1, -1, -1, -1, -1,
826 -1, -1, -1, -1, -1, -1, -1, -1
827};
828
829static char channel_map_aes32[HDSPM_MAX_CHANNELS] = {
830 0, 1, 2, 3, 4, 5, 6, 7,
831 8, 9, 10, 11, 12, 13, 14, 15,
832 -1, -1, -1, -1, -1, -1, -1, -1,
833 -1, -1, -1, -1, -1, -1, -1, -1,
834 -1, -1, -1, -1, -1, -1, -1, -1,
835 -1, -1, -1, -1, -1, -1, -1, -1,
836 -1, -1, -1, -1, -1, -1, -1, -1,
837 -1, -1, -1, -1, -1, -1, -1, -1
838};
839
423struct hdspm_midi { 840struct hdspm_midi {
424 struct hdspm *hdspm; 841 struct hdspm *hdspm;
425 int id; 842 int id;
@@ -430,6 +847,21 @@ struct hdspm_midi {
430 struct timer_list timer; 847 struct timer_list timer;
431 spinlock_t lock; 848 spinlock_t lock;
432 int pending; 849 int pending;
850 int dataIn;
851 int statusIn;
852 int dataOut;
853 int statusOut;
854 int ie;
855 int irq;
856};
857
858struct hdspm_tco {
859 int input;
860 int framerate;
861 int wordclock;
862 int samplerate;
863 int pull;
864 int term; /* 0 = off, 1 = on */
433}; 865};
434 866
435struct hdspm { 867struct hdspm {
@@ -441,21 +873,39 @@ struct hdspm {
441 char *card_name; /* for procinfo */ 873 char *card_name; /* for procinfo */
442 unsigned short firmware_rev; /* dont know if relevant (yes if AES32)*/ 874 unsigned short firmware_rev; /* dont know if relevant (yes if AES32)*/
443 875
444 unsigned char is_aes32; /* indicates if card is AES32 */ 876 uint8_t io_type;
445 877
446 int precise_ptr; /* use precise pointers, to be tested */
447 int monitor_outs; /* set up monitoring outs init flag */ 878 int monitor_outs; /* set up monitoring outs init flag */
448 879
449 u32 control_register; /* cached value */ 880 u32 control_register; /* cached value */
450 u32 control2_register; /* cached value */ 881 u32 control2_register; /* cached value */
882 u32 settings_register;
451 883
452 struct hdspm_midi midi[2]; 884 struct hdspm_midi midi[4];
453 struct tasklet_struct midi_tasklet; 885 struct tasklet_struct midi_tasklet;
454 886
455 size_t period_bytes; 887 size_t period_bytes;
456 unsigned char ss_channels; /* channels of card in single speed */ 888 unsigned char ss_in_channels;
457 unsigned char ds_channels; /* Double Speed */ 889 unsigned char ds_in_channels;
458 unsigned char qs_channels; /* Quad Speed */ 890 unsigned char qs_in_channels;
891 unsigned char ss_out_channels;
892 unsigned char ds_out_channels;
893 unsigned char qs_out_channels;
894
895 unsigned char max_channels_in;
896 unsigned char max_channels_out;
897
898 char *channel_map_in;
899 char *channel_map_out;
900
901 char *channel_map_in_ss, *channel_map_in_ds, *channel_map_in_qs;
902 char *channel_map_out_ss, *channel_map_out_ds, *channel_map_out_qs;
903
904 char **port_names_in;
905 char **port_names_out;
906
907 char **port_names_in_ss, **port_names_in_ds, **port_names_in_qs;
908 char **port_names_out_ss, **port_names_out_ds, **port_names_out_qs;
459 909
460 unsigned char *playback_buffer; /* suitably aligned address */ 910 unsigned char *playback_buffer; /* suitably aligned address */
461 unsigned char *capture_buffer; /* suitably aligned address */ 911 unsigned char *capture_buffer; /* suitably aligned address */
@@ -468,14 +918,13 @@ struct hdspm {
468 int last_internal_sample_rate; 918 int last_internal_sample_rate;
469 int system_sample_rate; 919 int system_sample_rate;
470 920
471 char *channel_map; /* channel map for DS and Quadspeed */
472
473 int dev; /* Hardware vars... */ 921 int dev; /* Hardware vars... */
474 int irq; 922 int irq;
475 unsigned long port; 923 unsigned long port;
476 void __iomem *iobase; 924 void __iomem *iobase;
477 925
478 int irq_count; /* for debug */ 926 int irq_count; /* for debug */
927 int midiPorts;
479 928
480 struct snd_card *card; /* one card */ 929 struct snd_card *card; /* one card */
481 struct snd_pcm *pcm; /* has one pcm */ 930 struct snd_pcm *pcm; /* has one pcm */
@@ -487,28 +936,17 @@ struct hdspm {
487 struct snd_kcontrol *playback_mixer_ctls[HDSPM_MAX_CHANNELS]; 936 struct snd_kcontrol *playback_mixer_ctls[HDSPM_MAX_CHANNELS];
488 /* but input to much, so not used */ 937 /* but input to much, so not used */
489 struct snd_kcontrol *input_mixer_ctls[HDSPM_MAX_CHANNELS]; 938 struct snd_kcontrol *input_mixer_ctls[HDSPM_MAX_CHANNELS];
490 /* full mixer accessible over mixer ioctl or hwdep-device */ 939 /* full mixer accessable over mixer ioctl or hwdep-device */
491 struct hdspm_mixer *mixer; 940 struct hdspm_mixer *mixer;
492 941
493}; 942 struct hdspm_tco *tco; /* NULL if no TCO detected */
494 943
495/* These tables map the ALSA channels 1..N to the channels that we 944 char **texts_autosync;
496 need to use in order to find the relevant channel buffer. RME 945 int texts_autosync_items;
497 refer to this kind of mapping as between "the ADAT channel and 946
498 the DMA channel." We index it using the logical audio channel, 947 cycles_t last_interrupt;
499 and the value is the DMA channel (i.e. channel buffer number)
500 where the data for that channel can be read/written from/to.
501*/
502 948
503static char channel_map_madi_ss[HDSPM_MAX_CHANNELS] = { 949 struct hdspm_peak_rms peak_rms;
504 0, 1, 2, 3, 4, 5, 6, 7,
505 8, 9, 10, 11, 12, 13, 14, 15,
506 16, 17, 18, 19, 20, 21, 22, 23,
507 24, 25, 26, 27, 28, 29, 30, 31,
508 32, 33, 34, 35, 36, 37, 38, 39,
509 40, 41, 42, 43, 44, 45, 46, 47,
510 48, 49, 50, 51, 52, 53, 54, 55,
511 56, 57, 58, 59, 60, 61, 62, 63
512}; 950};
513 951
514 952
@@ -532,11 +970,11 @@ static int __devinit snd_hdspm_create_alsa_devices(struct snd_card *card,
532static int __devinit snd_hdspm_create_pcm(struct snd_card *card, 970static int __devinit snd_hdspm_create_pcm(struct snd_card *card,
533 struct hdspm * hdspm); 971 struct hdspm * hdspm);
534 972
535static inline void snd_hdspm_initialize_midi_flush(struct hdspm * hdspm); 973static inline void snd_hdspm_initialize_midi_flush(struct hdspm *hdspm);
536static int hdspm_update_simple_mixer_controls(struct hdspm * hdspm); 974static int hdspm_update_simple_mixer_controls(struct hdspm *hdspm);
537static int hdspm_autosync_ref(struct hdspm * hdspm); 975static int hdspm_autosync_ref(struct hdspm *hdspm);
538static int snd_hdspm_set_defaults(struct hdspm * hdspm); 976static int snd_hdspm_set_defaults(struct hdspm *hdspm);
539static void hdspm_set_sgbuf(struct hdspm * hdspm, 977static void hdspm_set_sgbuf(struct hdspm *hdspm,
540 struct snd_pcm_substream *substream, 978 struct snd_pcm_substream *substream,
541 unsigned int reg, int channels); 979 unsigned int reg, int channels);
542 980
@@ -550,7 +988,7 @@ static inline int HDSPM_bit2freq(int n)
550 return bit2freq_tab[n]; 988 return bit2freq_tab[n];
551} 989}
552 990
553/* Write/read to/from HDSPM with Addresses in Bytes 991/* Write/read to/from HDSPM with Adresses in Bytes
554 not words but only 32Bit writes are allowed */ 992 not words but only 32Bit writes are allowed */
555 993
556static inline void hdspm_write(struct hdspm * hdspm, unsigned int reg, 994static inline void hdspm_write(struct hdspm * hdspm, unsigned int reg,
@@ -564,8 +1002,8 @@ static inline unsigned int hdspm_read(struct hdspm * hdspm, unsigned int reg)
564 return readl(hdspm->iobase + reg); 1002 return readl(hdspm->iobase + reg);
565} 1003}
566 1004
567/* for each output channel (chan) I have an Input (in) and Playback (pb) Fader 1005/* for each output channel (chan) I have an Input (in) and Playback (pb) Fader
568 mixer is write only on hardware so we have to cache him for read 1006 mixer is write only on hardware so we have to cache him for read
569 each fader is a u32, but uses only the first 16 bit */ 1007 each fader is a u32, but uses only the first 16 bit */
570 1008
571static inline int hdspm_read_in_gain(struct hdspm * hdspm, unsigned int chan, 1009static inline int hdspm_read_in_gain(struct hdspm * hdspm, unsigned int chan,
@@ -641,30 +1079,67 @@ static int snd_hdspm_use_is_exclusive(struct hdspm *hdspm)
641/* check for external sample rate */ 1079/* check for external sample rate */
642static int hdspm_external_sample_rate(struct hdspm *hdspm) 1080static int hdspm_external_sample_rate(struct hdspm *hdspm)
643{ 1081{
644 if (hdspm->is_aes32) { 1082 unsigned int status, status2, timecode;
645 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 1083 int syncref, rate = 0, rate_bits;
646 unsigned int status = hdspm_read(hdspm, HDSPM_statusRegister);
647 unsigned int timecode =
648 hdspm_read(hdspm, HDSPM_timecodeRegister);
649 1084
650 int syncref = hdspm_autosync_ref(hdspm); 1085 switch (hdspm->io_type) {
1086 case AES32:
1087 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
1088 status = hdspm_read(hdspm, HDSPM_statusRegister);
1089 timecode = hdspm_read(hdspm, HDSPM_timecodeRegister);
1090
1091 syncref = hdspm_autosync_ref(hdspm);
651 1092
652 if (syncref == HDSPM_AES32_AUTOSYNC_FROM_WORD && 1093 if (syncref == HDSPM_AES32_AUTOSYNC_FROM_WORD &&
653 status & HDSPM_AES32_wcLock) 1094 status & HDSPM_AES32_wcLock)
654 return HDSPM_bit2freq((status >> HDSPM_AES32_wcFreq_bit) 1095 return HDSPM_bit2freq((status >> HDSPM_AES32_wcFreq_bit) & 0xF);
655 & 0xF); 1096
656 if (syncref >= HDSPM_AES32_AUTOSYNC_FROM_AES1 && 1097 if (syncref >= HDSPM_AES32_AUTOSYNC_FROM_AES1 &&
657 syncref <= HDSPM_AES32_AUTOSYNC_FROM_AES8 && 1098 syncref <= HDSPM_AES32_AUTOSYNC_FROM_AES8 &&
658 status2 & (HDSPM_LockAES >> 1099 status2 & (HDSPM_LockAES >>
659 (syncref - HDSPM_AES32_AUTOSYNC_FROM_AES1))) 1100 (syncref - HDSPM_AES32_AUTOSYNC_FROM_AES1)))
660 return HDSPM_bit2freq((timecode >> 1101 return HDSPM_bit2freq((timecode >> (4*(syncref-HDSPM_AES32_AUTOSYNC_FROM_AES1))) & 0xF);
661 (4*(syncref-HDSPM_AES32_AUTOSYNC_FROM_AES1))) & 0xF);
662 return 0; 1102 return 0;
663 } else { 1103 break;
664 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 1104
665 unsigned int status = hdspm_read(hdspm, HDSPM_statusRegister); 1105 case MADIface:
666 unsigned int rate_bits; 1106 status = hdspm_read(hdspm, HDSPM_statusRegister);
667 int rate = 0; 1107
1108 if (!(status & HDSPM_madiLock)) {
1109 rate = 0; /* no lock */
1110 } else {
1111 switch (status & (HDSPM_status1_freqMask)) {
1112 case HDSPM_status1_F_0*1:
1113 rate = 32000; break;
1114 case HDSPM_status1_F_0*2:
1115 rate = 44100; break;
1116 case HDSPM_status1_F_0*3:
1117 rate = 48000; break;
1118 case HDSPM_status1_F_0*4:
1119 rate = 64000; break;
1120 case HDSPM_status1_F_0*5:
1121 rate = 88200; break;
1122 case HDSPM_status1_F_0*6:
1123 rate = 96000; break;
1124 case HDSPM_status1_F_0*7:
1125 rate = 128000; break;
1126 case HDSPM_status1_F_0*8:
1127 rate = 176400; break;
1128 case HDSPM_status1_F_0*9:
1129 rate = 192000; break;
1130 default:
1131 rate = 0; break;
1132 }
1133 }
1134
1135 break;
1136
1137 case MADI:
1138 case AIO:
1139 case RayDAT:
1140 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
1141 status = hdspm_read(hdspm, HDSPM_statusRegister);
1142 rate = 0;
668 1143
669 /* if wordclock has synced freq and wordclock is valid */ 1144 /* if wordclock has synced freq and wordclock is valid */
670 if ((status2 & HDSPM_wcLock) != 0 && 1145 if ((status2 & HDSPM_wcLock) != 0 &&
@@ -672,6 +1147,7 @@ static int hdspm_external_sample_rate(struct hdspm *hdspm)
672 1147
673 rate_bits = status2 & HDSPM_wcFreqMask; 1148 rate_bits = status2 & HDSPM_wcFreqMask;
674 1149
1150
675 switch (rate_bits) { 1151 switch (rate_bits) {
676 case HDSPM_wcFreq32: 1152 case HDSPM_wcFreq32:
677 rate = 32000; 1153 rate = 32000;
@@ -691,7 +1167,6 @@ static int hdspm_external_sample_rate(struct hdspm *hdspm)
691 case HDSPM_wcFreq96: 1167 case HDSPM_wcFreq96:
692 rate = 96000; 1168 rate = 96000;
693 break; 1169 break;
694 /* Quadspeed Bit missing ???? */
695 default: 1170 default:
696 rate = 0; 1171 rate = 0;
697 break; 1172 break;
@@ -702,10 +1177,10 @@ static int hdspm_external_sample_rate(struct hdspm *hdspm)
702 * word has priority to MADI 1177 * word has priority to MADI
703 */ 1178 */
704 if (rate != 0 && 1179 if (rate != 0 &&
705 (status2 & HDSPM_SelSyncRefMask) == HDSPM_SelSyncRef_WORD) 1180 (status2 & HDSPM_SelSyncRefMask) == HDSPM_SelSyncRef_WORD)
706 return rate; 1181 return rate;
707 1182
708 /* maby a madi input (which is taken if sel sync is madi) */ 1183 /* maybe a madi input (which is taken if sel sync is madi) */
709 if (status & HDSPM_madiLock) { 1184 if (status & HDSPM_madiLock) {
710 rate_bits = status & HDSPM_madiFreqMask; 1185 rate_bits = status & HDSPM_madiFreqMask;
711 1186
@@ -742,36 +1217,35 @@ static int hdspm_external_sample_rate(struct hdspm *hdspm)
742 break; 1217 break;
743 } 1218 }
744 } 1219 }
745 return rate; 1220 break;
746 } 1221 }
1222
1223 return rate;
747} 1224}
748 1225
749/* Latency function */ 1226/* Latency function */
750static inline void hdspm_compute_period_size(struct hdspm * hdspm) 1227static inline void hdspm_compute_period_size(struct hdspm *hdspm)
751{ 1228{
752 hdspm->period_bytes = 1229 hdspm->period_bytes = 1 << ((hdspm_decode_latency(hdspm->control_register) + 8));
753 1 << ((hdspm_decode_latency(hdspm->control_register) + 8));
754} 1230}
755 1231
756static snd_pcm_uframes_t hdspm_hw_pointer(struct hdspm * hdspm) 1232
1233static snd_pcm_uframes_t hdspm_hw_pointer(struct hdspm *hdspm)
757{ 1234{
758 int position; 1235 int position;
759 1236
760 position = hdspm_read(hdspm, HDSPM_statusRegister); 1237 position = hdspm_read(hdspm, HDSPM_statusRegister);
761 1238
762 if (!hdspm->precise_ptr) 1239 switch (hdspm->io_type) {
763 return (position & HDSPM_BufferID) ? 1240 case RayDAT:
1241 case AIO:
1242 position &= HDSPM_BufferPositionMask;
1243 position /= 4; /* Bytes per sample */
1244 break;
1245 default:
1246 position = (position & HDSPM_BufferID) ?
764 (hdspm->period_bytes / 4) : 0; 1247 (hdspm->period_bytes / 4) : 0;
765 1248 }
766 /* hwpointer comes in bytes and is 64Bytes accurate (by docu since
767 PCI Burst)
768 i have experimented that it is at most 64 Byte to much for playing
769 so substraction of 64 byte should be ok for ALSA, but use it only
770 for application where you know what you do since if you come to
771 near with record pointer it can be a disaster */
772
773 position &= HDSPM_BufferPositionMask;
774 position = ((position - 64) % (2 * hdspm->period_bytes)) / 4;
775 1249
776 return position; 1250 return position;
777} 1251}
@@ -805,7 +1279,7 @@ static void hdspm_silence_playback(struct hdspm *hdspm)
805 } 1279 }
806} 1280}
807 1281
808static int hdspm_set_interrupt_interval(struct hdspm * s, unsigned int frames) 1282static int hdspm_set_interrupt_interval(struct hdspm *s, unsigned int frames)
809{ 1283{
810 int n; 1284 int n;
811 1285
@@ -829,21 +1303,53 @@ static int hdspm_set_interrupt_interval(struct hdspm * s, unsigned int frames)
829 return 0; 1303 return 0;
830} 1304}
831 1305
1306static u64 hdspm_calc_dds_value(struct hdspm *hdspm, u64 period)
1307{
1308 u64 freq_const;
1309
1310 if (period == 0)
1311 return 0;
1312
1313 switch (hdspm->io_type) {
1314 case MADI:
1315 case AES32:
1316 freq_const = 110069313433624ULL;
1317 break;
1318 case RayDAT:
1319 case AIO:
1320 freq_const = 104857600000000ULL;
1321 break;
1322 case MADIface:
1323 freq_const = 131072000000000ULL;
1324 }
1325
1326 return div_u64(freq_const, period);
1327}
1328
1329
832static void hdspm_set_dds_value(struct hdspm *hdspm, int rate) 1330static void hdspm_set_dds_value(struct hdspm *hdspm, int rate)
833{ 1331{
834 u64 n; 1332 u64 n;
835 1333
836 if (rate >= 112000) 1334 if (rate >= 112000)
837 rate /= 4; 1335 rate /= 4;
838 else if (rate >= 56000) 1336 else if (rate >= 56000)
839 rate /= 2; 1337 rate /= 2;
840 1338
841 /* RME says n = 104857600000000, but in the windows MADI driver, I see: 1339 switch (hdspm->io_type) {
842// return 104857600000000 / rate; // 100 MHz 1340 case MADIface:
843 return 110100480000000 / rate; // 105 MHz 1341 n = 131072000000000ULL; /* 125 MHz */
844 */ 1342 break;
845 /* n = 104857600000000ULL; */ /* = 2^20 * 10^8 */ 1343 case MADI:
846 n = 110100480000000ULL; /* Value checked for AES32 and MADI */ 1344 case AES32:
1345 n = 110069313433624ULL; /* 105 MHz */
1346 break;
1347 case RayDAT:
1348 case AIO:
1349 n = 104857600000000ULL; /* 100 MHz */
1350 break;
1351 }
1352
847 n = div_u64(n, rate); 1353 n = div_u64(n, rate);
848 /* n should be less than 2^32 for being written to FREQ register */ 1354 /* n should be less than 2^32 for being written to FREQ register */
849 snd_BUG_ON(n >> 32); 1355 snd_BUG_ON(n >> 32);
@@ -864,13 +1370,13 @@ static int hdspm_set_rate(struct hdspm * hdspm, int rate, int called_internally)
864 1370
865 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) { 1371 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) {
866 1372
867 /* SLAVE --- */ 1373 /* SLAVE --- */
868 if (called_internally) { 1374 if (called_internally) {
869 1375
870 /* request from ctl or card initialization 1376 /* request from ctl or card initialization
871 just make a warning an remember setting 1377 just make a warning an remember setting
872 for future master mode switching */ 1378 for future master mode switching */
873 1379
874 snd_printk(KERN_WARNING "HDSPM: " 1380 snd_printk(KERN_WARNING "HDSPM: "
875 "Warning: device is not running " 1381 "Warning: device is not running "
876 "as a clock master.\n"); 1382 "as a clock master.\n");
@@ -907,7 +1413,7 @@ static int hdspm_set_rate(struct hdspm * hdspm, int rate, int called_internally)
907 1413
908 Note that a similar but essentially insoluble problem exists for 1414 Note that a similar but essentially insoluble problem exists for
909 externally-driven rate changes. All we can do is to flag rate 1415 externally-driven rate changes. All we can do is to flag rate
910 changes in the read/write routines. 1416 changes in the read/write routines.
911 */ 1417 */
912 1418
913 if (current_rate <= 48000) 1419 if (current_rate <= 48000)
@@ -975,16 +1481,35 @@ static int hdspm_set_rate(struct hdspm * hdspm, int rate, int called_internally)
975 /* For AES32, need to set DDS value in FREQ register 1481 /* For AES32, need to set DDS value in FREQ register
976 For MADI, also apparently */ 1482 For MADI, also apparently */
977 hdspm_set_dds_value(hdspm, rate); 1483 hdspm_set_dds_value(hdspm, rate);
978 1484
979 if (hdspm->is_aes32 && rate != current_rate) 1485 if (AES32 == hdspm->io_type && rate != current_rate)
980 hdspm_write(hdspm, HDSPM_eeprom_wr, 0); 1486 hdspm_write(hdspm, HDSPM_eeprom_wr, 0);
981
982 /* For AES32 and for MADI (at least rev 204), channel_map needs to
983 * always be channel_map_madi_ss, whatever the sample rate */
984 hdspm->channel_map = channel_map_madi_ss;
985 1487
986 hdspm->system_sample_rate = rate; 1488 hdspm->system_sample_rate = rate;
987 1489
1490 if (rate <= 48000) {
1491 hdspm->channel_map_in = hdspm->channel_map_in_ss;
1492 hdspm->channel_map_out = hdspm->channel_map_out_ss;
1493 hdspm->max_channels_in = hdspm->ss_in_channels;
1494 hdspm->max_channels_out = hdspm->ss_out_channels;
1495 hdspm->port_names_in = hdspm->port_names_in_ss;
1496 hdspm->port_names_out = hdspm->port_names_out_ss;
1497 } else if (rate <= 96000) {
1498 hdspm->channel_map_in = hdspm->channel_map_in_ds;
1499 hdspm->channel_map_out = hdspm->channel_map_out_ds;
1500 hdspm->max_channels_in = hdspm->ds_in_channels;
1501 hdspm->max_channels_out = hdspm->ds_out_channels;
1502 hdspm->port_names_in = hdspm->port_names_in_ds;
1503 hdspm->port_names_out = hdspm->port_names_out_ds;
1504 } else {
1505 hdspm->channel_map_in = hdspm->channel_map_in_qs;
1506 hdspm->channel_map_out = hdspm->channel_map_out_qs;
1507 hdspm->max_channels_in = hdspm->qs_in_channels;
1508 hdspm->max_channels_out = hdspm->qs_out_channels;
1509 hdspm->port_names_in = hdspm->port_names_in_qs;
1510 hdspm->port_names_out = hdspm->port_names_out_qs;
1511 }
1512
988 if (not_set != 0) 1513 if (not_set != 0)
989 return -1; 1514 return -1;
990 1515
@@ -1019,39 +1544,26 @@ static inline unsigned char snd_hdspm_midi_read_byte (struct hdspm *hdspm,
1019 int id) 1544 int id)
1020{ 1545{
1021 /* the hardware already does the relevant bit-mask with 0xff */ 1546 /* the hardware already does the relevant bit-mask with 0xff */
1022 if (id) 1547 return hdspm_read(hdspm, hdspm->midi[id].dataIn);
1023 return hdspm_read(hdspm, HDSPM_midiDataIn1);
1024 else
1025 return hdspm_read(hdspm, HDSPM_midiDataIn0);
1026} 1548}
1027 1549
1028static inline void snd_hdspm_midi_write_byte (struct hdspm *hdspm, int id, 1550static inline void snd_hdspm_midi_write_byte (struct hdspm *hdspm, int id,
1029 int val) 1551 int val)
1030{ 1552{
1031 /* the hardware already does the relevant bit-mask with 0xff */ 1553 /* the hardware already does the relevant bit-mask with 0xff */
1032 if (id) 1554 return hdspm_write(hdspm, hdspm->midi[id].dataOut, val);
1033 hdspm_write(hdspm, HDSPM_midiDataOut1, val);
1034 else
1035 hdspm_write(hdspm, HDSPM_midiDataOut0, val);
1036} 1555}
1037 1556
1038static inline int snd_hdspm_midi_input_available (struct hdspm *hdspm, int id) 1557static inline int snd_hdspm_midi_input_available (struct hdspm *hdspm, int id)
1039{ 1558{
1040 if (id) 1559 return hdspm_read(hdspm, hdspm->midi[id].statusIn) & 0xFF;
1041 return (hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xff);
1042 else
1043 return (hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xff);
1044} 1560}
1045 1561
1046static inline int snd_hdspm_midi_output_possible (struct hdspm *hdspm, int id) 1562static inline int snd_hdspm_midi_output_possible (struct hdspm *hdspm, int id)
1047{ 1563{
1048 int fifo_bytes_used; 1564 int fifo_bytes_used;
1049 1565
1050 if (id) 1566 fifo_bytes_used = hdspm_read(hdspm, hdspm->midi[id].statusOut) & 0xFF;
1051 fifo_bytes_used = hdspm_read(hdspm, HDSPM_midiStatusOut1);
1052 else
1053 fifo_bytes_used = hdspm_read(hdspm, HDSPM_midiStatusOut0);
1054 fifo_bytes_used &= 0xff;
1055 1567
1056 if (fifo_bytes_used < 128) 1568 if (fifo_bytes_used < 128)
1057 return 128 - fifo_bytes_used; 1569 return 128 - fifo_bytes_used;
@@ -1074,7 +1586,7 @@ static int snd_hdspm_midi_output_write (struct hdspm_midi *hmidi)
1074 unsigned char buf[128]; 1586 unsigned char buf[128];
1075 1587
1076 /* Output is not interrupt driven */ 1588 /* Output is not interrupt driven */
1077 1589
1078 spin_lock_irqsave (&hmidi->lock, flags); 1590 spin_lock_irqsave (&hmidi->lock, flags);
1079 if (hmidi->output && 1591 if (hmidi->output &&
1080 !snd_rawmidi_transmit_empty (hmidi->output)) { 1592 !snd_rawmidi_transmit_empty (hmidi->output)) {
@@ -1083,11 +1595,11 @@ static int snd_hdspm_midi_output_write (struct hdspm_midi *hmidi)
1083 if (n_pending > 0) { 1595 if (n_pending > 0) {
1084 if (n_pending > (int)sizeof (buf)) 1596 if (n_pending > (int)sizeof (buf))
1085 n_pending = sizeof (buf); 1597 n_pending = sizeof (buf);
1086 1598
1087 to_write = snd_rawmidi_transmit (hmidi->output, buf, 1599 to_write = snd_rawmidi_transmit (hmidi->output, buf,
1088 n_pending); 1600 n_pending);
1089 if (to_write > 0) { 1601 if (to_write > 0) {
1090 for (i = 0; i < to_write; ++i) 1602 for (i = 0; i < to_write; ++i)
1091 snd_hdspm_midi_write_byte (hmidi->hdspm, 1603 snd_hdspm_midi_write_byte (hmidi->hdspm,
1092 hmidi->id, 1604 hmidi->id,
1093 buf[i]); 1605 buf[i]);
@@ -1127,12 +1639,11 @@ static int snd_hdspm_midi_input_read (struct hdspm_midi *hmidi)
1127 } 1639 }
1128 } 1640 }
1129 hmidi->pending = 0; 1641 hmidi->pending = 0;
1130 if (hmidi->id) 1642
1131 hmidi->hdspm->control_register |= HDSPM_Midi1InterruptEnable; 1643 hmidi->hdspm->control_register |= hmidi->ie;
1132 else
1133 hmidi->hdspm->control_register |= HDSPM_Midi0InterruptEnable;
1134 hdspm_write(hmidi->hdspm, HDSPM_controlRegister, 1644 hdspm_write(hmidi->hdspm, HDSPM_controlRegister,
1135 hmidi->hdspm->control_register); 1645 hmidi->hdspm->control_register);
1646
1136 spin_unlock_irqrestore (&hmidi->lock, flags); 1647 spin_unlock_irqrestore (&hmidi->lock, flags);
1137 return snd_hdspm_midi_output_write (hmidi); 1648 return snd_hdspm_midi_output_write (hmidi);
1138} 1649}
@@ -1143,20 +1654,18 @@ snd_hdspm_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1143 struct hdspm *hdspm; 1654 struct hdspm *hdspm;
1144 struct hdspm_midi *hmidi; 1655 struct hdspm_midi *hmidi;
1145 unsigned long flags; 1656 unsigned long flags;
1146 u32 ie;
1147 1657
1148 hmidi = substream->rmidi->private_data; 1658 hmidi = substream->rmidi->private_data;
1149 hdspm = hmidi->hdspm; 1659 hdspm = hmidi->hdspm;
1150 ie = hmidi->id ? 1660
1151 HDSPM_Midi1InterruptEnable : HDSPM_Midi0InterruptEnable;
1152 spin_lock_irqsave (&hdspm->lock, flags); 1661 spin_lock_irqsave (&hdspm->lock, flags);
1153 if (up) { 1662 if (up) {
1154 if (!(hdspm->control_register & ie)) { 1663 if (!(hdspm->control_register & hmidi->ie)) {
1155 snd_hdspm_flush_midi_input (hdspm, hmidi->id); 1664 snd_hdspm_flush_midi_input (hdspm, hmidi->id);
1156 hdspm->control_register |= ie; 1665 hdspm->control_register |= hmidi->ie;
1157 } 1666 }
1158 } else { 1667 } else {
1159 hdspm->control_register &= ~ie; 1668 hdspm->control_register &= ~hmidi->ie;
1160 } 1669 }
1161 1670
1162 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 1671 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
@@ -1167,14 +1676,14 @@ static void snd_hdspm_midi_output_timer(unsigned long data)
1167{ 1676{
1168 struct hdspm_midi *hmidi = (struct hdspm_midi *) data; 1677 struct hdspm_midi *hmidi = (struct hdspm_midi *) data;
1169 unsigned long flags; 1678 unsigned long flags;
1170 1679
1171 snd_hdspm_midi_output_write(hmidi); 1680 snd_hdspm_midi_output_write(hmidi);
1172 spin_lock_irqsave (&hmidi->lock, flags); 1681 spin_lock_irqsave (&hmidi->lock, flags);
1173 1682
1174 /* this does not bump hmidi->istimer, because the 1683 /* this does not bump hmidi->istimer, because the
1175 kernel automatically removed the timer when it 1684 kernel automatically removed the timer when it
1176 expired, and we are now adding it back, thus 1685 expired, and we are now adding it back, thus
1177 leaving istimer wherever it was set before. 1686 leaving istimer wherever it was set before.
1178 */ 1687 */
1179 1688
1180 if (hmidi->istimer) { 1689 if (hmidi->istimer) {
@@ -1288,22 +1797,103 @@ static int __devinit snd_hdspm_create_midi (struct snd_card *card,
1288 hdspm->midi[id].hdspm = hdspm; 1797 hdspm->midi[id].hdspm = hdspm;
1289 spin_lock_init (&hdspm->midi[id].lock); 1798 spin_lock_init (&hdspm->midi[id].lock);
1290 1799
1291 sprintf (buf, "%s MIDI %d", card->shortname, id+1); 1800 if (0 == id) {
1292 err = snd_rawmidi_new (card, buf, id, 1, 1, &hdspm->midi[id].rmidi); 1801 if (MADIface == hdspm->io_type) {
1293 if (err < 0) 1802 /* MIDI-over-MADI on HDSPe MADIface */
1294 return err; 1803 hdspm->midi[0].dataIn = HDSPM_midiDataIn2;
1804 hdspm->midi[0].statusIn = HDSPM_midiStatusIn2;
1805 hdspm->midi[0].dataOut = HDSPM_midiDataOut2;
1806 hdspm->midi[0].statusOut = HDSPM_midiStatusOut2;
1807 hdspm->midi[0].ie = HDSPM_Midi2InterruptEnable;
1808 hdspm->midi[0].irq = HDSPM_midi2IRQPending;
1809 } else {
1810 hdspm->midi[0].dataIn = HDSPM_midiDataIn0;
1811 hdspm->midi[0].statusIn = HDSPM_midiStatusIn0;
1812 hdspm->midi[0].dataOut = HDSPM_midiDataOut0;
1813 hdspm->midi[0].statusOut = HDSPM_midiStatusOut0;
1814 hdspm->midi[0].ie = HDSPM_Midi0InterruptEnable;
1815 hdspm->midi[0].irq = HDSPM_midi0IRQPending;
1816 }
1817 } else if (1 == id) {
1818 hdspm->midi[1].dataIn = HDSPM_midiDataIn1;
1819 hdspm->midi[1].statusIn = HDSPM_midiStatusIn1;
1820 hdspm->midi[1].dataOut = HDSPM_midiDataOut1;
1821 hdspm->midi[1].statusOut = HDSPM_midiStatusOut1;
1822 hdspm->midi[1].ie = HDSPM_Midi1InterruptEnable;
1823 hdspm->midi[1].irq = HDSPM_midi1IRQPending;
1824 } else if ((2 == id) && (MADI == hdspm->io_type)) {
1825 /* MIDI-over-MADI on HDSPe MADI */
1826 hdspm->midi[2].dataIn = HDSPM_midiDataIn2;
1827 hdspm->midi[2].statusIn = HDSPM_midiStatusIn2;
1828 hdspm->midi[2].dataOut = HDSPM_midiDataOut2;
1829 hdspm->midi[2].statusOut = HDSPM_midiStatusOut2;
1830 hdspm->midi[2].ie = HDSPM_Midi2InterruptEnable;
1831 hdspm->midi[2].irq = HDSPM_midi2IRQPending;
1832 } else if (2 == id) {
1833 /* TCO MTC, read only */
1834 hdspm->midi[2].dataIn = HDSPM_midiDataIn2;
1835 hdspm->midi[2].statusIn = HDSPM_midiStatusIn2;
1836 hdspm->midi[2].dataOut = -1;
1837 hdspm->midi[2].statusOut = -1;
1838 hdspm->midi[2].ie = HDSPM_Midi2InterruptEnable;
1839 hdspm->midi[2].irq = HDSPM_midi2IRQPendingAES;
1840 } else if (3 == id) {
1841 /* TCO MTC on HDSPe MADI */
1842 hdspm->midi[3].dataIn = HDSPM_midiDataIn3;
1843 hdspm->midi[3].statusIn = HDSPM_midiStatusIn3;
1844 hdspm->midi[3].dataOut = -1;
1845 hdspm->midi[3].statusOut = -1;
1846 hdspm->midi[3].ie = HDSPM_Midi3InterruptEnable;
1847 hdspm->midi[3].irq = HDSPM_midi3IRQPending;
1848 }
1295 1849
1296 sprintf(hdspm->midi[id].rmidi->name, "HDSPM MIDI %d", id+1); 1850 if ((id < 2) || ((2 == id) && ((MADI == hdspm->io_type) ||
1297 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id]; 1851 (MADIface == hdspm->io_type)))) {
1852 if ((id == 0) && (MADIface == hdspm->io_type)) {
1853 sprintf(buf, "%s MIDIoverMADI", card->shortname);
1854 } else if ((id == 2) && (MADI == hdspm->io_type)) {
1855 sprintf(buf, "%s MIDIoverMADI", card->shortname);
1856 } else {
1857 sprintf(buf, "%s MIDI %d", card->shortname, id+1);
1858 }
1859 err = snd_rawmidi_new(card, buf, id, 1, 1,
1860 &hdspm->midi[id].rmidi);
1861 if (err < 0)
1862 return err;
1298 1863
1299 snd_rawmidi_set_ops(hdspm->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, 1864 sprintf(hdspm->midi[id].rmidi->name, "%s MIDI %d",
1300 &snd_hdspm_midi_output); 1865 card->id, id+1);
1301 snd_rawmidi_set_ops(hdspm->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, 1866 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id];
1302 &snd_hdspm_midi_input); 1867
1868 snd_rawmidi_set_ops(hdspm->midi[id].rmidi,
1869 SNDRV_RAWMIDI_STREAM_OUTPUT,
1870 &snd_hdspm_midi_output);
1871 snd_rawmidi_set_ops(hdspm->midi[id].rmidi,
1872 SNDRV_RAWMIDI_STREAM_INPUT,
1873 &snd_hdspm_midi_input);
1874
1875 hdspm->midi[id].rmidi->info_flags |=
1876 SNDRV_RAWMIDI_INFO_OUTPUT |
1877 SNDRV_RAWMIDI_INFO_INPUT |
1878 SNDRV_RAWMIDI_INFO_DUPLEX;
1879 } else {
1880 /* TCO MTC, read only */
1881 sprintf(buf, "%s MTC %d", card->shortname, id+1);
1882 err = snd_rawmidi_new(card, buf, id, 1, 1,
1883 &hdspm->midi[id].rmidi);
1884 if (err < 0)
1885 return err;
1303 1886
1304 hdspm->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | 1887 sprintf(hdspm->midi[id].rmidi->name,
1305 SNDRV_RAWMIDI_INFO_INPUT | 1888 "%s MTC %d", card->id, id+1);
1306 SNDRV_RAWMIDI_INFO_DUPLEX; 1889 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id];
1890
1891 snd_rawmidi_set_ops(hdspm->midi[id].rmidi,
1892 SNDRV_RAWMIDI_STREAM_INPUT,
1893 &snd_hdspm_midi_input);
1894
1895 hdspm->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_INPUT;
1896 }
1307 1897
1308 return 0; 1898 return 0;
1309} 1899}
@@ -1312,12 +1902,15 @@ static int __devinit snd_hdspm_create_midi (struct snd_card *card,
1312static void hdspm_midi_tasklet(unsigned long arg) 1902static void hdspm_midi_tasklet(unsigned long arg)
1313{ 1903{
1314 struct hdspm *hdspm = (struct hdspm *)arg; 1904 struct hdspm *hdspm = (struct hdspm *)arg;
1315 1905 int i = 0;
1316 if (hdspm->midi[0].pending) 1906
1317 snd_hdspm_midi_input_read (&hdspm->midi[0]); 1907 while (i < hdspm->midiPorts) {
1318 if (hdspm->midi[1].pending) 1908 if (hdspm->midi[i].pending)
1319 snd_hdspm_midi_input_read (&hdspm->midi[1]); 1909 snd_hdspm_midi_input_read(&hdspm->midi[i]);
1320} 1910
1911 i++;
1912 }
1913}
1321 1914
1322 1915
1323/*----------------------------------------------------------------------------- 1916/*-----------------------------------------------------------------------------
@@ -1326,6 +1919,22 @@ static void hdspm_midi_tasklet(unsigned long arg)
1326 1919
1327/* get the system sample rate which is set */ 1920/* get the system sample rate which is set */
1328 1921
1922
1923/**
1924 * Calculate the real sample rate from the
1925 * current DDS value.
1926 **/
1927static int hdspm_get_system_sample_rate(struct hdspm *hdspm)
1928{
1929 unsigned int period, rate;
1930
1931 period = hdspm_read(hdspm, HDSPM_RD_PLL_FREQ);
1932 rate = hdspm_calc_dds_value(hdspm, period);
1933
1934 return rate;
1935}
1936
1937
1329#define HDSPM_SYSTEM_SAMPLE_RATE(xname, xindex) \ 1938#define HDSPM_SYSTEM_SAMPLE_RATE(xname, xindex) \
1330{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1939{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1331 .name = xname, \ 1940 .name = xname, \
@@ -1340,112 +1949,274 @@ static int snd_hdspm_info_system_sample_rate(struct snd_kcontrol *kcontrol,
1340{ 1949{
1341 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1950 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1342 uinfo->count = 1; 1951 uinfo->count = 1;
1952 uinfo->value.integer.min = 27000;
1953 uinfo->value.integer.max = 207000;
1954 uinfo->value.integer.step = 1;
1343 return 0; 1955 return 0;
1344} 1956}
1345 1957
1958
1346static int snd_hdspm_get_system_sample_rate(struct snd_kcontrol *kcontrol, 1959static int snd_hdspm_get_system_sample_rate(struct snd_kcontrol *kcontrol,
1347 struct snd_ctl_elem_value * 1960 struct snd_ctl_elem_value *
1348 ucontrol) 1961 ucontrol)
1349{ 1962{
1350 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 1963 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
1351 1964
1352 ucontrol->value.enumerated.item[0] = hdspm->system_sample_rate; 1965 ucontrol->value.integer.value[0] = hdspm_get_system_sample_rate(hdspm);
1966 return 0;
1967}
1968
1969
1970/**
1971 * Returns the WordClock sample rate class for the given card.
1972 **/
1973static int hdspm_get_wc_sample_rate(struct hdspm *hdspm)
1974{
1975 int status;
1976
1977 switch (hdspm->io_type) {
1978 case RayDAT:
1979 case AIO:
1980 status = hdspm_read(hdspm, HDSPM_RD_STATUS_1);
1981 return (status >> 16) & 0xF;
1982 break;
1983 default:
1984 break;
1985 }
1986
1987
1988 return 0;
1989}
1990
1991
1992/**
1993 * Returns the TCO sample rate class for the given card.
1994 **/
1995static int hdspm_get_tco_sample_rate(struct hdspm *hdspm)
1996{
1997 int status;
1998
1999 if (hdspm->tco) {
2000 switch (hdspm->io_type) {
2001 case RayDAT:
2002 case AIO:
2003 status = hdspm_read(hdspm, HDSPM_RD_STATUS_1);
2004 return (status >> 20) & 0xF;
2005 break;
2006 default:
2007 break;
2008 }
2009 }
2010
2011 return 0;
2012}
2013
2014
2015/**
2016 * Returns the SYNC_IN sample rate class for the given card.
2017 **/
2018static int hdspm_get_sync_in_sample_rate(struct hdspm *hdspm)
2019{
2020 int status;
2021
2022 if (hdspm->tco) {
2023 switch (hdspm->io_type) {
2024 case RayDAT:
2025 case AIO:
2026 status = hdspm_read(hdspm, HDSPM_RD_STATUS_2);
2027 return (status >> 12) & 0xF;
2028 break;
2029 default:
2030 break;
2031 }
2032 }
2033
1353 return 0; 2034 return 0;
1354} 2035}
1355 2036
2037
2038/**
2039 * Returns the sample rate class for input source <idx> for
2040 * 'new style' cards like the AIO and RayDAT.
2041 **/
2042static int hdspm_get_s1_sample_rate(struct hdspm *hdspm, unsigned int idx)
2043{
2044 int status = hdspm_read(hdspm, HDSPM_RD_STATUS_2);
2045
2046 return (status >> (idx*4)) & 0xF;
2047}
2048
2049
2050
1356#define HDSPM_AUTOSYNC_SAMPLE_RATE(xname, xindex) \ 2051#define HDSPM_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1357{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2052{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1358 .name = xname, \ 2053 .name = xname, \
1359 .index = xindex, \ 2054 .private_value = xindex, \
1360 .access = SNDRV_CTL_ELEM_ACCESS_READ, \ 2055 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1361 .info = snd_hdspm_info_autosync_sample_rate, \ 2056 .info = snd_hdspm_info_autosync_sample_rate, \
1362 .get = snd_hdspm_get_autosync_sample_rate \ 2057 .get = snd_hdspm_get_autosync_sample_rate \
1363} 2058}
1364 2059
2060
1365static int snd_hdspm_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, 2061static int snd_hdspm_info_autosync_sample_rate(struct snd_kcontrol *kcontrol,
1366 struct snd_ctl_elem_info *uinfo) 2062 struct snd_ctl_elem_info *uinfo)
1367{ 2063{
1368 static char *texts[] = { "32000", "44100", "48000",
1369 "64000", "88200", "96000",
1370 "128000", "176400", "192000",
1371 "None"
1372 };
1373 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2064 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1374 uinfo->count = 1; 2065 uinfo->count = 1;
1375 uinfo->value.enumerated.items = 10; 2066 uinfo->value.enumerated.items = 10;
2067
1376 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 2068 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1377 uinfo->value.enumerated.item = 2069 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1378 uinfo->value.enumerated.items - 1;
1379 strcpy(uinfo->value.enumerated.name, 2070 strcpy(uinfo->value.enumerated.name,
1380 texts[uinfo->value.enumerated.item]); 2071 texts_freq[uinfo->value.enumerated.item]);
1381 return 0; 2072 return 0;
1382} 2073}
1383 2074
2075
1384static int snd_hdspm_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, 2076static int snd_hdspm_get_autosync_sample_rate(struct snd_kcontrol *kcontrol,
1385 struct snd_ctl_elem_value * 2077 struct snd_ctl_elem_value *
1386 ucontrol) 2078 ucontrol)
1387{ 2079{
1388 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 2080 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
1389 2081
1390 switch (hdspm_external_sample_rate(hdspm)) { 2082 switch (hdspm->io_type) {
1391 case 32000: 2083 case RayDAT:
1392 ucontrol->value.enumerated.item[0] = 0; 2084 switch (kcontrol->private_value) {
1393 break; 2085 case 0:
1394 case 44100: 2086 ucontrol->value.enumerated.item[0] =
1395 ucontrol->value.enumerated.item[0] = 1; 2087 hdspm_get_wc_sample_rate(hdspm);
1396 break; 2088 break;
1397 case 48000: 2089 case 7:
1398 ucontrol->value.enumerated.item[0] = 2; 2090 ucontrol->value.enumerated.item[0] =
1399 break; 2091 hdspm_get_tco_sample_rate(hdspm);
1400 case 64000: 2092 break;
1401 ucontrol->value.enumerated.item[0] = 3; 2093 case 8:
1402 break; 2094 ucontrol->value.enumerated.item[0] =
1403 case 88200: 2095 hdspm_get_sync_in_sample_rate(hdspm);
1404 ucontrol->value.enumerated.item[0] = 4; 2096 break;
1405 break; 2097 default:
1406 case 96000: 2098 ucontrol->value.enumerated.item[0] =
1407 ucontrol->value.enumerated.item[0] = 5; 2099 hdspm_get_s1_sample_rate(hdspm,
1408 break; 2100 kcontrol->private_value-1);
1409 case 128000: 2101 }
1410 ucontrol->value.enumerated.item[0] = 6; 2102
1411 break; 2103 case AIO:
1412 case 176400: 2104 switch (kcontrol->private_value) {
1413 ucontrol->value.enumerated.item[0] = 7; 2105 case 0: /* WC */
1414 break; 2106 ucontrol->value.enumerated.item[0] =
1415 case 192000: 2107 hdspm_get_wc_sample_rate(hdspm);
1416 ucontrol->value.enumerated.item[0] = 8; 2108 break;
1417 break; 2109 case 4: /* TCO */
2110 ucontrol->value.enumerated.item[0] =
2111 hdspm_get_tco_sample_rate(hdspm);
2112 break;
2113 case 5: /* SYNC_IN */
2114 ucontrol->value.enumerated.item[0] =
2115 hdspm_get_sync_in_sample_rate(hdspm);
2116 break;
2117 default:
2118 ucontrol->value.enumerated.item[0] =
2119 hdspm_get_s1_sample_rate(hdspm,
2120 ucontrol->id.index-1);
2121 }
2122
2123 case AES32:
1418 2124
2125 switch (kcontrol->private_value) {
2126 case 0: /* WC */
2127 ucontrol->value.enumerated.item[0] =
2128 hdspm_get_wc_sample_rate(hdspm);
2129 break;
2130 case 9: /* TCO */
2131 ucontrol->value.enumerated.item[0] =
2132 hdspm_get_tco_sample_rate(hdspm);
2133 break;
2134 case 10: /* SYNC_IN */
2135 ucontrol->value.enumerated.item[0] =
2136 hdspm_get_sync_in_sample_rate(hdspm);
2137 break;
2138 default: /* AES1 to AES8 */
2139 ucontrol->value.enumerated.item[0] =
2140 hdspm_get_s1_sample_rate(hdspm,
2141 kcontrol->private_value-1);
2142 break;
2143
2144 }
1419 default: 2145 default:
1420 ucontrol->value.enumerated.item[0] = 9; 2146 break;
1421 } 2147 }
2148
1422 return 0; 2149 return 0;
1423} 2150}
1424 2151
2152
1425#define HDSPM_SYSTEM_CLOCK_MODE(xname, xindex) \ 2153#define HDSPM_SYSTEM_CLOCK_MODE(xname, xindex) \
1426{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2154{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1427 .name = xname, \ 2155 .name = xname, \
1428 .index = xindex, \ 2156 .index = xindex, \
1429 .access = SNDRV_CTL_ELEM_ACCESS_READ, \ 2157 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |\
1430 .info = snd_hdspm_info_system_clock_mode, \ 2158 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1431 .get = snd_hdspm_get_system_clock_mode, \ 2159 .info = snd_hdspm_info_system_clock_mode, \
1432} 2160 .get = snd_hdspm_get_system_clock_mode, \
2161 .put = snd_hdspm_put_system_clock_mode, \
2162}
2163
2164
2165/**
2166 * Returns the system clock mode for the given card.
2167 * @returns 0 - master, 1 - slave
2168 **/
2169static int hdspm_system_clock_mode(struct hdspm *hdspm)
2170{
2171 switch (hdspm->io_type) {
2172 case AIO:
2173 case RayDAT:
2174 if (hdspm->settings_register & HDSPM_c0Master)
2175 return 0;
2176 break;
2177
2178 default:
2179 if (hdspm->control_register & HDSPM_ClockModeMaster)
2180 return 0;
2181 }
1433 2182
2183 return 1;
2184}
1434 2185
1435 2186
1436static int hdspm_system_clock_mode(struct hdspm * hdspm) 2187/**
2188 * Sets the system clock mode.
2189 * @param mode 0 - master, 1 - slave
2190 **/
2191static void hdspm_set_system_clock_mode(struct hdspm *hdspm, int mode)
1437{ 2192{
1438 /* Always reflect the hardware info, rme is never wrong !!!! */ 2193 switch (hdspm->io_type) {
2194 case AIO:
2195 case RayDAT:
2196 if (0 == mode)
2197 hdspm->settings_register |= HDSPM_c0Master;
2198 else
2199 hdspm->settings_register &= ~HDSPM_c0Master;
1439 2200
1440 if (hdspm->control_register & HDSPM_ClockModeMaster) 2201 hdspm_write(hdspm, HDSPM_WR_SETTINGS, hdspm->settings_register);
1441 return 0; 2202 break;
1442 return 1; 2203
2204 default:
2205 if (0 == mode)
2206 hdspm->control_register |= HDSPM_ClockModeMaster;
2207 else
2208 hdspm->control_register &= ~HDSPM_ClockModeMaster;
2209
2210 hdspm_write(hdspm, HDSPM_controlRegister,
2211 hdspm->control_register);
2212 }
1443} 2213}
1444 2214
2215
1445static int snd_hdspm_info_system_clock_mode(struct snd_kcontrol *kcontrol, 2216static int snd_hdspm_info_system_clock_mode(struct snd_kcontrol *kcontrol,
1446 struct snd_ctl_elem_info *uinfo) 2217 struct snd_ctl_elem_info *uinfo)
1447{ 2218{
1448 static char *texts[] = { "Master", "Slave" }; 2219 static char *texts[] = { "Master", "AutoSync" };
1449 2220
1450 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2221 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1451 uinfo->count = 1; 2222 uinfo->count = 1;
@@ -1463,96 +2234,83 @@ static int snd_hdspm_get_system_clock_mode(struct snd_kcontrol *kcontrol,
1463{ 2234{
1464 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 2235 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
1465 2236
1466 ucontrol->value.enumerated.item[0] = 2237 ucontrol->value.enumerated.item[0] = hdspm_system_clock_mode(hdspm);
1467 hdspm_system_clock_mode(hdspm);
1468 return 0; 2238 return 0;
1469} 2239}
1470 2240
1471#define HDSPM_CLOCK_SOURCE(xname, xindex) \ 2241static int snd_hdspm_put_system_clock_mode(struct snd_kcontrol *kcontrol,
1472{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2242 struct snd_ctl_elem_value *ucontrol)
1473 .name = xname, \ 2243{
1474 .index = xindex, \ 2244 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
1475 .info = snd_hdspm_info_clock_source, \ 2245 int val;
1476 .get = snd_hdspm_get_clock_source, \ 2246
1477 .put = snd_hdspm_put_clock_source \ 2247 if (!snd_hdspm_use_is_exclusive(hdspm))
2248 return -EBUSY;
2249
2250 val = ucontrol->value.enumerated.item[0];
2251 if (val < 0)
2252 val = 0;
2253 else if (val > 1)
2254 val = 1;
2255
2256 hdspm_set_system_clock_mode(hdspm, val);
2257
2258 return 0;
1478} 2259}
1479 2260
2261
2262#define HDSPM_INTERNAL_CLOCK(xname, xindex) \
2263{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2264 .name = xname, \
2265 .index = xindex, \
2266 .info = snd_hdspm_info_clock_source, \
2267 .get = snd_hdspm_get_clock_source, \
2268 .put = snd_hdspm_put_clock_source \
2269}
2270
2271
1480static int hdspm_clock_source(struct hdspm * hdspm) 2272static int hdspm_clock_source(struct hdspm * hdspm)
1481{ 2273{
1482 if (hdspm->control_register & HDSPM_ClockModeMaster) { 2274 switch (hdspm->system_sample_rate) {
1483 switch (hdspm->system_sample_rate) { 2275 case 32000: return 0;
1484 case 32000: 2276 case 44100: return 1;
1485 return 1; 2277 case 48000: return 2;
1486 case 44100: 2278 case 64000: return 3;
1487 return 2; 2279 case 88200: return 4;
1488 case 48000: 2280 case 96000: return 5;
1489 return 3; 2281 case 128000: return 6;
1490 case 64000: 2282 case 176400: return 7;
1491 return 4; 2283 case 192000: return 8;
1492 case 88200:
1493 return 5;
1494 case 96000:
1495 return 6;
1496 case 128000:
1497 return 7;
1498 case 176400:
1499 return 8;
1500 case 192000:
1501 return 9;
1502 default:
1503 return 3;
1504 }
1505 } else {
1506 return 0;
1507 } 2284 }
2285
2286 return -1;
1508} 2287}
1509 2288
1510static int hdspm_set_clock_source(struct hdspm * hdspm, int mode) 2289static int hdspm_set_clock_source(struct hdspm * hdspm, int mode)
1511{ 2290{
1512 int rate; 2291 int rate;
1513 switch (mode) { 2292 switch (mode) {
1514 2293 case 0:
1515 case HDSPM_CLOCK_SOURCE_AUTOSYNC: 2294 rate = 32000; break;
1516 if (hdspm_external_sample_rate(hdspm) != 0) { 2295 case 1:
1517 hdspm->control_register &= ~HDSPM_ClockModeMaster; 2296 rate = 44100; break;
1518 hdspm_write(hdspm, HDSPM_controlRegister, 2297 case 2:
1519 hdspm->control_register); 2298 rate = 48000; break;
1520 return 0; 2299 case 3:
1521 } 2300 rate = 64000; break;
1522 return -1; 2301 case 4:
1523 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ: 2302 rate = 88200; break;
1524 rate = 32000; 2303 case 5:
1525 break; 2304 rate = 96000; break;
1526 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ: 2305 case 6:
1527 rate = 44100; 2306 rate = 128000; break;
1528 break; 2307 case 7:
1529 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ: 2308 rate = 176400; break;
1530 rate = 48000; 2309 case 8:
1531 break; 2310 rate = 192000; break;
1532 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ:
1533 rate = 64000;
1534 break;
1535 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ:
1536 rate = 88200;
1537 break;
1538 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ:
1539 rate = 96000;
1540 break;
1541 case HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ:
1542 rate = 128000;
1543 break;
1544 case HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ:
1545 rate = 176400;
1546 break;
1547 case HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ:
1548 rate = 192000;
1549 break;
1550
1551 default: 2311 default:
1552 rate = 44100; 2312 rate = 48000;
1553 } 2313 }
1554 hdspm->control_register |= HDSPM_ClockModeMaster;
1555 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1556 hdspm_set_rate(hdspm, rate, 1); 2314 hdspm_set_rate(hdspm, rate, 1);
1557 return 0; 2315 return 0;
1558} 2316}
@@ -1560,25 +2318,16 @@ static int hdspm_set_clock_source(struct hdspm * hdspm, int mode)
1560static int snd_hdspm_info_clock_source(struct snd_kcontrol *kcontrol, 2318static int snd_hdspm_info_clock_source(struct snd_kcontrol *kcontrol,
1561 struct snd_ctl_elem_info *uinfo) 2319 struct snd_ctl_elem_info *uinfo)
1562{ 2320{
1563 static char *texts[] = { "AutoSync",
1564 "Internal 32.0 kHz", "Internal 44.1 kHz",
1565 "Internal 48.0 kHz",
1566 "Internal 64.0 kHz", "Internal 88.2 kHz",
1567 "Internal 96.0 kHz",
1568 "Internal 128.0 kHz", "Internal 176.4 kHz",
1569 "Internal 192.0 kHz"
1570 };
1571
1572 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2321 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1573 uinfo->count = 1; 2322 uinfo->count = 1;
1574 uinfo->value.enumerated.items = 10; 2323 uinfo->value.enumerated.items = 9;
1575 2324
1576 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 2325 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1577 uinfo->value.enumerated.item = 2326 uinfo->value.enumerated.item =
1578 uinfo->value.enumerated.items - 1; 2327 uinfo->value.enumerated.items - 1;
1579 2328
1580 strcpy(uinfo->value.enumerated.name, 2329 strcpy(uinfo->value.enumerated.name,
1581 texts[uinfo->value.enumerated.item]); 2330 texts_freq[uinfo->value.enumerated.item+1]);
1582 2331
1583 return 0; 2332 return 0;
1584} 2333}
@@ -1615,134 +2364,301 @@ static int snd_hdspm_put_clock_source(struct snd_kcontrol *kcontrol,
1615 return change; 2364 return change;
1616} 2365}
1617 2366
1618#define HDSPM_PREF_SYNC_REF(xname, xindex) \
1619{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1620 .name = xname, \
1621 .index = xindex, \
1622 .info = snd_hdspm_info_pref_sync_ref, \
1623 .get = snd_hdspm_get_pref_sync_ref, \
1624 .put = snd_hdspm_put_pref_sync_ref \
1625}
1626 2367
2368#define HDSPM_PREF_SYNC_REF(xname, xindex) \
2369{.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2370 .name = xname, \
2371 .index = xindex, \
2372 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |\
2373 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2374 .info = snd_hdspm_info_pref_sync_ref, \
2375 .get = snd_hdspm_get_pref_sync_ref, \
2376 .put = snd_hdspm_put_pref_sync_ref \
2377}
2378
2379
2380/**
2381 * Returns the current preferred sync reference setting.
2382 * The semantics of the return value are depending on the
2383 * card, please see the comments for clarification.
2384 **/
1627static int hdspm_pref_sync_ref(struct hdspm * hdspm) 2385static int hdspm_pref_sync_ref(struct hdspm * hdspm)
1628{ 2386{
1629 /* Notice that this looks at the requested sync source, 2387 switch (hdspm->io_type) {
1630 not the one actually in use. 2388 case AES32:
1631 */
1632 if (hdspm->is_aes32) {
1633 switch (hdspm->control_register & HDSPM_SyncRefMask) { 2389 switch (hdspm->control_register & HDSPM_SyncRefMask) {
1634 /* number gives AES index, except for 0 which 2390 case 0: return 0; /* WC */
1635 corresponds to WordClock */ 2391 case HDSPM_SyncRef0: return 1; /* AES 1 */
1636 case 0: return 0; 2392 case HDSPM_SyncRef1: return 2; /* AES 2 */
1637 case HDSPM_SyncRef0: return 1; 2393 case HDSPM_SyncRef1+HDSPM_SyncRef0: return 3; /* AES 3 */
1638 case HDSPM_SyncRef1: return 2; 2394 case HDSPM_SyncRef2: return 4; /* AES 4 */
1639 case HDSPM_SyncRef1+HDSPM_SyncRef0: return 3; 2395 case HDSPM_SyncRef2+HDSPM_SyncRef0: return 5; /* AES 5 */
1640 case HDSPM_SyncRef2: return 4; 2396 case HDSPM_SyncRef2+HDSPM_SyncRef1: return 6; /* AES 6 */
1641 case HDSPM_SyncRef2+HDSPM_SyncRef0: return 5; 2397 case HDSPM_SyncRef2+HDSPM_SyncRef1+HDSPM_SyncRef0:
1642 case HDSPM_SyncRef2+HDSPM_SyncRef1: return 6; 2398 return 7; /* AES 7 */
1643 case HDSPM_SyncRef2+HDSPM_SyncRef1+HDSPM_SyncRef0: return 7; 2399 case HDSPM_SyncRef3: return 8; /* AES 8 */
1644 case HDSPM_SyncRef3: return 8; 2400 case HDSPM_SyncRef3+HDSPM_SyncRef0: return 9; /* TCO */
1645 } 2401 }
1646 } else { 2402 break;
1647 switch (hdspm->control_register & HDSPM_SyncRefMask) { 2403
1648 case HDSPM_SyncRef_Word: 2404 case MADI:
1649 return HDSPM_SYNC_FROM_WORD; 2405 case MADIface:
1650 case HDSPM_SyncRef_MADI: 2406 if (hdspm->tco) {
1651 return HDSPM_SYNC_FROM_MADI; 2407 switch (hdspm->control_register & HDSPM_SyncRefMask) {
2408 case 0: return 0; /* WC */
2409 case HDSPM_SyncRef0: return 1; /* MADI */
2410 case HDSPM_SyncRef1: return 2; /* TCO */
2411 case HDSPM_SyncRef1+HDSPM_SyncRef0:
2412 return 3; /* SYNC_IN */
2413 }
2414 } else {
2415 switch (hdspm->control_register & HDSPM_SyncRefMask) {
2416 case 0: return 0; /* WC */
2417 case HDSPM_SyncRef0: return 1; /* MADI */
2418 case HDSPM_SyncRef1+HDSPM_SyncRef0:
2419 return 2; /* SYNC_IN */
2420 }
2421 }
2422 break;
2423
2424 case RayDAT:
2425 if (hdspm->tco) {
2426 switch ((hdspm->settings_register &
2427 HDSPM_c0_SyncRefMask) / HDSPM_c0_SyncRef0) {
2428 case 0: return 0; /* WC */
2429 case 3: return 1; /* ADAT 1 */
2430 case 4: return 2; /* ADAT 2 */
2431 case 5: return 3; /* ADAT 3 */
2432 case 6: return 4; /* ADAT 4 */
2433 case 1: return 5; /* AES */
2434 case 2: return 6; /* SPDIF */
2435 case 9: return 7; /* TCO */
2436 case 10: return 8; /* SYNC_IN */
2437 }
2438 } else {
2439 switch ((hdspm->settings_register &
2440 HDSPM_c0_SyncRefMask) / HDSPM_c0_SyncRef0) {
2441 case 0: return 0; /* WC */
2442 case 3: return 1; /* ADAT 1 */
2443 case 4: return 2; /* ADAT 2 */
2444 case 5: return 3; /* ADAT 3 */
2445 case 6: return 4; /* ADAT 4 */
2446 case 1: return 5; /* AES */
2447 case 2: return 6; /* SPDIF */
2448 case 10: return 7; /* SYNC_IN */
2449 }
1652 } 2450 }
2451
2452 break;
2453
2454 case AIO:
2455 if (hdspm->tco) {
2456 switch ((hdspm->settings_register &
2457 HDSPM_c0_SyncRefMask) / HDSPM_c0_SyncRef0) {
2458 case 0: return 0; /* WC */
2459 case 3: return 1; /* ADAT */
2460 case 1: return 2; /* AES */
2461 case 2: return 3; /* SPDIF */
2462 case 9: return 4; /* TCO */
2463 case 10: return 5; /* SYNC_IN */
2464 }
2465 } else {
2466 switch ((hdspm->settings_register &
2467 HDSPM_c0_SyncRefMask) / HDSPM_c0_SyncRef0) {
2468 case 0: return 0; /* WC */
2469 case 3: return 1; /* ADAT */
2470 case 1: return 2; /* AES */
2471 case 2: return 3; /* SPDIF */
2472 case 10: return 4; /* SYNC_IN */
2473 }
2474 }
2475
2476 break;
1653 } 2477 }
1654 2478
1655 return HDSPM_SYNC_FROM_WORD; 2479 return -1;
1656} 2480}
1657 2481
2482
2483/**
2484 * Set the preferred sync reference to <pref>. The semantics
2485 * of <pref> are depending on the card type, see the comments
2486 * for clarification.
2487 **/
1658static int hdspm_set_pref_sync_ref(struct hdspm * hdspm, int pref) 2488static int hdspm_set_pref_sync_ref(struct hdspm * hdspm, int pref)
1659{ 2489{
1660 hdspm->control_register &= ~HDSPM_SyncRefMask; 2490 int p = 0;
1661 2491
1662 if (hdspm->is_aes32) { 2492 switch (hdspm->io_type) {
1663 switch (pref) { 2493 case AES32:
1664 case 0: 2494 hdspm->control_register &= ~HDSPM_SyncRefMask;
1665 hdspm->control_register |= 0;
1666 break;
1667 case 1:
1668 hdspm->control_register |= HDSPM_SyncRef0;
1669 break;
1670 case 2:
1671 hdspm->control_register |= HDSPM_SyncRef1;
1672 break;
1673 case 3:
1674 hdspm->control_register |= HDSPM_SyncRef1+HDSPM_SyncRef0;
1675 break;
1676 case 4:
1677 hdspm->control_register |= HDSPM_SyncRef2;
1678 break;
1679 case 5:
1680 hdspm->control_register |= HDSPM_SyncRef2+HDSPM_SyncRef0;
1681 break;
1682 case 6:
1683 hdspm->control_register |= HDSPM_SyncRef2+HDSPM_SyncRef1;
1684 break;
1685 case 7:
1686 hdspm->control_register |=
1687 HDSPM_SyncRef2+HDSPM_SyncRef1+HDSPM_SyncRef0;
1688 break;
1689 case 8:
1690 hdspm->control_register |= HDSPM_SyncRef3;
1691 break;
1692 default:
1693 return -1;
1694 }
1695 } else {
1696 switch (pref) { 2495 switch (pref) {
1697 case HDSPM_SYNC_FROM_MADI: 2496 case 0: /* WC */
1698 hdspm->control_register |= HDSPM_SyncRef_MADI; 2497 break;
2498 case 1: /* AES 1 */
2499 hdspm->control_register |= HDSPM_SyncRef0;
2500 break;
2501 case 2: /* AES 2 */
2502 hdspm->control_register |= HDSPM_SyncRef1;
2503 break;
2504 case 3: /* AES 3 */
2505 hdspm->control_register |=
2506 HDSPM_SyncRef1+HDSPM_SyncRef0;
2507 break;
2508 case 4: /* AES 4 */
2509 hdspm->control_register |= HDSPM_SyncRef2;
2510 break;
2511 case 5: /* AES 5 */
2512 hdspm->control_register |=
2513 HDSPM_SyncRef2+HDSPM_SyncRef0;
1699 break; 2514 break;
1700 case HDSPM_SYNC_FROM_WORD: 2515 case 6: /* AES 6 */
1701 hdspm->control_register |= HDSPM_SyncRef_Word; 2516 hdspm->control_register |=
2517 HDSPM_SyncRef2+HDSPM_SyncRef1;
2518 break;
2519 case 7: /* AES 7 */
2520 hdspm->control_register |=
2521 HDSPM_SyncRef2+HDSPM_SyncRef1+HDSPM_SyncRef0;
2522 break;
2523 case 8: /* AES 8 */
2524 hdspm->control_register |= HDSPM_SyncRef3;
2525 break;
2526 case 9: /* TCO */
2527 hdspm->control_register |=
2528 HDSPM_SyncRef3+HDSPM_SyncRef0;
1702 break; 2529 break;
1703 default: 2530 default:
1704 return -1; 2531 return -1;
1705 } 2532 }
2533
2534 break;
2535
2536 case MADI:
2537 case MADIface:
2538 hdspm->control_register &= ~HDSPM_SyncRefMask;
2539 if (hdspm->tco) {
2540 switch (pref) {
2541 case 0: /* WC */
2542 break;
2543 case 1: /* MADI */
2544 hdspm->control_register |= HDSPM_SyncRef0;
2545 break;
2546 case 2: /* TCO */
2547 hdspm->control_register |= HDSPM_SyncRef1;
2548 break;
2549 case 3: /* SYNC_IN */
2550 hdspm->control_register |=
2551 HDSPM_SyncRef0+HDSPM_SyncRef1;
2552 break;
2553 default:
2554 return -1;
2555 }
2556 } else {
2557 switch (pref) {
2558 case 0: /* WC */
2559 break;
2560 case 1: /* MADI */
2561 hdspm->control_register |= HDSPM_SyncRef0;
2562 break;
2563 case 2: /* SYNC_IN */
2564 hdspm->control_register |=
2565 HDSPM_SyncRef0+HDSPM_SyncRef1;
2566 break;
2567 default:
2568 return -1;
2569 }
2570 }
2571
2572 break;
2573
2574 case RayDAT:
2575 if (hdspm->tco) {
2576 switch (pref) {
2577 case 0: p = 0; break; /* WC */
2578 case 1: p = 3; break; /* ADAT 1 */
2579 case 2: p = 4; break; /* ADAT 2 */
2580 case 3: p = 5; break; /* ADAT 3 */
2581 case 4: p = 6; break; /* ADAT 4 */
2582 case 5: p = 1; break; /* AES */
2583 case 6: p = 2; break; /* SPDIF */
2584 case 7: p = 9; break; /* TCO */
2585 case 8: p = 10; break; /* SYNC_IN */
2586 default: return -1;
2587 }
2588 } else {
2589 switch (pref) {
2590 case 0: p = 0; break; /* WC */
2591 case 1: p = 3; break; /* ADAT 1 */
2592 case 2: p = 4; break; /* ADAT 2 */
2593 case 3: p = 5; break; /* ADAT 3 */
2594 case 4: p = 6; break; /* ADAT 4 */
2595 case 5: p = 1; break; /* AES */
2596 case 6: p = 2; break; /* SPDIF */
2597 case 7: p = 10; break; /* SYNC_IN */
2598 default: return -1;
2599 }
2600 }
2601 break;
2602
2603 case AIO:
2604 if (hdspm->tco) {
2605 switch (pref) {
2606 case 0: p = 0; break; /* WC */
2607 case 1: p = 3; break; /* ADAT */
2608 case 2: p = 1; break; /* AES */
2609 case 3: p = 2; break; /* SPDIF */
2610 case 4: p = 9; break; /* TCO */
2611 case 5: p = 10; break; /* SYNC_IN */
2612 default: return -1;
2613 }
2614 } else {
2615 switch (pref) {
2616 case 0: p = 0; break; /* WC */
2617 case 1: p = 3; break; /* ADAT */
2618 case 2: p = 1; break; /* AES */
2619 case 3: p = 2; break; /* SPDIF */
2620 case 4: p = 10; break; /* SYNC_IN */
2621 default: return -1;
2622 }
2623 }
2624 break;
1706 } 2625 }
1707 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 2626
2627 switch (hdspm->io_type) {
2628 case RayDAT:
2629 case AIO:
2630 hdspm->settings_register &= ~HDSPM_c0_SyncRefMask;
2631 hdspm->settings_register |= HDSPM_c0_SyncRef0 * p;
2632 hdspm_write(hdspm, HDSPM_WR_SETTINGS, hdspm->settings_register);
2633 break;
2634
2635 case MADI:
2636 case MADIface:
2637 case AES32:
2638 hdspm_write(hdspm, HDSPM_controlRegister,
2639 hdspm->control_register);
2640 }
2641
1708 return 0; 2642 return 0;
1709} 2643}
1710 2644
2645
1711static int snd_hdspm_info_pref_sync_ref(struct snd_kcontrol *kcontrol, 2646static int snd_hdspm_info_pref_sync_ref(struct snd_kcontrol *kcontrol,
1712 struct snd_ctl_elem_info *uinfo) 2647 struct snd_ctl_elem_info *uinfo)
1713{ 2648{
1714 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 2649 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
1715 2650
1716 if (hdspm->is_aes32) { 2651 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1717 static char *texts[] = { "Word", "AES1", "AES2", "AES3", 2652 uinfo->count = 1;
1718 "AES4", "AES5", "AES6", "AES7", "AES8" }; 2653 uinfo->value.enumerated.items = hdspm->texts_autosync_items;
1719
1720 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1721 uinfo->count = 1;
1722
1723 uinfo->value.enumerated.items = 9;
1724
1725 if (uinfo->value.enumerated.item >=
1726 uinfo->value.enumerated.items)
1727 uinfo->value.enumerated.item =
1728 uinfo->value.enumerated.items - 1;
1729 strcpy(uinfo->value.enumerated.name,
1730 texts[uinfo->value.enumerated.item]);
1731 } else {
1732 static char *texts[] = { "Word", "MADI" };
1733 2654
1734 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2655 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1735 uinfo->count = 1; 2656 uinfo->value.enumerated.item =
2657 uinfo->value.enumerated.items - 1;
1736 2658
1737 uinfo->value.enumerated.items = 2; 2659 strcpy(uinfo->value.enumerated.name,
2660 hdspm->texts_autosync[uinfo->value.enumerated.item]);
1738 2661
1739 if (uinfo->value.enumerated.item >=
1740 uinfo->value.enumerated.items)
1741 uinfo->value.enumerated.item =
1742 uinfo->value.enumerated.items - 1;
1743 strcpy(uinfo->value.enumerated.name,
1744 texts[uinfo->value.enumerated.item]);
1745 }
1746 return 0; 2662 return 0;
1747} 2663}
1748 2664
@@ -1750,32 +2666,41 @@ static int snd_hdspm_get_pref_sync_ref(struct snd_kcontrol *kcontrol,
1750 struct snd_ctl_elem_value *ucontrol) 2666 struct snd_ctl_elem_value *ucontrol)
1751{ 2667{
1752 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 2668 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2669 int psf = hdspm_pref_sync_ref(hdspm);
1753 2670
1754 ucontrol->value.enumerated.item[0] = hdspm_pref_sync_ref(hdspm); 2671 if (psf >= 0) {
1755 return 0; 2672 ucontrol->value.enumerated.item[0] = psf;
2673 return 0;
2674 }
2675
2676 return -1;
1756} 2677}
1757 2678
1758static int snd_hdspm_put_pref_sync_ref(struct snd_kcontrol *kcontrol, 2679static int snd_hdspm_put_pref_sync_ref(struct snd_kcontrol *kcontrol,
1759 struct snd_ctl_elem_value *ucontrol) 2680 struct snd_ctl_elem_value *ucontrol)
1760{ 2681{
1761 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 2682 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
1762 int change, max; 2683 int val, change = 0;
1763 unsigned int val;
1764
1765 max = hdspm->is_aes32 ? 9 : 2;
1766 2684
1767 if (!snd_hdspm_use_is_exclusive(hdspm)) 2685 if (!snd_hdspm_use_is_exclusive(hdspm))
1768 return -EBUSY; 2686 return -EBUSY;
1769 2687
1770 val = ucontrol->value.enumerated.item[0] % max; 2688 val = ucontrol->value.enumerated.item[0];
2689
2690 if (val < 0)
2691 val = 0;
2692 else if (val >= hdspm->texts_autosync_items)
2693 val = hdspm->texts_autosync_items-1;
1771 2694
1772 spin_lock_irq(&hdspm->lock); 2695 spin_lock_irq(&hdspm->lock);
1773 change = (int) val != hdspm_pref_sync_ref(hdspm); 2696 if (val != hdspm_pref_sync_ref(hdspm))
1774 hdspm_set_pref_sync_ref(hdspm, val); 2697 change = (0 == hdspm_set_pref_sync_ref(hdspm, val)) ? 1 : 0;
2698
1775 spin_unlock_irq(&hdspm->lock); 2699 spin_unlock_irq(&hdspm->lock);
1776 return change; 2700 return change;
1777} 2701}
1778 2702
2703
1779#define HDSPM_AUTOSYNC_REF(xname, xindex) \ 2704#define HDSPM_AUTOSYNC_REF(xname, xindex) \
1780{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2705{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1781 .name = xname, \ 2706 .name = xname, \
@@ -1785,18 +2710,18 @@ static int snd_hdspm_put_pref_sync_ref(struct snd_kcontrol *kcontrol,
1785 .get = snd_hdspm_get_autosync_ref, \ 2710 .get = snd_hdspm_get_autosync_ref, \
1786} 2711}
1787 2712
1788static int hdspm_autosync_ref(struct hdspm * hdspm) 2713static int hdspm_autosync_ref(struct hdspm *hdspm)
1789{ 2714{
1790 if (hdspm->is_aes32) { 2715 if (AES32 == hdspm->io_type) {
1791 unsigned int status = hdspm_read(hdspm, HDSPM_statusRegister); 2716 unsigned int status = hdspm_read(hdspm, HDSPM_statusRegister);
1792 unsigned int syncref = (status >> HDSPM_AES32_syncref_bit) & 2717 unsigned int syncref =
1793 0xF; 2718 (status >> HDSPM_AES32_syncref_bit) & 0xF;
1794 if (syncref == 0) 2719 if (syncref == 0)
1795 return HDSPM_AES32_AUTOSYNC_FROM_WORD; 2720 return HDSPM_AES32_AUTOSYNC_FROM_WORD;
1796 if (syncref <= 8) 2721 if (syncref <= 8)
1797 return syncref; 2722 return syncref;
1798 return HDSPM_AES32_AUTOSYNC_FROM_NONE; 2723 return HDSPM_AES32_AUTOSYNC_FROM_NONE;
1799 } else { 2724 } else if (MADI == hdspm->io_type) {
1800 /* This looks at the autosync selected sync reference */ 2725 /* This looks at the autosync selected sync reference */
1801 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 2726 unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
1802 2727
@@ -1805,22 +2730,27 @@ static int hdspm_autosync_ref(struct hdspm * hdspm)
1805 return HDSPM_AUTOSYNC_FROM_WORD; 2730 return HDSPM_AUTOSYNC_FROM_WORD;
1806 case HDSPM_SelSyncRef_MADI: 2731 case HDSPM_SelSyncRef_MADI:
1807 return HDSPM_AUTOSYNC_FROM_MADI; 2732 return HDSPM_AUTOSYNC_FROM_MADI;
2733 case HDSPM_SelSyncRef_TCO:
2734 return HDSPM_AUTOSYNC_FROM_TCO;
2735 case HDSPM_SelSyncRef_SyncIn:
2736 return HDSPM_AUTOSYNC_FROM_SYNC_IN;
1808 case HDSPM_SelSyncRef_NVALID: 2737 case HDSPM_SelSyncRef_NVALID:
1809 return HDSPM_AUTOSYNC_FROM_NONE; 2738 return HDSPM_AUTOSYNC_FROM_NONE;
1810 default: 2739 default:
1811 return 0; 2740 return 0;
1812 } 2741 }
1813 2742
1814 return 0;
1815 } 2743 }
2744 return 0;
1816} 2745}
1817 2746
2747
1818static int snd_hdspm_info_autosync_ref(struct snd_kcontrol *kcontrol, 2748static int snd_hdspm_info_autosync_ref(struct snd_kcontrol *kcontrol,
1819 struct snd_ctl_elem_info *uinfo) 2749 struct snd_ctl_elem_info *uinfo)
1820{ 2750{
1821 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 2751 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
1822 2752
1823 if (hdspm->is_aes32) { 2753 if (AES32 == hdspm->io_type) {
1824 static char *texts[] = { "WordClock", "AES1", "AES2", "AES3", 2754 static char *texts[] = { "WordClock", "AES1", "AES2", "AES3",
1825 "AES4", "AES5", "AES6", "AES7", "AES8", "None"}; 2755 "AES4", "AES5", "AES6", "AES7", "AES8", "None"};
1826 2756
@@ -1833,14 +2763,15 @@ static int snd_hdspm_info_autosync_ref(struct snd_kcontrol *kcontrol,
1833 uinfo->value.enumerated.items - 1; 2763 uinfo->value.enumerated.items - 1;
1834 strcpy(uinfo->value.enumerated.name, 2764 strcpy(uinfo->value.enumerated.name,
1835 texts[uinfo->value.enumerated.item]); 2765 texts[uinfo->value.enumerated.item]);
1836 } else { 2766 } else if (MADI == hdspm->io_type) {
1837 static char *texts[] = { "WordClock", "MADI", "None" }; 2767 static char *texts[] = {"Word Clock", "MADI", "TCO",
2768 "Sync In", "None" };
1838 2769
1839 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2770 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1840 uinfo->count = 1; 2771 uinfo->count = 1;
1841 uinfo->value.enumerated.items = 3; 2772 uinfo->value.enumerated.items = 5;
1842 if (uinfo->value.enumerated.item >= 2773 if (uinfo->value.enumerated.item >=
1843 uinfo->value.enumerated.items) 2774 uinfo->value.enumerated.items)
1844 uinfo->value.enumerated.item = 2775 uinfo->value.enumerated.item =
1845 uinfo->value.enumerated.items - 1; 2776 uinfo->value.enumerated.items - 1;
1846 strcpy(uinfo->value.enumerated.name, 2777 strcpy(uinfo->value.enumerated.name,
@@ -1858,6 +2789,7 @@ static int snd_hdspm_get_autosync_ref(struct snd_kcontrol *kcontrol,
1858 return 0; 2789 return 0;
1859} 2790}
1860 2791
2792
1861#define HDSPM_LINE_OUT(xname, xindex) \ 2793#define HDSPM_LINE_OUT(xname, xindex) \
1862{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2794{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1863 .name = xname, \ 2795 .name = xname, \
@@ -1914,6 +2846,7 @@ static int snd_hdspm_put_line_out(struct snd_kcontrol *kcontrol,
1914 return change; 2846 return change;
1915} 2847}
1916 2848
2849
1917#define HDSPM_TX_64(xname, xindex) \ 2850#define HDSPM_TX_64(xname, xindex) \
1918{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2851{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1919 .name = xname, \ 2852 .name = xname, \
@@ -1969,6 +2902,7 @@ static int snd_hdspm_put_tx_64(struct snd_kcontrol *kcontrol,
1969 return change; 2902 return change;
1970} 2903}
1971 2904
2905
1972#define HDSPM_C_TMS(xname, xindex) \ 2906#define HDSPM_C_TMS(xname, xindex) \
1973{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2907{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1974 .name = xname, \ 2908 .name = xname, \
@@ -2024,6 +2958,7 @@ static int snd_hdspm_put_c_tms(struct snd_kcontrol *kcontrol,
2024 return change; 2958 return change;
2025} 2959}
2026 2960
2961
2027#define HDSPM_SAFE_MODE(xname, xindex) \ 2962#define HDSPM_SAFE_MODE(xname, xindex) \
2028{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 2963{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2029 .name = xname, \ 2964 .name = xname, \
@@ -2079,6 +3014,7 @@ static int snd_hdspm_put_safe_mode(struct snd_kcontrol *kcontrol,
2079 return change; 3014 return change;
2080} 3015}
2081 3016
3017
2082#define HDSPM_EMPHASIS(xname, xindex) \ 3018#define HDSPM_EMPHASIS(xname, xindex) \
2083{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 3019{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2084 .name = xname, \ 3020 .name = xname, \
@@ -2134,6 +3070,7 @@ static int snd_hdspm_put_emphasis(struct snd_kcontrol *kcontrol,
2134 return change; 3070 return change;
2135} 3071}
2136 3072
3073
2137#define HDSPM_DOLBY(xname, xindex) \ 3074#define HDSPM_DOLBY(xname, xindex) \
2138{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 3075{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2139 .name = xname, \ 3076 .name = xname, \
@@ -2189,6 +3126,7 @@ static int snd_hdspm_put_dolby(struct snd_kcontrol *kcontrol,
2189 return change; 3126 return change;
2190} 3127}
2191 3128
3129
2192#define HDSPM_PROFESSIONAL(xname, xindex) \ 3130#define HDSPM_PROFESSIONAL(xname, xindex) \
2193{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 3131{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2194 .name = xname, \ 3132 .name = xname, \
@@ -2315,6 +3253,7 @@ static int snd_hdspm_put_input_select(struct snd_kcontrol *kcontrol,
2315 return change; 3253 return change;
2316} 3254}
2317 3255
3256
2318#define HDSPM_DS_WIRE(xname, xindex) \ 3257#define HDSPM_DS_WIRE(xname, xindex) \
2319{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 3258{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2320 .name = xname, \ 3259 .name = xname, \
@@ -2386,6 +3325,7 @@ static int snd_hdspm_put_ds_wire(struct snd_kcontrol *kcontrol,
2386 return change; 3325 return change;
2387} 3326}
2388 3327
3328
2389#define HDSPM_QS_WIRE(xname, xindex) \ 3329#define HDSPM_QS_WIRE(xname, xindex) \
2390{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 3330{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2391 .name = xname, \ 3331 .name = xname, \
@@ -2472,15 +3412,6 @@ static int snd_hdspm_put_qs_wire(struct snd_kcontrol *kcontrol,
2472 return change; 3412 return change;
2473} 3413}
2474 3414
2475/* Simple Mixer
2476 deprecated since to much faders ???
2477 MIXER interface says output (source, destination, value)
2478 where source > MAX_channels are playback channels
2479 on MADICARD
2480 - playback mixer matrix: [channelout+64] [output] [value]
2481 - input(thru) mixer matrix: [channelin] [output] [value]
2482 (better do 2 kontrols for separation ?)
2483*/
2484 3415
2485#define HDSPM_MIXER(xname, xindex) \ 3416#define HDSPM_MIXER(xname, xindex) \
2486{ .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \ 3417{ .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
@@ -2586,7 +3517,7 @@ static int snd_hdspm_put_mixer(struct snd_kcontrol *kcontrol,
2586 3517
2587/* The simple mixer control(s) provide gain control for the 3518/* The simple mixer control(s) provide gain control for the
2588 basic 1:1 mappings of playback streams to output 3519 basic 1:1 mappings of playback streams to output
2589 streams. 3520 streams.
2590*/ 3521*/
2591 3522
2592#define HDSPM_PLAYBACK_MIXER \ 3523#define HDSPM_PLAYBACK_MIXER \
@@ -2604,7 +3535,7 @@ static int snd_hdspm_info_playback_mixer(struct snd_kcontrol *kcontrol,
2604 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 3535 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2605 uinfo->count = 1; 3536 uinfo->count = 1;
2606 uinfo->value.integer.min = 0; 3537 uinfo->value.integer.min = 0;
2607 uinfo->value.integer.max = 65536; 3538 uinfo->value.integer.max = 64;
2608 uinfo->value.integer.step = 1; 3539 uinfo->value.integer.step = 1;
2609 return 0; 3540 return 0;
2610} 3541}
@@ -2614,28 +3545,17 @@ static int snd_hdspm_get_playback_mixer(struct snd_kcontrol *kcontrol,
2614{ 3545{
2615 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 3546 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2616 int channel; 3547 int channel;
2617 int mapped_channel;
2618 3548
2619 channel = ucontrol->id.index - 1; 3549 channel = ucontrol->id.index - 1;
2620 3550
2621 if (snd_BUG_ON(channel < 0 || channel >= HDSPM_MAX_CHANNELS)) 3551 if (snd_BUG_ON(channel < 0 || channel >= HDSPM_MAX_CHANNELS))
2622 return -EINVAL; 3552 return -EINVAL;
2623 3553
2624 mapped_channel = hdspm->channel_map[channel];
2625 if (mapped_channel < 0)
2626 return -EINVAL;
2627
2628 spin_lock_irq(&hdspm->lock); 3554 spin_lock_irq(&hdspm->lock);
2629 ucontrol->value.integer.value[0] = 3555 ucontrol->value.integer.value[0] =
2630 hdspm_read_pb_gain(hdspm, mapped_channel, mapped_channel); 3556 (hdspm_read_pb_gain(hdspm, channel, channel)*64)/UNITY_GAIN;
2631 spin_unlock_irq(&hdspm->lock); 3557 spin_unlock_irq(&hdspm->lock);
2632 3558
2633 /*
2634 snd_printdd("get pb mixer index %d, channel %d, mapped_channel %d, "
2635 "value %d\n",
2636 ucontrol->id.index, channel, mapped_channel,
2637 ucontrol->value.integer.value[0]);
2638 */
2639 return 0; 3559 return 0;
2640} 3560}
2641 3561
@@ -2645,7 +3565,6 @@ static int snd_hdspm_put_playback_mixer(struct snd_kcontrol *kcontrol,
2645 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 3565 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2646 int change; 3566 int change;
2647 int channel; 3567 int channel;
2648 int mapped_channel;
2649 int gain; 3568 int gain;
2650 3569
2651 if (!snd_hdspm_use_is_exclusive(hdspm)) 3570 if (!snd_hdspm_use_is_exclusive(hdspm))
@@ -2656,59 +3575,60 @@ static int snd_hdspm_put_playback_mixer(struct snd_kcontrol *kcontrol,
2656 if (snd_BUG_ON(channel < 0 || channel >= HDSPM_MAX_CHANNELS)) 3575 if (snd_BUG_ON(channel < 0 || channel >= HDSPM_MAX_CHANNELS))
2657 return -EINVAL; 3576 return -EINVAL;
2658 3577
2659 mapped_channel = hdspm->channel_map[channel]; 3578 gain = ucontrol->value.integer.value[0]*UNITY_GAIN/64;
2660 if (mapped_channel < 0)
2661 return -EINVAL;
2662
2663 gain = ucontrol->value.integer.value[0];
2664 3579
2665 spin_lock_irq(&hdspm->lock); 3580 spin_lock_irq(&hdspm->lock);
2666 change = 3581 change =
2667 gain != hdspm_read_pb_gain(hdspm, mapped_channel, 3582 gain != hdspm_read_pb_gain(hdspm, channel,
2668 mapped_channel); 3583 channel);
2669 if (change) 3584 if (change)
2670 hdspm_write_pb_gain(hdspm, mapped_channel, mapped_channel, 3585 hdspm_write_pb_gain(hdspm, channel, channel,
2671 gain); 3586 gain);
2672 spin_unlock_irq(&hdspm->lock); 3587 spin_unlock_irq(&hdspm->lock);
2673 return change; 3588 return change;
2674} 3589}
2675 3590
2676#define HDSPM_WC_SYNC_CHECK(xname, xindex) \ 3591#define HDSPM_SYNC_CHECK(xname, xindex) \
2677{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 3592{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2678 .name = xname, \ 3593 .name = xname, \
2679 .index = xindex, \ 3594 .private_value = xindex, \
2680 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 3595 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2681 .info = snd_hdspm_info_sync_check, \ 3596 .info = snd_hdspm_info_sync_check, \
2682 .get = snd_hdspm_get_wc_sync_check \ 3597 .get = snd_hdspm_get_sync_check \
2683} 3598}
2684 3599
3600
2685static int snd_hdspm_info_sync_check(struct snd_kcontrol *kcontrol, 3601static int snd_hdspm_info_sync_check(struct snd_kcontrol *kcontrol,
2686 struct snd_ctl_elem_info *uinfo) 3602 struct snd_ctl_elem_info *uinfo)
2687{ 3603{
2688 static char *texts[] = { "No Lock", "Lock", "Sync" }; 3604 static char *texts[] = { "No Lock", "Lock", "Sync", "N/A" };
2689 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 3605 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2690 uinfo->count = 1; 3606 uinfo->count = 1;
2691 uinfo->value.enumerated.items = 3; 3607 uinfo->value.enumerated.items = 4;
2692 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 3608 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2693 uinfo->value.enumerated.item = 3609 uinfo->value.enumerated.item =
2694 uinfo->value.enumerated.items - 1; 3610 uinfo->value.enumerated.items - 1;
2695 strcpy(uinfo->value.enumerated.name, 3611 strcpy(uinfo->value.enumerated.name,
2696 texts[uinfo->value.enumerated.item]); 3612 texts[uinfo->value.enumerated.item]);
2697 return 0; 3613 return 0;
2698} 3614}
2699 3615
2700static int hdspm_wc_sync_check(struct hdspm * hdspm) 3616static int hdspm_wc_sync_check(struct hdspm *hdspm)
2701{ 3617{
2702 if (hdspm->is_aes32) { 3618 int status, status2;
2703 int status = hdspm_read(hdspm, HDSPM_statusRegister); 3619
2704 if (status & HDSPM_AES32_wcLock) { 3620 switch (hdspm->io_type) {
2705 /* I don't know how to differenciate sync from lock. 3621 case AES32:
2706 Doing as if sync for now */ 3622 status = hdspm_read(hdspm, HDSPM_statusRegister);
3623 if (status & HDSPM_wcSync)
2707 return 2; 3624 return 2;
2708 } 3625 else if (status & HDSPM_wcLock)
3626 return 1;
2709 return 0; 3627 return 0;
2710 } else { 3628 break;
2711 int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 3629
3630 case MADI:
3631 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
2712 if (status2 & HDSPM_wcLock) { 3632 if (status2 & HDSPM_wcLock) {
2713 if (status2 & HDSPM_wcSync) 3633 if (status2 & HDSPM_wcSync)
2714 return 2; 3634 return 2;
@@ -2716,29 +3636,30 @@ static int hdspm_wc_sync_check(struct hdspm * hdspm)
2716 return 1; 3636 return 1;
2717 } 3637 }
2718 return 0; 3638 return 0;
2719 } 3639 break;
2720}
2721 3640
2722static int snd_hdspm_get_wc_sync_check(struct snd_kcontrol *kcontrol, 3641 case RayDAT:
2723 struct snd_ctl_elem_value *ucontrol) 3642 case AIO:
2724{ 3643 status = hdspm_read(hdspm, HDSPM_statusRegister);
2725 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2726 3644
2727 ucontrol->value.enumerated.item[0] = hdspm_wc_sync_check(hdspm); 3645 if (status & 0x2000000)
2728 return 0; 3646 return 2;
2729} 3647 else if (status & 0x1000000)
3648 return 1;
3649 return 0;
2730 3650
3651 break;
2731 3652
2732#define HDSPM_MADI_SYNC_CHECK(xname, xindex) \ 3653 case MADIface:
2733{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 3654 break;
2734 .name = xname, \ 3655 }
2735 .index = xindex, \ 3656
2736 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 3657
2737 .info = snd_hdspm_info_sync_check, \ 3658 return 3;
2738 .get = snd_hdspm_get_madisync_sync_check \
2739} 3659}
2740 3660
2741static int hdspm_madisync_sync_check(struct hdspm * hdspm) 3661
3662static int hdspm_madi_sync_check(struct hdspm *hdspm)
2742{ 3663{
2743 int status = hdspm_read(hdspm, HDSPM_statusRegister); 3664 int status = hdspm_read(hdspm, HDSPM_statusRegister);
2744 if (status & HDSPM_madiLock) { 3665 if (status & HDSPM_madiLock) {
@@ -2750,89 +3671,726 @@ static int hdspm_madisync_sync_check(struct hdspm * hdspm)
2750 return 0; 3671 return 0;
2751} 3672}
2752 3673
2753static int snd_hdspm_get_madisync_sync_check(struct snd_kcontrol *kcontrol, 3674
2754 struct snd_ctl_elem_value * 3675static int hdspm_s1_sync_check(struct hdspm *hdspm, int idx)
2755 ucontrol)
2756{ 3676{
2757 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 3677 int status, lock, sync;
3678
3679 status = hdspm_read(hdspm, HDSPM_RD_STATUS_1);
3680
3681 lock = (status & (0x1<<idx)) ? 1 : 0;
3682 sync = (status & (0x100<<idx)) ? 1 : 0;
2758 3683
2759 ucontrol->value.enumerated.item[0] = 3684 if (lock && sync)
2760 hdspm_madisync_sync_check(hdspm); 3685 return 2;
3686 else if (lock)
3687 return 1;
2761 return 0; 3688 return 0;
2762} 3689}
2763 3690
2764 3691
2765#define HDSPM_AES_SYNC_CHECK(xname, xindex) \ 3692static int hdspm_sync_in_sync_check(struct hdspm *hdspm)
2766{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 3693{
2767 .name = xname, \ 3694 int status, lock = 0, sync = 0;
2768 .index = xindex, \ 3695
2769 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 3696 switch (hdspm->io_type) {
2770 .info = snd_hdspm_info_sync_check, \ 3697 case RayDAT:
2771 .get = snd_hdspm_get_aes_sync_check \ 3698 case AIO:
3699 status = hdspm_read(hdspm, HDSPM_RD_STATUS_3);
3700 lock = (status & 0x400) ? 1 : 0;
3701 sync = (status & 0x800) ? 1 : 0;
3702 break;
3703
3704 case MADI:
3705 case AES32:
3706 status = hdspm_read(hdspm, HDSPM_statusRegister2);
3707 lock = (status & HDSPM_syncInLock) ? 1 : 0;
3708 sync = (status & HDSPM_syncInSync) ? 1 : 0;
3709 break;
3710
3711 case MADIface:
3712 break;
3713 }
3714
3715 if (lock && sync)
3716 return 2;
3717 else if (lock)
3718 return 1;
3719
3720 return 0;
2772} 3721}
2773 3722
2774static int hdspm_aes_sync_check(struct hdspm * hdspm, int idx) 3723static int hdspm_aes_sync_check(struct hdspm *hdspm, int idx)
2775{ 3724{
2776 int status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 3725 int status2, lock, sync;
2777 if (status2 & (HDSPM_LockAES >> idx)) { 3726 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
2778 /* I don't know how to differenciate sync from lock. 3727
2779 Doing as if sync for now */ 3728 lock = (status2 & (0x0080 >> idx)) ? 1 : 0;
3729 sync = (status2 & (0x8000 >> idx)) ? 1 : 0;
3730
3731 if (sync)
2780 return 2; 3732 return 2;
3733 else if (lock)
3734 return 1;
3735 return 0;
3736}
3737
3738
3739static int hdspm_tco_sync_check(struct hdspm *hdspm)
3740{
3741 int status;
3742
3743 if (hdspm->tco) {
3744 switch (hdspm->io_type) {
3745 case MADI:
3746 case AES32:
3747 status = hdspm_read(hdspm, HDSPM_statusRegister);
3748 if (status & HDSPM_tcoLock) {
3749 if (status & HDSPM_tcoSync)
3750 return 2;
3751 else
3752 return 1;
3753 }
3754 return 0;
3755
3756 break;
3757
3758 case RayDAT:
3759 case AIO:
3760 status = hdspm_read(hdspm, HDSPM_RD_STATUS_1);
3761
3762 if (status & 0x8000000)
3763 return 2; /* Sync */
3764 if (status & 0x4000000)
3765 return 1; /* Lock */
3766 return 0; /* No signal */
3767 break;
3768
3769 default:
3770 break;
3771 }
3772 }
3773
3774 return 3; /* N/A */
3775}
3776
3777
3778static int snd_hdspm_get_sync_check(struct snd_kcontrol *kcontrol,
3779 struct snd_ctl_elem_value *ucontrol)
3780{
3781 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3782 int val = -1;
3783
3784 switch (hdspm->io_type) {
3785 case RayDAT:
3786 switch (kcontrol->private_value) {
3787 case 0: /* WC */
3788 val = hdspm_wc_sync_check(hdspm); break;
3789 case 7: /* TCO */
3790 val = hdspm_tco_sync_check(hdspm); break;
3791 case 8: /* SYNC IN */
3792 val = hdspm_sync_in_sync_check(hdspm); break;
3793 default:
3794 val = hdspm_s1_sync_check(hdspm, ucontrol->id.index-1);
3795 }
3796
3797 case AIO:
3798 switch (kcontrol->private_value) {
3799 case 0: /* WC */
3800 val = hdspm_wc_sync_check(hdspm); break;
3801 case 4: /* TCO */
3802 val = hdspm_tco_sync_check(hdspm); break;
3803 case 5: /* SYNC IN */
3804 val = hdspm_sync_in_sync_check(hdspm); break;
3805 default:
3806 val = hdspm_s1_sync_check(hdspm, ucontrol->id.index-1);
3807 }
3808
3809 case MADI:
3810 switch (kcontrol->private_value) {
3811 case 0: /* WC */
3812 val = hdspm_wc_sync_check(hdspm); break;
3813 case 1: /* MADI */
3814 val = hdspm_madi_sync_check(hdspm); break;
3815 case 2: /* TCO */
3816 val = hdspm_tco_sync_check(hdspm); break;
3817 case 3: /* SYNC_IN */
3818 val = hdspm_sync_in_sync_check(hdspm); break;
3819 }
3820
3821 case MADIface:
3822 val = hdspm_madi_sync_check(hdspm); /* MADI */
3823 break;
3824
3825 case AES32:
3826 switch (kcontrol->private_value) {
3827 case 0: /* WC */
3828 val = hdspm_wc_sync_check(hdspm); break;
3829 case 9: /* TCO */
3830 val = hdspm_tco_sync_check(hdspm); break;
3831 case 10 /* SYNC IN */:
3832 val = hdspm_sync_in_sync_check(hdspm); break;
3833 default: /* AES1 to AES8 */
3834 val = hdspm_aes_sync_check(hdspm,
3835 kcontrol->private_value-1);
3836 }
3837
2781 } 3838 }
3839
3840 if (-1 == val)
3841 val = 3;
3842
3843 ucontrol->value.enumerated.item[0] = val;
2782 return 0; 3844 return 0;
2783} 3845}
2784 3846
2785static int snd_hdspm_get_aes_sync_check(struct snd_kcontrol *kcontrol, 3847
3848
3849/**
3850 * TCO controls
3851 **/
3852static void hdspm_tco_write(struct hdspm *hdspm)
3853{
3854 unsigned int tc[4] = { 0, 0, 0, 0};
3855
3856 switch (hdspm->tco->input) {
3857 case 0:
3858 tc[2] |= HDSPM_TCO2_set_input_MSB;
3859 break;
3860 case 1:
3861 tc[2] |= HDSPM_TCO2_set_input_LSB;
3862 break;
3863 default:
3864 break;
3865 }
3866
3867 switch (hdspm->tco->framerate) {
3868 case 1:
3869 tc[1] |= HDSPM_TCO1_LTC_Format_LSB;
3870 break;
3871 case 2:
3872 tc[1] |= HDSPM_TCO1_LTC_Format_MSB;
3873 break;
3874 case 3:
3875 tc[1] |= HDSPM_TCO1_LTC_Format_MSB +
3876 HDSPM_TCO1_set_drop_frame_flag;
3877 break;
3878 case 4:
3879 tc[1] |= HDSPM_TCO1_LTC_Format_LSB +
3880 HDSPM_TCO1_LTC_Format_MSB;
3881 break;
3882 case 5:
3883 tc[1] |= HDSPM_TCO1_LTC_Format_LSB +
3884 HDSPM_TCO1_LTC_Format_MSB +
3885 HDSPM_TCO1_set_drop_frame_flag;
3886 break;
3887 default:
3888 break;
3889 }
3890
3891 switch (hdspm->tco->wordclock) {
3892 case 1:
3893 tc[2] |= HDSPM_TCO2_WCK_IO_ratio_LSB;
3894 break;
3895 case 2:
3896 tc[2] |= HDSPM_TCO2_WCK_IO_ratio_MSB;
3897 break;
3898 default:
3899 break;
3900 }
3901
3902 switch (hdspm->tco->samplerate) {
3903 case 1:
3904 tc[2] |= HDSPM_TCO2_set_freq;
3905 break;
3906 case 2:
3907 tc[2] |= HDSPM_TCO2_set_freq_from_app;
3908 break;
3909 default:
3910 break;
3911 }
3912
3913 switch (hdspm->tco->pull) {
3914 case 1:
3915 tc[2] |= HDSPM_TCO2_set_pull_up;
3916 break;
3917 case 2:
3918 tc[2] |= HDSPM_TCO2_set_pull_down;
3919 break;
3920 case 3:
3921 tc[2] |= HDSPM_TCO2_set_pull_up + HDSPM_TCO2_set_01_4;
3922 break;
3923 case 4:
3924 tc[2] |= HDSPM_TCO2_set_pull_down + HDSPM_TCO2_set_01_4;
3925 break;
3926 default:
3927 break;
3928 }
3929
3930 if (1 == hdspm->tco->term) {
3931 tc[2] |= HDSPM_TCO2_set_term_75R;
3932 }
3933
3934 hdspm_write(hdspm, HDSPM_WR_TCO, tc[0]);
3935 hdspm_write(hdspm, HDSPM_WR_TCO+4, tc[1]);
3936 hdspm_write(hdspm, HDSPM_WR_TCO+8, tc[2]);
3937 hdspm_write(hdspm, HDSPM_WR_TCO+12, tc[3]);
3938}
3939
3940
3941#define HDSPM_TCO_SAMPLE_RATE(xname, xindex) \
3942{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3943 .name = xname, \
3944 .index = xindex, \
3945 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |\
3946 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3947 .info = snd_hdspm_info_tco_sample_rate, \
3948 .get = snd_hdspm_get_tco_sample_rate, \
3949 .put = snd_hdspm_put_tco_sample_rate \
3950}
3951
3952static int snd_hdspm_info_tco_sample_rate(struct snd_kcontrol *kcontrol,
3953 struct snd_ctl_elem_info *uinfo)
3954{
3955 static char *texts[] = { "44.1 kHz", "48 kHz" };
3956 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3957 uinfo->count = 1;
3958 uinfo->value.enumerated.items = 2;
3959
3960 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3961 uinfo->value.enumerated.item =
3962 uinfo->value.enumerated.items - 1;
3963
3964 strcpy(uinfo->value.enumerated.name,
3965 texts[uinfo->value.enumerated.item]);
3966
3967 return 0;
3968}
3969
3970static int snd_hdspm_get_tco_sample_rate(struct snd_kcontrol *kcontrol,
3971 struct snd_ctl_elem_value *ucontrol)
3972{
3973 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3974
3975 ucontrol->value.enumerated.item[0] = hdspm->tco->samplerate;
3976
3977 return 0;
3978}
3979
3980static int snd_hdspm_put_tco_sample_rate(struct snd_kcontrol *kcontrol,
3981 struct snd_ctl_elem_value *ucontrol)
3982{
3983 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
3984
3985 if (hdspm->tco->samplerate != ucontrol->value.enumerated.item[0]) {
3986 hdspm->tco->samplerate = ucontrol->value.enumerated.item[0];
3987
3988 hdspm_tco_write(hdspm);
3989
3990 return 1;
3991 }
3992
3993 return 0;
3994}
3995
3996
3997#define HDSPM_TCO_PULL(xname, xindex) \
3998{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3999 .name = xname, \
4000 .index = xindex, \
4001 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |\
4002 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
4003 .info = snd_hdspm_info_tco_pull, \
4004 .get = snd_hdspm_get_tco_pull, \
4005 .put = snd_hdspm_put_tco_pull \
4006}
4007
4008static int snd_hdspm_info_tco_pull(struct snd_kcontrol *kcontrol,
4009 struct snd_ctl_elem_info *uinfo)
4010{
4011 static char *texts[] = { "0", "+ 0.1 %", "- 0.1 %", "+ 4 %", "- 4 %" };
4012 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
4013 uinfo->count = 1;
4014 uinfo->value.enumerated.items = 5;
4015
4016 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
4017 uinfo->value.enumerated.item =
4018 uinfo->value.enumerated.items - 1;
4019
4020 strcpy(uinfo->value.enumerated.name,
4021 texts[uinfo->value.enumerated.item]);
4022
4023 return 0;
4024}
4025
4026static int snd_hdspm_get_tco_pull(struct snd_kcontrol *kcontrol,
4027 struct snd_ctl_elem_value *ucontrol)
4028{
4029 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4030
4031 ucontrol->value.enumerated.item[0] = hdspm->tco->pull;
4032
4033 return 0;
4034}
4035
4036static int snd_hdspm_put_tco_pull(struct snd_kcontrol *kcontrol,
4037 struct snd_ctl_elem_value *ucontrol)
4038{
4039 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4040
4041 if (hdspm->tco->pull != ucontrol->value.enumerated.item[0]) {
4042 hdspm->tco->pull = ucontrol->value.enumerated.item[0];
4043
4044 hdspm_tco_write(hdspm);
4045
4046 return 1;
4047 }
4048
4049 return 0;
4050}
4051
4052#define HDSPM_TCO_WCK_CONVERSION(xname, xindex) \
4053{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
4054 .name = xname, \
4055 .index = xindex, \
4056 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |\
4057 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
4058 .info = snd_hdspm_info_tco_wck_conversion, \
4059 .get = snd_hdspm_get_tco_wck_conversion, \
4060 .put = snd_hdspm_put_tco_wck_conversion \
4061}
4062
4063static int snd_hdspm_info_tco_wck_conversion(struct snd_kcontrol *kcontrol,
4064 struct snd_ctl_elem_info *uinfo)
4065{
4066 static char *texts[] = { "1:1", "44.1 -> 48", "48 -> 44.1" };
4067 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
4068 uinfo->count = 1;
4069 uinfo->value.enumerated.items = 3;
4070
4071 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
4072 uinfo->value.enumerated.item =
4073 uinfo->value.enumerated.items - 1;
4074
4075 strcpy(uinfo->value.enumerated.name,
4076 texts[uinfo->value.enumerated.item]);
4077
4078 return 0;
4079}
4080
4081static int snd_hdspm_get_tco_wck_conversion(struct snd_kcontrol *kcontrol,
4082 struct snd_ctl_elem_value *ucontrol)
4083{
4084 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4085
4086 ucontrol->value.enumerated.item[0] = hdspm->tco->wordclock;
4087
4088 return 0;
4089}
4090
4091static int snd_hdspm_put_tco_wck_conversion(struct snd_kcontrol *kcontrol,
4092 struct snd_ctl_elem_value *ucontrol)
4093{
4094 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4095
4096 if (hdspm->tco->wordclock != ucontrol->value.enumerated.item[0]) {
4097 hdspm->tco->wordclock = ucontrol->value.enumerated.item[0];
4098
4099 hdspm_tco_write(hdspm);
4100
4101 return 1;
4102 }
4103
4104 return 0;
4105}
4106
4107
4108#define HDSPM_TCO_FRAME_RATE(xname, xindex) \
4109{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
4110 .name = xname, \
4111 .index = xindex, \
4112 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |\
4113 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
4114 .info = snd_hdspm_info_tco_frame_rate, \
4115 .get = snd_hdspm_get_tco_frame_rate, \
4116 .put = snd_hdspm_put_tco_frame_rate \
4117}
4118
4119static int snd_hdspm_info_tco_frame_rate(struct snd_kcontrol *kcontrol,
4120 struct snd_ctl_elem_info *uinfo)
4121{
4122 static char *texts[] = { "24 fps", "25 fps", "29.97fps",
4123 "29.97 dfps", "30 fps", "30 dfps" };
4124 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
4125 uinfo->count = 1;
4126 uinfo->value.enumerated.items = 6;
4127
4128 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
4129 uinfo->value.enumerated.item =
4130 uinfo->value.enumerated.items - 1;
4131
4132 strcpy(uinfo->value.enumerated.name,
4133 texts[uinfo->value.enumerated.item]);
4134
4135 return 0;
4136}
4137
4138static int snd_hdspm_get_tco_frame_rate(struct snd_kcontrol *kcontrol,
2786 struct snd_ctl_elem_value *ucontrol) 4139 struct snd_ctl_elem_value *ucontrol)
2787{ 4140{
2788 int offset;
2789 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol); 4141 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
2790 4142
2791 offset = ucontrol->id.index - 1; 4143 ucontrol->value.enumerated.item[0] = hdspm->tco->framerate;
2792 if (offset < 0 || offset >= 8)
2793 return -EINVAL;
2794 4144
2795 ucontrol->value.enumerated.item[0] =
2796 hdspm_aes_sync_check(hdspm, offset);
2797 return 0; 4145 return 0;
2798} 4146}
2799 4147
4148static int snd_hdspm_put_tco_frame_rate(struct snd_kcontrol *kcontrol,
4149 struct snd_ctl_elem_value *ucontrol)
4150{
4151 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4152
4153 if (hdspm->tco->framerate != ucontrol->value.enumerated.item[0]) {
4154 hdspm->tco->framerate = ucontrol->value.enumerated.item[0];
2800 4155
2801static struct snd_kcontrol_new snd_hdspm_controls_madi[] = { 4156 hdspm_tco_write(hdspm);
4157
4158 return 1;
4159 }
4160
4161 return 0;
4162}
2802 4163
2803 HDSPM_MIXER("Mixer", 0),
2804/* 'Sample Clock Source' complies with the alsa control naming scheme */
2805 HDSPM_CLOCK_SOURCE("Sample Clock Source", 0),
2806 4164
4165#define HDSPM_TCO_SYNC_SOURCE(xname, xindex) \
4166{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
4167 .name = xname, \
4168 .index = xindex, \
4169 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |\
4170 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
4171 .info = snd_hdspm_info_tco_sync_source, \
4172 .get = snd_hdspm_get_tco_sync_source, \
4173 .put = snd_hdspm_put_tco_sync_source \
4174}
4175
4176static int snd_hdspm_info_tco_sync_source(struct snd_kcontrol *kcontrol,
4177 struct snd_ctl_elem_info *uinfo)
4178{
4179 static char *texts[] = { "LTC", "Video", "WCK" };
4180 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
4181 uinfo->count = 1;
4182 uinfo->value.enumerated.items = 3;
4183
4184 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
4185 uinfo->value.enumerated.item =
4186 uinfo->value.enumerated.items - 1;
4187
4188 strcpy(uinfo->value.enumerated.name,
4189 texts[uinfo->value.enumerated.item]);
4190
4191 return 0;
4192}
4193
4194static int snd_hdspm_get_tco_sync_source(struct snd_kcontrol *kcontrol,
4195 struct snd_ctl_elem_value *ucontrol)
4196{
4197 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4198
4199 ucontrol->value.enumerated.item[0] = hdspm->tco->input;
4200
4201 return 0;
4202}
4203
4204static int snd_hdspm_put_tco_sync_source(struct snd_kcontrol *kcontrol,
4205 struct snd_ctl_elem_value *ucontrol)
4206{
4207 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4208
4209 if (hdspm->tco->input != ucontrol->value.enumerated.item[0]) {
4210 hdspm->tco->input = ucontrol->value.enumerated.item[0];
4211
4212 hdspm_tco_write(hdspm);
4213
4214 return 1;
4215 }
4216
4217 return 0;
4218}
4219
4220
4221#define HDSPM_TCO_WORD_TERM(xname, xindex) \
4222{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
4223 .name = xname, \
4224 .index = xindex, \
4225 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |\
4226 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
4227 .info = snd_hdspm_info_tco_word_term, \
4228 .get = snd_hdspm_get_tco_word_term, \
4229 .put = snd_hdspm_put_tco_word_term \
4230}
4231
4232static int snd_hdspm_info_tco_word_term(struct snd_kcontrol *kcontrol,
4233 struct snd_ctl_elem_info *uinfo)
4234{
4235 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
4236 uinfo->count = 1;
4237 uinfo->value.integer.min = 0;
4238 uinfo->value.integer.max = 1;
4239
4240 return 0;
4241}
4242
4243
4244static int snd_hdspm_get_tco_word_term(struct snd_kcontrol *kcontrol,
4245 struct snd_ctl_elem_value *ucontrol)
4246{
4247 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4248
4249 ucontrol->value.enumerated.item[0] = hdspm->tco->term;
4250
4251 return 0;
4252}
4253
4254
4255static int snd_hdspm_put_tco_word_term(struct snd_kcontrol *kcontrol,
4256 struct snd_ctl_elem_value *ucontrol)
4257{
4258 struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);
4259
4260 if (hdspm->tco->term != ucontrol->value.enumerated.item[0]) {
4261 hdspm->tco->term = ucontrol->value.enumerated.item[0];
4262
4263 hdspm_tco_write(hdspm);
4264
4265 return 1;
4266 }
4267
4268 return 0;
4269}
4270
4271
4272
4273
4274static struct snd_kcontrol_new snd_hdspm_controls_madi[] = {
4275 HDSPM_MIXER("Mixer", 0),
4276 HDSPM_INTERNAL_CLOCK("Internal Clock", 0),
2807 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0), 4277 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
2808 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0), 4278 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0),
2809 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0), 4279 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0),
2810 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0), 4280 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
2811/* 'External Rate' complies with the alsa control naming scheme */ 4281 HDSPM_SYNC_CHECK("WC SyncCheck", 0),
2812 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0), 4282 HDSPM_SYNC_CHECK("MADI SyncCheck", 1),
2813 HDSPM_WC_SYNC_CHECK("Word Clock Lock Status", 0), 4283 HDSPM_SYNC_CHECK("TCO SyncCHeck", 2),
2814 HDSPM_MADI_SYNC_CHECK("MADI Sync Lock Status", 0), 4284 HDSPM_SYNC_CHECK("SYNC IN SyncCheck", 3),
2815 HDSPM_LINE_OUT("Line Out", 0), 4285 HDSPM_LINE_OUT("Line Out", 0),
2816 HDSPM_TX_64("TX 64 channels mode", 0), 4286 HDSPM_TX_64("TX 64 channels mode", 0),
2817 HDSPM_C_TMS("Clear Track Marker", 0), 4287 HDSPM_C_TMS("Clear Track Marker", 0),
2818 HDSPM_SAFE_MODE("Safe Mode", 0), 4288 HDSPM_SAFE_MODE("Safe Mode", 0),
2819 HDSPM_INPUT_SELECT("Input Select", 0), 4289 HDSPM_INPUT_SELECT("Input Select", 0)
2820}; 4290};
2821 4291
2822static struct snd_kcontrol_new snd_hdspm_controls_aes32[] = {
2823 4292
4293static struct snd_kcontrol_new snd_hdspm_controls_madiface[] = {
2824 HDSPM_MIXER("Mixer", 0), 4294 HDSPM_MIXER("Mixer", 0),
2825/* 'Sample Clock Source' complies with the alsa control naming scheme */ 4295 HDSPM_INTERNAL_CLOCK("Internal Clock", 0),
2826 HDSPM_CLOCK_SOURCE("Sample Clock Source", 0), 4296 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
4297 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4298 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
4299 HDSPM_SYNC_CHECK("MADI SyncCheck", 0),
4300 HDSPM_TX_64("TX 64 channels mode", 0),
4301 HDSPM_C_TMS("Clear Track Marker", 0),
4302 HDSPM_SAFE_MODE("Safe Mode", 0)
4303};
2827 4304
4305static struct snd_kcontrol_new snd_hdspm_controls_aio[] = {
4306 HDSPM_MIXER("Mixer", 0),
4307 HDSPM_INTERNAL_CLOCK("Internal Clock", 0),
2828 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0), 4308 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
2829 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0), 4309 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0),
2830 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0), 4310 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0),
2831 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0), 4311 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
2832/* 'External Rate' complies with the alsa control naming scheme */
2833 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0), 4312 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
2834 HDSPM_WC_SYNC_CHECK("Word Clock Lock Status", 0), 4313 HDSPM_SYNC_CHECK("WC SyncCheck", 0),
2835/* HDSPM_AES_SYNC_CHECK("AES Lock Status", 0),*/ /* created in snd_hdspm_create_controls() */ 4314 HDSPM_SYNC_CHECK("AES SyncCheck", 1),
4315 HDSPM_SYNC_CHECK("SPDIF SyncCheck", 2),
4316 HDSPM_SYNC_CHECK("ADAT SyncCheck", 3),
4317 HDSPM_SYNC_CHECK("TCO SyncCheck", 4),
4318 HDSPM_SYNC_CHECK("SYNC IN SyncCheck", 5),
4319 HDSPM_AUTOSYNC_SAMPLE_RATE("WC Frequency", 0),
4320 HDSPM_AUTOSYNC_SAMPLE_RATE("AES Frequency", 1),
4321 HDSPM_AUTOSYNC_SAMPLE_RATE("SPDIF Frequency", 2),
4322 HDSPM_AUTOSYNC_SAMPLE_RATE("ADAT Frequency", 3),
4323 HDSPM_AUTOSYNC_SAMPLE_RATE("TCO Frequency", 4),
4324 HDSPM_AUTOSYNC_SAMPLE_RATE("SYNC IN Frequency", 5)
4325
4326 /*
4327 HDSPM_INPUT_SELECT("Input Select", 0),
4328 HDSPM_SPDIF_OPTICAL("SPDIF Out Optical", 0),
4329 HDSPM_PROFESSIONAL("SPDIF Out Professional", 0);
4330 HDSPM_SPDIF_IN("SPDIF In", 0);
4331 HDSPM_BREAKOUT_CABLE("Breakout Cable", 0);
4332 HDSPM_INPUT_LEVEL("Input Level", 0);
4333 HDSPM_OUTPUT_LEVEL("Output Level", 0);
4334 HDSPM_PHONES("Phones", 0);
4335 */
4336};
4337
4338static struct snd_kcontrol_new snd_hdspm_controls_raydat[] = {
4339 HDSPM_MIXER("Mixer", 0),
4340 HDSPM_INTERNAL_CLOCK("Internal Clock", 0),
4341 HDSPM_SYSTEM_CLOCK_MODE("Clock Mode", 0),
4342 HDSPM_PREF_SYNC_REF("Pref Sync Ref", 0),
4343 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4344 HDSPM_SYNC_CHECK("WC SyncCheck", 0),
4345 HDSPM_SYNC_CHECK("AES SyncCheck", 1),
4346 HDSPM_SYNC_CHECK("SPDIF SyncCheck", 2),
4347 HDSPM_SYNC_CHECK("ADAT1 SyncCheck", 3),
4348 HDSPM_SYNC_CHECK("ADAT2 SyncCheck", 4),
4349 HDSPM_SYNC_CHECK("ADAT3 SyncCheck", 5),
4350 HDSPM_SYNC_CHECK("ADAT4 SyncCheck", 6),
4351 HDSPM_SYNC_CHECK("TCO SyncCheck", 7),
4352 HDSPM_SYNC_CHECK("SYNC IN SyncCheck", 8),
4353 HDSPM_AUTOSYNC_SAMPLE_RATE("WC Frequency", 0),
4354 HDSPM_AUTOSYNC_SAMPLE_RATE("AES Frequency", 1),
4355 HDSPM_AUTOSYNC_SAMPLE_RATE("SPDIF Frequency", 2),
4356 HDSPM_AUTOSYNC_SAMPLE_RATE("ADAT1 Frequency", 3),
4357 HDSPM_AUTOSYNC_SAMPLE_RATE("ADAT2 Frequency", 4),
4358 HDSPM_AUTOSYNC_SAMPLE_RATE("ADAT3 Frequency", 5),
4359 HDSPM_AUTOSYNC_SAMPLE_RATE("ADAT4 Frequency", 6),
4360 HDSPM_AUTOSYNC_SAMPLE_RATE("TCO Frequency", 7),
4361 HDSPM_AUTOSYNC_SAMPLE_RATE("SYNC IN Frequency", 8)
4362};
4363
4364static struct snd_kcontrol_new snd_hdspm_controls_aes32[] = {
4365 HDSPM_MIXER("Mixer", 0),
4366 HDSPM_INTERNAL_CLOCK("Internal Clock", 0),
4367 HDSPM_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
4368 HDSPM_PREF_SYNC_REF("Preferred Sync Reference", 0),
4369 HDSPM_AUTOSYNC_REF("AutoSync Reference", 0),
4370 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4371 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
4372 HDSPM_SYNC_CHECK("WC Sync Check", 0),
4373 HDSPM_SYNC_CHECK("AES1 Sync Check", 1),
4374 HDSPM_SYNC_CHECK("AES2 Sync Check", 2),
4375 HDSPM_SYNC_CHECK("AES3 Sync Check", 3),
4376 HDSPM_SYNC_CHECK("AES4 Sync Check", 4),
4377 HDSPM_SYNC_CHECK("AES5 Sync Check", 5),
4378 HDSPM_SYNC_CHECK("AES6 Sync Check", 6),
4379 HDSPM_SYNC_CHECK("AES7 Sync Check", 7),
4380 HDSPM_SYNC_CHECK("AES8 Sync Check", 8),
4381 HDSPM_SYNC_CHECK("TCO Sync Check", 9),
4382 HDSPM_SYNC_CHECK("SYNC IN Sync Check", 10),
4383 HDSPM_AUTOSYNC_SAMPLE_RATE("WC Frequency", 0),
4384 HDSPM_AUTOSYNC_SAMPLE_RATE("AES1 Frequency", 1),
4385 HDSPM_AUTOSYNC_SAMPLE_RATE("AES2 Frequency", 2),
4386 HDSPM_AUTOSYNC_SAMPLE_RATE("AES3 Frequency", 3),
4387 HDSPM_AUTOSYNC_SAMPLE_RATE("AES4 Frequency", 4),
4388 HDSPM_AUTOSYNC_SAMPLE_RATE("AES5 Frequency", 5),
4389 HDSPM_AUTOSYNC_SAMPLE_RATE("AES6 Frequency", 6),
4390 HDSPM_AUTOSYNC_SAMPLE_RATE("AES7 Frequency", 7),
4391 HDSPM_AUTOSYNC_SAMPLE_RATE("AES8 Frequency", 8),
4392 HDSPM_AUTOSYNC_SAMPLE_RATE("TCO Frequency", 9),
4393 HDSPM_AUTOSYNC_SAMPLE_RATE("SYNC IN Frequency", 10),
2836 HDSPM_LINE_OUT("Line Out", 0), 4394 HDSPM_LINE_OUT("Line Out", 0),
2837 HDSPM_EMPHASIS("Emphasis", 0), 4395 HDSPM_EMPHASIS("Emphasis", 0),
2838 HDSPM_DOLBY("Non Audio", 0), 4396 HDSPM_DOLBY("Non Audio", 0),
@@ -2842,6 +4400,19 @@ static struct snd_kcontrol_new snd_hdspm_controls_aes32[] = {
2842 HDSPM_QS_WIRE("Quad Speed Wire Mode", 0), 4400 HDSPM_QS_WIRE("Quad Speed Wire Mode", 0),
2843}; 4401};
2844 4402
4403
4404
4405/* Control elements for the optional TCO module */
4406static struct snd_kcontrol_new snd_hdspm_controls_tco[] = {
4407 HDSPM_TCO_SAMPLE_RATE("TCO Sample Rate", 0),
4408 HDSPM_TCO_PULL("TCO Pull", 0),
4409 HDSPM_TCO_WCK_CONVERSION("TCO WCK Conversion", 0),
4410 HDSPM_TCO_FRAME_RATE("TCO Frame Rate", 0),
4411 HDSPM_TCO_SYNC_SOURCE("TCO Sync Source", 0),
4412 HDSPM_TCO_WORD_TERM("TCO Word Term", 0)
4413};
4414
4415
2845static struct snd_kcontrol_new snd_hdspm_playback_mixer = HDSPM_PLAYBACK_MIXER; 4416static struct snd_kcontrol_new snd_hdspm_playback_mixer = HDSPM_PLAYBACK_MIXER;
2846 4417
2847 4418
@@ -2849,78 +4420,76 @@ static int hdspm_update_simple_mixer_controls(struct hdspm * hdspm)
2849{ 4420{
2850 int i; 4421 int i;
2851 4422
2852 for (i = hdspm->ds_channels; i < hdspm->ss_channels; ++i) { 4423 for (i = hdspm->ds_out_channels; i < hdspm->ss_out_channels; ++i) {
2853 if (hdspm->system_sample_rate > 48000) { 4424 if (hdspm->system_sample_rate > 48000) {
2854 hdspm->playback_mixer_ctls[i]->vd[0].access = 4425 hdspm->playback_mixer_ctls[i]->vd[0].access =
2855 SNDRV_CTL_ELEM_ACCESS_INACTIVE | 4426 SNDRV_CTL_ELEM_ACCESS_INACTIVE |
2856 SNDRV_CTL_ELEM_ACCESS_READ | 4427 SNDRV_CTL_ELEM_ACCESS_READ |
2857 SNDRV_CTL_ELEM_ACCESS_VOLATILE; 4428 SNDRV_CTL_ELEM_ACCESS_VOLATILE;
2858 } else { 4429 } else {
2859 hdspm->playback_mixer_ctls[i]->vd[0].access = 4430 hdspm->playback_mixer_ctls[i]->vd[0].access =
2860 SNDRV_CTL_ELEM_ACCESS_READWRITE | 4431 SNDRV_CTL_ELEM_ACCESS_READWRITE |
2861 SNDRV_CTL_ELEM_ACCESS_VOLATILE; 4432 SNDRV_CTL_ELEM_ACCESS_VOLATILE;
2862 } 4433 }
2863 snd_ctl_notify(hdspm->card, SNDRV_CTL_EVENT_MASK_VALUE | 4434 snd_ctl_notify(hdspm->card, SNDRV_CTL_EVENT_MASK_VALUE |
2864 SNDRV_CTL_EVENT_MASK_INFO, 4435 SNDRV_CTL_EVENT_MASK_INFO,
2865 &hdspm->playback_mixer_ctls[i]->id); 4436 &hdspm->playback_mixer_ctls[i]->id);
2866 } 4437 }
2867 4438
2868 return 0; 4439 return 0;
2869} 4440}
2870 4441
2871 4442
2872static int snd_hdspm_create_controls(struct snd_card *card, struct hdspm * hdspm) 4443static int snd_hdspm_create_controls(struct snd_card *card,
4444 struct hdspm *hdspm)
2873{ 4445{
2874 unsigned int idx, limit; 4446 unsigned int idx, limit;
2875 int err; 4447 int err;
2876 struct snd_kcontrol *kctl; 4448 struct snd_kcontrol *kctl;
4449 struct snd_kcontrol_new *list = NULL;
2877 4450
2878 /* add control list first */ 4451 switch (hdspm->io_type) {
2879 if (hdspm->is_aes32) { 4452 case MADI:
2880 struct snd_kcontrol_new aes_sync_ctl = 4453 list = snd_hdspm_controls_madi;
2881 HDSPM_AES_SYNC_CHECK("AES Lock Status", 0); 4454 limit = ARRAY_SIZE(snd_hdspm_controls_madi);
4455 break;
4456 case MADIface:
4457 list = snd_hdspm_controls_madiface;
4458 limit = ARRAY_SIZE(snd_hdspm_controls_madiface);
4459 break;
4460 case AIO:
4461 list = snd_hdspm_controls_aio;
4462 limit = ARRAY_SIZE(snd_hdspm_controls_aio);
4463 break;
4464 case RayDAT:
4465 list = snd_hdspm_controls_raydat;
4466 limit = ARRAY_SIZE(snd_hdspm_controls_raydat);
4467 break;
4468 case AES32:
4469 list = snd_hdspm_controls_aes32;
4470 limit = ARRAY_SIZE(snd_hdspm_controls_aes32);
4471 break;
4472 }
2882 4473
2883 for (idx = 0; idx < ARRAY_SIZE(snd_hdspm_controls_aes32); 4474 if (NULL != list) {
2884 idx++) { 4475 for (idx = 0; idx < limit; idx++) {
2885 err = snd_ctl_add(card,
2886 snd_ctl_new1(&snd_hdspm_controls_aes32[idx],
2887 hdspm));
2888 if (err < 0)
2889 return err;
2890 }
2891 for (idx = 1; idx <= 8; idx++) {
2892 aes_sync_ctl.index = idx;
2893 err = snd_ctl_add(card,
2894 snd_ctl_new1(&aes_sync_ctl, hdspm));
2895 if (err < 0)
2896 return err;
2897 }
2898 } else {
2899 for (idx = 0; idx < ARRAY_SIZE(snd_hdspm_controls_madi);
2900 idx++) {
2901 err = snd_ctl_add(card, 4476 err = snd_ctl_add(card,
2902 snd_ctl_new1(&snd_hdspm_controls_madi[idx], 4477 snd_ctl_new1(&list[idx], hdspm));
2903 hdspm));
2904 if (err < 0) 4478 if (err < 0)
2905 return err; 4479 return err;
2906 } 4480 }
2907 } 4481 }
2908 4482
2909 /* Channel playback mixer as default control
2910 Note: the whole matrix would be 128*HDSPM_MIXER_CHANNELS Faders,
2911 thats too * big for any alsamixer they are accessible via special
2912 IOCTL on hwdep and the mixer 2dimensional mixer control
2913 */
2914 4483
4484 /* create simple 1:1 playback mixer controls */
2915 snd_hdspm_playback_mixer.name = "Chn"; 4485 snd_hdspm_playback_mixer.name = "Chn";
2916 limit = HDSPM_MAX_CHANNELS; 4486 if (hdspm->system_sample_rate >= 128000) {
2917 4487 limit = hdspm->qs_out_channels;
2918 /* The index values are one greater than the channel ID so that 4488 } else if (hdspm->system_sample_rate >= 64000) {
2919 * alsamixer will display them correctly. We want to use the index 4489 limit = hdspm->ds_out_channels;
2920 * for fast lookup of the relevant channel, but if we use it at all, 4490 } else {
2921 * most ALSA software does the wrong thing with it ... 4491 limit = hdspm->ss_out_channels;
2922 */ 4492 }
2923
2924 for (idx = 0; idx < limit; ++idx) { 4493 for (idx = 0; idx < limit; ++idx) {
2925 snd_hdspm_playback_mixer.index = idx + 1; 4494 snd_hdspm_playback_mixer.index = idx + 1;
2926 kctl = snd_ctl_new1(&snd_hdspm_playback_mixer, hdspm); 4495 kctl = snd_ctl_new1(&snd_hdspm_playback_mixer, hdspm);
@@ -2930,11 +4499,24 @@ static int snd_hdspm_create_controls(struct snd_card *card, struct hdspm * hdspm
2930 hdspm->playback_mixer_ctls[idx] = kctl; 4499 hdspm->playback_mixer_ctls[idx] = kctl;
2931 } 4500 }
2932 4501
4502
4503 if (hdspm->tco) {
4504 /* add tco control elements */
4505 list = snd_hdspm_controls_tco;
4506 limit = ARRAY_SIZE(snd_hdspm_controls_tco);
4507 for (idx = 0; idx < limit; idx++) {
4508 err = snd_ctl_add(card,
4509 snd_ctl_new1(&list[idx], hdspm));
4510 if (err < 0)
4511 return err;
4512 }
4513 }
4514
2933 return 0; 4515 return 0;
2934} 4516}
2935 4517
2936/*------------------------------------------------------------ 4518/*------------------------------------------------------------
2937 /proc interface 4519 /proc interface
2938 ------------------------------------------------------------*/ 4520 ------------------------------------------------------------*/
2939 4521
2940static void 4522static void
@@ -2942,72 +4524,178 @@ snd_hdspm_proc_read_madi(struct snd_info_entry * entry,
2942 struct snd_info_buffer *buffer) 4524 struct snd_info_buffer *buffer)
2943{ 4525{
2944 struct hdspm *hdspm = entry->private_data; 4526 struct hdspm *hdspm = entry->private_data;
2945 unsigned int status; 4527 unsigned int status, status2, control, freq;
2946 unsigned int status2; 4528
2947 char *pref_sync_ref; 4529 char *pref_sync_ref;
2948 char *autosync_ref; 4530 char *autosync_ref;
2949 char *system_clock_mode; 4531 char *system_clock_mode;
2950 char *clock_source;
2951 char *insel; 4532 char *insel;
2952 char *syncref;
2953 int x, x2; 4533 int x, x2;
2954 4534
4535 /* TCO stuff */
4536 int a, ltc, frames, seconds, minutes, hours;
4537 unsigned int period;
4538 u64 freq_const = 0;
4539 u32 rate;
4540
2955 status = hdspm_read(hdspm, HDSPM_statusRegister); 4541 status = hdspm_read(hdspm, HDSPM_statusRegister);
2956 status2 = hdspm_read(hdspm, HDSPM_statusRegister2); 4542 status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
4543 control = hdspm->control_register;
4544 freq = hdspm_read(hdspm, HDSPM_timecodeRegister);
2957 4545
2958 snd_iprintf(buffer, "%s (Card #%d) Rev.%x Status2first3bits: %x\n", 4546 snd_iprintf(buffer, "%s (Card #%d) Rev.%x Status2first3bits: %x\n",
2959 hdspm->card_name, hdspm->card->number + 1, 4547 hdspm->card_name, hdspm->card->number + 1,
2960 hdspm->firmware_rev, 4548 hdspm->firmware_rev,
2961 (status2 & HDSPM_version0) | 4549 (status2 & HDSPM_version0) |
2962 (status2 & HDSPM_version1) | (status2 & 4550 (status2 & HDSPM_version1) | (status2 &
2963 HDSPM_version2)); 4551 HDSPM_version2));
4552
4553 snd_iprintf(buffer, "HW Serial: 0x%06x%06x\n",
4554 (hdspm_read(hdspm, HDSPM_midiStatusIn1)>>8) & 0xFFFFFF,
4555 (hdspm_read(hdspm, HDSPM_midiStatusIn0)>>8) & 0xFFFFFF);
2964 4556
2965 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", 4557 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
2966 hdspm->irq, hdspm->port, (unsigned long)hdspm->iobase); 4558 hdspm->irq, hdspm->port, (unsigned long)hdspm->iobase);
2967 4559
2968 snd_iprintf(buffer, "--- System ---\n"); 4560 snd_iprintf(buffer, "--- System ---\n");
2969 4561
2970 snd_iprintf(buffer, 4562 snd_iprintf(buffer,
2971 "IRQ Pending: Audio=%d, MIDI0=%d, MIDI1=%d, IRQcount=%d\n", 4563 "IRQ Pending: Audio=%d, MIDI0=%d, MIDI1=%d, IRQcount=%d\n",
2972 status & HDSPM_audioIRQPending, 4564 status & HDSPM_audioIRQPending,
2973 (status & HDSPM_midi0IRQPending) ? 1 : 0, 4565 (status & HDSPM_midi0IRQPending) ? 1 : 0,
2974 (status & HDSPM_midi1IRQPending) ? 1 : 0, 4566 (status & HDSPM_midi1IRQPending) ? 1 : 0,
2975 hdspm->irq_count); 4567 hdspm->irq_count);
2976 snd_iprintf(buffer, 4568 snd_iprintf(buffer,
2977 "HW pointer: id = %d, rawptr = %d (%d->%d) " 4569 "HW pointer: id = %d, rawptr = %d (%d->%d) "
2978 "estimated= %ld (bytes)\n", 4570 "estimated= %ld (bytes)\n",
2979 ((status & HDSPM_BufferID) ? 1 : 0), 4571 ((status & HDSPM_BufferID) ? 1 : 0),
2980 (status & HDSPM_BufferPositionMask), 4572 (status & HDSPM_BufferPositionMask),
2981 (status & HDSPM_BufferPositionMask) % 4573 (status & HDSPM_BufferPositionMask) %
2982 (2 * (int)hdspm->period_bytes), 4574 (2 * (int)hdspm->period_bytes),
2983 ((status & HDSPM_BufferPositionMask) - 64) % 4575 ((status & HDSPM_BufferPositionMask) - 64) %
2984 (2 * (int)hdspm->period_bytes), 4576 (2 * (int)hdspm->period_bytes),
2985 (long) hdspm_hw_pointer(hdspm) * 4); 4577 (long) hdspm_hw_pointer(hdspm) * 4);
2986 4578
2987 snd_iprintf(buffer, 4579 snd_iprintf(buffer,
2988 "MIDI FIFO: Out1=0x%x, Out2=0x%x, In1=0x%x, In2=0x%x \n", 4580 "MIDI FIFO: Out1=0x%x, Out2=0x%x, In1=0x%x, In2=0x%x \n",
2989 hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xFF, 4581 hdspm_read(hdspm, HDSPM_midiStatusOut0) & 0xFF,
2990 hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xFF, 4582 hdspm_read(hdspm, HDSPM_midiStatusOut1) & 0xFF,
2991 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF, 4583 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF,
2992 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF); 4584 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF);
2993 snd_iprintf(buffer, 4585 snd_iprintf(buffer,
2994 "Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, " 4586 "MIDIoverMADI FIFO: In=0x%x, Out=0x%x \n",
2995 "status2=0x%x\n", 4587 hdspm_read(hdspm, HDSPM_midiStatusIn2) & 0xFF,
2996 hdspm->control_register, hdspm->control2_register, 4588 hdspm_read(hdspm, HDSPM_midiStatusOut2) & 0xFF);
2997 status, status2); 4589 snd_iprintf(buffer,
4590 "Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, "
4591 "status2=0x%x\n",
4592 hdspm->control_register, hdspm->control2_register,
4593 status, status2);
4594 if (status & HDSPM_tco_detect) {
4595 snd_iprintf(buffer, "TCO module detected.\n");
4596 a = hdspm_read(hdspm, HDSPM_RD_TCO+4);
4597 if (a & HDSPM_TCO1_LTC_Input_valid) {
4598 snd_iprintf(buffer, " LTC valid, ");
4599 switch (a & (HDSPM_TCO1_LTC_Format_LSB |
4600 HDSPM_TCO1_LTC_Format_MSB)) {
4601 case 0:
4602 snd_iprintf(buffer, "24 fps, ");
4603 break;
4604 case HDSPM_TCO1_LTC_Format_LSB:
4605 snd_iprintf(buffer, "25 fps, ");
4606 break;
4607 case HDSPM_TCO1_LTC_Format_MSB:
4608 snd_iprintf(buffer, "29.97 fps, ");
4609 break;
4610 default:
4611 snd_iprintf(buffer, "30 fps, ");
4612 break;
4613 }
4614 if (a & HDSPM_TCO1_set_drop_frame_flag) {
4615 snd_iprintf(buffer, "drop frame\n");
4616 } else {
4617 snd_iprintf(buffer, "full frame\n");
4618 }
4619 } else {
4620 snd_iprintf(buffer, " no LTC\n");
4621 }
4622 if (a & HDSPM_TCO1_Video_Input_Format_NTSC) {
4623 snd_iprintf(buffer, " Video: NTSC\n");
4624 } else if (a & HDSPM_TCO1_Video_Input_Format_PAL) {
4625 snd_iprintf(buffer, " Video: PAL\n");
4626 } else {
4627 snd_iprintf(buffer, " No video\n");
4628 }
4629 if (a & HDSPM_TCO1_TCO_lock) {
4630 snd_iprintf(buffer, " Sync: lock\n");
4631 } else {
4632 snd_iprintf(buffer, " Sync: no lock\n");
4633 }
4634
4635 switch (hdspm->io_type) {
4636 case MADI:
4637 case AES32:
4638 freq_const = 110069313433624ULL;
4639 break;
4640 case RayDAT:
4641 case AIO:
4642 freq_const = 104857600000000ULL;
4643 break;
4644 case MADIface:
4645 break; /* no TCO possible */
4646 }
4647
4648 period = hdspm_read(hdspm, HDSPM_RD_PLL_FREQ);
4649 snd_iprintf(buffer, " period: %u\n", period);
4650
4651
4652 /* rate = freq_const/period; */
4653 rate = div_u64(freq_const, period);
4654
4655 if (control & HDSPM_QuadSpeed) {
4656 rate *= 4;
4657 } else if (control & HDSPM_DoubleSpeed) {
4658 rate *= 2;
4659 }
4660
4661 snd_iprintf(buffer, " Frequency: %u Hz\n",
4662 (unsigned int) rate);
4663
4664 ltc = hdspm_read(hdspm, HDSPM_RD_TCO);
4665 frames = ltc & 0xF;
4666 ltc >>= 4;
4667 frames += (ltc & 0x3) * 10;
4668 ltc >>= 4;
4669 seconds = ltc & 0xF;
4670 ltc >>= 4;
4671 seconds += (ltc & 0x7) * 10;
4672 ltc >>= 4;
4673 minutes = ltc & 0xF;
4674 ltc >>= 4;
4675 minutes += (ltc & 0x7) * 10;
4676 ltc >>= 4;
4677 hours = ltc & 0xF;
4678 ltc >>= 4;
4679 hours += (ltc & 0x3) * 10;
4680 snd_iprintf(buffer,
4681 " LTC In: %02d:%02d:%02d:%02d\n",
4682 hours, minutes, seconds, frames);
4683
4684 } else {
4685 snd_iprintf(buffer, "No TCO module detected.\n");
4686 }
2998 4687
2999 snd_iprintf(buffer, "--- Settings ---\n"); 4688 snd_iprintf(buffer, "--- Settings ---\n");
3000 4689
3001 x = 1 << (6 + hdspm_decode_latency(hdspm->control_register & 4690 x = 1 << (6 + hdspm_decode_latency(hdspm->control_register &
3002 HDSPM_LatencyMask)); 4691 HDSPM_LatencyMask));
3003 4692
3004 snd_iprintf(buffer, 4693 snd_iprintf(buffer,
3005 "Size (Latency): %d samples (2 periods of %lu bytes)\n", 4694 "Size (Latency): %d samples (2 periods of %lu bytes)\n",
3006 x, (unsigned long) hdspm->period_bytes); 4695 x, (unsigned long) hdspm->period_bytes);
3007 4696
3008 snd_iprintf(buffer, "Line out: %s, Precise Pointer: %s\n", 4697 snd_iprintf(buffer, "Line out: %s\n",
3009 (hdspm->control_register & HDSPM_LineOut) ? "on " : "off", 4698 (hdspm->control_register & HDSPM_LineOut) ? "on " : "off");
3010 (hdspm->precise_ptr) ? "on" : "off");
3011 4699
3012 switch (hdspm->control_register & HDSPM_InputMask) { 4700 switch (hdspm->control_register & HDSPM_InputMask) {
3013 case HDSPM_InputOptical: 4701 case HDSPM_InputOptical:
@@ -3017,63 +4705,22 @@ snd_hdspm_proc_read_madi(struct snd_info_entry * entry,
3017 insel = "Coaxial"; 4705 insel = "Coaxial";
3018 break; 4706 break;
3019 default: 4707 default:
3020 insel = "Unknown"; 4708 insel = "Unkown";
3021 }
3022
3023 switch (hdspm->control_register & HDSPM_SyncRefMask) {
3024 case HDSPM_SyncRef_Word:
3025 syncref = "WordClock";
3026 break;
3027 case HDSPM_SyncRef_MADI:
3028 syncref = "MADI";
3029 break;
3030 default:
3031 syncref = "Unknown";
3032 } 4709 }
3033 snd_iprintf(buffer, "Inputsel = %s, SyncRef = %s\n", insel,
3034 syncref);
3035 4710
3036 snd_iprintf(buffer, 4711 snd_iprintf(buffer,
3037 "ClearTrackMarker = %s, Transmit in %s Channel Mode, " 4712 "ClearTrackMarker = %s, Transmit in %s Channel Mode, "
3038 "Auto Input %s\n", 4713 "Auto Input %s\n",
3039 (hdspm-> 4714 (hdspm->control_register & HDSPM_clr_tms) ? "on" : "off",
3040 control_register & HDSPM_clr_tms) ? "on" : "off", 4715 (hdspm->control_register & HDSPM_TX_64ch) ? "64" : "56",
3041 (hdspm-> 4716 (hdspm->control_register & HDSPM_AutoInp) ? "on" : "off");
3042 control_register & HDSPM_TX_64ch) ? "64" : "56", 4717
3043 (hdspm->
3044 control_register & HDSPM_AutoInp) ? "on" : "off");
3045 4718
3046 switch (hdspm_clock_source(hdspm)) {
3047 case HDSPM_CLOCK_SOURCE_AUTOSYNC:
3048 clock_source = "AutoSync";
3049 break;
3050 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ:
3051 clock_source = "Internal 32 kHz";
3052 break;
3053 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3054 clock_source = "Internal 44.1 kHz";
3055 break;
3056 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ:
3057 clock_source = "Internal 48 kHz";
3058 break;
3059 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ:
3060 clock_source = "Internal 64 kHz";
3061 break;
3062 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3063 clock_source = "Internal 88.2 kHz";
3064 break;
3065 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ:
3066 clock_source = "Internal 96 kHz";
3067 break;
3068 default:
3069 clock_source = "Error";
3070 }
3071 snd_iprintf(buffer, "Sample Clock Source: %s\n", clock_source);
3072 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) 4719 if (!(hdspm->control_register & HDSPM_ClockModeMaster))
3073 system_clock_mode = "Slave"; 4720 system_clock_mode = "AutoSync";
3074 else 4721 else
3075 system_clock_mode = "Master"; 4722 system_clock_mode = "Master";
3076 snd_iprintf(buffer, "System Clock Mode: %s\n", system_clock_mode); 4723 snd_iprintf(buffer, "AutoSync Reference: %s\n", system_clock_mode);
3077 4724
3078 switch (hdspm_pref_sync_ref(hdspm)) { 4725 switch (hdspm_pref_sync_ref(hdspm)) {
3079 case HDSPM_SYNC_FROM_WORD: 4726 case HDSPM_SYNC_FROM_WORD:
@@ -3082,15 +4729,21 @@ snd_hdspm_proc_read_madi(struct snd_info_entry * entry,
3082 case HDSPM_SYNC_FROM_MADI: 4729 case HDSPM_SYNC_FROM_MADI:
3083 pref_sync_ref = "MADI Sync"; 4730 pref_sync_ref = "MADI Sync";
3084 break; 4731 break;
4732 case HDSPM_SYNC_FROM_TCO:
4733 pref_sync_ref = "TCO";
4734 break;
4735 case HDSPM_SYNC_FROM_SYNC_IN:
4736 pref_sync_ref = "Sync In";
4737 break;
3085 default: 4738 default:
3086 pref_sync_ref = "XXXX Clock"; 4739 pref_sync_ref = "XXXX Clock";
3087 break; 4740 break;
3088 } 4741 }
3089 snd_iprintf(buffer, "Preferred Sync Reference: %s\n", 4742 snd_iprintf(buffer, "Preferred Sync Reference: %s\n",
3090 pref_sync_ref); 4743 pref_sync_ref);
3091 4744
3092 snd_iprintf(buffer, "System Clock Frequency: %d\n", 4745 snd_iprintf(buffer, "System Clock Frequency: %d\n",
3093 hdspm->system_sample_rate); 4746 hdspm->system_sample_rate);
3094 4747
3095 4748
3096 snd_iprintf(buffer, "--- Status:\n"); 4749 snd_iprintf(buffer, "--- Status:\n");
@@ -3099,12 +4752,18 @@ snd_hdspm_proc_read_madi(struct snd_info_entry * entry,
3099 x2 = status2 & HDSPM_wcSync; 4752 x2 = status2 & HDSPM_wcSync;
3100 4753
3101 snd_iprintf(buffer, "Inputs MADI=%s, WordClock=%s\n", 4754 snd_iprintf(buffer, "Inputs MADI=%s, WordClock=%s\n",
3102 (status & HDSPM_madiLock) ? (x ? "Sync" : "Lock") : 4755 (status & HDSPM_madiLock) ? (x ? "Sync" : "Lock") :
3103 "NoLock", 4756 "NoLock",
3104 (status2 & HDSPM_wcLock) ? (x2 ? "Sync" : "Lock") : 4757 (status2 & HDSPM_wcLock) ? (x2 ? "Sync" : "Lock") :
3105 "NoLock"); 4758 "NoLock");
3106 4759
3107 switch (hdspm_autosync_ref(hdspm)) { 4760 switch (hdspm_autosync_ref(hdspm)) {
4761 case HDSPM_AUTOSYNC_FROM_SYNC_IN:
4762 autosync_ref = "Sync In";
4763 break;
4764 case HDSPM_AUTOSYNC_FROM_TCO:
4765 autosync_ref = "TCO";
4766 break;
3108 case HDSPM_AUTOSYNC_FROM_WORD: 4767 case HDSPM_AUTOSYNC_FROM_WORD:
3109 autosync_ref = "Word Clock"; 4768 autosync_ref = "Word Clock";
3110 break; 4769 break;
@@ -3119,15 +4778,15 @@ snd_hdspm_proc_read_madi(struct snd_info_entry * entry,
3119 break; 4778 break;
3120 } 4779 }
3121 snd_iprintf(buffer, 4780 snd_iprintf(buffer,
3122 "AutoSync: Reference= %s, Freq=%d (MADI = %d, Word = %d)\n", 4781 "AutoSync: Reference= %s, Freq=%d (MADI = %d, Word = %d)\n",
3123 autosync_ref, hdspm_external_sample_rate(hdspm), 4782 autosync_ref, hdspm_external_sample_rate(hdspm),
3124 (status & HDSPM_madiFreqMask) >> 22, 4783 (status & HDSPM_madiFreqMask) >> 22,
3125 (status2 & HDSPM_wcFreqMask) >> 5); 4784 (status2 & HDSPM_wcFreqMask) >> 5);
3126 4785
3127 snd_iprintf(buffer, "Input: %s, Mode=%s\n", 4786 snd_iprintf(buffer, "Input: %s, Mode=%s\n",
3128 (status & HDSPM_AB_int) ? "Coax" : "Optical", 4787 (status & HDSPM_AB_int) ? "Coax" : "Optical",
3129 (status & HDSPM_RX_64ch) ? "64 channels" : 4788 (status & HDSPM_RX_64ch) ? "64 channels" :
3130 "56 channels"); 4789 "56 channels");
3131 4790
3132 snd_iprintf(buffer, "\n"); 4791 snd_iprintf(buffer, "\n");
3133} 4792}
@@ -3142,8 +4801,6 @@ snd_hdspm_proc_read_aes32(struct snd_info_entry * entry,
3142 unsigned int timecode; 4801 unsigned int timecode;
3143 int pref_syncref; 4802 int pref_syncref;
3144 char *autosync_ref; 4803 char *autosync_ref;
3145 char *system_clock_mode;
3146 char *clock_source;
3147 int x; 4804 int x;
3148 4805
3149 status = hdspm_read(hdspm, HDSPM_statusRegister); 4806 status = hdspm_read(hdspm, HDSPM_statusRegister);
@@ -3183,24 +4840,27 @@ snd_hdspm_proc_read_aes32(struct snd_info_entry * entry,
3183 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF, 4840 hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xFF,
3184 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF); 4841 hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xFF);
3185 snd_iprintf(buffer, 4842 snd_iprintf(buffer,
3186 "Register: ctrl1=0x%x, status1=0x%x, status2=0x%x, " 4843 "MIDIoverMADI FIFO: In=0x%x, Out=0x%x \n",
3187 "timecode=0x%x\n", 4844 hdspm_read(hdspm, HDSPM_midiStatusIn2) & 0xFF,
3188 hdspm->control_register, 4845 hdspm_read(hdspm, HDSPM_midiStatusOut2) & 0xFF);
3189 status, status2, timecode); 4846 snd_iprintf(buffer,
4847 "Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, "
4848 "status2=0x%x\n",
4849 hdspm->control_register, hdspm->control2_register,
4850 status, status2);
3190 4851
3191 snd_iprintf(buffer, "--- Settings ---\n"); 4852 snd_iprintf(buffer, "--- Settings ---\n");
3192 4853
3193 x = 1 << (6 + hdspm_decode_latency(hdspm->control_register & 4854 x = 1 << (6 + hdspm_decode_latency(hdspm->control_register &
3194 HDSPM_LatencyMask)); 4855 HDSPM_LatencyMask));
3195 4856
3196 snd_iprintf(buffer, 4857 snd_iprintf(buffer,
3197 "Size (Latency): %d samples (2 periods of %lu bytes)\n", 4858 "Size (Latency): %d samples (2 periods of %lu bytes)\n",
3198 x, (unsigned long) hdspm->period_bytes); 4859 x, (unsigned long) hdspm->period_bytes);
3199 4860
3200 snd_iprintf(buffer, "Line out: %s, Precise Pointer: %s\n", 4861 snd_iprintf(buffer, "Line out: %s\n",
3201 (hdspm-> 4862 (hdspm->
3202 control_register & HDSPM_LineOut) ? "on " : "off", 4863 control_register & HDSPM_LineOut) ? "on " : "off");
3203 (hdspm->precise_ptr) ? "on" : "off");
3204 4864
3205 snd_iprintf(buffer, 4865 snd_iprintf(buffer,
3206 "ClearTrackMarker %s, Emphasis %s, Dolby %s\n", 4866 "ClearTrackMarker %s, Emphasis %s, Dolby %s\n",
@@ -3211,46 +4871,6 @@ snd_hdspm_proc_read_aes32(struct snd_info_entry * entry,
3211 (hdspm-> 4871 (hdspm->
3212 control_register & HDSPM_Dolby) ? "on" : "off"); 4872 control_register & HDSPM_Dolby) ? "on" : "off");
3213 4873
3214 switch (hdspm_clock_source(hdspm)) {
3215 case HDSPM_CLOCK_SOURCE_AUTOSYNC:
3216 clock_source = "AutoSync";
3217 break;
3218 case HDSPM_CLOCK_SOURCE_INTERNAL_32KHZ:
3219 clock_source = "Internal 32 kHz";
3220 break;
3221 case HDSPM_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3222 clock_source = "Internal 44.1 kHz";
3223 break;
3224 case HDSPM_CLOCK_SOURCE_INTERNAL_48KHZ:
3225 clock_source = "Internal 48 kHz";
3226 break;
3227 case HDSPM_CLOCK_SOURCE_INTERNAL_64KHZ:
3228 clock_source = "Internal 64 kHz";
3229 break;
3230 case HDSPM_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3231 clock_source = "Internal 88.2 kHz";
3232 break;
3233 case HDSPM_CLOCK_SOURCE_INTERNAL_96KHZ:
3234 clock_source = "Internal 96 kHz";
3235 break;
3236 case HDSPM_CLOCK_SOURCE_INTERNAL_128KHZ:
3237 clock_source = "Internal 128 kHz";
3238 break;
3239 case HDSPM_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3240 clock_source = "Internal 176.4 kHz";
3241 break;
3242 case HDSPM_CLOCK_SOURCE_INTERNAL_192KHZ:
3243 clock_source = "Internal 192 kHz";
3244 break;
3245 default:
3246 clock_source = "Error";
3247 }
3248 snd_iprintf(buffer, "Sample Clock Source: %s\n", clock_source);
3249 if (!(hdspm->control_register & HDSPM_ClockModeMaster))
3250 system_clock_mode = "Slave";
3251 else
3252 system_clock_mode = "Master";
3253 snd_iprintf(buffer, "System Clock Mode: %s\n", system_clock_mode);
3254 4874
3255 pref_syncref = hdspm_pref_sync_ref(hdspm); 4875 pref_syncref = hdspm_pref_sync_ref(hdspm);
3256 if (pref_syncref == 0) 4876 if (pref_syncref == 0)
@@ -3274,38 +4894,108 @@ snd_hdspm_proc_read_aes32(struct snd_info_entry * entry,
3274 snd_iprintf(buffer, "--- Status:\n"); 4894 snd_iprintf(buffer, "--- Status:\n");
3275 4895
3276 snd_iprintf(buffer, "Word: %s Frequency: %d\n", 4896 snd_iprintf(buffer, "Word: %s Frequency: %d\n",
3277 (status & HDSPM_AES32_wcLock)? "Sync " : "No Lock", 4897 (status & HDSPM_AES32_wcLock) ? "Sync " : "No Lock",
3278 HDSPM_bit2freq((status >> HDSPM_AES32_wcFreq_bit) & 0xF)); 4898 HDSPM_bit2freq((status >> HDSPM_AES32_wcFreq_bit) & 0xF));
3279 4899
3280 for (x = 0; x < 8; x++) { 4900 for (x = 0; x < 8; x++) {
3281 snd_iprintf(buffer, "AES%d: %s Frequency: %d\n", 4901 snd_iprintf(buffer, "AES%d: %s Frequency: %d\n",
3282 x+1, 4902 x+1,
3283 (status2 & (HDSPM_LockAES >> x)) ? 4903 (status2 & (HDSPM_LockAES >> x)) ?
3284 "Sync ": "No Lock", 4904 "Sync " : "No Lock",
3285 HDSPM_bit2freq((timecode >> (4*x)) & 0xF)); 4905 HDSPM_bit2freq((timecode >> (4*x)) & 0xF));
3286 } 4906 }
3287 4907
3288 switch (hdspm_autosync_ref(hdspm)) { 4908 switch (hdspm_autosync_ref(hdspm)) {
3289 case HDSPM_AES32_AUTOSYNC_FROM_NONE: autosync_ref="None"; break; 4909 case HDSPM_AES32_AUTOSYNC_FROM_NONE:
3290 case HDSPM_AES32_AUTOSYNC_FROM_WORD: autosync_ref="Word Clock"; break; 4910 autosync_ref = "None"; break;
3291 case HDSPM_AES32_AUTOSYNC_FROM_AES1: autosync_ref="AES1"; break; 4911 case HDSPM_AES32_AUTOSYNC_FROM_WORD:
3292 case HDSPM_AES32_AUTOSYNC_FROM_AES2: autosync_ref="AES2"; break; 4912 autosync_ref = "Word Clock"; break;
3293 case HDSPM_AES32_AUTOSYNC_FROM_AES3: autosync_ref="AES3"; break; 4913 case HDSPM_AES32_AUTOSYNC_FROM_AES1:
3294 case HDSPM_AES32_AUTOSYNC_FROM_AES4: autosync_ref="AES4"; break; 4914 autosync_ref = "AES1"; break;
3295 case HDSPM_AES32_AUTOSYNC_FROM_AES5: autosync_ref="AES5"; break; 4915 case HDSPM_AES32_AUTOSYNC_FROM_AES2:
3296 case HDSPM_AES32_AUTOSYNC_FROM_AES6: autosync_ref="AES6"; break; 4916 autosync_ref = "AES2"; break;
3297 case HDSPM_AES32_AUTOSYNC_FROM_AES7: autosync_ref="AES7"; break; 4917 case HDSPM_AES32_AUTOSYNC_FROM_AES3:
3298 case HDSPM_AES32_AUTOSYNC_FROM_AES8: autosync_ref="AES8"; break; 4918 autosync_ref = "AES3"; break;
3299 default: autosync_ref = "---"; break; 4919 case HDSPM_AES32_AUTOSYNC_FROM_AES4:
4920 autosync_ref = "AES4"; break;
4921 case HDSPM_AES32_AUTOSYNC_FROM_AES5:
4922 autosync_ref = "AES5"; break;
4923 case HDSPM_AES32_AUTOSYNC_FROM_AES6:
4924 autosync_ref = "AES6"; break;
4925 case HDSPM_AES32_AUTOSYNC_FROM_AES7:
4926 autosync_ref = "AES7"; break;
4927 case HDSPM_AES32_AUTOSYNC_FROM_AES8:
4928 autosync_ref = "AES8"; break;
4929 default:
4930 autosync_ref = "---"; break;
3300 } 4931 }
3301 snd_iprintf(buffer, "AutoSync ref = %s\n", autosync_ref); 4932 snd_iprintf(buffer, "AutoSync ref = %s\n", autosync_ref);
3302 4933
3303 snd_iprintf(buffer, "\n"); 4934 snd_iprintf(buffer, "\n");
3304} 4935}
3305 4936
4937static void
4938snd_hdspm_proc_read_raydat(struct snd_info_entry *entry,
4939 struct snd_info_buffer *buffer)
4940{
4941 struct hdspm *hdspm = entry->private_data;
4942 unsigned int status1, status2, status3, control, i;
4943 unsigned int lock, sync;
4944
4945 status1 = hdspm_read(hdspm, HDSPM_RD_STATUS_1); /* s1 */
4946 status2 = hdspm_read(hdspm, HDSPM_RD_STATUS_2); /* freq */
4947 status3 = hdspm_read(hdspm, HDSPM_RD_STATUS_3); /* s2 */
4948
4949 control = hdspm->control_register;
4950
4951 snd_iprintf(buffer, "STATUS1: 0x%08x\n", status1);
4952 snd_iprintf(buffer, "STATUS2: 0x%08x\n", status2);
4953 snd_iprintf(buffer, "STATUS3: 0x%08x\n", status3);
4954
4955
4956 snd_iprintf(buffer, "\n*** CLOCK MODE\n\n");
4957
4958 snd_iprintf(buffer, "Clock mode : %s\n",
4959 (hdspm_system_clock_mode(hdspm) == 0) ? "master" : "slave");
4960 snd_iprintf(buffer, "System frequency: %d Hz\n",
4961 hdspm_get_system_sample_rate(hdspm));
4962
4963 snd_iprintf(buffer, "\n*** INPUT STATUS\n\n");
4964
4965 lock = 0x1;
4966 sync = 0x100;
4967
4968 for (i = 0; i < 8; i++) {
4969 snd_iprintf(buffer, "s1_input %d: Lock %d, Sync %d, Freq %s\n",
4970 i,
4971 (status1 & lock) ? 1 : 0,
4972 (status1 & sync) ? 1 : 0,
4973 texts_freq[(status2 >> (i * 4)) & 0xF]);
4974
4975 lock = lock<<1;
4976 sync = sync<<1;
4977 }
4978
4979 snd_iprintf(buffer, "WC input: Lock %d, Sync %d, Freq %s\n",
4980 (status1 & 0x1000000) ? 1 : 0,
4981 (status1 & 0x2000000) ? 1 : 0,
4982 texts_freq[(status1 >> 16) & 0xF]);
4983
4984 snd_iprintf(buffer, "TCO input: Lock %d, Sync %d, Freq %s\n",
4985 (status1 & 0x4000000) ? 1 : 0,
4986 (status1 & 0x8000000) ? 1 : 0,
4987 texts_freq[(status1 >> 20) & 0xF]);
4988
4989 snd_iprintf(buffer, "SYNC IN: Lock %d, Sync %d, Freq %s\n",
4990 (status3 & 0x400) ? 1 : 0,
4991 (status3 & 0x800) ? 1 : 0,
4992 texts_freq[(status2 >> 12) & 0xF]);
4993
4994}
4995
3306#ifdef CONFIG_SND_DEBUG 4996#ifdef CONFIG_SND_DEBUG
3307static void 4997static void
3308snd_hdspm_proc_read_debug(struct snd_info_entry * entry, 4998snd_hdspm_proc_read_debug(struct snd_info_entry *entry,
3309 struct snd_info_buffer *buffer) 4999 struct snd_info_buffer *buffer)
3310{ 5000{
3311 struct hdspm *hdspm = entry->private_data; 5001 struct hdspm *hdspm = entry->private_data;
@@ -3322,16 +5012,68 @@ snd_hdspm_proc_read_debug(struct snd_info_entry * entry,
3322#endif 5012#endif
3323 5013
3324 5014
5015static void snd_hdspm_proc_ports_in(struct snd_info_entry *entry,
5016 struct snd_info_buffer *buffer)
5017{
5018 struct hdspm *hdspm = entry->private_data;
5019 int i;
5020
5021 snd_iprintf(buffer, "# generated by hdspm\n");
5022
5023 for (i = 0; i < hdspm->max_channels_in; i++) {
5024 snd_iprintf(buffer, "%d=%s\n", i+1, hdspm->port_names_in[i]);
5025 }
5026}
3325 5027
3326static void __devinit snd_hdspm_proc_init(struct hdspm * hdspm) 5028static void snd_hdspm_proc_ports_out(struct snd_info_entry *entry,
5029 struct snd_info_buffer *buffer)
5030{
5031 struct hdspm *hdspm = entry->private_data;
5032 int i;
5033
5034 snd_iprintf(buffer, "# generated by hdspm\n");
5035
5036 for (i = 0; i < hdspm->max_channels_out; i++) {
5037 snd_iprintf(buffer, "%d=%s\n", i+1, hdspm->port_names_out[i]);
5038 }
5039}
5040
5041
5042static void __devinit snd_hdspm_proc_init(struct hdspm *hdspm)
3327{ 5043{
3328 struct snd_info_entry *entry; 5044 struct snd_info_entry *entry;
3329 5045
3330 if (!snd_card_proc_new(hdspm->card, "hdspm", &entry)) 5046 if (!snd_card_proc_new(hdspm->card, "hdspm", &entry)) {
3331 snd_info_set_text_ops(entry, hdspm, 5047 switch (hdspm->io_type) {
3332 hdspm->is_aes32 ? 5048 case AES32:
3333 snd_hdspm_proc_read_aes32 : 5049 snd_info_set_text_ops(entry, hdspm,
3334 snd_hdspm_proc_read_madi); 5050 snd_hdspm_proc_read_aes32);
5051 break;
5052 case MADI:
5053 snd_info_set_text_ops(entry, hdspm,
5054 snd_hdspm_proc_read_madi);
5055 break;
5056 case MADIface:
5057 /* snd_info_set_text_ops(entry, hdspm,
5058 snd_hdspm_proc_read_madiface); */
5059 break;
5060 case RayDAT:
5061 snd_info_set_text_ops(entry, hdspm,
5062 snd_hdspm_proc_read_raydat);
5063 break;
5064 case AIO:
5065 break;
5066 }
5067 }
5068
5069 if (!snd_card_proc_new(hdspm->card, "ports.in", &entry)) {
5070 snd_info_set_text_ops(entry, hdspm, snd_hdspm_proc_ports_in);
5071 }
5072
5073 if (!snd_card_proc_new(hdspm->card, "ports.out", &entry)) {
5074 snd_info_set_text_ops(entry, hdspm, snd_hdspm_proc_ports_out);
5075 }
5076
3335#ifdef CONFIG_SND_DEBUG 5077#ifdef CONFIG_SND_DEBUG
3336 /* debug file to read all hdspm registers */ 5078 /* debug file to read all hdspm registers */
3337 if (!snd_card_proc_new(hdspm->card, "debug", &entry)) 5079 if (!snd_card_proc_new(hdspm->card, "debug", &entry))
@@ -3341,47 +5083,48 @@ static void __devinit snd_hdspm_proc_init(struct hdspm * hdspm)
3341} 5083}
3342 5084
3343/*------------------------------------------------------------ 5085/*------------------------------------------------------------
3344 hdspm intitialize 5086 hdspm intitialize
3345 ------------------------------------------------------------*/ 5087 ------------------------------------------------------------*/
3346 5088
3347static int snd_hdspm_set_defaults(struct hdspm * hdspm) 5089static int snd_hdspm_set_defaults(struct hdspm * hdspm)
3348{ 5090{
3349 unsigned int i;
3350
3351 /* ASSUMPTION: hdspm->lock is either held, or there is no need to 5091 /* ASSUMPTION: hdspm->lock is either held, or there is no need to
3352 hold it (e.g. during module initialization). 5092 hold it (e.g. during module initialization).
3353 */ 5093 */
3354 5094
3355 /* set defaults: */ 5095 /* set defaults: */
3356 5096
3357 if (hdspm->is_aes32) 5097 hdspm->settings_register = 0;
5098
5099 switch (hdspm->io_type) {
5100 case MADI:
5101 case MADIface:
5102 hdspm->control_register =
5103 0x2 + 0x8 + 0x10 + 0x80 + 0x400 + 0x4000 + 0x1000000;
5104 break;
5105
5106 case RayDAT:
5107 case AIO:
5108 hdspm->settings_register = 0x1 + 0x1000;
5109 /* Magic values are: LAT_0, LAT_2, Master, freq1, tx64ch, inp_0,
5110 * line_out */
5111 hdspm->control_register =
5112 0x2 + 0x8 + 0x10 + 0x80 + 0x400 + 0x4000 + 0x1000000;
5113 break;
5114
5115 case AES32:
3358 hdspm->control_register = 5116 hdspm->control_register =
3359 HDSPM_ClockModeMaster | /* Master Cloack Mode on */ 5117 HDSPM_ClockModeMaster | /* Master Cloack Mode on */
3360 hdspm_encode_latency(7) | /* latency maximum = 5118 hdspm_encode_latency(7) | /* latency max=8192samples */
3361 * 8192 samples
3362 */
3363 HDSPM_SyncRef0 | /* AES1 is syncclock */ 5119 HDSPM_SyncRef0 | /* AES1 is syncclock */
3364 HDSPM_LineOut | /* Analog output in */ 5120 HDSPM_LineOut | /* Analog output in */
3365 HDSPM_Professional; /* Professional mode */ 5121 HDSPM_Professional; /* Professional mode */
3366 else 5122 break;
3367 hdspm->control_register = 5123 }
3368 HDSPM_ClockModeMaster | /* Master Cloack Mode on */
3369 hdspm_encode_latency(7) | /* latency maximum =
3370 * 8192 samples
3371 */
3372 HDSPM_InputCoaxial | /* Input Coax not Optical */
3373 HDSPM_SyncRef_MADI | /* Madi is syncclock */
3374 HDSPM_LineOut | /* Analog output in */
3375 HDSPM_TX_64ch | /* transmit in 64ch mode */
3376 HDSPM_AutoInp; /* AutoInput chossing (takeover) */
3377
3378 /* ! HDSPM_Frequency0|HDSPM_Frequency1 = 44.1khz */
3379 /* ! HDSPM_DoubleSpeed HDSPM_QuadSpeed = normal speed */
3380 /* ! HDSPM_clr_tms = do not clear bits in track marks */
3381 5124
3382 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register); 5125 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
3383 5126
3384 if (!hdspm->is_aes32) { 5127 if (AES32 == hdspm->io_type) {
3385 /* No control2 register for AES32 */ 5128 /* No control2 register for AES32 */
3386#ifdef SNDRV_BIG_ENDIAN 5129#ifdef SNDRV_BIG_ENDIAN
3387 hdspm->control2_register = HDSPM_BIGENDIAN_MODE; 5130 hdspm->control2_register = HDSPM_BIGENDIAN_MODE;
@@ -3397,57 +5140,59 @@ static int snd_hdspm_set_defaults(struct hdspm * hdspm)
3397 5140
3398 all_in_all_mixer(hdspm, 0 * UNITY_GAIN); 5141 all_in_all_mixer(hdspm, 0 * UNITY_GAIN);
3399 5142
3400 if (line_outs_monitor[hdspm->dev]) { 5143 if (hdspm->io_type == AIO || hdspm->io_type == RayDAT) {
3401 5144 hdspm_write(hdspm, HDSPM_WR_SETTINGS, hdspm->settings_register);
3402 snd_printk(KERN_INFO "HDSPM: "
3403 "sending all playback streams to line outs.\n");
3404
3405 for (i = 0; i < HDSPM_MIXER_CHANNELS; i++) {
3406 if (hdspm_write_pb_gain(hdspm, i, i, UNITY_GAIN))
3407 return -EIO;
3408 }
3409 } 5145 }
3410 5146
3411 /* set a default rate so that the channel map is set up. */ 5147 /* set a default rate so that the channel map is set up. */
3412 hdspm->channel_map = channel_map_madi_ss; 5148 hdspm_set_rate(hdspm, 48000, 1);
3413 hdspm_set_rate(hdspm, 44100, 1);
3414 5149
3415 return 0; 5150 return 0;
3416} 5151}
3417 5152
3418 5153
3419/*------------------------------------------------------------ 5154/*------------------------------------------------------------
3420 interrupt 5155 interrupt
3421 ------------------------------------------------------------*/ 5156 ------------------------------------------------------------*/
3422 5157
3423static irqreturn_t snd_hdspm_interrupt(int irq, void *dev_id) 5158static irqreturn_t snd_hdspm_interrupt(int irq, void *dev_id)
3424{ 5159{
3425 struct hdspm *hdspm = (struct hdspm *) dev_id; 5160 struct hdspm *hdspm = (struct hdspm *) dev_id;
3426 unsigned int status; 5161 unsigned int status;
3427 int audio; 5162 int i, audio, midi, schedule = 0;
3428 int midi0; 5163 /* cycles_t now; */
3429 int midi1;
3430 unsigned int midi0status;
3431 unsigned int midi1status;
3432 int schedule = 0;
3433 5164
3434 status = hdspm_read(hdspm, HDSPM_statusRegister); 5165 status = hdspm_read(hdspm, HDSPM_statusRegister);
3435 5166
3436 audio = status & HDSPM_audioIRQPending; 5167 audio = status & HDSPM_audioIRQPending;
3437 midi0 = status & HDSPM_midi0IRQPending; 5168 midi = status & (HDSPM_midi0IRQPending | HDSPM_midi1IRQPending |
3438 midi1 = status & HDSPM_midi1IRQPending; 5169 HDSPM_midi2IRQPending | HDSPM_midi3IRQPending);
5170
5171 /* now = get_cycles(); */
5172 /**
5173 * LAT_2..LAT_0 period counter (win) counter (mac)
5174 * 6 4096 ~256053425 ~514672358
5175 * 5 2048 ~128024983 ~257373821
5176 * 4 1024 ~64023706 ~128718089
5177 * 3 512 ~32005945 ~64385999
5178 * 2 256 ~16003039 ~32260176
5179 * 1 128 ~7998738 ~16194507
5180 * 0 64 ~3998231 ~8191558
5181 **/
5182 /*
5183 snd_printk(KERN_INFO "snd_hdspm_interrupt %llu @ %llx\n",
5184 now-hdspm->last_interrupt, status & 0xFFC0);
5185 hdspm->last_interrupt = now;
5186 */
3439 5187
3440 if (!audio && !midi0 && !midi1) 5188 if (!audio && !midi)
3441 return IRQ_NONE; 5189 return IRQ_NONE;
3442 5190
3443 hdspm_write(hdspm, HDSPM_interruptConfirmation, 0); 5191 hdspm_write(hdspm, HDSPM_interruptConfirmation, 0);
3444 hdspm->irq_count++; 5192 hdspm->irq_count++;
3445 5193
3446 midi0status = hdspm_read(hdspm, HDSPM_midiStatusIn0) & 0xff;
3447 midi1status = hdspm_read(hdspm, HDSPM_midiStatusIn1) & 0xff;
3448 5194
3449 if (audio) { 5195 if (audio) {
3450
3451 if (hdspm->capture_substream) 5196 if (hdspm->capture_substream)
3452 snd_pcm_period_elapsed(hdspm->capture_substream); 5197 snd_pcm_period_elapsed(hdspm->capture_substream);
3453 5198
@@ -3455,118 +5200,44 @@ static irqreturn_t snd_hdspm_interrupt(int irq, void *dev_id)
3455 snd_pcm_period_elapsed(hdspm->playback_substream); 5200 snd_pcm_period_elapsed(hdspm->playback_substream);
3456 } 5201 }
3457 5202
3458 if (midi0 && midi0status) { 5203 if (midi) {
3459 /* we disable interrupts for this input until processing 5204 i = 0;
3460 * is done 5205 while (i < hdspm->midiPorts) {
3461 */ 5206 if ((hdspm_read(hdspm,
3462 hdspm->control_register &= ~HDSPM_Midi0InterruptEnable; 5207 hdspm->midi[i].statusIn) & 0xff) &&
3463 hdspm_write(hdspm, HDSPM_controlRegister, 5208 (status & hdspm->midi[i].irq)) {
3464 hdspm->control_register); 5209 /* we disable interrupts for this input until
3465 hdspm->midi[0].pending = 1; 5210 * processing is done
3466 schedule = 1; 5211 */
3467 } 5212 hdspm->control_register &= ~hdspm->midi[i].ie;
3468 if (midi1 && midi1status) { 5213 hdspm_write(hdspm, HDSPM_controlRegister,
3469 /* we disable interrupts for this input until processing 5214 hdspm->control_register);
3470 * is done 5215 hdspm->midi[i].pending = 1;
3471 */ 5216 schedule = 1;
3472 hdspm->control_register &= ~HDSPM_Midi1InterruptEnable; 5217 }
3473 hdspm_write(hdspm, HDSPM_controlRegister, 5218
3474 hdspm->control_register); 5219 i++;
3475 hdspm->midi[1].pending = 1; 5220 }
3476 schedule = 1; 5221
5222 if (schedule)
5223 tasklet_hi_schedule(&hdspm->midi_tasklet);
3477 } 5224 }
3478 if (schedule) 5225
3479 tasklet_schedule(&hdspm->midi_tasklet);
3480 return IRQ_HANDLED; 5226 return IRQ_HANDLED;
3481} 5227}
3482 5228
3483/*------------------------------------------------------------ 5229/*------------------------------------------------------------
3484 pcm interface 5230 pcm interface
3485 ------------------------------------------------------------*/ 5231 ------------------------------------------------------------*/
3486 5232
3487 5233
3488static snd_pcm_uframes_t snd_hdspm_hw_pointer(struct snd_pcm_substream * 5234static snd_pcm_uframes_t snd_hdspm_hw_pointer(struct snd_pcm_substream
3489 substream) 5235 *substream)
3490{ 5236{
3491 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 5237 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
3492 return hdspm_hw_pointer(hdspm); 5238 return hdspm_hw_pointer(hdspm);
3493} 5239}
3494 5240
3495static char *hdspm_channel_buffer_location(struct hdspm * hdspm,
3496 int stream, int channel)
3497{
3498 int mapped_channel;
3499
3500 if (snd_BUG_ON(channel < 0 || channel >= HDSPM_MAX_CHANNELS))
3501 return NULL;
3502
3503 mapped_channel = hdspm->channel_map[channel];
3504 if (mapped_channel < 0)
3505 return NULL;
3506
3507 if (stream == SNDRV_PCM_STREAM_CAPTURE)
3508 return hdspm->capture_buffer +
3509 mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES;
3510 else
3511 return hdspm->playback_buffer +
3512 mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES;
3513}
3514
3515
3516/* dont know why need it ??? */
3517static int snd_hdspm_playback_copy(struct snd_pcm_substream *substream,
3518 int channel, snd_pcm_uframes_t pos,
3519 void __user *src, snd_pcm_uframes_t count)
3520{
3521 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
3522 char *channel_buf;
3523
3524 if (snd_BUG_ON(pos + count > HDSPM_CHANNEL_BUFFER_BYTES / 4))
3525 return -EINVAL;
3526
3527 channel_buf =
3528 hdspm_channel_buffer_location(hdspm, substream->pstr->stream,
3529 channel);
3530
3531 if (snd_BUG_ON(!channel_buf))
3532 return -EIO;
3533
3534 return copy_from_user(channel_buf + pos * 4, src, count * 4);
3535}
3536
3537static int snd_hdspm_capture_copy(struct snd_pcm_substream *substream,
3538 int channel, snd_pcm_uframes_t pos,
3539 void __user *dst, snd_pcm_uframes_t count)
3540{
3541 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
3542 char *channel_buf;
3543
3544 if (snd_BUG_ON(pos + count > HDSPM_CHANNEL_BUFFER_BYTES / 4))
3545 return -EINVAL;
3546
3547 channel_buf =
3548 hdspm_channel_buffer_location(hdspm, substream->pstr->stream,
3549 channel);
3550 if (snd_BUG_ON(!channel_buf))
3551 return -EIO;
3552 return copy_to_user(dst, channel_buf + pos * 4, count * 4);
3553}
3554
3555static int snd_hdspm_hw_silence(struct snd_pcm_substream *substream,
3556 int channel, snd_pcm_uframes_t pos,
3557 snd_pcm_uframes_t count)
3558{
3559 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
3560 char *channel_buf;
3561
3562 channel_buf =
3563 hdspm_channel_buffer_location(hdspm, substream->pstr->stream,
3564 channel);
3565 if (snd_BUG_ON(!channel_buf))
3566 return -EIO;
3567 memset(channel_buf + pos * 4, 0, count * 4);
3568 return 0;
3569}
3570 5241
3571static int snd_hdspm_reset(struct snd_pcm_substream *substream) 5242static int snd_hdspm_reset(struct snd_pcm_substream *substream)
3572{ 5243{
@@ -3589,7 +5260,7 @@ static int snd_hdspm_reset(struct snd_pcm_substream *substream)
3589 snd_pcm_group_for_each_entry(s, substream) { 5260 snd_pcm_group_for_each_entry(s, substream) {
3590 if (s == other) { 5261 if (s == other) {
3591 oruntime->status->hw_ptr = 5262 oruntime->status->hw_ptr =
3592 runtime->status->hw_ptr; 5263 runtime->status->hw_ptr;
3593 break; 5264 break;
3594 } 5265 }
3595 } 5266 }
@@ -3621,19 +5292,19 @@ static int snd_hdspm_hw_params(struct snd_pcm_substream *substream,
3621 /* The other stream is open, and not by the same 5292 /* The other stream is open, and not by the same
3622 task as this one. Make sure that the parameters 5293 task as this one. Make sure that the parameters
3623 that matter are the same. 5294 that matter are the same.
3624 */ 5295 */
3625 5296
3626 if (params_rate(params) != hdspm->system_sample_rate) { 5297 if (params_rate(params) != hdspm->system_sample_rate) {
3627 spin_unlock_irq(&hdspm->lock); 5298 spin_unlock_irq(&hdspm->lock);
3628 _snd_pcm_hw_param_setempty(params, 5299 _snd_pcm_hw_param_setempty(params,
3629 SNDRV_PCM_HW_PARAM_RATE); 5300 SNDRV_PCM_HW_PARAM_RATE);
3630 return -EBUSY; 5301 return -EBUSY;
3631 } 5302 }
3632 5303
3633 if (params_period_size(params) != hdspm->period_bytes / 4) { 5304 if (params_period_size(params) != hdspm->period_bytes / 4) {
3634 spin_unlock_irq(&hdspm->lock); 5305 spin_unlock_irq(&hdspm->lock);
3635 _snd_pcm_hw_param_setempty(params, 5306 _snd_pcm_hw_param_setempty(params,
3636 SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 5307 SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3637 return -EBUSY; 5308 return -EBUSY;
3638 } 5309 }
3639 5310
@@ -3646,18 +5317,20 @@ static int snd_hdspm_hw_params(struct snd_pcm_substream *substream,
3646 spin_lock_irq(&hdspm->lock); 5317 spin_lock_irq(&hdspm->lock);
3647 err = hdspm_set_rate(hdspm, params_rate(params), 0); 5318 err = hdspm_set_rate(hdspm, params_rate(params), 0);
3648 if (err < 0) { 5319 if (err < 0) {
5320 snd_printk(KERN_INFO "err on hdspm_set_rate: %d\n", err);
3649 spin_unlock_irq(&hdspm->lock); 5321 spin_unlock_irq(&hdspm->lock);
3650 _snd_pcm_hw_param_setempty(params, 5322 _snd_pcm_hw_param_setempty(params,
3651 SNDRV_PCM_HW_PARAM_RATE); 5323 SNDRV_PCM_HW_PARAM_RATE);
3652 return err; 5324 return err;
3653 } 5325 }
3654 spin_unlock_irq(&hdspm->lock); 5326 spin_unlock_irq(&hdspm->lock);
3655 5327
3656 err = hdspm_set_interrupt_interval(hdspm, 5328 err = hdspm_set_interrupt_interval(hdspm,
3657 params_period_size(params)); 5329 params_period_size(params));
3658 if (err < 0) { 5330 if (err < 0) {
5331 snd_printk(KERN_INFO "err on hdspm_set_interrupt_interval: %d\n", err);
3659 _snd_pcm_hw_param_setempty(params, 5332 _snd_pcm_hw_param_setempty(params,
3660 SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 5333 SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3661 return err; 5334 return err;
3662 } 5335 }
3663 5336
@@ -3667,10 +5340,13 @@ static int snd_hdspm_hw_params(struct snd_pcm_substream *substream,
3667 /* malloc all buffer even if not enabled to get sure */ 5340 /* malloc all buffer even if not enabled to get sure */
3668 /* Update for MADI rev 204: we need to allocate for all channels, 5341 /* Update for MADI rev 204: we need to allocate for all channels,
3669 * otherwise it doesn't work at 96kHz */ 5342 * otherwise it doesn't work at 96kHz */
5343
3670 err = 5344 err =
3671 snd_pcm_lib_malloc_pages(substream, HDSPM_DMA_AREA_BYTES); 5345 snd_pcm_lib_malloc_pages(substream, HDSPM_DMA_AREA_BYTES);
3672 if (err < 0) 5346 if (err < 0) {
5347 snd_printk(KERN_INFO "err on snd_pcm_lib_malloc_pages: %d\n", err);
3673 return err; 5348 return err;
5349 }
3674 5350
3675 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 5351 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3676 5352
@@ -3681,7 +5357,7 @@ static int snd_hdspm_hw_params(struct snd_pcm_substream *substream,
3681 snd_hdspm_enable_out(hdspm, i, 1); 5357 snd_hdspm_enable_out(hdspm, i, 1);
3682 5358
3683 hdspm->playback_buffer = 5359 hdspm->playback_buffer =
3684 (unsigned char *) substream->runtime->dma_area; 5360 (unsigned char *) substream->runtime->dma_area;
3685 snd_printdd("Allocated sample buffer for playback at %p\n", 5361 snd_printdd("Allocated sample buffer for playback at %p\n",
3686 hdspm->playback_buffer); 5362 hdspm->playback_buffer);
3687 } else { 5363 } else {
@@ -3692,23 +5368,40 @@ static int snd_hdspm_hw_params(struct snd_pcm_substream *substream,
3692 snd_hdspm_enable_in(hdspm, i, 1); 5368 snd_hdspm_enable_in(hdspm, i, 1);
3693 5369
3694 hdspm->capture_buffer = 5370 hdspm->capture_buffer =
3695 (unsigned char *) substream->runtime->dma_area; 5371 (unsigned char *) substream->runtime->dma_area;
3696 snd_printdd("Allocated sample buffer for capture at %p\n", 5372 snd_printdd("Allocated sample buffer for capture at %p\n",
3697 hdspm->capture_buffer); 5373 hdspm->capture_buffer);
3698 } 5374 }
5375
3699 /* 5376 /*
3700 snd_printdd("Allocated sample buffer for %s at 0x%08X\n", 5377 snd_printdd("Allocated sample buffer for %s at 0x%08X\n",
3701 substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 5378 substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
3702 "playback" : "capture", 5379 "playback" : "capture",
3703 snd_pcm_sgbuf_get_addr(substream, 0)); 5380 snd_pcm_sgbuf_get_addr(substream, 0));
3704 */ 5381 */
3705 /* 5382 /*
3706 snd_printdd("set_hwparams: %s %d Hz, %d channels, bs = %d\n", 5383 snd_printdd("set_hwparams: %s %d Hz, %d channels, bs = %d\n",
3707 substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 5384 substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
3708 "playback" : "capture", 5385 "playback" : "capture",
3709 params_rate(params), params_channels(params), 5386 params_rate(params), params_channels(params),
3710 params_buffer_size(params)); 5387 params_buffer_size(params));
3711 */ 5388 */
5389
5390
5391 /* Switch to native float format if requested */
5392 if (SNDRV_PCM_FORMAT_FLOAT_LE == params_format(params)) {
5393 if (!(hdspm->control_register & HDSPe_FLOAT_FORMAT))
5394 snd_printk(KERN_INFO "hdspm: Switching to native 32bit LE float format.\n");
5395
5396 hdspm->control_register |= HDSPe_FLOAT_FORMAT;
5397 } else if (SNDRV_PCM_FORMAT_S32_LE == params_format(params)) {
5398 if (hdspm->control_register & HDSPe_FLOAT_FORMAT)
5399 snd_printk(KERN_INFO "hdspm: Switching to native 32bit LE integer format.\n");
5400
5401 hdspm->control_register &= ~HDSPe_FLOAT_FORMAT;
5402 }
5403 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
5404
3712 return 0; 5405 return 0;
3713} 5406}
3714 5407
@@ -3719,14 +5412,14 @@ static int snd_hdspm_hw_free(struct snd_pcm_substream *substream)
3719 5412
3720 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 5413 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3721 5414
3722 /* params_channels(params) should be enough, 5415 /* params_channels(params) should be enough,
3723 but to get sure in case of error */ 5416 but to get sure in case of error */
3724 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i) 5417 for (i = 0; i < hdspm->max_channels_out; ++i)
3725 snd_hdspm_enable_out(hdspm, i, 0); 5418 snd_hdspm_enable_out(hdspm, i, 0);
3726 5419
3727 hdspm->playback_buffer = NULL; 5420 hdspm->playback_buffer = NULL;
3728 } else { 5421 } else {
3729 for (i = 0; i < HDSPM_MAX_CHANNELS; ++i) 5422 for (i = 0; i < hdspm->max_channels_in; ++i)
3730 snd_hdspm_enable_in(hdspm, i, 0); 5423 snd_hdspm_enable_in(hdspm, i, 0);
3731 5424
3732 hdspm->capture_buffer = NULL; 5425 hdspm->capture_buffer = NULL;
@@ -3738,37 +5431,58 @@ static int snd_hdspm_hw_free(struct snd_pcm_substream *substream)
3738 return 0; 5431 return 0;
3739} 5432}
3740 5433
5434
3741static int snd_hdspm_channel_info(struct snd_pcm_substream *substream, 5435static int snd_hdspm_channel_info(struct snd_pcm_substream *substream,
3742 struct snd_pcm_channel_info * info) 5436 struct snd_pcm_channel_info *info)
3743{ 5437{
3744 struct hdspm *hdspm = snd_pcm_substream_chip(substream); 5438 struct hdspm *hdspm = snd_pcm_substream_chip(substream);
3745 int mapped_channel;
3746 5439
3747 if (snd_BUG_ON(info->channel >= HDSPM_MAX_CHANNELS)) 5440 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3748 return -EINVAL; 5441 if (snd_BUG_ON(info->channel >= hdspm->max_channels_out)) {
5442 snd_printk(KERN_INFO "snd_hdspm_channel_info: output channel out of range (%d)\n", info->channel);
5443 return -EINVAL;
5444 }
3749 5445
3750 mapped_channel = hdspm->channel_map[info->channel]; 5446 if (hdspm->channel_map_out[info->channel] < 0) {
3751 if (mapped_channel < 0) 5447 snd_printk(KERN_INFO "snd_hdspm_channel_info: output channel %d mapped out\n", info->channel);
3752 return -EINVAL; 5448 return -EINVAL;
5449 }
5450
5451 info->offset = hdspm->channel_map_out[info->channel] *
5452 HDSPM_CHANNEL_BUFFER_BYTES;
5453 } else {
5454 if (snd_BUG_ON(info->channel >= hdspm->max_channels_in)) {
5455 snd_printk(KERN_INFO "snd_hdspm_channel_info: input channel out of range (%d)\n", info->channel);
5456 return -EINVAL;
5457 }
5458
5459 if (hdspm->channel_map_in[info->channel] < 0) {
5460 snd_printk(KERN_INFO "snd_hdspm_channel_info: input channel %d mapped out\n", info->channel);
5461 return -EINVAL;
5462 }
5463
5464 info->offset = hdspm->channel_map_in[info->channel] *
5465 HDSPM_CHANNEL_BUFFER_BYTES;
5466 }
3753 5467
3754 info->offset = mapped_channel * HDSPM_CHANNEL_BUFFER_BYTES;
3755 info->first = 0; 5468 info->first = 0;
3756 info->step = 32; 5469 info->step = 32;
3757 return 0; 5470 return 0;
3758} 5471}
3759 5472
5473
3760static int snd_hdspm_ioctl(struct snd_pcm_substream *substream, 5474static int snd_hdspm_ioctl(struct snd_pcm_substream *substream,
3761 unsigned int cmd, void *arg) 5475 unsigned int cmd, void *arg)
3762{ 5476{
3763 switch (cmd) { 5477 switch (cmd) {
3764 case SNDRV_PCM_IOCTL1_RESET: 5478 case SNDRV_PCM_IOCTL1_RESET:
3765 return snd_hdspm_reset(substream); 5479 return snd_hdspm_reset(substream);
3766 5480
3767 case SNDRV_PCM_IOCTL1_CHANNEL_INFO: 5481 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
3768 { 5482 {
3769 struct snd_pcm_channel_info *info = arg; 5483 struct snd_pcm_channel_info *info = arg;
3770 return snd_hdspm_channel_info(substream, info); 5484 return snd_hdspm_channel_info(substream, info);
3771 } 5485 }
3772 default: 5486 default:
3773 break; 5487 break;
3774 } 5488 }
@@ -3815,19 +5529,19 @@ static int snd_hdspm_trigger(struct snd_pcm_substream *substream, int cmd)
3815 } 5529 }
3816 if (cmd == SNDRV_PCM_TRIGGER_START) { 5530 if (cmd == SNDRV_PCM_TRIGGER_START) {
3817 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) 5531 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK))
3818 && substream->stream == 5532 && substream->stream ==
3819 SNDRV_PCM_STREAM_CAPTURE) 5533 SNDRV_PCM_STREAM_CAPTURE)
3820 hdspm_silence_playback(hdspm); 5534 hdspm_silence_playback(hdspm);
3821 } else { 5535 } else {
3822 if (running && 5536 if (running &&
3823 substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 5537 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3824 hdspm_silence_playback(hdspm); 5538 hdspm_silence_playback(hdspm);
3825 } 5539 }
3826 } else { 5540 } else {
3827 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 5541 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
3828 hdspm_silence_playback(hdspm); 5542 hdspm_silence_playback(hdspm);
3829 } 5543 }
3830 _ok: 5544_ok:
3831 snd_pcm_trigger_done(substream, substream); 5545 snd_pcm_trigger_done(substream, substream);
3832 if (!hdspm->running && running) 5546 if (!hdspm->running && running)
3833 hdspm_start_audio(hdspm); 5547 hdspm_start_audio(hdspm);
@@ -3844,8 +5558,18 @@ static int snd_hdspm_prepare(struct snd_pcm_substream *substream)
3844 return 0; 5558 return 0;
3845} 5559}
3846 5560
3847static unsigned int period_sizes[] = 5561static unsigned int period_sizes_old[] = {
3848 { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; 5562 64, 128, 256, 512, 1024, 2048, 4096
5563};
5564
5565static unsigned int period_sizes_new[] = {
5566 32, 64, 128, 256, 512, 1024, 2048, 4096
5567};
5568
5569/* RayDAT and AIO always have a buffer of 16384 samples per channel */
5570static unsigned int raydat_aio_buffer_sizes[] = {
5571 16384
5572};
3849 5573
3850static struct snd_pcm_hardware snd_hdspm_playback_subinfo = { 5574static struct snd_pcm_hardware snd_hdspm_playback_subinfo = {
3851 .info = (SNDRV_PCM_INFO_MMAP | 5575 .info = (SNDRV_PCM_INFO_MMAP |
@@ -3866,9 +5590,9 @@ static struct snd_pcm_hardware snd_hdspm_playback_subinfo = {
3866 .buffer_bytes_max = 5590 .buffer_bytes_max =
3867 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS, 5591 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS,
3868 .period_bytes_min = (64 * 4), 5592 .period_bytes_min = (64 * 4),
3869 .period_bytes_max = (8192 * 4) * HDSPM_MAX_CHANNELS, 5593 .period_bytes_max = (4096 * 4) * HDSPM_MAX_CHANNELS,
3870 .periods_min = 2, 5594 .periods_min = 2,
3871 .periods_max = 2, 5595 .periods_max = 512,
3872 .fifo_size = 0 5596 .fifo_size = 0
3873}; 5597};
3874 5598
@@ -3891,20 +5615,66 @@ static struct snd_pcm_hardware snd_hdspm_capture_subinfo = {
3891 .buffer_bytes_max = 5615 .buffer_bytes_max =
3892 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS, 5616 HDSPM_CHANNEL_BUFFER_BYTES * HDSPM_MAX_CHANNELS,
3893 .period_bytes_min = (64 * 4), 5617 .period_bytes_min = (64 * 4),
3894 .period_bytes_max = (8192 * 4) * HDSPM_MAX_CHANNELS, 5618 .period_bytes_max = (4096 * 4) * HDSPM_MAX_CHANNELS,
3895 .periods_min = 2, 5619 .periods_min = 2,
3896 .periods_max = 2, 5620 .periods_max = 512,
3897 .fifo_size = 0 5621 .fifo_size = 0
3898}; 5622};
3899 5623
3900static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = { 5624static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes_old = {
3901 .count = ARRAY_SIZE(period_sizes), 5625 .count = ARRAY_SIZE(period_sizes_old),
3902 .list = period_sizes, 5626 .list = period_sizes_old,
3903 .mask = 0 5627 .mask = 0
3904}; 5628};
3905 5629
5630static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes_new = {
5631 .count = ARRAY_SIZE(period_sizes_new),
5632 .list = period_sizes_new,
5633 .mask = 0
5634};
3906 5635
3907static int snd_hdspm_hw_rule_channels_rate(struct snd_pcm_hw_params *params, 5636static struct snd_pcm_hw_constraint_list hw_constraints_raydat_io_buffer = {
5637 .count = ARRAY_SIZE(raydat_aio_buffer_sizes),
5638 .list = raydat_aio_buffer_sizes,
5639 .mask = 0
5640};
5641
5642static int snd_hdspm_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
5643 struct snd_pcm_hw_rule *rule)
5644{
5645 struct hdspm *hdspm = rule->private;
5646 struct snd_interval *c =
5647 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
5648 struct snd_interval *r =
5649 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
5650
5651 if (r->min > 96000 && r->max <= 192000) {
5652 struct snd_interval t = {
5653 .min = hdspm->qs_in_channels,
5654 .max = hdspm->qs_in_channels,
5655 .integer = 1,
5656 };
5657 return snd_interval_refine(c, &t);
5658 } else if (r->min > 48000 && r->max <= 96000) {
5659 struct snd_interval t = {
5660 .min = hdspm->ds_in_channels,
5661 .max = hdspm->ds_in_channels,
5662 .integer = 1,
5663 };
5664 return snd_interval_refine(c, &t);
5665 } else if (r->max < 64000) {
5666 struct snd_interval t = {
5667 .min = hdspm->ss_in_channels,
5668 .max = hdspm->ss_in_channels,
5669 .integer = 1,
5670 };
5671 return snd_interval_refine(c, &t);
5672 }
5673
5674 return 0;
5675}
5676
5677static int snd_hdspm_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
3908 struct snd_pcm_hw_rule * rule) 5678 struct snd_pcm_hw_rule * rule)
3909{ 5679{
3910 struct hdspm *hdspm = rule->private; 5680 struct hdspm *hdspm = rule->private;
@@ -3913,25 +5683,33 @@ static int snd_hdspm_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
3913 struct snd_interval *r = 5683 struct snd_interval *r =
3914 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 5684 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
3915 5685
3916 if (r->min > 48000 && r->max <= 96000) { 5686 if (r->min > 96000 && r->max <= 192000) {
3917 struct snd_interval t = { 5687 struct snd_interval t = {
3918 .min = hdspm->ds_channels, 5688 .min = hdspm->qs_out_channels,
3919 .max = hdspm->ds_channels, 5689 .max = hdspm->qs_out_channels,
5690 .integer = 1,
5691 };
5692 return snd_interval_refine(c, &t);
5693 } else if (r->min > 48000 && r->max <= 96000) {
5694 struct snd_interval t = {
5695 .min = hdspm->ds_out_channels,
5696 .max = hdspm->ds_out_channels,
3920 .integer = 1, 5697 .integer = 1,
3921 }; 5698 };
3922 return snd_interval_refine(c, &t); 5699 return snd_interval_refine(c, &t);
3923 } else if (r->max < 64000) { 5700 } else if (r->max < 64000) {
3924 struct snd_interval t = { 5701 struct snd_interval t = {
3925 .min = hdspm->ss_channels, 5702 .min = hdspm->ss_out_channels,
3926 .max = hdspm->ss_channels, 5703 .max = hdspm->ss_out_channels,
3927 .integer = 1, 5704 .integer = 1,
3928 }; 5705 };
3929 return snd_interval_refine(c, &t); 5706 return snd_interval_refine(c, &t);
5707 } else {
3930 } 5708 }
3931 return 0; 5709 return 0;
3932} 5710}
3933 5711
3934static int snd_hdspm_hw_rule_rate_channels(struct snd_pcm_hw_params *params, 5712static int snd_hdspm_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
3935 struct snd_pcm_hw_rule * rule) 5713 struct snd_pcm_hw_rule * rule)
3936{ 5714{
3937 struct hdspm *hdspm = rule->private; 5715 struct hdspm *hdspm = rule->private;
@@ -3940,42 +5718,92 @@ static int snd_hdspm_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
3940 struct snd_interval *r = 5718 struct snd_interval *r =
3941 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 5719 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
3942 5720
3943 if (c->min >= hdspm->ss_channels) { 5721 if (c->min >= hdspm->ss_in_channels) {
3944 struct snd_interval t = { 5722 struct snd_interval t = {
3945 .min = 32000, 5723 .min = 32000,
3946 .max = 48000, 5724 .max = 48000,
3947 .integer = 1, 5725 .integer = 1,
3948 }; 5726 };
3949 return snd_interval_refine(r, &t); 5727 return snd_interval_refine(r, &t);
3950 } else if (c->max <= hdspm->ds_channels) { 5728 } else if (c->max <= hdspm->qs_in_channels) {
5729 struct snd_interval t = {
5730 .min = 128000,
5731 .max = 192000,
5732 .integer = 1,
5733 };
5734 return snd_interval_refine(r, &t);
5735 } else if (c->max <= hdspm->ds_in_channels) {
3951 struct snd_interval t = { 5736 struct snd_interval t = {
3952 .min = 64000, 5737 .min = 64000,
3953 .max = 96000, 5738 .max = 96000,
3954 .integer = 1, 5739 .integer = 1,
3955 }; 5740 };
5741 return snd_interval_refine(r, &t);
5742 }
3956 5743
5744 return 0;
5745}
5746static int snd_hdspm_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
5747 struct snd_pcm_hw_rule *rule)
5748{
5749 struct hdspm *hdspm = rule->private;
5750 struct snd_interval *c =
5751 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
5752 struct snd_interval *r =
5753 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
5754
5755 if (c->min >= hdspm->ss_out_channels) {
5756 struct snd_interval t = {
5757 .min = 32000,
5758 .max = 48000,
5759 .integer = 1,
5760 };
5761 return snd_interval_refine(r, &t);
5762 } else if (c->max <= hdspm->qs_out_channels) {
5763 struct snd_interval t = {
5764 .min = 128000,
5765 .max = 192000,
5766 .integer = 1,
5767 };
5768 return snd_interval_refine(r, &t);
5769 } else if (c->max <= hdspm->ds_out_channels) {
5770 struct snd_interval t = {
5771 .min = 64000,
5772 .max = 96000,
5773 .integer = 1,
5774 };
3957 return snd_interval_refine(r, &t); 5775 return snd_interval_refine(r, &t);
3958 } 5776 }
5777
3959 return 0; 5778 return 0;
3960} 5779}
3961 5780
3962static int snd_hdspm_hw_rule_channels(struct snd_pcm_hw_params *params, 5781static int snd_hdspm_hw_rule_in_channels(struct snd_pcm_hw_params *params,
3963 struct snd_pcm_hw_rule *rule) 5782 struct snd_pcm_hw_rule *rule)
3964{ 5783{
3965 unsigned int list[3]; 5784 unsigned int list[3];
3966 struct hdspm *hdspm = rule->private; 5785 struct hdspm *hdspm = rule->private;
3967 struct snd_interval *c = hw_param_interval(params, 5786 struct snd_interval *c = hw_param_interval(params,
3968 SNDRV_PCM_HW_PARAM_CHANNELS); 5787 SNDRV_PCM_HW_PARAM_CHANNELS);
3969 if (hdspm->is_aes32) { 5788
3970 list[0] = hdspm->qs_channels; 5789 list[0] = hdspm->qs_in_channels;
3971 list[1] = hdspm->ds_channels; 5790 list[1] = hdspm->ds_in_channels;
3972 list[2] = hdspm->ss_channels; 5791 list[2] = hdspm->ss_in_channels;
3973 return snd_interval_list(c, 3, list, 0); 5792 return snd_interval_list(c, 3, list, 0);
3974 } else { 5793}
3975 list[0] = hdspm->ds_channels; 5794
3976 list[1] = hdspm->ss_channels; 5795static int snd_hdspm_hw_rule_out_channels(struct snd_pcm_hw_params *params,
3977 return snd_interval_list(c, 2, list, 0); 5796 struct snd_pcm_hw_rule *rule)
3978 } 5797{
5798 unsigned int list[3];
5799 struct hdspm *hdspm = rule->private;
5800 struct snd_interval *c = hw_param_interval(params,
5801 SNDRV_PCM_HW_PARAM_CHANNELS);
5802
5803 list[0] = hdspm->qs_out_channels;
5804 list[1] = hdspm->ds_out_channels;
5805 list[2] = hdspm->ss_out_channels;
5806 return snd_interval_list(c, 3, list, 0);
3979} 5807}
3980 5808
3981 5809
@@ -3999,6 +5827,7 @@ static int snd_hdspm_playback_open(struct snd_pcm_substream *substream)
3999 5827
4000 snd_pcm_set_sync(substream); 5828 snd_pcm_set_sync(substream);
4001 5829
5830
4002 runtime->hw = snd_hdspm_playback_subinfo; 5831 runtime->hw = snd_hdspm_playback_subinfo;
4003 5832
4004 if (hdspm->capture_substream == NULL) 5833 if (hdspm->capture_substream == NULL)
@@ -4011,25 +5840,41 @@ static int snd_hdspm_playback_open(struct snd_pcm_substream *substream)
4011 5840
4012 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 5841 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4013 5842
4014 snd_pcm_hw_constraint_list(runtime, 0, 5843 switch (hdspm->io_type) {
4015 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 5844 case AIO:
4016 &hw_constraints_period_sizes); 5845 case RayDAT:
5846 snd_pcm_hw_constraint_list(runtime, 0,
5847 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
5848 &hw_constraints_period_sizes_new);
5849 snd_pcm_hw_constraint_list(runtime, 0,
5850 SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
5851 &hw_constraints_raydat_io_buffer);
4017 5852
4018 if (hdspm->is_aes32) { 5853 break;
5854
5855 default:
5856 snd_pcm_hw_constraint_list(runtime, 0,
5857 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
5858 &hw_constraints_period_sizes_old);
5859 }
5860
5861 if (AES32 == hdspm->io_type) {
4019 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 5862 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4020 &hdspm_hw_constraints_aes32_sample_rates); 5863 &hdspm_hw_constraints_aes32_sample_rates);
4021 } else { 5864 } else {
4022 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4023 snd_hdspm_hw_rule_channels, hdspm,
4024 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4025 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4026 snd_hdspm_hw_rule_channels_rate, hdspm,
4027 SNDRV_PCM_HW_PARAM_RATE, -1);
4028
4029 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 5865 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4030 snd_hdspm_hw_rule_rate_channels, hdspm, 5866 snd_hdspm_hw_rule_rate_out_channels, hdspm,
4031 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 5867 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4032 } 5868 }
5869
5870 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
5871 snd_hdspm_hw_rule_out_channels, hdspm,
5872 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
5873
5874 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
5875 snd_hdspm_hw_rule_out_channels_rate, hdspm,
5876 SNDRV_PCM_HW_PARAM_RATE, -1);
5877
4033 return 0; 5878 return 0;
4034} 5879}
4035 5880
@@ -4066,24 +5911,40 @@ static int snd_hdspm_capture_open(struct snd_pcm_substream *substream)
4066 spin_unlock_irq(&hdspm->lock); 5911 spin_unlock_irq(&hdspm->lock);
4067 5912
4068 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 5913 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4069 snd_pcm_hw_constraint_list(runtime, 0, 5914 switch (hdspm->io_type) {
4070 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 5915 case AIO:
4071 &hw_constraints_period_sizes); 5916 case RayDAT:
4072 if (hdspm->is_aes32) { 5917 snd_pcm_hw_constraint_list(runtime, 0,
5918 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
5919 &hw_constraints_period_sizes_new);
5920 snd_pcm_hw_constraint_list(runtime, 0,
5921 SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
5922 &hw_constraints_raydat_io_buffer);
5923 break;
5924
5925 default:
5926 snd_pcm_hw_constraint_list(runtime, 0,
5927 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
5928 &hw_constraints_period_sizes_old);
5929 }
5930
5931 if (AES32 == hdspm->io_type) {
4073 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 5932 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4074 &hdspm_hw_constraints_aes32_sample_rates); 5933 &hdspm_hw_constraints_aes32_sample_rates);
4075 } else { 5934 } else {
4076 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4077 snd_hdspm_hw_rule_channels, hdspm,
4078 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4079 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4080 snd_hdspm_hw_rule_channels_rate, hdspm,
4081 SNDRV_PCM_HW_PARAM_RATE, -1);
4082
4083 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 5935 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4084 snd_hdspm_hw_rule_rate_channels, hdspm, 5936 snd_hdspm_hw_rule_rate_in_channels, hdspm,
4085 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 5937 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4086 } 5938 }
5939
5940 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
5941 snd_hdspm_hw_rule_in_channels, hdspm,
5942 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
5943
5944 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
5945 snd_hdspm_hw_rule_in_channels_rate, hdspm,
5946 SNDRV_PCM_HW_PARAM_RATE, -1);
5947
4087 return 0; 5948 return 0;
4088} 5949}
4089 5950
@@ -4100,32 +5961,129 @@ static int snd_hdspm_capture_release(struct snd_pcm_substream *substream)
4100 return 0; 5961 return 0;
4101} 5962}
4102 5963
4103static int snd_hdspm_hwdep_ioctl(struct snd_hwdep * hw, struct file *file, 5964static int snd_hdspm_hwdep_dummy_op(struct snd_hwdep *hw, struct file *file)
4104 unsigned int cmd, unsigned long arg)
4105{ 5965{
5966 /* we have nothing to initialize but the call is required */
5967 return 0;
5968}
5969
5970static inline int copy_u32_le(void __user *dest, void __iomem *src)
5971{
5972 u32 val = readl(src);
5973 return copy_to_user(dest, &val, 4);
5974}
5975
5976static int snd_hdspm_hwdep_ioctl(struct snd_hwdep *hw, struct file *file,
5977 unsigned int cmd, unsigned long __user arg)
5978{
5979 void __user *argp = (void __user *)arg;
4106 struct hdspm *hdspm = hw->private_data; 5980 struct hdspm *hdspm = hw->private_data;
4107 struct hdspm_mixer_ioctl mixer; 5981 struct hdspm_mixer_ioctl mixer;
4108 struct hdspm_config_info info; 5982 struct hdspm_config info;
5983 struct hdspm_status status;
4109 struct hdspm_version hdspm_version; 5984 struct hdspm_version hdspm_version;
4110 struct hdspm_peak_rms_ioctl rms; 5985 struct hdspm_peak_rms *levels;
5986 struct hdspm_ltc ltc;
5987 unsigned int statusregister;
5988 long unsigned int s;
5989 int i = 0;
4111 5990
4112 switch (cmd) { 5991 switch (cmd) {
4113 5992
4114 case SNDRV_HDSPM_IOCTL_GET_PEAK_RMS: 5993 case SNDRV_HDSPM_IOCTL_GET_PEAK_RMS:
4115 if (copy_from_user(&rms, (void __user *)arg, sizeof(rms))) 5994 levels = &hdspm->peak_rms;
5995 for (i = 0; i < HDSPM_MAX_CHANNELS; i++) {
5996 levels->input_peaks[i] =
5997 readl(hdspm->iobase +
5998 HDSPM_MADI_INPUT_PEAK + i*4);
5999 levels->playback_peaks[i] =
6000 readl(hdspm->iobase +
6001 HDSPM_MADI_PLAYBACK_PEAK + i*4);
6002 levels->output_peaks[i] =
6003 readl(hdspm->iobase +
6004 HDSPM_MADI_OUTPUT_PEAK + i*4);
6005
6006 levels->input_rms[i] =
6007 ((uint64_t) readl(hdspm->iobase +
6008 HDSPM_MADI_INPUT_RMS_H + i*4) << 32) |
6009 (uint64_t) readl(hdspm->iobase +
6010 HDSPM_MADI_INPUT_RMS_L + i*4);
6011 levels->playback_rms[i] =
6012 ((uint64_t)readl(hdspm->iobase +
6013 HDSPM_MADI_PLAYBACK_RMS_H+i*4) << 32) |
6014 (uint64_t)readl(hdspm->iobase +
6015 HDSPM_MADI_PLAYBACK_RMS_L + i*4);
6016 levels->output_rms[i] =
6017 ((uint64_t)readl(hdspm->iobase +
6018 HDSPM_MADI_OUTPUT_RMS_H + i*4) << 32) |
6019 (uint64_t)readl(hdspm->iobase +
6020 HDSPM_MADI_OUTPUT_RMS_L + i*4);
6021 }
6022
6023 if (hdspm->system_sample_rate > 96000) {
6024 levels->speed = qs;
6025 } else if (hdspm->system_sample_rate > 48000) {
6026 levels->speed = ds;
6027 } else {
6028 levels->speed = ss;
6029 }
6030 levels->status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
6031
6032 s = copy_to_user(argp, levels, sizeof(struct hdspm_peak_rms));
6033 if (0 != s) {
6034 /* snd_printk(KERN_ERR "copy_to_user(.., .., %lu): %lu
6035 [Levels]\n", sizeof(struct hdspm_peak_rms), s);
6036 */
4116 return -EFAULT; 6037 return -EFAULT;
4117 /* maybe there is a chance to memorymap in future 6038 }
4118 * so dont touch just copy 6039 break;
4119 */ 6040
4120 if(copy_to_user_fromio((void __user *)rms.peak, 6041 case SNDRV_HDSPM_IOCTL_GET_LTC:
4121 hdspm->iobase+HDSPM_MADI_peakrmsbase, 6042 ltc.ltc = hdspm_read(hdspm, HDSPM_RD_TCO);
4122 sizeof(struct hdspm_peak_rms)) != 0 ) 6043 i = hdspm_read(hdspm, HDSPM_RD_TCO + 4);
6044 if (i & HDSPM_TCO1_LTC_Input_valid) {
6045 switch (i & (HDSPM_TCO1_LTC_Format_LSB |
6046 HDSPM_TCO1_LTC_Format_MSB)) {
6047 case 0:
6048 ltc.format = fps_24;
6049 break;
6050 case HDSPM_TCO1_LTC_Format_LSB:
6051 ltc.format = fps_25;
6052 break;
6053 case HDSPM_TCO1_LTC_Format_MSB:
6054 ltc.format = fps_2997;
6055 break;
6056 default:
6057 ltc.format = 30;
6058 break;
6059 }
6060 if (i & HDSPM_TCO1_set_drop_frame_flag) {
6061 ltc.frame = drop_frame;
6062 } else {
6063 ltc.frame = full_frame;
6064 }
6065 } else {
6066 ltc.format = format_invalid;
6067 ltc.frame = frame_invalid;
6068 }
6069 if (i & HDSPM_TCO1_Video_Input_Format_NTSC) {
6070 ltc.input_format = ntsc;
6071 } else if (i & HDSPM_TCO1_Video_Input_Format_PAL) {
6072 ltc.input_format = pal;
6073 } else {
6074 ltc.input_format = no_video;
6075 }
6076
6077 s = copy_to_user(argp, &ltc, sizeof(struct hdspm_ltc));
6078 if (0 != s) {
6079 /*
6080 snd_printk(KERN_ERR "copy_to_user(.., .., %lu): %lu [LTC]\n", sizeof(struct hdspm_ltc), s); */
4123 return -EFAULT; 6081 return -EFAULT;
6082 }
4124 6083
4125 break; 6084 break;
4126
4127 6085
4128 case SNDRV_HDSPM_IOCTL_GET_CONFIG_INFO: 6086 case SNDRV_HDSPM_IOCTL_GET_CONFIG:
4129 6087
4130 memset(&info, 0, sizeof(info)); 6088 memset(&info, 0, sizeof(info));
4131 spin_lock_irq(&hdspm->lock); 6089 spin_lock_irq(&hdspm->lock);
@@ -4134,7 +6092,7 @@ static int snd_hdspm_hwdep_ioctl(struct snd_hwdep * hw, struct file *file,
4134 6092
4135 info.system_sample_rate = hdspm->system_sample_rate; 6093 info.system_sample_rate = hdspm->system_sample_rate;
4136 info.autosync_sample_rate = 6094 info.autosync_sample_rate =
4137 hdspm_external_sample_rate(hdspm); 6095 hdspm_external_sample_rate(hdspm);
4138 info.system_clock_mode = hdspm_system_clock_mode(hdspm); 6096 info.system_clock_mode = hdspm_system_clock_mode(hdspm);
4139 info.clock_source = hdspm_clock_source(hdspm); 6097 info.clock_source = hdspm_clock_source(hdspm);
4140 info.autosync_ref = hdspm_autosync_ref(hdspm); 6098 info.autosync_ref = hdspm_autosync_ref(hdspm);
@@ -4145,10 +6103,58 @@ static int snd_hdspm_hwdep_ioctl(struct snd_hwdep * hw, struct file *file,
4145 return -EFAULT; 6103 return -EFAULT;
4146 break; 6104 break;
4147 6105
6106 case SNDRV_HDSPM_IOCTL_GET_STATUS:
6107 status.card_type = hdspm->io_type;
6108
6109 status.autosync_source = hdspm_autosync_ref(hdspm);
6110
6111 status.card_clock = 110069313433624ULL;
6112 status.master_period = hdspm_read(hdspm, HDSPM_RD_PLL_FREQ);
6113
6114 switch (hdspm->io_type) {
6115 case MADI:
6116 case MADIface:
6117 status.card_specific.madi.sync_wc =
6118 hdspm_wc_sync_check(hdspm);
6119 status.card_specific.madi.sync_madi =
6120 hdspm_madi_sync_check(hdspm);
6121 status.card_specific.madi.sync_tco =
6122 hdspm_tco_sync_check(hdspm);
6123 status.card_specific.madi.sync_in =
6124 hdspm_sync_in_sync_check(hdspm);
6125
6126 statusregister =
6127 hdspm_read(hdspm, HDSPM_statusRegister);
6128 status.card_specific.madi.madi_input =
6129 (statusregister & HDSPM_AB_int) ? 1 : 0;
6130 status.card_specific.madi.channel_format =
6131 (statusregister & HDSPM_TX_64ch) ? 1 : 0;
6132 /* TODO: Mac driver sets it when f_s>48kHz */
6133 status.card_specific.madi.frame_format = 0;
6134
6135 default:
6136 break;
6137 }
6138
6139 if (copy_to_user((void __user *) arg, &status, sizeof(status)))
6140 return -EFAULT;
6141
6142
6143 break;
6144
4148 case SNDRV_HDSPM_IOCTL_GET_VERSION: 6145 case SNDRV_HDSPM_IOCTL_GET_VERSION:
6146 hdspm_version.card_type = hdspm->io_type;
6147 strncpy(hdspm_version.cardname, hdspm->card_name,
6148 sizeof(hdspm_version.cardname));
6149 hdspm_version.serial = (hdspm_read(hdspm,
6150 HDSPM_midiStatusIn0)>>8) & 0xFFFFFF;
4149 hdspm_version.firmware_rev = hdspm->firmware_rev; 6151 hdspm_version.firmware_rev = hdspm->firmware_rev;
6152 hdspm_version.addons = 0;
6153 if (hdspm->tco)
6154 hdspm_version.addons |= HDSPM_ADDON_TCO;
6155
4150 if (copy_to_user((void __user *) arg, &hdspm_version, 6156 if (copy_to_user((void __user *) arg, &hdspm_version,
4151 sizeof(hdspm_version))) 6157 sizeof(hdspm_version)))
4152 return -EFAULT; 6158 return -EFAULT;
4153 break; 6159 break;
4154 6160
@@ -4156,7 +6162,7 @@ static int snd_hdspm_hwdep_ioctl(struct snd_hwdep * hw, struct file *file,
4156 if (copy_from_user(&mixer, (void __user *)arg, sizeof(mixer))) 6162 if (copy_from_user(&mixer, (void __user *)arg, sizeof(mixer)))
4157 return -EFAULT; 6163 return -EFAULT;
4158 if (copy_to_user((void __user *)mixer.mixer, hdspm->mixer, 6164 if (copy_to_user((void __user *)mixer.mixer, hdspm->mixer,
4159 sizeof(struct hdspm_mixer))) 6165 sizeof(struct hdspm_mixer)))
4160 return -EFAULT; 6166 return -EFAULT;
4161 break; 6167 break;
4162 6168
@@ -4175,8 +6181,6 @@ static struct snd_pcm_ops snd_hdspm_playback_ops = {
4175 .prepare = snd_hdspm_prepare, 6181 .prepare = snd_hdspm_prepare,
4176 .trigger = snd_hdspm_trigger, 6182 .trigger = snd_hdspm_trigger,
4177 .pointer = snd_hdspm_hw_pointer, 6183 .pointer = snd_hdspm_hw_pointer,
4178 .copy = snd_hdspm_playback_copy,
4179 .silence = snd_hdspm_hw_silence,
4180 .page = snd_pcm_sgbuf_ops_page, 6184 .page = snd_pcm_sgbuf_ops_page,
4181}; 6185};
4182 6186
@@ -4189,7 +6193,6 @@ static struct snd_pcm_ops snd_hdspm_capture_ops = {
4189 .prepare = snd_hdspm_prepare, 6193 .prepare = snd_hdspm_prepare,
4190 .trigger = snd_hdspm_trigger, 6194 .trigger = snd_hdspm_trigger,
4191 .pointer = snd_hdspm_hw_pointer, 6195 .pointer = snd_hdspm_hw_pointer,
4192 .copy = snd_hdspm_capture_copy,
4193 .page = snd_pcm_sgbuf_ops_page, 6196 .page = snd_pcm_sgbuf_ops_page,
4194}; 6197};
4195 6198
@@ -4207,16 +6210,18 @@ static int __devinit snd_hdspm_create_hwdep(struct snd_card *card,
4207 hw->private_data = hdspm; 6210 hw->private_data = hdspm;
4208 strcpy(hw->name, "HDSPM hwdep interface"); 6211 strcpy(hw->name, "HDSPM hwdep interface");
4209 6212
6213 hw->ops.open = snd_hdspm_hwdep_dummy_op;
4210 hw->ops.ioctl = snd_hdspm_hwdep_ioctl; 6214 hw->ops.ioctl = snd_hdspm_hwdep_ioctl;
6215 hw->ops.release = snd_hdspm_hwdep_dummy_op;
4211 6216
4212 return 0; 6217 return 0;
4213} 6218}
4214 6219
4215 6220
4216/*------------------------------------------------------------ 6221/*------------------------------------------------------------
4217 memory interface 6222 memory interface
4218 ------------------------------------------------------------*/ 6223 ------------------------------------------------------------*/
4219static int __devinit snd_hdspm_preallocate_memory(struct hdspm * hdspm) 6224static int __devinit snd_hdspm_preallocate_memory(struct hdspm *hdspm)
4220{ 6225{
4221 int err; 6226 int err;
4222 struct snd_pcm *pcm; 6227 struct snd_pcm *pcm;
@@ -4228,7 +6233,7 @@ static int __devinit snd_hdspm_preallocate_memory(struct hdspm * hdspm)
4228 6233
4229 err = 6234 err =
4230 snd_pcm_lib_preallocate_pages_for_all(pcm, 6235 snd_pcm_lib_preallocate_pages_for_all(pcm,
4231 SNDRV_DMA_TYPE_DEV_SG, 6236 SNDRV_DMA_TYPE_DEV_SG,
4232 snd_dma_pci_data(hdspm->pci), 6237 snd_dma_pci_data(hdspm->pci),
4233 wanted, 6238 wanted,
4234 wanted); 6239 wanted);
@@ -4242,19 +6247,23 @@ static int __devinit snd_hdspm_preallocate_memory(struct hdspm * hdspm)
4242 return 0; 6247 return 0;
4243} 6248}
4244 6249
4245static void hdspm_set_sgbuf(struct hdspm * hdspm, 6250
6251static void hdspm_set_sgbuf(struct hdspm *hdspm,
4246 struct snd_pcm_substream *substream, 6252 struct snd_pcm_substream *substream,
4247 unsigned int reg, int channels) 6253 unsigned int reg, int channels)
4248{ 6254{
4249 int i; 6255 int i;
6256
6257 /* continuous memory segment */
4250 for (i = 0; i < (channels * 16); i++) 6258 for (i = 0; i < (channels * 16); i++)
4251 hdspm_write(hdspm, reg + 4 * i, 6259 hdspm_write(hdspm, reg + 4 * i,
4252 snd_pcm_sgbuf_get_addr(substream, 4096 * i)); 6260 snd_pcm_sgbuf_get_addr(substream, 4096 * i));
4253} 6261}
4254 6262
6263
4255/* ------------- ALSA Devices ---------------------------- */ 6264/* ------------- ALSA Devices ---------------------------- */
4256static int __devinit snd_hdspm_create_pcm(struct snd_card *card, 6265static int __devinit snd_hdspm_create_pcm(struct snd_card *card,
4257 struct hdspm * hdspm) 6266 struct hdspm *hdspm)
4258{ 6267{
4259 struct snd_pcm *pcm; 6268 struct snd_pcm *pcm;
4260 int err; 6269 int err;
@@ -4283,27 +6292,30 @@ static int __devinit snd_hdspm_create_pcm(struct snd_card *card,
4283 6292
4284static inline void snd_hdspm_initialize_midi_flush(struct hdspm * hdspm) 6293static inline void snd_hdspm_initialize_midi_flush(struct hdspm * hdspm)
4285{ 6294{
4286 snd_hdspm_flush_midi_input(hdspm, 0); 6295 int i;
4287 snd_hdspm_flush_midi_input(hdspm, 1); 6296
6297 for (i = 0; i < hdspm->midiPorts; i++)
6298 snd_hdspm_flush_midi_input(hdspm, i);
4288} 6299}
4289 6300
4290static int __devinit snd_hdspm_create_alsa_devices(struct snd_card *card, 6301static int __devinit snd_hdspm_create_alsa_devices(struct snd_card *card,
4291 struct hdspm * hdspm) 6302 struct hdspm * hdspm)
4292{ 6303{
4293 int err; 6304 int err, i;
4294 6305
4295 snd_printdd("Create card...\n"); 6306 snd_printdd("Create card...\n");
4296 err = snd_hdspm_create_pcm(card, hdspm); 6307 err = snd_hdspm_create_pcm(card, hdspm);
4297 if (err < 0) 6308 if (err < 0)
4298 return err; 6309 return err;
4299 6310
4300 err = snd_hdspm_create_midi(card, hdspm, 0); 6311 i = 0;
4301 if (err < 0) 6312 while (i < hdspm->midiPorts) {
4302 return err; 6313 err = snd_hdspm_create_midi(card, hdspm, i);
4303 6314 if (err < 0) {
4304 err = snd_hdspm_create_midi(card, hdspm, 1); 6315 return err;
4305 if (err < 0) 6316 }
4306 return err; 6317 i++;
6318 }
4307 6319
4308 err = snd_hdspm_create_controls(card, hdspm); 6320 err = snd_hdspm_create_controls(card, hdspm);
4309 if (err < 0) 6321 if (err < 0)
@@ -4346,37 +6358,55 @@ static int __devinit snd_hdspm_create_alsa_devices(struct snd_card *card,
4346} 6358}
4347 6359
4348static int __devinit snd_hdspm_create(struct snd_card *card, 6360static int __devinit snd_hdspm_create(struct snd_card *card,
4349 struct hdspm *hdspm, 6361 struct hdspm *hdspm) {
4350 int precise_ptr, int enable_monitor) 6362
4351{
4352 struct pci_dev *pci = hdspm->pci; 6363 struct pci_dev *pci = hdspm->pci;
4353 int err; 6364 int err;
4354 unsigned long io_extent; 6365 unsigned long io_extent;
4355 6366
4356 hdspm->irq = -1; 6367 hdspm->irq = -1;
4357
4358 spin_lock_init(&hdspm->midi[0].lock);
4359 spin_lock_init(&hdspm->midi[1].lock);
4360
4361 hdspm->card = card; 6368 hdspm->card = card;
4362 6369
4363 spin_lock_init(&hdspm->lock); 6370 spin_lock_init(&hdspm->lock);
4364 6371
4365 tasklet_init(&hdspm->midi_tasklet,
4366 hdspm_midi_tasklet, (unsigned long) hdspm);
4367
4368 pci_read_config_word(hdspm->pci, 6372 pci_read_config_word(hdspm->pci,
4369 PCI_CLASS_REVISION, &hdspm->firmware_rev); 6373 PCI_CLASS_REVISION, &hdspm->firmware_rev);
4370
4371 hdspm->is_aes32 = (hdspm->firmware_rev >= HDSPM_AESREVISION);
4372 6374
4373 strcpy(card->mixername, "Xilinx FPGA"); 6375 strcpy(card->mixername, "Xilinx FPGA");
4374 if (hdspm->is_aes32) { 6376 strcpy(card->driver, "HDSPM");
4375 strcpy(card->driver, "HDSPAES32"); 6377
4376 hdspm->card_name = "RME HDSPM AES32"; 6378 switch (hdspm->firmware_rev) {
4377 } else { 6379 case HDSPM_MADI_REV:
4378 strcpy(card->driver, "HDSPM"); 6380 hdspm->io_type = MADI;
4379 hdspm->card_name = "RME HDSPM MADI"; 6381 hdspm->card_name = "RME MADI";
6382 hdspm->midiPorts = 3;
6383 break;
6384 case HDSPM_RAYDAT_REV:
6385 hdspm->io_type = RayDAT;
6386 hdspm->card_name = "RME RayDAT";
6387 hdspm->midiPorts = 2;
6388 break;
6389 case HDSPM_AIO_REV:
6390 hdspm->io_type = AIO;
6391 hdspm->card_name = "RME AIO";
6392 hdspm->midiPorts = 1;
6393 break;
6394 case HDSPM_MADIFACE_REV:
6395 hdspm->io_type = MADIface;
6396 hdspm->card_name = "RME MADIface";
6397 hdspm->midiPorts = 1;
6398 break;
6399 case HDSPM_AES_REV:
6400 case HDSPM_AES32_REV:
6401 case HDSPM_AES32_OLD_REV:
6402 hdspm->io_type = AES32;
6403 hdspm->card_name = "RME AES32";
6404 hdspm->midiPorts = 2;
6405 break;
6406 default:
6407 snd_printk(KERN_ERR "HDSPM: unknown firmware revision %x\n",
6408 hdspm->firmware_rev);
6409 return -ENODEV;
4380 } 6410 }
4381 6411
4382 err = pci_enable_device(pci); 6412 err = pci_enable_device(pci);
@@ -4393,22 +6423,21 @@ static int __devinit snd_hdspm_create(struct snd_card *card,
4393 io_extent = pci_resource_len(pci, 0); 6423 io_extent = pci_resource_len(pci, 0);
4394 6424
4395 snd_printdd("grabbed memory region 0x%lx-0x%lx\n", 6425 snd_printdd("grabbed memory region 0x%lx-0x%lx\n",
4396 hdspm->port, hdspm->port + io_extent - 1); 6426 hdspm->port, hdspm->port + io_extent - 1);
4397
4398 6427
4399 hdspm->iobase = ioremap_nocache(hdspm->port, io_extent); 6428 hdspm->iobase = ioremap_nocache(hdspm->port, io_extent);
4400 if (!hdspm->iobase) { 6429 if (!hdspm->iobase) {
4401 snd_printk(KERN_ERR "HDSPM: " 6430 snd_printk(KERN_ERR "HDSPM: "
4402 "unable to remap region 0x%lx-0x%lx\n", 6431 "unable to remap region 0x%lx-0x%lx\n",
4403 hdspm->port, hdspm->port + io_extent - 1); 6432 hdspm->port, hdspm->port + io_extent - 1);
4404 return -EBUSY; 6433 return -EBUSY;
4405 } 6434 }
4406 snd_printdd("remapped region (0x%lx) 0x%lx-0x%lx\n", 6435 snd_printdd("remapped region (0x%lx) 0x%lx-0x%lx\n",
4407 (unsigned long)hdspm->iobase, hdspm->port, 6436 (unsigned long)hdspm->iobase, hdspm->port,
4408 hdspm->port + io_extent - 1); 6437 hdspm->port + io_extent - 1);
4409 6438
4410 if (request_irq(pci->irq, snd_hdspm_interrupt, 6439 if (request_irq(pci->irq, snd_hdspm_interrupt,
4411 IRQF_SHARED, "hdspm", hdspm)) { 6440 IRQF_SHARED, "hdspm", hdspm)) {
4412 snd_printk(KERN_ERR "HDSPM: unable to use IRQ %d\n", pci->irq); 6441 snd_printk(KERN_ERR "HDSPM: unable to use IRQ %d\n", pci->irq);
4413 return -EBUSY; 6442 return -EBUSY;
4414 } 6443 }
@@ -4416,23 +6445,219 @@ static int __devinit snd_hdspm_create(struct snd_card *card,
4416 snd_printdd("use IRQ %d\n", pci->irq); 6445 snd_printdd("use IRQ %d\n", pci->irq);
4417 6446
4418 hdspm->irq = pci->irq; 6447 hdspm->irq = pci->irq;
4419 hdspm->precise_ptr = precise_ptr;
4420
4421 hdspm->monitor_outs = enable_monitor;
4422 6448
4423 snd_printdd("kmalloc Mixer memory of %zd Bytes\n", 6449 snd_printdd("kmalloc Mixer memory of %zd Bytes\n",
4424 sizeof(struct hdspm_mixer)); 6450 sizeof(struct hdspm_mixer));
4425 hdspm->mixer = kzalloc(sizeof(struct hdspm_mixer), GFP_KERNEL); 6451 hdspm->mixer = kzalloc(sizeof(struct hdspm_mixer), GFP_KERNEL);
4426 if (!hdspm->mixer) { 6452 if (!hdspm->mixer) {
4427 snd_printk(KERN_ERR "HDSPM: " 6453 snd_printk(KERN_ERR "HDSPM: "
4428 "unable to kmalloc Mixer memory of %d Bytes\n", 6454 "unable to kmalloc Mixer memory of %d Bytes\n",
4429 (int)sizeof(struct hdspm_mixer)); 6455 (int)sizeof(struct hdspm_mixer));
4430 return err; 6456 return err;
4431 } 6457 }
4432 6458
4433 hdspm->ss_channels = MADI_SS_CHANNELS; 6459 hdspm->port_names_in = NULL;
4434 hdspm->ds_channels = MADI_DS_CHANNELS; 6460 hdspm->port_names_out = NULL;
4435 hdspm->qs_channels = MADI_QS_CHANNELS; 6461
6462 switch (hdspm->io_type) {
6463 case AES32:
6464 hdspm->ss_in_channels = hdspm->ss_out_channels = AES32_CHANNELS;
6465 hdspm->ds_in_channels = hdspm->ds_out_channels = AES32_CHANNELS;
6466 hdspm->qs_in_channels = hdspm->qs_out_channels = AES32_CHANNELS;
6467
6468 hdspm->channel_map_in_ss = hdspm->channel_map_out_ss =
6469 channel_map_aes32;
6470 hdspm->channel_map_in_ds = hdspm->channel_map_out_ds =
6471 channel_map_aes32;
6472 hdspm->channel_map_in_qs = hdspm->channel_map_out_qs =
6473 channel_map_aes32;
6474 hdspm->port_names_in_ss = hdspm->port_names_out_ss =
6475 texts_ports_aes32;
6476 hdspm->port_names_in_ds = hdspm->port_names_out_ds =
6477 texts_ports_aes32;
6478 hdspm->port_names_in_qs = hdspm->port_names_out_qs =
6479 texts_ports_aes32;
6480
6481 hdspm->max_channels_out = hdspm->max_channels_in =
6482 AES32_CHANNELS;
6483 hdspm->port_names_in = hdspm->port_names_out =
6484 texts_ports_aes32;
6485 hdspm->channel_map_in = hdspm->channel_map_out =
6486 channel_map_aes32;
6487
6488 break;
6489
6490 case MADI:
6491 case MADIface:
6492 hdspm->ss_in_channels = hdspm->ss_out_channels =
6493 MADI_SS_CHANNELS;
6494 hdspm->ds_in_channels = hdspm->ds_out_channels =
6495 MADI_DS_CHANNELS;
6496 hdspm->qs_in_channels = hdspm->qs_out_channels =
6497 MADI_QS_CHANNELS;
6498
6499 hdspm->channel_map_in_ss = hdspm->channel_map_out_ss =
6500 channel_map_unity_ss;
6501 hdspm->channel_map_in_ds = hdspm->channel_map_out_ds =
6502 channel_map_unity_ss;
6503 hdspm->channel_map_in_qs = hdspm->channel_map_out_qs =
6504 channel_map_unity_ss;
6505
6506 hdspm->port_names_in_ss = hdspm->port_names_out_ss =
6507 texts_ports_madi;
6508 hdspm->port_names_in_ds = hdspm->port_names_out_ds =
6509 texts_ports_madi;
6510 hdspm->port_names_in_qs = hdspm->port_names_out_qs =
6511 texts_ports_madi;
6512 break;
6513
6514 case AIO:
6515 if (0 == (hdspm_read(hdspm, HDSPM_statusRegister2) & HDSPM_s2_AEBI_D)) {
6516 snd_printk(KERN_INFO "HDSPM: AEB input board found, but not supported\n");
6517 }
6518
6519 hdspm->ss_in_channels = AIO_IN_SS_CHANNELS;
6520 hdspm->ds_in_channels = AIO_IN_DS_CHANNELS;
6521 hdspm->qs_in_channels = AIO_IN_QS_CHANNELS;
6522 hdspm->ss_out_channels = AIO_OUT_SS_CHANNELS;
6523 hdspm->ds_out_channels = AIO_OUT_DS_CHANNELS;
6524 hdspm->qs_out_channels = AIO_OUT_QS_CHANNELS;
6525
6526 hdspm->channel_map_out_ss = channel_map_aio_out_ss;
6527 hdspm->channel_map_out_ds = channel_map_aio_out_ds;
6528 hdspm->channel_map_out_qs = channel_map_aio_out_qs;
6529
6530 hdspm->channel_map_in_ss = channel_map_aio_in_ss;
6531 hdspm->channel_map_in_ds = channel_map_aio_in_ds;
6532 hdspm->channel_map_in_qs = channel_map_aio_in_qs;
6533
6534 hdspm->port_names_in_ss = texts_ports_aio_in_ss;
6535 hdspm->port_names_out_ss = texts_ports_aio_out_ss;
6536 hdspm->port_names_in_ds = texts_ports_aio_in_ds;
6537 hdspm->port_names_out_ds = texts_ports_aio_out_ds;
6538 hdspm->port_names_in_qs = texts_ports_aio_in_qs;
6539 hdspm->port_names_out_qs = texts_ports_aio_out_qs;
6540
6541 break;
6542
6543 case RayDAT:
6544 hdspm->ss_in_channels = hdspm->ss_out_channels =
6545 RAYDAT_SS_CHANNELS;
6546 hdspm->ds_in_channels = hdspm->ds_out_channels =
6547 RAYDAT_DS_CHANNELS;
6548 hdspm->qs_in_channels = hdspm->qs_out_channels =
6549 RAYDAT_QS_CHANNELS;
6550
6551 hdspm->max_channels_in = RAYDAT_SS_CHANNELS;
6552 hdspm->max_channels_out = RAYDAT_SS_CHANNELS;
6553
6554 hdspm->channel_map_in_ss = hdspm->channel_map_out_ss =
6555 channel_map_raydat_ss;
6556 hdspm->channel_map_in_ds = hdspm->channel_map_out_ds =
6557 channel_map_raydat_ds;
6558 hdspm->channel_map_in_qs = hdspm->channel_map_out_qs =
6559 channel_map_raydat_qs;
6560 hdspm->channel_map_in = hdspm->channel_map_out =
6561 channel_map_raydat_ss;
6562
6563 hdspm->port_names_in_ss = hdspm->port_names_out_ss =
6564 texts_ports_raydat_ss;
6565 hdspm->port_names_in_ds = hdspm->port_names_out_ds =
6566 texts_ports_raydat_ds;
6567 hdspm->port_names_in_qs = hdspm->port_names_out_qs =
6568 texts_ports_raydat_qs;
6569
6570
6571 break;
6572
6573 }
6574
6575 /* TCO detection */
6576 switch (hdspm->io_type) {
6577 case AIO:
6578 case RayDAT:
6579 if (hdspm_read(hdspm, HDSPM_statusRegister2) &
6580 HDSPM_s2_tco_detect) {
6581 hdspm->midiPorts++;
6582 hdspm->tco = kzalloc(sizeof(struct hdspm_tco),
6583 GFP_KERNEL);
6584 if (NULL != hdspm->tco) {
6585 hdspm_tco_write(hdspm);
6586 }
6587 snd_printk(KERN_INFO "HDSPM: AIO/RayDAT TCO module found\n");
6588 } else {
6589 hdspm->tco = NULL;
6590 }
6591 break;
6592
6593 case MADI:
6594 if (hdspm_read(hdspm, HDSPM_statusRegister) & HDSPM_tco_detect) {
6595 hdspm->midiPorts++;
6596 hdspm->tco = kzalloc(sizeof(struct hdspm_tco),
6597 GFP_KERNEL);
6598 if (NULL != hdspm->tco) {
6599 hdspm_tco_write(hdspm);
6600 }
6601 snd_printk(KERN_INFO "HDSPM: MADI TCO module found\n");
6602 } else {
6603 hdspm->tco = NULL;
6604 }
6605 break;
6606
6607 default:
6608 hdspm->tco = NULL;
6609 }
6610
6611 /* texts */
6612 switch (hdspm->io_type) {
6613 case AES32:
6614 if (hdspm->tco) {
6615 hdspm->texts_autosync = texts_autosync_aes_tco;
6616 hdspm->texts_autosync_items = 10;
6617 } else {
6618 hdspm->texts_autosync = texts_autosync_aes;
6619 hdspm->texts_autosync_items = 9;
6620 }
6621 break;
6622
6623 case MADI:
6624 if (hdspm->tco) {
6625 hdspm->texts_autosync = texts_autosync_madi_tco;
6626 hdspm->texts_autosync_items = 4;
6627 } else {
6628 hdspm->texts_autosync = texts_autosync_madi;
6629 hdspm->texts_autosync_items = 3;
6630 }
6631 break;
6632
6633 case MADIface:
6634
6635 break;
6636
6637 case RayDAT:
6638 if (hdspm->tco) {
6639 hdspm->texts_autosync = texts_autosync_raydat_tco;
6640 hdspm->texts_autosync_items = 9;
6641 } else {
6642 hdspm->texts_autosync = texts_autosync_raydat;
6643 hdspm->texts_autosync_items = 8;
6644 }
6645 break;
6646
6647 case AIO:
6648 if (hdspm->tco) {
6649 hdspm->texts_autosync = texts_autosync_aio_tco;
6650 hdspm->texts_autosync_items = 6;
6651 } else {
6652 hdspm->texts_autosync = texts_autosync_aio;
6653 hdspm->texts_autosync_items = 5;
6654 }
6655 break;
6656
6657 }
6658
6659 tasklet_init(&hdspm->midi_tasklet,
6660 hdspm_midi_tasklet, (unsigned long) hdspm);
4436 6661
4437 snd_printdd("create alsa devices.\n"); 6662 snd_printdd("create alsa devices.\n");
4438 err = snd_hdspm_create_alsa_devices(card, hdspm); 6663 err = snd_hdspm_create_alsa_devices(card, hdspm);
@@ -4444,6 +6669,7 @@ static int __devinit snd_hdspm_create(struct snd_card *card,
4444 return 0; 6669 return 0;
4445} 6670}
4446 6671
6672
4447static int snd_hdspm_free(struct hdspm * hdspm) 6673static int snd_hdspm_free(struct hdspm * hdspm)
4448{ 6674{
4449 6675
@@ -4452,7 +6678,8 @@ static int snd_hdspm_free(struct hdspm * hdspm)
4452 /* stop th audio, and cancel all interrupts */ 6678 /* stop th audio, and cancel all interrupts */
4453 hdspm->control_register &= 6679 hdspm->control_register &=
4454 ~(HDSPM_Start | HDSPM_AudioInterruptEnable | 6680 ~(HDSPM_Start | HDSPM_AudioInterruptEnable |
4455 HDSPM_Midi0InterruptEnable | HDSPM_Midi1InterruptEnable); 6681 HDSPM_Midi0InterruptEnable | HDSPM_Midi1InterruptEnable |
6682 HDSPM_Midi2InterruptEnable | HDSPM_Midi3InterruptEnable);
4456 hdspm_write(hdspm, HDSPM_controlRegister, 6683 hdspm_write(hdspm, HDSPM_controlRegister,
4457 hdspm->control_register); 6684 hdspm->control_register);
4458 } 6685 }
@@ -4472,6 +6699,7 @@ static int snd_hdspm_free(struct hdspm * hdspm)
4472 return 0; 6699 return 0;
4473} 6700}
4474 6701
6702
4475static void snd_hdspm_card_free(struct snd_card *card) 6703static void snd_hdspm_card_free(struct snd_card *card)
4476{ 6704{
4477 struct hdspm *hdspm = card->private_data; 6705 struct hdspm *hdspm = card->private_data;
@@ -4480,6 +6708,7 @@ static void snd_hdspm_card_free(struct snd_card *card)
4480 snd_hdspm_free(hdspm); 6708 snd_hdspm_free(hdspm);
4481} 6709}
4482 6710
6711
4483static int __devinit snd_hdspm_probe(struct pci_dev *pci, 6712static int __devinit snd_hdspm_probe(struct pci_dev *pci,
4484 const struct pci_device_id *pci_id) 6713 const struct pci_device_id *pci_id)
4485{ 6714{
@@ -4496,7 +6725,7 @@ static int __devinit snd_hdspm_probe(struct pci_dev *pci,
4496 } 6725 }
4497 6726
4498 err = snd_card_create(index[dev], id[dev], 6727 err = snd_card_create(index[dev], id[dev],
4499 THIS_MODULE, sizeof(struct hdspm), &card); 6728 THIS_MODULE, sizeof(struct hdspm), &card);
4500 if (err < 0) 6729 if (err < 0)
4501 return err; 6730 return err;
4502 6731
@@ -4507,16 +6736,25 @@ static int __devinit snd_hdspm_probe(struct pci_dev *pci,
4507 6736
4508 snd_card_set_dev(card, &pci->dev); 6737 snd_card_set_dev(card, &pci->dev);
4509 6738
4510 err = snd_hdspm_create(card, hdspm, precise_ptr[dev], 6739 err = snd_hdspm_create(card, hdspm);
4511 enable_monitor[dev]);
4512 if (err < 0) { 6740 if (err < 0) {
4513 snd_card_free(card); 6741 snd_card_free(card);
4514 return err; 6742 return err;
4515 } 6743 }
4516 6744
4517 strcpy(card->shortname, "HDSPM MADI"); 6745 if (hdspm->io_type != MADIface) {
4518 sprintf(card->longname, "%s at 0x%lx, irq %d", hdspm->card_name, 6746 sprintf(card->shortname, "%s_%x",
4519 hdspm->port, hdspm->irq); 6747 hdspm->card_name,
6748 (hdspm_read(hdspm, HDSPM_midiStatusIn0)>>8) & 0xFFFFFF);
6749 sprintf(card->longname, "%s S/N 0x%x at 0x%lx, irq %d",
6750 hdspm->card_name,
6751 (hdspm_read(hdspm, HDSPM_midiStatusIn0)>>8) & 0xFFFFFF,
6752 hdspm->port, hdspm->irq);
6753 } else {
6754 sprintf(card->shortname, "%s", hdspm->card_name);
6755 sprintf(card->longname, "%s at 0x%lx, irq %d",
6756 hdspm->card_name, hdspm->port, hdspm->irq);
6757 }
4520 6758
4521 err = snd_card_register(card); 6759 err = snd_card_register(card);
4522 if (err < 0) { 6760 if (err < 0) {