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authorWang Xingchao <xingchao.wang@linux.intel.com>2013-06-17 22:41:53 -0400
committerTakashi Iwai <tiwai@suse.de>2013-06-18 02:04:15 -0400
commit53b434f09340db8ad59b43789b7c43f54171fe36 (patch)
tree0e883bf150eb8ceea494614a2f4cbf3c1cbda2ec /sound/pci
parent06ec56d3c60238f27bfa50d245592fccc1b4ef0f (diff)
ALSA: hda - Haswell converter power state D0 verify
Haswell converters maybe in wrong power state before usage. i.e. only converter 0 is in D0, converter 1/2 are in D3. When pin choose converter 1/2, there's no audio output, this cause dependency when playing differnt stream on pins. AUD_PWRST ConvertorA_Widget_Power_State_Current D0 AUD_PWRST ConvertorA_Widget_Power_State_Requsted D0 AUD_PWRST ConvertorB_Widget_Power_State_Current D3 AUD_PWRST ConvertorB_Widget_Power_State_Requested D3 AUD_PWRST ConvC_Widget_PwrSt_Curr D3 AUD_PWRST ConvC_Widget_PwrSt_Req D3 This patch check converter's power state and set D0 if it's in D3 mode. Signed-off-by: Wang Xingchao <xingchao.wang@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci')
-rw-r--r--sound/pci/hda/patch_hdmi.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index e12f7a030c58..8983747f2a37 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -1018,10 +1018,19 @@ static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1018 hdmi_non_intrinsic_event(codec, res); 1018 hdmi_non_intrinsic_event(codec, res);
1019} 1019}
1020 1020
1021static void haswell_verify_pin_D0(struct hda_codec *codec, hda_nid_t nid) 1021static void haswell_verify_pin_D0(struct hda_codec *codec,
1022 hda_nid_t cvt_nid, hda_nid_t nid)
1022{ 1023{
1023 int pwr, lamp, ramp; 1024 int pwr, lamp, ramp;
1024 1025
1026 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1027 * thus pins could only choose converter 0 for use. Make sure the
1028 * converters are in correct power state */
1029 pwr = snd_hda_codec_read(codec, cvt_nid, 0, AC_VERB_GET_POWER_STATE, 0);
1030 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1031 if (pwr != AC_PWRST_D0)
1032 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1033
1025 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0); 1034 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1026 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT; 1035 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1027 if (pwr != AC_PWRST_D0) { 1036 if (pwr != AC_PWRST_D0) {
@@ -1068,7 +1077,7 @@ static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1068 int new_pinctl = 0; 1077 int new_pinctl = 0;
1069 1078
1070 if (codec->vendor_id == 0x80862807) 1079 if (codec->vendor_id == 0x80862807)
1071 haswell_verify_pin_D0(codec, pin_nid); 1080 haswell_verify_pin_D0(codec, cvt_nid, pin_nid);
1072 1081
1073 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) { 1082 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1074 pinctl = snd_hda_codec_read(codec, pin_nid, 0, 1083 pinctl = snd_hda_codec_read(codec, pin_nid, 0,