Merge tag 'v3.18-rc7' into for-next

... for allowing more cleanups of hda_intel.c driver-caps where both
upstream and for-next contain the changes.

2 files changed, 20 insertions, 5 deletions

diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 728663d6746f..fc7aff0eb562 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -302,7 +302,8 @@ enum {
 
 /* quirks for ATI/AMD HDMI */
 #define AZX_DCAPS_PRESET_ATI_HDMI \
-        (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
+        (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
+         AZX_DCAPS_NO_MSI64)
 
 /* quirks for ATI HDMI with snoop off */
 #define AZX_DCAPS_PRESET_ATI_HDMI_NS \
@@ -1493,6 +1494,7 @@ static int azx_first_init(struct azx *chip)
         struct snd_card *card = chip->card;
         int err;
         unsigned short gcap;
+        unsigned int dma_bits = 64;
 
 #if BITS_PER_LONG != 64
         /* Fix up base address on ULI M5461 */
@@ -1516,9 +1518,14 @@ static int azx_first_init(struct azx *chip)
                 return -ENXIO;
         }
 
-        if (chip->msi)
+        if (chip->msi) {
+                if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
+                        dev_dbg(card->dev, "Disabling 64bit MSI\n");
+                        pci->no_64bit_msi = true;
+                }
                 if (pci_enable_msi(pci) < 0)
                         chip->msi = 0;
+        }
 
         if (azx_acquire_irq(chip, 0) < 0)
                 return -EBUSY;
@@ -1529,9 +1536,14 @@ static int azx_first_init(struct azx *chip)
         gcap = azx_readw(chip, GCAP);
         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
 
+        /* AMD devices support 40 or 48bit DMA, take the safe one */
+        if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
+                dma_bits = 40;
+
         /* disable SB600 64bit support for safety */
         if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
                 struct pci_dev *p_smbus;
+                dma_bits = 40;
                 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
                                          PCI_DEVICE_ID_ATI_SBX00_SMBUS,
                                          NULL);
@@ -1561,9 +1573,11 @@ static int azx_first_init(struct azx *chip)
         }
 
         /* allow 64bit DMA address if supported by H/W */
-        if ((gcap & AZX_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
-                pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64));
-        else {
+        if (!(gcap & AZX_GCAP_64OK))
+                dma_bits = 32;
+        if (!pci_set_dma_mask(pci, DMA_BIT_MASK(dma_bits))) {
+                pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(dma_bits));
+        } else {
                 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
         }
diff --git a/sound/pci/hda/hda_priv.h b/sound/pci/hda/hda_priv.h
index 602536c2147d..a09703a2b2c1 100644
--- a/sound/pci/hda/hda_priv.h
+++ b/sound/pci/hda/hda_priv.h
@@ -170,6 +170,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
 #define AZX_DCAPS_PM_RUNTIME    (1 << 26)       /* runtime PM support */
 #define AZX_DCAPS_I915_POWERWELL (1 << 27)      /* HSW i915 powerwell support */
 #define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28)   /* CORBRP clears itself after reset */
+#define AZX_DCAPS_NO_MSI64      (1 << 29)       /* Stick to 32-bit MSIs */
 
 enum {
         AZX_SNOOP_TYPE_NONE ,