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authorMark Brown <broonie@kernel.org>2014-10-20 12:55:07 -0400
committerMark Brown <broonie@kernel.org>2014-10-20 13:27:32 -0400
commitb7a40242c82cd73cfcea305f23e67d068dd8401a (patch)
tree251b49d19cd7c371847ae1f951e1b537ca0e1c15 /sound/pci/hda/patch_realtek.c
parentd26833bfce5e56017bea9f1f50838f20e18e7b7e (diff)
parent9c6de47d53a3ce8df1642ae67823688eb98a190a (diff)
Merge branch 'fix/dw' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-dw
Conflicts: drivers/spi/spi-dw-mid.c
Diffstat (limited to 'sound/pci/hda/patch_realtek.c')
-rw-r--r--sound/pci/hda/patch_realtek.c46
1 files changed, 41 insertions, 5 deletions
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 6b38ec3c6e57..1ba22fb527c2 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -181,6 +181,8 @@ static void alc_fix_pll(struct hda_codec *codec)
181 spec->pll_coef_idx); 181 spec->pll_coef_idx);
182 val = snd_hda_codec_read(codec, spec->pll_nid, 0, 182 val = snd_hda_codec_read(codec, spec->pll_nid, 0,
183 AC_VERB_GET_PROC_COEF, 0); 183 AC_VERB_GET_PROC_COEF, 0);
184 if (val == -1)
185 return;
184 snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_COEF_INDEX, 186 snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_COEF_INDEX,
185 spec->pll_coef_idx); 187 spec->pll_coef_idx);
186 snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_PROC_COEF, 188 snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_PROC_COEF,
@@ -326,6 +328,7 @@ static void alc_auto_init_amp(struct hda_codec *codec, int type)
326 case 0x10ec0885: 328 case 0x10ec0885:
327 case 0x10ec0887: 329 case 0x10ec0887:
328 /*case 0x10ec0889:*/ /* this causes an SPDIF problem */ 330 /*case 0x10ec0889:*/ /* this causes an SPDIF problem */
331 case 0x10ec0900:
329 alc889_coef_init(codec); 332 alc889_coef_init(codec);
330 break; 333 break;
331 case 0x10ec0888: 334 case 0x10ec0888:
@@ -2348,6 +2351,7 @@ static int patch_alc882(struct hda_codec *codec)
2348 switch (codec->vendor_id) { 2351 switch (codec->vendor_id) {
2349 case 0x10ec0882: 2352 case 0x10ec0882:
2350 case 0x10ec0885: 2353 case 0x10ec0885:
2354 case 0x10ec0900:
2351 break; 2355 break;
2352 default: 2356 default:
2353 /* ALC883 and variants */ 2357 /* ALC883 and variants */
@@ -2806,6 +2810,8 @@ static void alc286_shutup(struct hda_codec *codec)
2806static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up) 2810static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up)
2807{ 2811{
2808 int val = alc_read_coef_idx(codec, 0x04); 2812 int val = alc_read_coef_idx(codec, 0x04);
2813 if (val == -1)
2814 return;
2809 if (power_up) 2815 if (power_up)
2810 val |= 1 << 11; 2816 val |= 1 << 11;
2811 else 2817 else
@@ -3264,6 +3270,15 @@ static int alc269_resume(struct hda_codec *codec)
3264 snd_hda_codec_resume_cache(codec); 3270 snd_hda_codec_resume_cache(codec);
3265 alc_inv_dmic_sync(codec, true); 3271 alc_inv_dmic_sync(codec, true);
3266 hda_call_check_power_status(codec, 0x01); 3272 hda_call_check_power_status(codec, 0x01);
3273
3274 /* on some machine, the BIOS will clear the codec gpio data when enter
3275 * suspend, and won't restore the data after resume, so we restore it
3276 * in the driver.
3277 */
3278 if (spec->gpio_led)
3279 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_SET_GPIO_DATA,
3280 spec->gpio_led);
3281
3267 if (spec->has_alc5505_dsp) 3282 if (spec->has_alc5505_dsp)
3268 alc5505_dsp_resume(codec); 3283 alc5505_dsp_resume(codec);
3269 3284
@@ -4395,6 +4410,7 @@ enum {
4395 ALC292_FIXUP_TPT440_DOCK, 4410 ALC292_FIXUP_TPT440_DOCK,
4396 ALC283_FIXUP_BXBT2807_MIC, 4411 ALC283_FIXUP_BXBT2807_MIC,
4397 ALC255_FIXUP_DELL_WMI_MIC_MUTE_LED, 4412 ALC255_FIXUP_DELL_WMI_MIC_MUTE_LED,
4413 ALC282_FIXUP_ASPIRE_V5_PINS,
4398}; 4414};
4399 4415
4400static const struct hda_fixup alc269_fixups[] = { 4416static const struct hda_fixup alc269_fixups[] = {
@@ -4842,6 +4858,22 @@ static const struct hda_fixup alc269_fixups[] = {
4842 .chained_before = true, 4858 .chained_before = true,
4843 .chain_id = ALC255_FIXUP_DELL1_MIC_NO_PRESENCE 4859 .chain_id = ALC255_FIXUP_DELL1_MIC_NO_PRESENCE
4844 }, 4860 },
4861 [ALC282_FIXUP_ASPIRE_V5_PINS] = {
4862 .type = HDA_FIXUP_PINS,
4863 .v.pins = (const struct hda_pintbl[]) {
4864 { 0x12, 0x90a60130 },
4865 { 0x14, 0x90170110 },
4866 { 0x17, 0x40000008 },
4867 { 0x18, 0x411111f0 },
4868 { 0x19, 0x411111f0 },
4869 { 0x1a, 0x411111f0 },
4870 { 0x1b, 0x411111f0 },
4871 { 0x1d, 0x40f89b2d },
4872 { 0x1e, 0x411111f0 },
4873 { 0x21, 0x0321101f },
4874 { },
4875 },
4876 },
4845 4877
4846}; 4878};
4847 4879
@@ -4853,6 +4885,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
4853 SND_PCI_QUIRK(0x1025, 0x0740, "Acer AO725", ALC271_FIXUP_HP_GATE_MIC_JACK), 4885 SND_PCI_QUIRK(0x1025, 0x0740, "Acer AO725", ALC271_FIXUP_HP_GATE_MIC_JACK),
4854 SND_PCI_QUIRK(0x1025, 0x0742, "Acer AO756", ALC271_FIXUP_HP_GATE_MIC_JACK), 4886 SND_PCI_QUIRK(0x1025, 0x0742, "Acer AO756", ALC271_FIXUP_HP_GATE_MIC_JACK),
4855 SND_PCI_QUIRK(0x1025, 0x0775, "Acer Aspire E1-572", ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572), 4887 SND_PCI_QUIRK(0x1025, 0x0775, "Acer Aspire E1-572", ALC271_FIXUP_HP_GATE_MIC_JACK_E1_572),
4888 SND_PCI_QUIRK(0x1025, 0x079b, "Acer Aspire V5-573G", ALC282_FIXUP_ASPIRE_V5_PINS),
4856 SND_PCI_QUIRK(0x1028, 0x0470, "Dell M101z", ALC269_FIXUP_DELL_M101Z), 4889 SND_PCI_QUIRK(0x1028, 0x0470, "Dell M101z", ALC269_FIXUP_DELL_M101Z),
4857 SND_PCI_QUIRK(0x1028, 0x05bd, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), 4890 SND_PCI_QUIRK(0x1028, 0x05bd, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE),
4858 SND_PCI_QUIRK(0x1028, 0x05be, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), 4891 SND_PCI_QUIRK(0x1028, 0x05be, "Dell", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE),
@@ -5311,27 +5344,30 @@ static void alc269_fill_coef(struct hda_codec *codec)
5311 if ((alc_get_coef0(codec) & 0x00ff) == 0x017) { 5344 if ((alc_get_coef0(codec) & 0x00ff) == 0x017) {
5312 val = alc_read_coef_idx(codec, 0x04); 5345 val = alc_read_coef_idx(codec, 0x04);
5313 /* Power up output pin */ 5346 /* Power up output pin */
5314 alc_write_coef_idx(codec, 0x04, val | (1<<11)); 5347 if (val != -1)
5348 alc_write_coef_idx(codec, 0x04, val | (1<<11));
5315 } 5349 }
5316 5350
5317 if ((alc_get_coef0(codec) & 0x00ff) == 0x018) { 5351 if ((alc_get_coef0(codec) & 0x00ff) == 0x018) {
5318 val = alc_read_coef_idx(codec, 0xd); 5352 val = alc_read_coef_idx(codec, 0xd);
5319 if ((val & 0x0c00) >> 10 != 0x1) { 5353 if (val != -1 && (val & 0x0c00) >> 10 != 0x1) {
5320 /* Capless ramp up clock control */ 5354 /* Capless ramp up clock control */
5321 alc_write_coef_idx(codec, 0xd, val | (1<<10)); 5355 alc_write_coef_idx(codec, 0xd, val | (1<<10));
5322 } 5356 }
5323 val = alc_read_coef_idx(codec, 0x17); 5357 val = alc_read_coef_idx(codec, 0x17);
5324 if ((val & 0x01c0) >> 6 != 0x4) { 5358 if (val != -1 && (val & 0x01c0) >> 6 != 0x4) {
5325 /* Class D power on reset */ 5359 /* Class D power on reset */
5326 alc_write_coef_idx(codec, 0x17, val | (1<<7)); 5360 alc_write_coef_idx(codec, 0x17, val | (1<<7));
5327 } 5361 }
5328 } 5362 }
5329 5363
5330 val = alc_read_coef_idx(codec, 0xd); /* Class D */ 5364 val = alc_read_coef_idx(codec, 0xd); /* Class D */
5331 alc_write_coef_idx(codec, 0xd, val | (1<<14)); 5365 if (val != -1)
5366 alc_write_coef_idx(codec, 0xd, val | (1<<14));
5332 5367
5333 val = alc_read_coef_idx(codec, 0x4); /* HP */ 5368 val = alc_read_coef_idx(codec, 0x4); /* HP */
5334 alc_write_coef_idx(codec, 0x4, val | (1<<11)); 5369 if (val != -1)
5370 alc_write_coef_idx(codec, 0x4, val | (1<<11));
5335} 5371}
5336 5372
5337/* 5373/*