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authorKevin Hao <haokexin@gmail.com>2014-07-12 00:08:24 -0400
committerTejun Heo <tj@kernel.org>2014-07-14 12:38:20 -0400
commit1871ee134b73fb4cadab75752a7152ed2813c751 (patch)
tree180fb7f61c21c9edafa9bf78f1cf7b5ec9cb0301 /security/min_addr.c
parent7188b067576db95445bf4e9498f1bdb2e612dd2f (diff)
libata: support the ata host which implements a queue depth less than 32
The sata on fsl mpc8315e is broken after the commit 8a4aeec8d2d6 ("libata/ahci: accommodate tag ordered controllers"). The reason is that the ata controller on this SoC only implement a queue depth of 16. When issuing the commands in tag order, all the commands in tag 16 ~ 31 are mapped to tag 0 unconditionally and then causes the sata malfunction. It makes no senses to use a 32 queue in software while the hardware has less queue depth. So consider the queue depth implemented by the hardware when requesting a command tag. Fixes: 8a4aeec8d2d6 ("libata/ahci: accommodate tag ordered controllers") Cc: stable@vger.kernel.org Signed-off-by: Kevin Hao <haokexin@gmail.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'security/min_addr.c')
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