diff options
| author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2013-04-03 10:40:40 -0400 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-04-04 18:10:49 -0400 |
| commit | 3e72771e210348fbd7ff0ea1b9e14cd88380c05b (patch) | |
| tree | 5bb1543197683bdcaf8c8b4c5221147f717a7b6f /mm/msync.c | |
| parent | 0b6525acd13f2d33cd3be86d0dbd2ddd1ffeda8f (diff) | |
clk: tegra: move from a lock bit idx to a lock mask
PLLC2 and PLLC3 on Tegra114 have separate phaselock and frequencylock bits.
So switch to a lock mask to be able to test both at the same time.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'mm/msync.c')
0 files changed, 0 insertions, 0 deletions