diff options
| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2012-10-25 15:15:47 -0400 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-11-11 17:51:37 -0500 |
| commit | 3ac7831314eba873d60b58718123c503f6961337 (patch) | |
| tree | 62e2042a11d641e20ff782f1cce19623c165d96f /mm/msync.c | |
| parent | 9a28977181724ebbd9bdc45291cf29da55a729ee (diff) | |
drm/i915: PIPE_CONTROL TLB invalidate requires CS stall
"If ENABLED, PIPE_CONTROL command will flush the in flight data written
out by render engine to Global Observation point on flush done. Also
Requires stall bit ([20] of DW1) set."
So set the stall bit to ensure proper invalidation.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Antti Koskipää <antti.koskipaa@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'mm/msync.c')
0 files changed, 0 insertions, 0 deletions