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authorDave Airlie <airlied@redhat.com>2011-05-15 20:45:40 -0400
committerDave Airlie <airlied@redhat.com>2011-05-15 20:45:40 -0400
commit69f7876b2ab61e8114675d6092ad0b482e233612 (patch)
treea55aefd08d6c5f617d277a99e11b5a707e162585 /lib
parent0eacdba3a186e5d5b8a8bb421caacddc135e67e3 (diff)
parent645c62a5e95a5f9a8e0d0627446bbda4ee042024 (diff)
Merge remote branch 'keithp/drm-intel-next' of /ssd/git/drm-next into drm-core-next
* 'keithp/drm-intel-next' of /ssd/git/drm-next: (301 commits) drm/i915: split PCH clock gating init drm/i915: add Ivybridge clock gating init function drm/i915: Update the location of the ringbuffers' HWS_PGA registers for IVB. drm/i915: Add support for fence registers on Ivybridge. drm/i915: Use existing function instead of open-coding fence reg clear. drm/i915: split clock gating init into per-chipset functions drm/i915: set IBX pch type explicitly drm/i915: add Ivy Bridge PCI IDs and driver feature structs drm/i915: add PantherPoint PCH ID agp/intel: add Ivy Bridge support drm/i915: ring support for Ivy Bridge drm/i915: page flip support for Ivy Bridge drm/i915: interrupt & vblank support for Ivy Bridge drm/i915: treat Ivy Bridge watermarks like Sandy Bridge drm/i915: manual FDI training for Ivy Bridge drm/i915: add swizzle/tiling support for Ivy Bridge drm/i915: Ivy Bridge has split display and pipe control drm/i915: add IS_IVYBRIDGE macro for checks drm/i915: add IS_GEN7 macro to cover Ivy Bridge and later drm/i915: split enable/disable vblank code into chipset specific functions ...
Diffstat (limited to 'lib')
-rw-r--r--lib/xz/xz_dec_lzma2.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/xz/xz_dec_lzma2.c b/lib/xz/xz_dec_lzma2.c
index ea5fa4fe9d67..a6cdc969ea42 100644
--- a/lib/xz/xz_dec_lzma2.c
+++ b/lib/xz/xz_dec_lzma2.c
@@ -969,6 +969,9 @@ XZ_EXTERN enum xz_ret xz_dec_lzma2_run(struct xz_dec_lzma2 *s,
969 */ 969 */
970 tmp = b->in[b->in_pos++]; 970 tmp = b->in[b->in_pos++];
971 971
972 if (tmp == 0x00)
973 return XZ_STREAM_END;
974
972 if (tmp >= 0xE0 || tmp == 0x01) { 975 if (tmp >= 0xE0 || tmp == 0x01) {
973 s->lzma2.need_props = true; 976 s->lzma2.need_props = true;
974 s->lzma2.need_dict_reset = false; 977 s->lzma2.need_dict_reset = false;
@@ -1001,9 +1004,6 @@ XZ_EXTERN enum xz_ret xz_dec_lzma2_run(struct xz_dec_lzma2 *s,
1001 lzma_reset(s); 1004 lzma_reset(s);
1002 } 1005 }
1003 } else { 1006 } else {
1004 if (tmp == 0x00)
1005 return XZ_STREAM_END;
1006
1007 if (tmp > 0x02) 1007 if (tmp > 0x02)
1008 return XZ_DATA_ERROR; 1008 return XZ_DATA_ERROR;
1009 1009