Merge ../linus/

author: Dave Jones <davej@redhat.com> 2005-11-21 09:56:52 -0500
committer: Dave Jones <davej@redhat.com> 2005-11-21 09:56:52 -0500
commit: e7e37ee9c547213d726b29c2510cbb6696050405 (patch)
tree: 50c45625de666b23f209d79eb1bfae05c64feee9 /include
parent: c243f1f1f6545985afcc6adf1fc085729029c3ee (diff)
parent: db93a82fa9d8b4d6e31c227922eaae829253bb88 (diff)
76 files changed, 638 insertions, 671 deletions
diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h
index 7d0ab791b16c..9fc4bcfa1681 100644
--- a/include/asm-arm/arch-clps711x/uncompress.h
+++ b/include/asm-arm/arch-clps711x/uncompress.h
@@ -19,7 +19,7 @@
 */
 #include <linux/config.h>
 #include <asm/arch/io.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/hardware/clps7111.h>
 #undef CLPS7111_BASE
diff --git a/include/asm-arm/arch-epxa10db/uncompress.h b/include/asm-arm/arch-epxa10db/uncompress.h
index d33ad6a93749..fdfe0e6848f8 100644
--- a/include/asm-arm/arch-epxa10db/uncompress.h
+++ b/include/asm-arm/arch-epxa10db/uncompress.h
@@ -19,7 +19,7 @@
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
 #include "asm/arch/platform.h"
-#include "asm/arch/hardware.h"
+#include "asm/hardware.h"
 #define UART00_TYPE (volatile unsigned int*)
 #include "asm/arch/uart00.h"
diff --git a/include/asm-arm/arch-h720x/uncompress.h b/include/asm-arm/arch-h720x/uncompress.h
index 2fffacf85a01..9535764bcc71 100644
--- a/include/asm-arm/arch-h720x/uncompress.h
+++ b/include/asm-arm/arch-h720x/uncompress.h
@@ -7,7 +7,7 @@
 #ifndef __ASM_ARCH_UNCOMPRESS_H
 #define __ASM_ARCH_UNCOMPRESS_H
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #define LSR     0x14
 #define TEMPTY  0x40
diff --git a/include/asm-arm/arch-imx/irqs.h b/include/asm-arm/arch-imx/irqs.h
index 238197cfb9d9..f195542898e0 100644
--- a/include/asm-arm/arch-imx/irqs.h
+++ b/include/asm-arm/arch-imx/irqs.h
@@ -23,7 +23,7 @@
 #define __ARM_IRQS_H__
 /* Use the imx definitions */
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 /*
 *  IMX Interrupt numbers
diff --git a/include/asm-arm/arch-imx/timex.h b/include/asm-arm/arch-imx/timex.h
index d65ab3cd5d5d..8c91674706b1 100644
--- a/include/asm-arm/arch-imx/timex.h
+++ b/include/asm-arm/arch-imx/timex.h
@@ -21,7 +21,7 @@
 #ifndef __ASM_ARCH_TIMEX_H
 #define __ASM_ARCH_TIMEX_H
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #define CLOCK_TICK_RATE         (CLK32)
 #endif
diff --git a/include/asm-arm/arch-integrator/smp.h b/include/asm-arm/arch-integrator/smp.h
index 0ec7093f7c37..da6981efdc39 100644
--- a/include/asm-arm/arch-integrator/smp.h
+++ b/include/asm-arm/arch-integrator/smp.h
@@ -3,7 +3,7 @@
 #include <linux/config.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/io.h>
 #define hard_smp_processor_id()                         \
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index 688f7f90d93e..942b622455bc 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
 * fallback to the default.
 */
 static inline void __iomem *
-__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align)
+__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags)
 {
-        extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
        if((addr < 0x48000000) || (addr > 0x4fffffff))
-                return __ioremap(addr, size, flags, align);
+                return __ioremap(addr, size, flags);
        return (void *)addr;
 }
@@ -71,13 +70,11 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned
 static inline void
 __ixp4xx_iounmap(void __iomem *addr)
 {
-        extern void __iounmap(void __iomem *addr);
        if ((u32)addr >= VMALLOC_START)
                __iounmap(addr);
 }
-#define __arch_ioremap(a, s, f, x)      __ixp4xx_ioremap(a, s, f, x)
+#define __arch_ioremap(a, s, f)         __ixp4xx_ioremap(a, s, f)
 #define __arch_iounmap(a)               __ixp4xx_iounmap(a)
 #define writeb(v, p)                    __ixp4xx_writeb(v, p)
diff --git a/include/asm-arm/arch-l7200/aux_reg.h b/include/asm-arm/arch-l7200/aux_reg.h
index 762cbc76c501..5b4396de16a0 100644
--- a/include/asm-arm/arch-l7200/aux_reg.h
+++ b/include/asm-arm/arch-l7200/aux_reg.h
@@ -9,7 +9,7 @@
 #ifndef _ASM_ARCH_AUXREG_H
 #define _ASM_ARCH_AUXREG_H
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #define l7200aux_reg    *((volatile unsigned int *) (AUX_BASE))
diff --git a/include/asm-arm/arch-l7200/gp_timers.h b/include/asm-arm/arch-l7200/gp_timers.h
index 6f20962df248..9c4804d13578 100644
--- a/include/asm-arm/arch-l7200/gp_timers.h
+++ b/include/asm-arm/arch-l7200/gp_timers.h
@@ -10,7 +10,7 @@
 #ifndef _ASM_ARCH_GPTIMERS_H
 #define _ASM_ARCH_GPTIMERS_H
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 /*
 * Layout of L7200 general purpose timer registers
diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h
index 1b3885741ac1..f486b72070ea 100644
--- a/include/asm-arm/arch-omap/gpio.h
+++ b/include/asm-arm/arch-omap/gpio.h
@@ -26,7 +26,7 @@
 #ifndef __ASM_ARCH_OMAP_GPIO_H
 #define __ASM_ARCH_OMAP_GPIO_H
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/arch/irqs.h>
 #include <asm/io.h>
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h
index 9779686bdceb..4ffce1d77759 100644
--- a/include/asm-arm/arch-omap/irqs.h
+++ b/include/asm-arm/arch-omap/irqs.h
@@ -260,7 +260,7 @@ extern void omap_init_irq(void);
 * The definition of NR_IRQS is in board-specific header file, which is
 * included via hardware.h
 */
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #ifndef NR_IRQS
 #define NR_IRQS                 IH_BOARD_BASE
diff --git a/include/asm-arm/arch-omap/mcbsp.h b/include/asm-arm/arch-omap/mcbsp.h
index 305bdeb16ab8..e79d98ab2ab6 100644
--- a/include/asm-arm/arch-omap/mcbsp.h
+++ b/include/asm-arm/arch-omap/mcbsp.h
@@ -24,7 +24,7 @@
 #ifndef __ASM_ARCH_OMAP_MCBSP_H
 #define __ASM_ARCH_OMAP_MCBSP_H
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #define OMAP730_MCBSP1_BASE     0xfffb1000
 #define OMAP730_MCBSP2_BASE     0xfffb1800
diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h
index b43cdd2a3874..9af415d2944a 100644
--- a/include/asm-arm/arch-omap/system.h
+++ b/include/asm-arm/arch-omap/system.h
@@ -7,7 +7,7 @@
 #include <linux/config.h>
 #include <asm/mach-types.h>
 #include <asm/hardware/clock.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/arch/prcm.h>
 #ifndef CONFIG_MACH_VOICEBLUE
diff --git a/include/asm-arm/arch-realview/hardware.h b/include/asm-arm/arch-realview/hardware.h
index 67879cdb6ef2..9ca76dc3a7af 100644
--- a/include/asm-arm/arch-realview/hardware.h
+++ b/include/asm-arm/arch-realview/hardware.h
@@ -27,5 +27,6 @@
 /* macro to get at IO space when running virtually */
 #define IO_ADDRESS(x)           (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
+#define __io_address(n)         __io(IO_ADDRESS(n))
 #endif
diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h
index 9f8fcbca0869..6f3d0ce0ca1e 100644
--- a/include/asm-arm/arch-realview/system.h
+++ b/include/asm-arm/arch-realview/system.h
@@ -36,7 +36,7 @@ static inline void arch_idle(void)
 static inline void arch_reset(char mode)
 {
-        unsigned int hdr_ctrl = (IO_ADDRESS(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET);
+        void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET;
        unsigned int val;
        /*
diff --git a/include/asm-arm/arch-rpc/system.h b/include/asm-arm/arch-rpc/system.h
index ca3277d1d5ea..729c2ae4b513 100644
--- a/include/asm-arm/arch-rpc/system.h
+++ b/include/asm-arm/arch-rpc/system.h
@@ -7,7 +7,7 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/hardware/iomd.h>
 #include <asm/io.h>
diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h
index 0fc555b4c912..018a9f0e3986 100644
--- a/include/asm-arm/arch-sa1100/memory.h
+++ b/include/asm-arm/arch-sa1100/memory.h
@@ -18,20 +18,10 @@
 #ifndef __ASSEMBLY__
 #ifdef CONFIG_SA1111
-static inline void
+void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
-__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes)
-{
-        unsigned int sz = SZ_1M >> PAGE_SHIFT;
-        if (node != 0)
-                sz = 0;
-        size[1] = size[0] - sz;
-        size[0] = sz;
-}
 #define arch_adjust_zones(node, size, holes) \
-        __arch_adjust_zones(node, size, holes)
+        sa1111_adjust_zones(node, size, holes)
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_1M - 1)
diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h
index 75b802719723..d586f65c8228 100644
--- a/include/asm-arm/atomic.h
+++ b/include/asm-arm/atomic.h
@@ -12,6 +12,7 @@
 #define __ASM_ARM_ATOMIC_H
 #include <linux/config.h>
+#include <linux/compiler.h>
 typedef struct { volatile int counter; } atomic_t;
@@ -82,11 +83,12 @@ static inline int atomic_sub_return(int i, atomic_t *v)
 static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
 {
-        u32 oldval, res;
+        unsigned long oldval, res;
        do {
                __asm__ __volatile__("@ atomic_cmpxchg\n"
                "ldrex  %1, [%2]\n"
+                "mov    %0, #0\n"
                "teq    %1, %3\n"
                "strexeq %0, %4, [%2]\n"
                    : "=&r" (res), "=&r" (oldval)
diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h
index e007dd990da5..7399d431edfe 100644
--- a/include/asm-arm/bitops.h
+++ b/include/asm-arm/bitops.h
@@ -19,6 +19,7 @@
 #ifdef __KERNEL__
+#include <linux/compiler.h>
 #include <asm/system.h>
 #define smp_mb__before_clear_bit()      mb()
diff --git a/include/asm-arm/hardware/amba_serial.h b/include/asm-arm/hardware/amba_serial.h
index 71770aa6389f..dc726ffccebd 100644
--- a/include/asm-arm/hardware/amba_serial.h
+++ b/include/asm-arm/hardware/amba_serial.h
@@ -50,6 +50,11 @@
 #define UART011_ICR             0x44    /* Interrupt clear register. */
 #define UART011_DMACR           0x48    /* DMA control register. */
+#define UART011_DR_OE           (1 << 11)
+#define UART011_DR_BE           (1 << 10)
+#define UART011_DR_PE           (1 << 9)
+#define UART011_DR_FE           (1 << 8)
 #define UART01x_RSR_OE          0x08
 #define UART01x_RSR_BE          0x04
 #define UART01x_RSR_PE          0x02
diff --git a/include/asm-arm/hardware/dec21285.h b/include/asm-arm/hardware/dec21285.h
index 9049f0ddaecf..6685e3fb97b1 100644
--- a/include/asm-arm/hardware/dec21285.h
+++ b/include/asm-arm/hardware/dec21285.h
@@ -20,7 +20,7 @@
 #include <linux/config.h>
 #ifndef __ASSEMBLY__
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #define DC21285_IO(x)           ((volatile unsigned long *)(ARMCSR_BASE+(x)))
 #else
 #define DC21285_IO(x)           (x)
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 2e6799632f12..ae69db4a1010 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -55,6 +55,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen);
 #define __raw_readl(a)          (__chk_io_ptr(a), *(volatile unsigned int __force   *)(a))
 /*
+ * Architecture ioremap implementation.
+ */
+extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
+extern void __iounmap(void __iomem *addr);
+/*
 * Bad read/write accesses...
 */
 extern void __readwrite_bug(const char *fn);
@@ -256,18 +262,15 @@ out:
 * ioremap takes a PCI memory address, as specified in
 * Documentation/IO-mapping.txt.
 */
-extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
-extern void __iounmap(void __iomem *addr);
 #ifndef __arch_ioremap
-#define ioremap(cookie,size)            __ioremap(cookie,size,0,1)
+#define ioremap(cookie,size)            __ioremap(cookie,size,0)
-#define ioremap_nocache(cookie,size)    __ioremap(cookie,size,0,1)
+#define ioremap_nocache(cookie,size)    __ioremap(cookie,size,0)
-#define ioremap_cached(cookie,size)     __ioremap(cookie,size,L_PTE_CACHEABLE,1)
+#define ioremap_cached(cookie,size)     __ioremap(cookie,size,L_PTE_CACHEABLE)
 #define iounmap(cookie)                 __iounmap(cookie)
 #else
-#define ioremap(cookie,size)            __arch_ioremap((cookie),(size),0,1)
+#define ioremap(cookie,size)            __arch_ioremap((cookie),(size),0)
-#define ioremap_nocache(cookie,size)    __arch_ioremap((cookie),(size),0,1)
+#define ioremap_nocache(cookie,size)    __arch_ioremap((cookie),(size),0)
-#define ioremap_cached(cookie,size)     __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1)
+#define ioremap_cached(cookie,size)     __arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
 #define iounmap(cookie)                 __arch_iounmap(cookie)
 #endif
diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h
index 3d4b810d8c38..81c59facea3b 100644
--- a/include/asm-arm/mmu_context.h
+++ b/include/asm-arm/mmu_context.h
@@ -13,6 +13,7 @@
 #ifndef __ASM_ARM_MMU_CONTEXT_H
 #define __ASM_ARM_MMU_CONTEXT_H
+#include <linux/compiler.h>
 #include <asm/cacheflush.h>
 #include <asm/proc-fns.h>
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 8efa4ebdcacb..5621d61ebc07 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -93,8 +93,6 @@ void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
                                       struct pt_regs *),
                     int sig, const char *name);
-#include <asm/proc-fns.h>
 #define xchg(ptr,x) \
        ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
@@ -102,6 +100,8 @@ void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
 extern asmlinkage void __backtrace(void);
 extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
+struct mm_struct;
 extern void show_pte(struct mm_struct *mm, unsigned long addr);
 extern void __show_regs(struct pt_regs *);
diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h
index 8252a4cd860f..7c98557b717f 100644
--- a/include/asm-arm/thread_info.h
+++ b/include/asm-arm/thread_info.h
@@ -12,6 +12,7 @@
 #ifdef __KERNEL__
+#include <linux/compiler.h>
 #include <asm/fpstate.h>
 #define THREAD_SIZE_ORDER       1
diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h
index a2fdad0138b3..064f0f5e8e2b 100644
--- a/include/asm-arm/uaccess.h
+++ b/include/asm-arm/uaccess.h
@@ -100,7 +100,6 @@ static inline void set_fs (mm_segment_t fs)
 extern int __get_user_1(void *);
 extern int __get_user_2(void *);
 extern int __get_user_4(void *);
-extern int __get_user_8(void *);
 extern int __get_user_bad(void);
 #define __get_user_x(__r2,__p,__e,__s,__i...)                           \
@@ -114,7 +113,7 @@ extern int __get_user_bad(void);
 #define get_user(x,p)                                                   \
        ({                                                              \
                const register typeof(*(p)) __user *__p asm("r0") = (p);\
-                register typeof(*(p)) __r2 asm("r2");                   \
+                register unsigned int __r2 asm("r2");                   \
                register int __e asm("r0");                             \
                switch (sizeof(*(__p))) {                               \
                case 1:                                                 \
@@ -126,12 +125,9 @@ extern int __get_user_bad(void);
                case 4:                                                 \
                        __get_user_x(__r2, __p, __e, 4, "lr");          \
                        break;                                          \
-                case 8:                                                 \
-                        __get_user_x(__r2, __p, __e, 8, "lr");          \
-                        break;                                          \
                default: __e = __get_user_bad(); break;                 \
                }                                                       \
-                x = __r2;                                               \
+                x = (typeof(*(p))) __r2;                                \
                __e;                                                    \
        })
diff --git a/include/asm-i386/signal.h b/include/asm-i386/signal.h
index cbb47d34aa31..76524b4052ac 100644
--- a/include/asm-i386/signal.h
+++ b/include/asm-i386/signal.h
@@ -159,14 +159,37 @@ typedef struct sigaltstack {
 #define __HAVE_ARCH_SIG_BITOPS
-static __inline__ void sigaddset(sigset_t *set, int _sig)
+#define sigaddset(set,sig)                 \
+        (__builtin_constant_p(sig) ?       \
+        __const_sigaddset((set),(sig)) :   \
+        __gen_sigaddset((set),(sig)))
+static __inline__ void __gen_sigaddset(sigset_t *set, int _sig)
 {
-        __asm__("btsl %1,%0" : "=m"(*set) : "Ir"(_sig - 1) : "cc");
+        __asm__("btsl %1,%0" : "+m"(*set) : "Ir"(_sig - 1) : "cc");
 }
-static __inline__ void sigdelset(sigset_t *set, int _sig)
+static __inline__ void __const_sigaddset(sigset_t *set, int _sig)
 {
-        __asm__("btrl %1,%0" : "=m"(*set) : "Ir"(_sig - 1) : "cc");
+        unsigned long sig = _sig - 1;
+        set->sig[sig / _NSIG_BPW] |= 1 << (sig % _NSIG_BPW);
+}
+#define sigdelset(set,sig)                 \
+        (__builtin_constant_p(sig) ?       \
+        __const_sigdelset((set),(sig)) :   \
+        __gen_sigdelset((set),(sig)))
+static __inline__ void __gen_sigdelset(sigset_t *set, int _sig)
+{
+        __asm__("btrl %1,%0" : "+m"(*set) : "Ir"(_sig - 1) : "cc");
+}
+static __inline__ void __const_sigdelset(sigset_t *set, int _sig)
+{
+        unsigned long sig = _sig - 1;
+        set->sig[sig / _NSIG_BPW] &= ~(1 << (sig % _NSIG_BPW));
 }
 static __inline__ int __const_sigismember(sigset_t *set, int _sig)
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 2c87b41e69ba..55c37c106ef0 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -231,11 +231,12 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
 }
 /*
- * atomic_sub_if_positive - add integer to atomic variable
+ * atomic_sub_if_positive - conditionally subtract integer from atomic variable
+ * @i: integer value to subtract
 * @v: pointer of type atomic_t
 *
- * Atomically test @v and decrement if it is greater than 0.
+ * Atomically test @v and subtract @i if @v is greater or equal than @i.
- * The function returns the old value of @v minus 1.
+ * The function returns the old value of @v minus @i.
 */
 static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
 {
@@ -577,11 +578,12 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
 }
 /*
- * atomic64_sub_if_positive - add integer to atomic variable
+ * atomic64_sub_if_positive - conditionally subtract integer from atomic variable
+ * @i: integer value to subtract
 * @v: pointer of type atomic64_t
 *
- * Atomically test @v and decrement if it is greater than 0.
+ * Atomically test @v and subtract @i if @v is greater or equal than @i.
- * The function returns the old value of @v minus 1.
+ * The function returns the old value of @v minus @i.
 */
 static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
 {
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 3061870b7f6c..d42685747e7d 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -459,10 +459,10 @@ __BUILDIO(q, u64)
 #define __BUILD_MEMORY_STRING(bwlq, type)                               \
                                                                        \
-static inline void writes##bwlq(volatile void __iomem *mem, void *addr, \
+static inline void writes##bwlq(volatile void __iomem *mem,             \
-                                unsigned int count)                     \
+                                const void *addr, unsigned int count)   \
 {                                                                       \
-        volatile type *__addr = addr;                                   \
+        const volatile type *__addr = addr;                             \
                                                                        \
        while (count--) {                                               \
                mem_write##bwlq(*__addr, mem);                          \
diff --git a/include/asm-mips/ip32/crime.h b/include/asm-mips/ip32/crime.h
index 152879bae20f..a13702fafa85 100644
--- a/include/asm-mips/ip32/crime.h
+++ b/include/asm-mips/ip32/crime.h
@@ -154,7 +154,7 @@ struct sgi_crime {
 #define CRIME_MEM_ERROR_ECC_REPL_MASK   0xffffffff
 };
-extern struct sgi_crime *crime;
+extern struct sgi_crime __iomem *crime;
 #define CRIME_HI_MEM_BASE       0x40000000      /* this is where whole 1G of RAM is mapped */
diff --git a/include/asm-mips/ip32/mace.h b/include/asm-mips/ip32/mace.h
index 5bdc51d85b6c..990082c81f39 100644
--- a/include/asm-mips/ip32/mace.h
+++ b/include/asm-mips/ip32/mace.h
@@ -150,24 +150,34 @@ struct mace_audio {
 /* register definitions for parallel port DMA */
 struct mace_parport {
-/* 0 - do nothing, 1 - pulse terminal count to the device after buffer is drained */ 
+        /* 0 - do nothing,
-#define MACEPAR_CONTEXT_LASTFLAG BIT(63)
+         * 1 - pulse terminal count to the device after buffer is drained */
-/* Should not cross 4K page boundary */
+#define MACEPAR_CONTEXT_LASTFLAG        BIT(63)
-#define MACEPAR_CONTEXT_DATALEN_MASK 0xfff00000000
+        /* Should not cross 4K page boundary */
-/* Can be arbitrarily aligned on any byte boundary on output, 64 byte aligned on input */
+#define MACEPAR_CONTEXT_DATA_BOUND      0x0000000000001000UL
-#define MACEPAR_CONTEXT_BASEADDR_MASK 0xffffffff
+#define MACEPAR_CONTEXT_DATALEN_MASK    0x00000fff00000000UL
+#define MACEPAR_CONTEXT_DATALEN_SHIFT   32
+        /* Can be arbitrarily aligned on any byte boundary on output,
+         * 64 byte aligned on input */
+#define MACEPAR_CONTEXT_BASEADDR_MASK   0x00000000ffffffffUL
        volatile u64 context_a;
        volatile u64 context_b;
-#define MACEPAR_CTLSTAT_DIRECTION BIT(0) /* 0 - mem->device, 1 - device->mem */
+        /* 0 - mem->device, 1 - device->mem */
-#define MACEPAR_CTLSTAT_ENABLE BIT(1) /* 0 - channel frozen, 1 - channel enabled */
+#define MACEPAR_CTLSTAT_DIRECTION       BIT(0)
-#define MACEPAR_CTLSTAT_RESET BIT(2) /* 0 - channel active, 1 - complete channel reset */
+        /* 0 - channel frozen, 1 - channel enabled */
-#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3)
+#define MACEPAR_CTLSTAT_ENABLE          BIT(1)
-#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4)
+        /* 0 - channel active, 1 - complete channel reset */
-        volatile u64 cntlstat; /* Control/Status register */
+#define MACEPAR_CTLSTAT_RESET           BIT(2)
-#define MACEPAR_DIAG_CTXINUSE BIT(1)
+#define MACEPAR_CTLSTAT_CTXB_VALID      BIT(3)
-#define MACEPAR_DIAG_DMACTIVE BIT(2) /* 1 - Dma engine is enabled and processing something */
+#define MACEPAR_CTLSTAT_CTXA_VALID      BIT(4)
-#define MACEPAR_DIAG_CTRMASK 0x3ffc /* Counter of bytes left */
+        volatile u64 cntlstat;          /* Control/Status register */
-        volatile u64 diagnostic; /* RO: diagnostic register */
+#define MACEPAR_DIAG_CTXINUSE           BIT(0)
+        /* 1 - Dma engine is enabled and processing something */
+#define MACEPAR_DIAG_DMACTIVE           BIT(1)
+        /* Counter of bytes left */
+#define MACEPAR_DIAG_CTRMASK            0x0000000000003ffcUL
+#define MACEPAR_DIAG_CTRSHIFT           2
+        volatile u64 diagnostic;        /* RO: diagnostic register */
 };
 /* ISA Control and DMA registers */
@@ -353,6 +363,6 @@ struct sgi_mace {
        char _pad6[0x80000 - sizeof(struct mace_isa)];
 };
-extern struct sgi_mace *mace;
+extern struct sgi_mace __iomem *mace;
 #endif /* __ASM_MACE_H__ */
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
index 5d894376fc1a..647fdb54cc1d 100644
--- a/include/asm-mips/mach-db1x00/db1200.h
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -220,5 +220,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BOARD_PC1_INT DB1200_PC1_INT
 #define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
+/* Nand chip select */
+#define NAND_CS 1
 #endif /* __ASM_DB1200_H */
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index efafe65258b6..7b28b23f91ce 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -200,6 +200,12 @@ typedef volatile struct
                        ((NAND_T_PUL & 0xF)     << NAND_T_PUL_SHIFT) | \
                        ((NAND_T_SU  & 0xF)     << NAND_T_SU_SHIFT)  | \
                        ((NAND_T_WH  & 0xF)     << NAND_T_WH_SHIFT)
+#define NAND_CS 1
+/* should be done by yamon */
+#define NAND_STCFG  0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
 #endif /* __ASM_DB1X00_H */
diff --git a/include/asm-mips/mach-ip32/mc146818rtc.h b/include/asm-mips/mach-ip32/mc146818rtc.h
index f5d780ff843f..c28ba8d84076 100644
--- a/include/asm-mips/mach-ip32/mc146818rtc.h
+++ b/include/asm-mips/mach-ip32/mc146818rtc.h
@@ -11,7 +11,6 @@
 #ifndef __ASM_MACH_IP32_MC146818RTC_H
 #define __ASM_MACH_IP32_MC146818RTC_H
-#include <asm/io.h>
 #include <asm/ip32/mace.h>
 #define RTC_PORT(x)     (0x70 + (x))
@@ -26,8 +25,10 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
        mace->isa.rtc[addr << 8] = data;
 }
-/* FIXME: Do it right. For now just assume that noone lives in 20th century
+/*
- * and no O2 user in 22th century ;-) */
+ * FIXME: Do it right. For now just assume that noone lives in 20th century
+ * and no O2 user in 22th century ;-)
+ */
 #define mc146818_decode_year(year) ((year) + 2000)
 #define RTC_ALWAYS_BCD  0
diff --git a/include/asm-mips/mach-jmr3927/asm/ds1742.h b/include/asm-mips/mach-jmr3927/ds1742.h
index 134a4b6c334a..cff6192d4bdb 100644
--- a/include/asm-mips/mach-jmr3927/asm/ds1742.h
+++ b/include/asm-mips/mach-jmr3927/ds1742.h
@@ -5,12 +5,12 @@
 *
 * Copyright (C) 2003 by Ralf Baechle
 */
-#ifndef __ASM_MACH_JMR3927_ASM_DS1742_H
+#ifndef __ASM_MACH_JMR3927_DS1742_H
-#define __ASM_MACH_JMR3927_ASM_DS1742_H
+#define __ASM_MACH_JMR3927_DS1742_H
 #include <asm/jmr3927/jmr3927.h>
 #define rtc_read(reg)           (jmr3927_nvram_in(addr))
 #define rtc_write(data, reg)    (jmr3927_nvram_out((data),(reg)))
-#endif /* __ASM_MACH_JMR3927_ASM_DS1742_H */
+#endif /* __ASM_MACH_JMR3927_DS1742_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
index 9a3088b19bf3..409d443322c1 100644
--- a/include/asm-mips/mach-pb1x00/pb1200.h
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -248,5 +248,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BOARD_PC1_INT PB1200_PC1_INT
 #define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
+/* Nand chip select */
+#define NAND_CS 1
 #endif /* __ASM_PB1200_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h
index 431d6088ea96..9578ead11e8a 100644
--- a/include/asm-mips/mach-pb1x00/pb1550.h
+++ b/include/asm-mips/mach-pb1x00/pb1550.h
@@ -166,4 +166,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
                        ((NAND_T_SU  & 0xF)     << NAND_T_SU_SHIFT)  | \
                        ((NAND_T_WH  & 0xF)     << NAND_T_WH_SHIFT)
+#define NAND_CS 1
+/* should be done by yamon */
+#define NAND_STCFG  0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
 #endif /* __ASM_PB1550_H */
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
index c3dcfcb928b6..365c2a3c64f5 100644
--- a/include/asm-mips/mips-boards/seadint.h
+++ b/include/asm-mips/mips-boards/seadint.h
@@ -20,9 +20,14 @@
 #ifndef _MIPS_SEADINT_H
 #define _MIPS_SEADINT_H
-#define SEADINT_UART0     2
+/*
-#define SEADINT_UART1     3
+ * Interrupts 0..7 are used for SEAD CPU interrupts
+ */
+#define MIPSCPU_INT_BASE        0
+#define MIPSCPU_INT_UART0       2
+#define MIPSCPU_INT_UART1       3
-extern void seadint_init(void);
+#define MIPSCPU_INT_CPUCTR      7
 #endif /* !(_MIPS_SEADINT_H) */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 8ca539e80d87..6fe903e09c62 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -155,27 +155,6 @@ typedef struct sigaltstack {
 #ifdef __KERNEL__
 #include <asm/sigcontext.h>
-/*
- * The following break codes are or were in use for specific purposes in
- * other MIPS operating systems.  Linux/MIPS doesn't use all of them.  The
- * unused ones are here as placeholders; we might encounter them in
- * non-Linux/MIPS object files or make use of them in the future.
- */
-#define BRK_USERBP      0       /* User bp (used by debuggers) */
-#define BRK_KERNELBP    1       /* Break in the kernel */
-#define BRK_ABORT       2       /* Sometimes used by abort(3) to SIGIOT */
-#define BRK_BD_TAKEN    3       /* For bd slot emulation - not implemented */
-#define BRK_BD_NOTTAKEN 4       /* For bd slot emulation - not implemented */
-#define BRK_SSTEPBP     5       /* User bp (used by debuggers) */
-#define BRK_OVERFLOW    6       /* Overflow check */
-#define BRK_DIVZERO     7       /* Divide by zero check */
-#define BRK_RANGE       8       /* Range error check */
-#define BRK_STACKOVERFLOW 9     /* For Ada stackchecking */
-#define BRK_NORLD       10      /* No rld found - not used by Linux/MIPS */
-#define _BRK_THREADBP   11      /* For threads, user bp (used by debuggers) */
-#define BRK_MULOVF      1023    /* Multiply overflow */
-#define BRK_BUG         512     /* Used by BUG() */
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
 #endif /* __KERNEL__ */
diff --git a/include/asm-parisc/irq.h b/include/asm-parisc/irq.h
index f876bdf22056..b0a30e2c9813 100644
--- a/include/asm-parisc/irq.h
+++ b/include/asm-parisc/irq.h
@@ -8,6 +8,7 @@
 #define _ASM_PARISC_IRQ_H
 #include <linux/config.h>
+#include <linux/cpumask.h>
 #include <asm/types.h>
 #define NO_IRQ          (-1)
@@ -49,10 +50,10 @@ extern int txn_alloc_irq(unsigned int nbits);
 extern int txn_claim_irq(int);
 extern unsigned int txn_alloc_data(unsigned int);
 extern unsigned long txn_alloc_addr(unsigned int);
+extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
 extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
+extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest);
-extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
 /* soft power switch support (power.c) */
 extern struct tasklet_struct power_tasklet;
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index 9413f67a540b..dbdbd2e9fdf9 100644
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -29,6 +29,7 @@ extern cpumask_t cpu_online_map;
 #define cpu_logical_map(cpu)    (cpu)
 extern void smp_send_reschedule(int cpu);
+extern void smp_send_all_nop(void);
 #endif /* !ASSEMBLY */
@@ -53,7 +54,11 @@ extern unsigned long cpu_present_mask;
 #define raw_smp_processor_id()  (current_thread_info()->cpu)
-#endif /* CONFIG_SMP */
+#else /* CONFIG_SMP */
+static inline void smp_send_all_nop(void) { return; }
+#endif
 #define NO_PROC_ID              0xFF            /* No processor magic marker */
 #define ANY_PROC_ID             0xFF            /* Any processor magic marker */
diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h
index 7c3f406a746a..16c2ac075fc5 100644
--- a/include/asm-parisc/spinlock.h
+++ b/include/asm-parisc/spinlock.h
@@ -11,18 +11,25 @@ static inline int __raw_spin_is_locked(raw_spinlock_t *x)
        return *a == 0;
 }
-#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
+#define __raw_spin_lock(lock) __raw_spin_lock_flags(lock, 0)
 #define __raw_spin_unlock_wait(x) \
                do { cpu_relax(); } while (__raw_spin_is_locked(x))
-static inline void __raw_spin_lock(raw_spinlock_t *x)
+static inline void __raw_spin_lock_flags(raw_spinlock_t *x,
+                                         unsigned long flags)
 {
        volatile unsigned int *a;
        mb();
        a = __ldcw_align(x);
        while (__ldcw(a) == 0)
-                while (*a == 0);
+                while (*a == 0)
+                        if (flags & PSW_SM_I) {
+                                local_irq_enable();
+                                cpu_relax();
+                                local_irq_disable();
+                        } else
+                                cpu_relax();
        mb();
 }
@@ -60,26 +67,20 @@ static inline int __raw_spin_trylock(raw_spinlock_t *x)
 static  __inline__ void __raw_read_lock(raw_rwlock_t *rw)
 {
-        unsigned long flags;
-        local_irq_save(flags);
        __raw_spin_lock(&rw->lock);
        rw->counter++;
        __raw_spin_unlock(&rw->lock);
-        local_irq_restore(flags);
 }
 static  __inline__ void __raw_read_unlock(raw_rwlock_t *rw)
 {
-        unsigned long flags;
-        local_irq_save(flags);
        __raw_spin_lock(&rw->lock);
        rw->counter--;
        __raw_spin_unlock(&rw->lock);
-        local_irq_restore(flags);
 }
 /* write_lock is less trivial.  We optimistically grab the lock and check
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index e97aa8d1eff5..c9ec39c6fc6c 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -12,21 +12,15 @@
 * N class systems, only one PxTLB inter processor broadcast can be
 * active at any one time on the Merced bus.  This tlb purge
 * synchronisation is fairly lightweight and harmless so we activate
- * it on all SMP systems not just the N class. */
+ * it on all SMP systems not just the N class.  We also need to have
-#ifdef CONFIG_SMP
+ * preemption disabled on uniprocessor machines, and spin_lock does that
+ * nicely.
+ */
 extern spinlock_t pa_tlb_lock;
 #define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
 #define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
-#else
-#define purge_tlb_start(x) do { } while(0)
-#define purge_tlb_end(x) do { } while (0)
-#endif
 extern void flush_tlb_all(void);
 /*
@@ -88,7 +82,6 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
        if (npages >= 512)  /* 2MB of space: arbitrary, should be tuned */
                flush_tlb_all();
        else {
-                preempt_disable();
                mtsp(vma->vm_mm->context,1);
                purge_tlb_start();
                if (split_tlb) {
@@ -102,7 +95,6 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
                                pdtlb(start);
                                start += PAGE_SIZE;
                        }
-                preempt_enable();
                }
                purge_tlb_end();
        }
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 04e2726002cf..d1cfa3f515ea 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -90,6 +90,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_NEED_COHERENT           ASM_CONST(0x0000000000020000)
 #define CPU_FTR_NO_BTIC                 ASM_CONST(0x0000000000040000)
 #define CPU_FTR_BIG_PHYS                ASM_CONST(0x0000000000080000)
+#define CPU_FTR_NODSISRALIGN            ASM_CONST(0x0000000000100000)
 #ifdef __powerpc64__
 /* Add the 64b processor unique features in the top half of the word */
@@ -97,7 +98,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_16M_PAGE                ASM_CONST(0x0000000200000000)
 #define CPU_FTR_TLBIEL                  ASM_CONST(0x0000000400000000)
 #define CPU_FTR_NOEXECUTE               ASM_CONST(0x0000000800000000)
-#define CPU_FTR_NODSISRALIGN            ASM_CONST(0x0000001000000000)
 #define CPU_FTR_IABR                    ASM_CONST(0x0000002000000000)
 #define CPU_FTR_MMCRA                   ASM_CONST(0x0000004000000000)
 #define CPU_FTR_CTRL                    ASM_CONST(0x0000008000000000)
@@ -113,7 +113,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_16M_PAGE                ASM_CONST(0x0)
 #define CPU_FTR_TLBIEL                  ASM_CONST(0x0)
 #define CPU_FTR_NOEXECUTE               ASM_CONST(0x0)
-#define CPU_FTR_NODSISRALIGN            ASM_CONST(0x0)
 #define CPU_FTR_IABR                    ASM_CONST(0x0)
 #define CPU_FTR_MMCRA                   ASM_CONST(0x0)
 #define CPU_FTR_CTRL                    ASM_CONST(0x0)
@@ -273,18 +272,21 @@ enum {
        CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
            CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
        CPU_FTRS_POWER4_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
-            CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
+            CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_NODSISRALIGN,
        CPU_FTRS_970_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
            CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP |
-            CPU_FTR_MAYBE_CAN_NAP,
+            CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN,
        CPU_FTRS_8XX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
-        CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
+        CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-        CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
+            CPU_FTR_NODSISRALIGN,
-        CPU_FTRS_E200 = CPU_FTR_USE_TB,
+        CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-        CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
+            CPU_FTR_NODSISRALIGN,
+        CPU_FTRS_E200 = CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN,
+        CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
+            CPU_FTR_NODSISRALIGN,
        CPU_FTRS_E500_2 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-            CPU_FTR_BIG_PHYS,
+            CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN,
-        CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON,
+        CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN,
 #ifdef __powerpc64__
        CPU_FTRS_POWER3 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
            CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
diff --git a/include/asm-powerpc/delay.h b/include/asm-powerpc/delay.h
index 1492aa9ab716..54fe1f4f8fd0 100644
--- a/include/asm-powerpc/delay.h
+++ b/include/asm-powerpc/delay.h
@@ -13,43 +13,7 @@
 * Anton Blanchard.
 */
-extern unsigned long tb_ticks_per_usec;
+extern void __delay(unsigned long loops);
+extern void udelay(unsigned long usecs);
-#ifdef CONFIG_PPC64
-/* define these here to prevent circular dependencies */
-/* these instructions control the thread priority on multi-threaded cpus */
-#define __HMT_low()     asm volatile("or 1,1,1")
-#define __HMT_medium()  asm volatile("or 2,2,2")
-#else
-#define __HMT_low()
-#define __HMT_medium()
-#endif
-#define __barrier()     asm volatile("" ::: "memory")
-static inline unsigned long __get_tb(void)
-{
-        unsigned long rval;
-        asm volatile("mftb %0" : "=r" (rval));
-        return rval;
-}
-static inline void __delay(unsigned long loops)
-{
-        unsigned long start = __get_tb();
-        while((__get_tb() - start) < loops)
-                __HMT_low();
-        __HMT_medium();
-        __barrier();
-}
-static inline void udelay(unsigned long usecs)
-{
-        unsigned long loops = tb_ticks_per_usec * usecs;
-        __delay(loops);
-}
 #endif /* _ASM_POWERPC_DELAY_H */
diff --git a/include/asm-ppc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h
index 6e9635114433..59a80163f75f 100644
--- a/include/asm-ppc/dma-mapping.h
+++ b/include/asm-powerpc/dma-mapping.h
@@ -1,15 +1,22 @@
 /*
- * This is based on both include/asm-sh/dma-mapping.h and
+ * Copyright (C) 2004 IBM
- * include/asm-ppc/pci.h
+ *
+ * Implements the generic device dma API for powerpc.
+ * the pci and vio busses
 */
-#ifndef __ASM_PPC_DMA_MAPPING_H
+#ifndef _ASM_DMA_MAPPING_H
-#define __ASM_PPC_DMA_MAPPING_H
+#define _ASM_DMA_MAPPING_H
 #include <linux/config.h>
+#include <linux/types.h>
+#include <linux/cache.h>
 /* need struct page definitions */
 #include <linux/mm.h>
 #include <asm/scatterlist.h>
 #include <asm/io.h>
+#include <asm/bug.h>
+#define DMA_ERROR_CODE          (~(dma_addr_t)0x0)
 #ifdef CONFIG_NOT_COHERENT_CACHE
 /*
@@ -24,22 +31,12 @@ extern void __dma_free_coherent(size_t size, void *vaddr);
 extern void __dma_sync(void *vaddr, size_t size, int direction);
 extern void __dma_sync_page(struct page *page, unsigned long offset,
                                 size_t size, int direction);
-#define dma_cache_inv(_start,_size) \
-        invalidate_dcache_range(_start, (_start + _size))
-#define dma_cache_wback(_start,_size) \
-        clean_dcache_range(_start, (_start + _size))
-#define dma_cache_wback_inv(_start,_size) \
-        flush_dcache_range(_start, (_start + _size))
 #else /* ! CONFIG_NOT_COHERENT_CACHE */
 /*
 * Cache coherent cores.
 */
-#define dma_cache_inv(_start,_size)             do { } while (0)
-#define dma_cache_wback(_start,_size)           do { } while (0)
-#define dma_cache_wback_inv(_start,_size)       do { } while (0)
 #define __dma_alloc_coherent(gfp, size, handle) NULL
 #define __dma_free_coherent(size, addr)         do { } while (0)
 #define __dma_sync(addr, size, rw)              do { } while (0)
@@ -47,6 +44,30 @@ extern void __dma_sync_page(struct page *page, unsigned long offset,
 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
+#ifdef CONFIG_PPC64
+extern int dma_supported(struct device *dev, u64 mask);
+extern int dma_set_mask(struct device *dev, u64 dma_mask);
+extern void *dma_alloc_coherent(struct device *dev, size_t size,
+                dma_addr_t *dma_handle, gfp_t flag);
+extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
+                dma_addr_t dma_handle);
+extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
+                size_t size, enum dma_data_direction direction);
+extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
+                size_t size, enum dma_data_direction direction);
+extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
+                unsigned long offset, size_t size,
+                enum dma_data_direction direction);
+extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
+                size_t size, enum dma_data_direction direction);
+extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+                enum dma_data_direction direction);
+extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
+                int nhwentries, enum dma_data_direction direction);
+#else /* CONFIG_PPC64 */
 #define dma_supported(dev, mask)        (1)
 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
@@ -144,29 +165,27 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 /* We don't do anything here. */
 #define dma_unmap_sg(dev, sg, nents, dir)       do { } while (0)
-static inline void
+#endif /* CONFIG_PPC64 */
-dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
-                        size_t size,
+static inline void dma_sync_single_for_cpu(struct device *dev,
-                        enum dma_data_direction direction)
+                dma_addr_t dma_handle, size_t size,
+                enum dma_data_direction direction)
 {
        BUG_ON(direction == DMA_NONE);
        __dma_sync(bus_to_virt(dma_handle), size, direction);
 }
-static inline void
+static inline void dma_sync_single_for_device(struct device *dev,
-dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
+                dma_addr_t dma_handle, size_t size,
-                        size_t size,
+                enum dma_data_direction direction)
-                        enum dma_data_direction direction)
 {
        BUG_ON(direction == DMA_NONE);
        __dma_sync(bus_to_virt(dma_handle), size, direction);
 }
-static inline void
+static inline void dma_sync_sg_for_cpu(struct device *dev,
-dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
+                struct scatterlist *sg, int nents,
-                    enum dma_data_direction direction)
+                enum dma_data_direction direction)
 {
        int i;
@@ -176,9 +195,9 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
                __dma_sync_page(sg->page, sg->offset, sg->length, direction);
 }
-static inline void
+static inline void dma_sync_sg_for_device(struct device *dev,
-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
+                struct scatterlist *sg, int nents,
-                    enum dma_data_direction direction)
+                enum dma_data_direction direction)
 {
        int i;
@@ -188,6 +207,15 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
                __dma_sync_page(sg->page, sg->offset, sg->length, direction);
 }
+static inline int dma_mapping_error(dma_addr_t dma_addr)
+{
+#ifdef CONFIG_PPC64
+        return (dma_addr == DMA_ERROR_CODE);
+#else
+        return 0;
+#endif
+}
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 #ifdef CONFIG_NOT_COHERENT_CACHE
@@ -198,40 +226,60 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
 static inline int dma_get_cache_alignment(void)
 {
+#ifdef CONFIG_PPC64
+        /* no easy way to get cache size on all processors, so return
+         * the maximum possible, to be safe */
+        return (1 << L1_CACHE_SHIFT_MAX);
+#else
        /*
         * Each processor family will define its own L1_CACHE_SHIFT,
         * L1_CACHE_BYTES wraps to this, so this is always safe.
         */
        return L1_CACHE_BYTES;
+#endif
 }
-static inline void
+static inline void dma_sync_single_range_for_cpu(struct device *dev,
-dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
+                dma_addr_t dma_handle, unsigned long offset, size_t size,
-                              unsigned long offset, size_t size,
+                enum dma_data_direction direction)
-                              enum dma_data_direction direction)
 {
        /* just sync everything for now */
        dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
 }
-static inline void
+static inline void dma_sync_single_range_for_device(struct device *dev,
-dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
+                dma_addr_t dma_handle, unsigned long offset, size_t size,
-                                 unsigned long offset, size_t size,
+                enum dma_data_direction direction)
-                                 enum dma_data_direction direction)
 {
        /* just sync everything for now */
        dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
 }
 static inline void dma_cache_sync(void *vaddr, size_t size,
-                                  enum dma_data_direction direction)
+                enum dma_data_direction direction)
 {
+        BUG_ON(direction == DMA_NONE);
        __dma_sync(vaddr, size, (int)direction);
 }
-static inline int dma_mapping_error(dma_addr_t dma_addr)
+/*
-{
+ * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
-        return 0;
+ */
-}
+struct dma_mapping_ops {
+        void *          (*alloc_coherent)(struct device *dev, size_t size,
-#endif                          /* __ASM_PPC_DMA_MAPPING_H */
+                                dma_addr_t *dma_handle, gfp_t flag);
+        void            (*free_coherent)(struct device *dev, size_t size,
+                                void *vaddr, dma_addr_t dma_handle);
+        dma_addr_t      (*map_single)(struct device *dev, void *ptr,
+                                size_t size, enum dma_data_direction direction);
+        void            (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
+                                size_t size, enum dma_data_direction direction);
+        int             (*map_sg)(struct device *dev, struct scatterlist *sg,
+                                int nents, enum dma_data_direction direction);
+        void            (*unmap_sg)(struct device *dev, struct scatterlist *sg,
+                                int nents, enum dma_data_direction direction);
+        int             (*dma_supported)(struct device *dev, u64 mask);
+        int             (*dac_dma_supported)(struct device *dev, u64 mask);
+};
+#endif  /* _ASM_DMA_MAPPING_H */
diff --git a/include/asm-powerpc/eeh.h b/include/asm-powerpc/eeh.h
index 89f26ab31908..f8633aafe4ba 100644
--- a/include/asm-powerpc/eeh.h
+++ b/include/asm-powerpc/eeh.h
@@ -30,6 +30,8 @@ struct device_node;
 #ifdef CONFIG_EEH
+extern int eeh_subsystem_enabled;
 /* Values for eeh_mode bits in device_node */
 #define EEH_MODE_SUPPORTED      (1<<0)
 #define EEH_MODE_NOCHECK        (1<<1)
@@ -75,7 +77,7 @@ void eeh_remove_device(struct pci_dev *);
 * If this macro yields TRUE, the caller relays to eeh_check_failure()
 * which does further tests out of line.
 */
-#define EEH_POSSIBLE_ERROR(val, type)   ((val) == (type)~0)
+#define EEH_POSSIBLE_ERROR(val, type)   ((val) == (type)~0 && eeh_subsystem_enabled)
 /*
 * Reads from a device which has been isolated by EEH will return
diff --git a/include/asm-ppc64/io.h b/include/asm-powerpc/io.h
index 77fc07c3c6bd..48938d84d055 100644
--- a/include/asm-ppc64/io.h
+++ b/include/asm-powerpc/io.h
@@ -1,5 +1,5 @@
-#ifndef _PPC64_IO_H
+#ifndef _ASM_POWERPC_IO_H
-#define _PPC64_IO_H
+#define _ASM_POWERPC_IO_H
 /* 
 * This program is free software; you can redistribute it and/or
@@ -8,7 +8,10 @@
 * 2 of the License, or (at your option) any later version.
 */
-#include <linux/config.h>
+#ifndef CONFIG_PPC64
+#include <asm-ppc/io.h>
+#else
 #include <linux/compiler.h>
 #include <asm/page.h>
 #include <asm/byteorder.h>
@@ -455,4 +458,5 @@ extern int check_legacy_ioport(unsigned long base_port);
 #endif /* __KERNEL__ */
-#endif /* _PPC64_IO_H */
+#endif /* CONFIG_PPC64 */
+#endif /* _ASM_POWERPC_IO_H */
diff --git a/include/asm-ppc64/mmu.h b/include/asm-powerpc/mmu.h
index 1a7e0afa2dc6..c1b4bbabbe97 100644
--- a/include/asm-ppc64/mmu.h
+++ b/include/asm-powerpc/mmu.h
@@ -1,3 +1,10 @@
+#ifndef _ASM_POWERPC_MMU_H_
+#define _ASM_POWERPC_MMU_H_
+#ifndef CONFIG_PPC64
+#include <asm-ppc/mmu.h>
+#else
 /*
 * PowerPC memory management structures
 *
@@ -10,10 +17,6 @@
 * 2 of the License, or (at your option) any later version.
 */
-#ifndef _PPC64_MMU_H_
-#define _PPC64_MMU_H_
-#include <linux/config.h>
 #include <asm/asm-compat.h>
 #include <asm/page.h>
@@ -392,4 +395,5 @@ static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
 #endif /* __ASSEMBLY */
-#endif /* _PPC64_MMU_H_ */
+#endif /* CONFIG_PPC64 */
+#endif /* _ASM_POWERPC_MMU_H_ */
diff --git a/include/asm-ppc64/mmu_context.h b/include/asm-powerpc/mmu_context.h
index 4f512e9fa6b8..ea6798c7d5fc 100644
--- a/include/asm-ppc64/mmu_context.h
+++ b/include/asm-powerpc/mmu_context.h
@@ -1,7 +1,10 @@
-#ifndef __PPC64_MMU_CONTEXT_H
+#ifndef __ASM_POWERPC_MMU_CONTEXT_H
-#define __PPC64_MMU_CONTEXT_H
+#define __ASM_POWERPC_MMU_CONTEXT_H
+#ifndef CONFIG_PPC64
+#include <asm-ppc/mmu_context.h>
+#else
-#include <linux/config.h>
 #include <linux/kernel.h>       
 #include <linux/mm.h>   
 #include <asm/mmu.h>    
@@ -82,4 +85,5 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
        local_irq_restore(flags);
 }
-#endif /* __PPC64_MMU_CONTEXT_H */
+#endif /* CONFIG_PPC64 */
+#endif /* __ASM_POWERPC_MMU_CONTEXT_H */
diff --git a/include/asm-ppc64/mmzone.h b/include/asm-powerpc/mmzone.h
index 54958d6cae04..54958d6cae04 100644
--- a/include/asm-ppc64/mmzone.h
+++ b/include/asm-powerpc/mmzone.h
diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h
index c16f106b5373..1e6e7846824f 100644
--- a/include/asm-powerpc/page_64.h
+++ b/include/asm-powerpc/page_64.h
@@ -86,7 +86,11 @@ static inline void copy_page(void *to, void *from)
 extern u64 ppc64_pft_size;
 /* Large pages size */
+#ifdef CONFIG_HUGETLB_PAGE
 extern unsigned int HPAGE_SHIFT;
+#else
+#define HPAGE_SHIFT PAGE_SHIFT
+#endif
 #define HPAGE_SIZE              ((1UL) << HPAGE_SHIFT)
 #define HPAGE_MASK              (~(HPAGE_SIZE - 1))
 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
diff --git a/include/asm-ppc64/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index cf04327a597a..223ec7bd81da 100644
--- a/include/asm-ppc64/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -1,8 +1,10 @@
-#ifdef __KERNEL__
+#ifndef _ASM_POWERPC_PCI_BRIDGE_H
-#ifndef _ASM_PCI_BRIDGE_H
+#define _ASM_POWERPC_PCI_BRIDGE_H
-#define _ASM_PCI_BRIDGE_H
+#ifndef CONFIG_PPC64
+#include <asm-ppc/pci-bridge.h>
+#else
-#include <linux/config.h>
 #include <linux/pci.h>
 #include <linux/list.h>
@@ -147,5 +149,5 @@ extern void pcibios_free_controller(struct pci_controller *phb);
 #define PCI_PROBE_NORMAL        0       /* Do normal PCI probing */
 #define PCI_PROBE_DEVTREE       1       /* Instantiate from device tree */
+#endif /* CONFIG_PPC64 */
 #endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/pci.h b/include/asm-powerpc/pci.h
index fafdf885a3cc..d5934a076bd0 100644
--- a/include/asm-ppc64/pci.h
+++ b/include/asm-powerpc/pci.h
@@ -1,5 +1,5 @@
-#ifndef __PPC64_PCI_H
+#ifndef __ASM_POWERPC_PCI_H
-#define __PPC64_PCI_H
+#define __ASM_POWERPC_PCI_H
 #ifdef __KERNEL__
 /*
@@ -18,6 +18,7 @@
 #include <asm/scatterlist.h>
 #include <asm/io.h>
 #include <asm/prom.h>
+#include <asm/pci-bridge.h>
 #include <asm-generic/pci-dma-compat.h>
@@ -26,11 +27,21 @@
 struct pci_dev;
-#ifdef CONFIG_PPC_ISERIES
+/* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
+#define IOBASE_BRIDGE_NUMBER    0
+#define IOBASE_MEMORY           1
+#define IOBASE_IO               2
+#define IOBASE_ISA_IO           3
+#define IOBASE_ISA_MEM          4
+/*
+ * Set this to 1 if you want the kernel to re-assign all PCI
+ * bus numbers
+ */
+extern int pci_assign_all_buses;
+#define pcibios_assign_all_busses()     (pci_assign_all_buses)
 #define pcibios_scan_all_fns(a, b)      0
-#else
-extern int pcibios_scan_all_fns(struct pci_bus *bus, int devfn);
-#endif
 static inline void pcibios_set_master(struct pci_dev *dev)
 {
@@ -50,6 +61,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
        return channel ? 15 : 14;
 }
+#ifdef CONFIG_PPC64
 #define HAVE_ARCH_PCI_MWI 1
 static inline int pcibios_prep_mwi(struct pci_dev *dev)
 {
@@ -64,12 +76,10 @@ static inline int pcibios_prep_mwi(struct pci_dev *dev)
        return 0;
 }
-extern unsigned int pcibios_assign_all_busses(void);
 extern struct dma_mapping_ops pci_dma_ops;
 /* For DAC DMA, we currently don't support it by default, but
- * we let the platform override this
+ * we let 64-bit platforms override this.
 */
 static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
 {
@@ -102,6 +112,35 @@ extern int pci_domain_nr(struct pci_bus *bus);
 /* Decide whether to display the domain number in /proc */
 extern int pci_proc_domain(struct pci_bus *bus);
+#else /* 32-bit */
+#ifdef CONFIG_PCI
+static inline void pci_dma_burst_advice(struct pci_dev *pdev,
+                                        enum pci_dma_burst_strategy *strat,
+                                        unsigned long *strategy_parameter)
+{
+        *strat = PCI_DMA_BURST_INFINITY;
+        *strategy_parameter = ~0UL;
+}
+#endif
+/*
+ * At present there are very few 32-bit PPC machines that can have
+ * memory above the 4GB point, and we don't support that.
+ */
+#define pci_dac_dma_supported(pci_dev, mask)    (0)
+/* Return the index of the PCI controller for device PDEV. */
+#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
+/* Set the name of the bus as it appears in /proc/bus/pci */
+static inline int pci_proc_domain(struct pci_bus *bus)
+{
+        return 0;
+}
+#endif /* CONFIG_PPC64 */
 struct vm_area_struct;
 /* Map a range of PCI memory or I/O space for a device into user space */
 int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
@@ -110,6 +149,7 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
 /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
 #define HAVE_PCI_MMAP   1
+#ifdef CONFIG_PPC64
 /* pci_unmap_{single,page} is not a nop, thus... */
 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
        dma_addr_t ADDR_NAME;
@@ -124,22 +164,40 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
 #define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
        (((PTR)->LEN_NAME) = (VAL))
-/* The PCI address space does equal the physical memory
+/* The PCI address space does not equal the physical memory address
- * address space.  The networking and block device layers use
+ * space (we have an IOMMU).  The IDE and SCSI device layers use
 * this boolean for bounce buffer decisions.
 */
 #define PCI_DMA_BUS_IS_PHYS     (0)
+#else /* 32-bit */
+/* The PCI address space does equal the physical memory
+ * address space (no IOMMU).  The IDE and SCSI device layers use
+ * this boolean for bounce buffer decisions.
+ */
+#define PCI_DMA_BUS_IS_PHYS     (1)
+/* pci_unmap_{page,single} is a nop so... */
+#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
+#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
+#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
+#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
+#define pci_unmap_len(PTR, LEN_NAME)            (0)
+#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
+#endif /* CONFIG_PPC64 */
        
-extern void
+extern void pcibios_resource_to_bus(struct pci_dev *dev,
-pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+                        struct pci_bus_region *region,
                        struct resource *res);
-extern void
+extern void pcibios_bus_to_resource(struct pci_dev *dev,
-pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+                        struct resource *res,
                        struct pci_bus_region *region);
-static inline struct resource *
+static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
-pcibios_select_root(struct pci_dev *pdev, struct resource *res)
+                        struct resource *res)
 {
        struct resource *root = NULL;
@@ -151,14 +209,12 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
        return root;
 }
-extern int
+extern int unmap_bus_range(struct pci_bus *bus);
-unmap_bus_range(struct pci_bus *bus);
-extern int
+extern int remap_bus_range(struct pci_bus *bus);
-remap_bus_range(struct pci_bus *bus);
-extern void
+extern void pcibios_fixup_device_resources(struct pci_dev *dev,
-pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus);
+                        struct pci_bus *bus);
 extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
@@ -180,14 +236,12 @@ extern pgprot_t	pci_phys_mem_access_prot(struct file *file,
                                         unsigned long size,
                                         pgprot_t prot);
-#ifdef CONFIG_PPC_MULTIPLATFORM
+#if defined(CONFIG_PPC_MULTIPLATFORM) || defined(CONFIG_PPC32)
 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
 extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
                                 const struct resource *rsrc,
                                 u64 *start, u64 *end);
-#endif /* CONFIG_PPC_MULTIPLATFORM */
+#endif /* CONFIG_PPC_MULTIPLATFORM || CONFIG_PPC32 */
 #endif  /* __KERNEL__ */
+#endif /* __ASM_POWERPC_PCI_H */
-#endif /* __PPC64_PCI_H */
diff --git a/include/asm-ppc64/pgalloc.h b/include/asm-powerpc/pgalloc.h
index dcf3622d1946..bfc2113b3630 100644
--- a/include/asm-ppc64/pgalloc.h
+++ b/include/asm-powerpc/pgalloc.h
@@ -1,5 +1,9 @@
-#ifndef _PPC64_PGALLOC_H
+#ifndef _ASM_POWERPC_PGALLOC_H
-#define _PPC64_PGALLOC_H
+#define _ASM_POWERPC_PGALLOC_H
+#ifndef CONFIG_PPC64
+#include <asm-ppc/pgalloc.h>
+#else
 #include <linux/mm.h>
 #include <linux/slab.h>
@@ -148,4 +152,5 @@ extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
 #define check_pgt_cache()       do { } while (0)
-#endif /* _PPC64_PGALLOC_H */
+#endif /* CONFIG_PPC64 */
+#endif /* _ASM_POWERPC_PGALLOC_H */
diff --git a/include/asm-ppc64/pgtable-4k.h b/include/asm-powerpc/pgtable-4k.h
index e9590c06ad92..e9590c06ad92 100644
--- a/include/asm-ppc64/pgtable-4k.h
+++ b/include/asm-powerpc/pgtable-4k.h
diff --git a/include/asm-ppc64/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h
index 154f1840ece4..154f1840ece4 100644
--- a/include/asm-ppc64/pgtable-64k.h
+++ b/include/asm-powerpc/pgtable-64k.h
diff --git a/include/asm-ppc64/pgtable.h b/include/asm-powerpc/pgtable.h
index a9783ba7fe98..0303f57366c1 100644
--- a/include/asm-ppc64/pgtable.h
+++ b/include/asm-powerpc/pgtable.h
@@ -1,5 +1,9 @@
-#ifndef _PPC64_PGTABLE_H
+#ifndef _ASM_POWERPC_PGTABLE_H
-#define _PPC64_PGTABLE_H
+#define _ASM_POWERPC_PGTABLE_H
+#ifndef CONFIG_PPC64
+#include <asm-ppc/pgtable.h>
+#else
 /*
 * This file contains the functions and defines necessary to modify and use
@@ -47,6 +51,13 @@ struct mm_struct;
 #define VMALLOC_END   (VMALLOC_START + VMALLOC_SIZE)
 /*
+ * Define the address range of the imalloc VM area.
+ */
+#define PHBS_IO_BASE    VMALLOC_END
+#define IMALLOC_BASE    (PHBS_IO_BASE + 0x80000000ul)   /* Reserve 2 gigs for PHBs */
+#define IMALLOC_END     (VMALLOC_START + PGTABLE_RANGE)
+/*
 * Common bits in a linux-style PTE.  These match the bits in the
 * (hardware-defined) PowerPC PTE as closely as possible. Additional
 * bits may be defined in pgtable-*.h
@@ -69,7 +80,7 @@ struct mm_struct;
 #define _PAGE_WRENABLE  (_PAGE_RW | _PAGE_DIRTY)
-/* __pgprot defined in asm-ppc64/page.h */
+/* __pgprot defined in asm-powerpc/page.h */
 #define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
 #define PAGE_SHARED     __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
@@ -509,4 +520,5 @@ void pgtable_cache_init(void);
 #endif /* __ASSEMBLY__ */
-#endif /* _PPC64_PGTABLE_H */
+#endif /* CONFIG_PPC64 */
+#endif /* _ASM_POWERPC_PGTABLE_H */
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
index 2e36e5a7f4f3..36cdc869e580 100644
--- a/include/asm-powerpc/ppc-pci.h
+++ b/include/asm-powerpc/ppc-pci.h
@@ -48,8 +48,6 @@ extern void pSeries_final_fixup(void);
 extern void pSeries_irq_bus_setup(struct pci_bus *bus);
 extern unsigned long pci_probe_only;
-extern unsigned long pci_assign_all_buses;
-extern int pci_read_irq_line(struct pci_dev *pci_dev);
 /* ---- EEH internal-use-only related routines ---- */
 #ifdef CONFIG_EEH
diff --git a/include/asm-ppc64/spinlock.h b/include/asm-powerpc/spinlock.h
index 7d84fb5e39f1..caa4b14e0e94 100644
--- a/include/asm-ppc64/spinlock.h
+++ b/include/asm-powerpc/spinlock.h
@@ -18,31 +18,41 @@
 *
 * (the type definitions are in asm/spinlock_types.h)
 */
-#include <linux/config.h>
+#ifdef CONFIG_PPC64
 #include <asm/paca.h>
 #include <asm/hvcall.h>
 #include <asm/iseries/hv_call.h>
+#endif
+#include <asm/asm-compat.h>
+#include <asm/synch.h>
 #define __raw_spin_is_locked(x)         ((x)->slock != 0)
+#ifdef CONFIG_PPC64
+/* use 0x800000yy when locked, where yy == CPU number */
+#define LOCK_TOKEN      (*(u32 *)(&get_paca()->lock_token))
+#else
+#define LOCK_TOKEN      1
+#endif
 /*
 * This returns the old value in the lock, so we succeeded
 * in getting the lock if the return value is 0.
 */
 static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock)
 {
-        unsigned long tmp, tmp2;
+        unsigned long tmp, token;
+        token = LOCK_TOKEN;
        __asm__ __volatile__(
-"       lwz             %1,%3(13)               # __spin_trylock\n\
+"1:     lwarx           %0,0,%2         # __spin_trylock\n\
-1:      lwarx           %0,0,%2\n\
        cmpwi           0,%0,0\n\
        bne-            2f\n\
        stwcx.          %1,0,%2\n\
        bne-            1b\n\
        isync\n\
-2:"     : "=&r" (tmp), "=&r" (tmp2)
+2:"     : "=&r" (tmp)
-        : "r" (&lock->slock), "i" (offsetof(struct paca_struct, lock_token))
+        : "r" (token), "r" (&lock->slock)
        : "cr0", "memory");
        return tmp;
@@ -113,11 +123,17 @@ static void __inline__ __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long
 static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock)
 {
-        __asm__ __volatile__("lwsync    # __raw_spin_unlock": : :"memory");
+        __asm__ __volatile__(SYNC_ON_SMP"       # __raw_spin_unlock"
+                             : : :"memory");
        lock->slock = 0;
 }
+#ifdef CONFIG_PPC64
 extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
+#else
+#define __raw_spin_unlock_wait(lock) \
+        do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
+#endif
 /*
 * Read-write spinlocks, allowing multiple readers
@@ -133,6 +149,14 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
 #define __raw_read_can_lock(rw)         ((rw)->lock >= 0)
 #define __raw_write_can_lock(rw)        (!(rw)->lock)
+#ifdef CONFIG_PPC64
+#define __DO_SIGN_EXTEND        "extsw  %0,%0\n"
+#define WRLOCK_TOKEN            LOCK_TOKEN      /* it's negative */
+#else
+#define __DO_SIGN_EXTEND
+#define WRLOCK_TOKEN            (-1)
+#endif
 /*
 * This returns the old value in the lock + 1,
 * so we got a read lock if the return value is > 0.
@@ -142,11 +166,12 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
        long tmp;
        __asm__ __volatile__(
-"1:     lwarx           %0,0,%1         # read_trylock\n\
+"1:     lwarx           %0,0,%1         # read_trylock\n"
-        extsw           %0,%0\n\
+        __DO_SIGN_EXTEND
-        addic.          %0,%0,1\n\
+"       addic.          %0,%0,1\n\
-        ble-            2f\n\
+        ble-            2f\n"
-        stwcx.          %0,0,%1\n\
+        PPC405_ERR77(0,%1)
+"       stwcx.          %0,0,%1\n\
        bne-            1b\n\
        isync\n\
 2:"     : "=&r" (tmp)
@@ -162,18 +187,19 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
 */
 static __inline__ long __write_trylock(raw_rwlock_t *rw)
 {
-        long tmp, tmp2;
+        long tmp, token;
+        token = WRLOCK_TOKEN;
        __asm__ __volatile__(
-"       lwz             %1,%3(13)       # write_trylock\n\
+"1:     lwarx           %0,0,%2 # write_trylock\n\
-1:      lwarx           %0,0,%2\n\
        cmpwi           0,%0,0\n\
-        bne-            2f\n\
+        bne-            2f\n"
-        stwcx.          %1,0,%2\n\
+        PPC405_ERR77(0,%1)
+"       stwcx.          %1,0,%2\n\
        bne-            1b\n\
        isync\n\
-2:"     : "=&r" (tmp), "=&r" (tmp2)
+2:"     : "=&r" (tmp)
-        : "r" (&rw->lock), "i" (offsetof(struct paca_struct, lock_token))
+        : "r" (token), "r" (&rw->lock)
        : "cr0", "memory");
        return tmp;
@@ -224,8 +250,9 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
        __asm__ __volatile__(
        "eieio                          # read_unlock\n\
 1:      lwarx           %0,0,%1\n\
-        addic           %0,%0,-1\n\
+        addic           %0,%0,-1\n"
-        stwcx.          %0,0,%1\n\
+        PPC405_ERR77(0,%1)
+"       stwcx.          %0,0,%1\n\
        bne-            1b"
        : "=&r"(tmp)
        : "r"(&rw->lock)
@@ -234,7 +261,8 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
 static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
 {
-        __asm__ __volatile__("lwsync    # write_unlock": : :"memory");
+        __asm__ __volatile__(SYNC_ON_SMP"       # write_unlock"
+                             : : :"memory");
        rw->lock = 0;
 }
diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h
index 015d28746e1b..db8095cbe09b 100644
--- a/include/asm-powerpc/topology.h
+++ b/include/asm-powerpc/topology.h
@@ -41,6 +41,10 @@ static inline int node_to_first_cpu(int node)
        .cache_hot_time         = (10*1000000),         \
        .cache_nice_tries       = 1,                    \
        .per_cpu_gain           = 100,                  \
+        .busy_idx               = 3,                    \
+        .idle_idx               = 1,                    \
+        .newidle_idx            = 2,                    \
+        .wake_idx               = 1,                    \
        .flags                  = SD_LOAD_BALANCE       \
                                | SD_BALANCE_EXEC       \
                                | SD_BALANCE_NEWIDLE    \
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index 43d2ebbc7748..b638b87cebe3 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -1091,5 +1091,7 @@ typedef struct im_idma {
 #define CPM_IMMR_OFFSET 0x101a8
 #endif
+#define FCC_PSMR_RMII   ((uint)0x00020000)      /* Use RMII interface */
 #endif /* __CPM2__ */
 #endif /* __KERNEL__ */
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 2bfdf9c98459..84ac6e258eef 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -545,6 +545,23 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
 #include <asm/mpc8260_pci9.h>
 #endif
+#ifdef CONFIG_NOT_COHERENT_CACHE
+#define dma_cache_inv(_start,_size) \
+        invalidate_dcache_range(_start, (_start + _size))
+#define dma_cache_wback(_start,_size) \
+        clean_dcache_range(_start, (_start + _size))
+#define dma_cache_wback_inv(_start,_size) \
+        flush_dcache_range(_start, (_start + _size))
+#else
+#define dma_cache_inv(_start,_size)             do { } while (0)
+#define dma_cache_wback(_start,_size)           do { } while (0)
+#define dma_cache_wback_inv(_start,_size)       do { } while (0)
+#endif
 /*
 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 * access
diff --git a/include/asm-ppc64/dma-mapping.h b/include/asm-ppc64/dma-mapping.h
deleted file mode 100644
index fb68fa23bea8..000000000000
--- a/include/asm-ppc64/dma-mapping.h
+++ /dev/null
@@ -1,136 +0,0 @@
-/* Copyright (C) 2004 IBM
- *
- * Implements the generic device dma API for ppc64. Handles
- * the pci and vio busses
- */
-#ifndef _ASM_DMA_MAPPING_H
-#define _ASM_DMA_MAPPING_H
-#include <linux/types.h>
-#include <linux/cache.h>
-/* need struct page definitions */
-#include <linux/mm.h>
-#include <asm/scatterlist.h>
-#include <asm/bug.h>
-#define DMA_ERROR_CODE          (~(dma_addr_t)0x0)
-extern int dma_supported(struct device *dev, u64 mask);
-extern int dma_set_mask(struct device *dev, u64 dma_mask);
-extern void *dma_alloc_coherent(struct device *dev, size_t size,
-                dma_addr_t *dma_handle, gfp_t flag);
-extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
-                dma_addr_t dma_handle);
-extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
-                size_t size, enum dma_data_direction direction);
-extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
-                size_t size, enum dma_data_direction direction);
-extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
-                unsigned long offset, size_t size,
-                enum dma_data_direction direction);
-extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
-                size_t size, enum dma_data_direction direction);
-extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
-                enum dma_data_direction direction);
-extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
-                int nhwentries, enum dma_data_direction direction);
-static inline void
-dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
-                        enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-        /* nothing to do */
-}
-static inline void
-dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
-                           enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-        /* nothing to do */
-}
-static inline void
-dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
-                    enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-        /* nothing to do */
-}
-static inline void
-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
-                       enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-        /* nothing to do */
-}
-static inline int dma_mapping_error(dma_addr_t dma_addr)
-{
-        return (dma_addr == DMA_ERROR_CODE);
-}
-/* Now for the API extensions over the pci_ one */
-#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
-#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d)    (1)
-static inline int
-dma_get_cache_alignment(void)
-{
-        /* no easy way to get cache size on all processors, so return
-         * the maximum possible, to be safe */
-        return (1 << L1_CACHE_SHIFT_MAX);
-}
-static inline void
-dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
-                              unsigned long offset, size_t size,
-                              enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-        /* nothing to do */
-}
-static inline void
-dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
-                                 unsigned long offset, size_t size,
-                                 enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-        /* nothing to do */
-}
-static inline void
-dma_cache_sync(void *vaddr, size_t size,
-               enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-        /* nothing to do */
-}
-/*
- * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
- */
-struct dma_mapping_ops {
-        void *          (*alloc_coherent)(struct device *dev, size_t size,
-                                dma_addr_t *dma_handle, gfp_t flag);
-        void            (*free_coherent)(struct device *dev, size_t size,
-                                void *vaddr, dma_addr_t dma_handle);
-        dma_addr_t      (*map_single)(struct device *dev, void *ptr,
-                                size_t size, enum dma_data_direction direction);
-        void            (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
-                                size_t size, enum dma_data_direction direction);
-        int             (*map_sg)(struct device *dev, struct scatterlist *sg,
-                                int nents, enum dma_data_direction direction);
-        void            (*unmap_sg)(struct device *dev, struct scatterlist *sg,
-                                int nents, enum dma_data_direction direction);
-        int             (*dma_supported)(struct device *dev, u64 mask);
-        int             (*dac_dma_supported)(struct device *dev, u64 mask);
-};
-#endif  /* _ASM_DMA_MAPPING_H */
diff --git a/include/asm-ppc64/imalloc.h b/include/asm-ppc64/imalloc.h
deleted file mode 100644
index 42adf7033a81..000000000000
--- a/include/asm-ppc64/imalloc.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef _PPC64_IMALLOC_H
-#define _PPC64_IMALLOC_H
-/*
- * Define the address range of the imalloc VM area.
- */
-#define PHBS_IO_BASE      VMALLOC_END
-#define IMALLOC_BASE      (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
-#define IMALLOC_END       (VMALLOC_START + PGTABLE_RANGE)
-/* imalloc region types */
-#define IM_REGION_UNUSED        0x1
-#define IM_REGION_SUBSET        0x2
-#define IM_REGION_EXISTS        0x4
-#define IM_REGION_OVERLAP       0x8
-#define IM_REGION_SUPERSET      0x10
-extern struct vm_struct * im_get_free_area(unsigned long size);
-extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
-                                      int region_type);
-extern void im_free(void *addr);
-extern unsigned long ioremap_bot;
-#endif /* _PPC64_IMALLOC_H */
diff --git a/include/asm-ppc64/ptrace-common.h b/include/asm-ppc64/ptrace-common.h
deleted file mode 100644
index b1babb729673..000000000000
--- a/include/asm-ppc64/ptrace-common.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- *  linux/arch/ppc64/kernel/ptrace-common.h
- *
- *    Copyright (c) 2002 Stephen Rothwell, IBM Coproration
- *    Extracted from ptrace.c and ptrace32.c
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License.  See the file README.legal in the main directory of
- * this archive for more details.
- */
-#ifndef _PPC64_PTRACE_COMMON_H
-#define _PPC64_PTRACE_COMMON_H
-#include <linux/config.h>
-#include <asm/system.h>
-/*
- * Set of msr bits that gdb can change on behalf of a process.
- */
-#define MSR_DEBUGCHANGE (MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1)
-/*
- * Get contents of register REGNO in task TASK.
- */
-static inline unsigned long get_reg(struct task_struct *task, int regno)
-{
-        unsigned long tmp = 0;
-        /*
-         * Put the correct FP bits in, they might be wrong as a result
-         * of our lazy FP restore.
-         */
-        if (regno == PT_MSR) {
-                tmp = ((unsigned long *)task->thread.regs)[PT_MSR];
-                tmp |= task->thread.fpexc_mode;
-        } else if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) {
-                tmp = ((unsigned long *)task->thread.regs)[regno];
-        }
-        return tmp;
-}
-/*
- * Write contents of register REGNO in task TASK.
- */
-static inline int put_reg(struct task_struct *task, int regno,
-                          unsigned long data)
-{
-        if (regno < PT_SOFTE) {
-                if (regno == PT_MSR)
-                        data = (data & MSR_DEBUGCHANGE)
-                                | (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
-                ((unsigned long *)task->thread.regs)[regno] = data;
-                return 0;
-        }
-        return -EIO;
-}
-static inline void set_single_step(struct task_struct *task)
-{
-        struct pt_regs *regs = task->thread.regs;
-        if (regs != NULL)
-                regs->msr |= MSR_SE;
-        set_ti_thread_flag(task->thread_info, TIF_SINGLESTEP);
-}
-static inline void clear_single_step(struct task_struct *task)
-{
-        struct pt_regs *regs = task->thread.regs;
-        if (regs != NULL)
-                regs->msr &= ~MSR_SE;
-        clear_ti_thread_flag(task->thread_info, TIF_SINGLESTEP);
-}
-#ifdef CONFIG_ALTIVEC
-/*
- * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
- * The transfer totals 34 quadword.  Quadwords 0-31 contain the
- * corresponding vector registers.  Quadword 32 contains the vscr as the
- * last word (offset 12) within that quadword.  Quadword 33 contains the
- * vrsave as the first word (offset 0) within the quadword.
- *
- * This definition of the VMX state is compatible with the current PPC32
- * ptrace interface.  This allows signal handling and ptrace to use the
- * same structures.  This also simplifies the implementation of a bi-arch
- * (combined (32- and 64-bit) gdb.
- */
-/*
- * Get contents of AltiVec register state in task TASK
- */
-static inline int get_vrregs(unsigned long __user *data,
-                             struct task_struct *task)
-{
-        unsigned long regsize;
-        /* copy AltiVec registers VR[0] .. VR[31] */
-        regsize = 32 * sizeof(vector128);
-        if (copy_to_user(data, task->thread.vr, regsize))
-                return -EFAULT;
-        data += (regsize / sizeof(unsigned long));
-        /* copy VSCR */
-        regsize = 1 * sizeof(vector128);
-        if (copy_to_user(data, &task->thread.vscr, regsize))
-                return -EFAULT;
-        data += (regsize / sizeof(unsigned long));
-        /* copy VRSAVE */
-        if (put_user(task->thread.vrsave, (u32 __user *)data))
-                return -EFAULT;
-        return 0;
-}
-/*
- * Write contents of AltiVec register state into task TASK.
- */
-static inline int set_vrregs(struct task_struct *task,
-                             unsigned long __user *data)
-{
-        unsigned long regsize;
-        /* copy AltiVec registers VR[0] .. VR[31] */
-        regsize = 32 * sizeof(vector128);
-        if (copy_from_user(task->thread.vr, data, regsize))
-                return -EFAULT;
-        data += (regsize / sizeof(unsigned long));
-        /* copy VSCR */
-        regsize = 1 * sizeof(vector128);
-        if (copy_from_user(&task->thread.vscr, data, regsize))
-                return -EFAULT;
-        data += (regsize / sizeof(unsigned long));
-        /* copy VRSAVE */
-        if (get_user(task->thread.vrsave, (u32 __user *)data))
-                return -EFAULT;
-        return 0;
-}
-#endif
-static inline int ptrace_set_debugreg(struct task_struct *task,
-                                      unsigned long addr, unsigned long data)
-{
-        /* We only support one DABR and no IABRS at the moment */
-        if (addr > 0)
-                return -EINVAL;
-        /* The bottom 3 bits are flags */
-        if ((data & ~0x7UL) >= TASK_SIZE)
-                return -EIO;
-        /* Ensure translation is on */
-        if (data && !(data & DABR_TRANSLATION))
-                return -EIO;
-        task->thread.dabr = data;
-        return 0;
-}
-#endif /* _PPC64_PTRACE_COMMON_H */
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h
index 24dc39651bc4..10f8b51cec8b 100644
--- a/include/asm-x86_64/msr.h
+++ b/include/asm-x86_64/msr.h
@@ -56,7 +56,7 @@
                      ".section __ex_table,\"a\"\n"             \
                      " .align 8\n"                             \
                      " .quad 1b,3b\n"                          \
-                      ".previous":"=&bDS" (ret__), "=a"(a), "=d"(b)\
+                      ".previous":"=&bDS" (ret__), "=a"(*(a)), "=d"(*(b))\
                      :"c"(msr), "i"(-EIO), "0"(0));            \
          ret__; })             
diff --git a/include/linux/cciss_ioctl.h b/include/linux/cciss_ioctl.h
index 424d5e622b43..6e27f42e3a57 100644
--- a/include/linux/cciss_ioctl.h
+++ b/include/linux/cciss_ioctl.h
@@ -10,8 +10,8 @@
 typedef struct _cciss_pci_info_struct
 {
        unsigned char   bus;
-        unsigned short  domain;
        unsigned char   dev_fn;
+        unsigned short  domain;
        __u32           board_id;
 } cciss_pci_info_struct; 
diff --git a/include/linux/ds17287rtc.h b/include/linux/ds17287rtc.h
new file mode 100644
index 000000000000..c281ba42e28f
--- /dev/null
+++ b/include/linux/ds17287rtc.h
@@ -0,0 +1,67 @@
+/*
+ * ds17287rtc.h - register definitions for the ds1728[57] RTC / CMOS RAM
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * (C) 2003 Guido Guenther <agx@sigxcpu.org>
+ */
+#ifndef __LINUX_DS17287RTC_H
+#define __LINUX_DS17287RTC_H
+#include <linux/rtc.h>                  /* get the user-level API */
+#include <linux/spinlock.h>             /* spinlock_t */
+#include <linux/mc146818rtc.h>
+/* Register A */
+#define DS_REGA_DV2     0x40            /* countdown chain */
+#define DS_REGA_DV1     0x20            /* oscillator enable */
+#define DS_REGA_DV0     0x10            /* bank select */
+/* bank 1 registers */
+#define DS_B1_MODEL     0x40            /* model number byte */
+#define DS_B1_SN1       0x41            /* serial number byte 1 */
+#define DS_B1_SN2       0x42            /* serial number byte 2 */
+#define DS_B1_SN3       0x43            /* serial number byte 3 */
+#define DS_B1_SN4       0x44            /* serial number byte 4 */
+#define DS_B1_SN5       0x45            /* serial number byte 5 */
+#define DS_B1_SN6       0x46            /* serial number byte 6 */
+#define DS_B1_CRC       0x47            /* CRC byte */
+#define DS_B1_CENTURY   0x48            /* Century byte */
+#define DS_B1_DALARM    0x49            /* date alarm */
+#define DS_B1_XCTRL4A   0x4a            /* extendec control register 4a */
+#define DS_B1_XCTRL4B   0x4b            /* extendec control register 4b */
+#define DS_B1_RTCADDR2  0x4e            /* rtc address 2 */
+#define DS_B1_RTCADDR3  0x4f            /* rtc address 3 */
+#define DS_B1_RAMLSB    0x50            /* extended ram LSB */
+#define DS_B1_RAMMSB    0x51            /* extended ram MSB */
+#define DS_B1_RAMDPORT  0x53            /* extended ram data port */
+/* register details */
+/* extended control register 4a */
+#define DS_XCTRL4A_VRT2 0x80            /* valid ram and time */
+#define DS_XCTRL4A_INCR 0x40            /* increment progress status */
+#define DS_XCTRL4A_BME  0x20            /* burst mode enable */
+#define DS_XCTRL4A_PAB  0x08            /* power active bar ctrl */
+#define DS_XCTRL4A_RF   0x04            /* ram clear flag */
+#define DS_XCTRL4A_WF   0x02            /* wake up alarm flag */
+#define DS_XCTRL4A_KF   0x01            /* kickstart flag */
+/* interrupt causes */
+#define DS_XCTRL4A_IFS  (DS_XCTRL4A_RF|DS_XCTRL4A_WF|DS_XCTRL4A_KF)
+/* extended control register 4b */
+#define DS_XCTRL4B_ABE  0x80            /* auxiliary battery enable */
+#define DS_XCTRL4B_E32K 0x40            /* enable 32.768 kHz Output */
+#define DS_XCTRL4B_CS   0x20            /* crystal select */
+#define DS_XCTRL4B_RCE  0x10            /* ram clear enable */
+#define DS_XCTRL4B_PRS  0x08            /* PAB resec select */
+#define DS_XCTRL4B_RIE  0x04            /* ram clear interrupt enable */
+#define DS_XCTRL4B_WFE  0x02            /* wake up alarm interrupt enable */
+#define DS_XCTRL4B_KFE  0x01            /* kickstart interrupt enable */
+/* interrupt enable bits */
+#define DS_XCTRL4B_IFES (DS_XCTRL4B_RIE|DS_XCTRL4B_WFE|DS_XCTRL4B_KFE)
+#endif /* __LINUX_DS17287RTC_H */
diff --git a/include/linux/ds1742rtc.h b/include/linux/ds1742rtc.h
new file mode 100644
index 000000000000..a83cdd1cafc9
--- /dev/null
+++ b/include/linux/ds1742rtc.h
@@ -0,0 +1,53 @@
+/*
+ * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
+ *
+ * Copyright (C) 1999-2001 Toshiba Corporation
+ * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
+ *
+ * Permission is hereby granted to copy, modify and redistribute this code
+ * in terms of the GNU Library General Public License, Version 2 or later,
+ * at your option.
+ */
+#ifndef __LINUX_DS1742RTC_H
+#define __LINUX_DS1742RTC_H
+#include <asm/ds1742.h>
+#define RTC_BRAM_SIZE           0x800
+#define RTC_OFFSET              0x7f8
+/*
+ * Register summary
+ */
+#define RTC_CONTROL             (RTC_OFFSET + 0)
+#define RTC_CENTURY             (RTC_OFFSET + 0)
+#define RTC_SECONDS             (RTC_OFFSET + 1)
+#define RTC_MINUTES             (RTC_OFFSET + 2)
+#define RTC_HOURS               (RTC_OFFSET + 3)
+#define RTC_DAY                 (RTC_OFFSET + 4)
+#define RTC_DATE                (RTC_OFFSET + 5)
+#define RTC_MONTH               (RTC_OFFSET + 6)
+#define RTC_YEAR                (RTC_OFFSET + 7)
+#define RTC_CENTURY_MASK        0x3f
+#define RTC_SECONDS_MASK        0x7f
+#define RTC_DAY_MASK            0x07
+/*
+ * Bits in the Control/Century register
+ */
+#define RTC_WRITE               0x80
+#define RTC_READ                0x40
+/*
+ * Bits in the Seconds register
+ */
+#define RTC_STOP                0x80
+/*
+ * Bits in the Day register
+ */
+#define RTC_BATT_FLAG           0x80
+#define RTC_FREQ_TEST           0x40
+#endif /* __LINUX_DS1742RTC_H */
diff --git a/include/linux/hdreg.h b/include/linux/hdreg.h
index b5d660089de4..2b54eac738ea 100644
--- a/include/linux/hdreg.h
+++ b/include/linux/hdreg.h
@@ -80,10 +80,12 @@
 /*
 * Define standard taskfile in/out register
 */
-#define IDE_TASKFILE_STD_OUT_FLAGS      0xFE
 #define IDE_TASKFILE_STD_IN_FLAGS       0xFE
-#define IDE_HOB_STD_OUT_FLAGS           0x3C
 #define IDE_HOB_STD_IN_FLAGS            0x3C
+#ifndef __KERNEL__
+#define IDE_TASKFILE_STD_OUT_FLAGS      0xFE
+#define IDE_HOB_STD_OUT_FLAGS           0x3C
+#endif
 typedef unsigned char task_ioreg_t;
 typedef unsigned long sata_ioreg_t;
diff --git a/include/linux/ide.h b/include/linux/ide.h
index ac8b25fa6506..a39c3c59789d 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -1089,9 +1089,11 @@ enum {
 /*
 * Subdrivers support.
+ *
+ * The gendriver.owner field should be set to the module owner of this driver.
+ * The gendriver.name field should be set to the name of this driver
 */
 typedef struct ide_driver_s {
-        struct module                   *owner;
        const char                      *version;
        u8                              media;
        unsigned supports_dsc_overlap   : 1;
@@ -1199,37 +1201,11 @@ extern u64 ide_get_error_location(ide_drive_t *, char *);
 */
 typedef enum {
        ide_wait,       /* insert rq at end of list, and wait for it */
-        ide_next,       /* insert rq immediately after current request */
        ide_preempt,    /* insert rq in front of current request */
        ide_head_wait,  /* insert rq in front of current request and wait for it */
        ide_end         /* insert rq at end of list, but don't wait for it */
 } ide_action_t;
-/*
- * This function issues a special IDE device request
- * onto the request queue.
- *
- * If action is ide_wait, then the rq is queued at the end of the
- * request queue, and the function sleeps until it has been processed.
- * This is for use when invoked from an ioctl handler.
- *
- * If action is ide_preempt, then the rq is queued at the head of
- * the request queue, displacing the currently-being-processed
- * request and this function returns immediately without waiting
- * for the new rq to be completed.  This is VERY DANGEROUS, and is
- * intended for careful use by the ATAPI tape/cdrom driver code.
- *
- * If action is ide_next, then the rq is queued immediately after
- * the currently-being-processed-request (if any), and the function
- * returns without waiting for the new rq to be completed.  As above,
- * This is VERY DANGEROUS, and is intended for careful use by the
- * ATAPI tape/cdrom driver code.
- *
- * If action is ide_end, then the rq is queued at the end of the
- * request queue, and the function returns immediately without waiting
- * for the new rq to be completed. This is again intended for careful
- * use by the ATAPI tape/cdrom driver code.
- */
 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
 /*
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 1013a42d10b1..0986d19be0b7 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -940,7 +940,9 @@ unsigned long max_sane_readahead(unsigned long nr);
 /* Do stack extension */
 extern int expand_stack(struct vm_area_struct *vma, unsigned long address);
+#ifdef CONFIG_IA64
 extern int expand_upwards(struct vm_area_struct *vma, unsigned long address);
+#endif
 /* Look up the first VMA which satisfies  addr < vm_end,  NULL if none. */
 extern struct vm_area_struct * find_vma(struct mm_struct * mm, unsigned long addr);
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index c99a83f88dc9..1e737e269db9 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -620,6 +620,7 @@
 #define PCI_DEVICE_ID_SI_961            0x0961
 #define PCI_DEVICE_ID_SI_962            0x0962
 #define PCI_DEVICE_ID_SI_963            0x0963
+#define PCI_DEVICE_ID_SI_965            0x0965
 #define PCI_DEVICE_ID_SI_5511           0x5511
 #define PCI_DEVICE_ID_SI_5513           0x5513
 #define PCI_DEVICE_ID_SI_5518           0x5518
@@ -1235,6 +1236,7 @@
 #define PCI_DEVICE_ID_VIA_8703_51_0     0x3148
 #define PCI_DEVICE_ID_VIA_8237_SATA     0x3149
 #define PCI_DEVICE_ID_VIA_XN266         0x3156
+#define PCI_DEVICE_ID_VIA_6410          0x3164
 #define PCI_DEVICE_ID_VIA_8754C_0       0x3168
 #define PCI_DEVICE_ID_VIA_8235          0x3177
 #define PCI_DEVICE_ID_VIA_8385_0        0x3188
@@ -1402,6 +1404,7 @@
 #define PCI_SUBDEVICE_ID_KEYSPAN_SX2    0x5334
 #define PCI_VENDOR_ID_MARVELL           0x11ab
+#define PCI_DEVICE_ID_MARVELL_GT64111   0x4146
 #define PCI_DEVICE_ID_MARVELL_GT64260   0x6430
 #define PCI_DEVICE_ID_MARVELL_MV64360   0x6460
 #define PCI_DEVICE_ID_MARVELL_MV64460   0x6480
diff --git a/include/linux/uinput.h b/include/linux/uinput.h
index 84876077027f..0ff7ca68e5c5 100644
--- a/include/linux/uinput.h
+++ b/include/linux/uinput.h
@@ -34,8 +34,7 @@
 #define UINPUT_BUFFER_SIZE      16
 #define UINPUT_NUM_REQUESTS     16
-/* state flags => bit index for {set|clear|test}_bit ops */
+enum uinput_state { UIST_NEW_DEVICE, UIST_SETUP_COMPLETE, UIST_CREATED };
-#define UIST_CREATED            0
 struct uinput_request {
        int                     id;
@@ -52,11 +51,12 @@ struct uinput_request {
 struct uinput_device {
        struct input_dev        *dev;
-        unsigned long           state;
+        struct semaphore        sem;
+        enum uinput_state       state;
        wait_queue_head_t       waitq;
-        unsigned char           ready,
+        unsigned char           ready;
-                                head,
+        unsigned char           head;
-                                tail;
+        unsigned char           tail;
        struct input_event      buff[UINPUT_BUFFER_SIZE];
        struct uinput_request   *requests[UINPUT_NUM_REQUESTS];
@@ -91,6 +91,7 @@ struct uinput_ff_erase {
 #define UI_SET_SNDBIT           _IOW(UINPUT_IOCTL_BASE, 106, int)
 #define UI_SET_FFBIT            _IOW(UINPUT_IOCTL_BASE, 107, int)
 #define UI_SET_PHYS             _IOW(UINPUT_IOCTL_BASE, 108, char*)
+#define UI_SET_SWBIT            _IOW(UINPUT_IOCTL_BASE, 109, int)
 #define UI_BEGIN_FF_UPLOAD      _IOWR(UINPUT_IOCTL_BASE, 200, struct uinput_ff_upload)
 #define UI_END_FF_UPLOAD        _IOW(UINPUT_IOCTL_BASE, 201, struct uinput_ff_upload)
diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h
index b93fd8c1d884..cde2f4f4f501 100644
--- a/include/net/ieee80211.h
+++ b/include/net/ieee80211.h
@@ -1042,7 +1042,7 @@ static inline u8 *ieee80211_get_payload(struct ieee80211_hdr *hdr)
        case IEEE80211_4ADDR_LEN:
                return ((struct ieee80211_hdr_4addr *)hdr)->payload;
        }
+        return NULL;
 }
 static inline int ieee80211_is_ofdm_rate(u8 rate)
author	Dave Jones <davej@redhat.com>	2005-11-21 09:56:52 -0500
committer	Dave Jones <davej@redhat.com>	2005-11-21 09:56:52 -0500
commit	e7e37ee9c547213d726b29c2510cbb6696050405 (patch)
tree	50c45625de666b23f209d79eb1bfae05c64feee9 /include
parent	c243f1f1f6545985afcc6adf1fc085729029c3ee (diff)
parent	db93a82fa9d8b4d6e31c227922eaae829253bb88 (diff)