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authorDominik Brodowski <linux@dominikbrodowski.net>2006-12-04 20:39:16 -0500
committerDave Jones <davej@redhat.com>2006-12-12 17:29:04 -0500
commite11952b971ee729a8fdc2bfb1252f5760c0287b0 (patch)
tree38ef26ec277daebf98af6abf64b5c32b28a4d32c /include
parent7531a0b56f6211a5407c8cda4968c3b7ca9496ab (diff)
[CPUFREQ] p4-clockmod: fix support for Core
Support for Core CPUs was broken in two ways in speedstep-lib: for x86_64, we missed a MSR definition; for both x86_64 and i386, the FSB calculation was wrong by four (it's a quad-pumped bus). Also increase the accuracy of the calculation. Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-x86_64/msr.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h
index e61582288737..207fed998a0b 100644
--- a/include/asm-x86_64/msr.h
+++ b/include/asm-x86_64/msr.h
@@ -189,6 +189,7 @@ static inline unsigned int cpuid_edx(unsigned int op)
189 189
190#define MSR_IA32_PERFCTR0 0xc1 190#define MSR_IA32_PERFCTR0 0xc1
191#define MSR_IA32_PERFCTR1 0xc2 191#define MSR_IA32_PERFCTR1 0xc2
192#define MSR_FSB_FREQ 0xcd
192 193
193#define MSR_MTRRcap 0x0fe 194#define MSR_MTRRcap 0x0fe
194#define MSR_IA32_BBL_CR_CTL 0x119 195#define MSR_IA32_BBL_CR_CTL 0x119