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authorJens Axboe <axboe@fb.com>2015-02-21 01:12:02 -0500
committerJens Axboe <axboe@fb.com>2015-02-21 01:12:02 -0500
commitdecf6d79de84e427d409ff74156af2e77ffadd84 (patch)
tree45801481c596ecd0b05c719025e29fa028aaceee /include
parent045c47ca306acf30c740c285a77a4b4bda6be7c5 (diff)
parent0c0f9b95c8b710b74772edd9693fe7ab5419a75a (diff)
Merge branch 'for-3.20' of git://git.infradead.org/users/kbusch/linux-nvme into for-linus
Merge 3.20 NVMe changes from Keith.
Diffstat (limited to 'include')
-rw-r--r--include/linux/nvme.h9
-rw-r--r--include/uapi/linux/nvme.h26
2 files changed, 29 insertions, 6 deletions
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index 19a5d4b23209..0adad4a5419b 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -17,7 +17,6 @@
17 17
18#include <uapi/linux/nvme.h> 18#include <uapi/linux/nvme.h>
19#include <linux/pci.h> 19#include <linux/pci.h>
20#include <linux/miscdevice.h>
21#include <linux/kref.h> 20#include <linux/kref.h>
22#include <linux/blk-mq.h> 21#include <linux/blk-mq.h>
23 22
@@ -62,8 +61,6 @@ enum {
62 NVME_CSTS_SHST_MASK = 3 << 2, 61 NVME_CSTS_SHST_MASK = 3 << 2,
63}; 62};
64 63
65#define NVME_VS(major, minor) (major << 16 | minor)
66
67extern unsigned char nvme_io_timeout; 64extern unsigned char nvme_io_timeout;
68#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 65#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
69 66
@@ -91,9 +88,10 @@ struct nvme_dev {
91 struct nvme_bar __iomem *bar; 88 struct nvme_bar __iomem *bar;
92 struct list_head namespaces; 89 struct list_head namespaces;
93 struct kref kref; 90 struct kref kref;
94 struct miscdevice miscdev; 91 struct device *device;
95 work_func_t reset_workfn; 92 work_func_t reset_workfn;
96 struct work_struct reset_work; 93 struct work_struct reset_work;
94 struct work_struct probe_work;
97 char name[12]; 95 char name[12];
98 char serial[20]; 96 char serial[20];
99 char model[40]; 97 char model[40];
@@ -105,7 +103,6 @@ struct nvme_dev {
105 u16 abort_limit; 103 u16 abort_limit;
106 u8 event_limit; 104 u8 event_limit;
107 u8 vwc; 105 u8 vwc;
108 u8 initialized;
109}; 106};
110 107
111/* 108/*
@@ -121,6 +118,7 @@ struct nvme_ns {
121 unsigned ns_id; 118 unsigned ns_id;
122 int lba_shift; 119 int lba_shift;
123 int ms; 120 int ms;
121 int pi_type;
124 u64 mode_select_num_blocks; 122 u64 mode_select_num_blocks;
125 u32 mode_select_block_len; 123 u32 mode_select_block_len;
126}; 124};
@@ -138,6 +136,7 @@ struct nvme_iod {
138 int nents; /* Used in scatterlist */ 136 int nents; /* Used in scatterlist */
139 int length; /* Of data, in bytes */ 137 int length; /* Of data, in bytes */
140 dma_addr_t first_dma; 138 dma_addr_t first_dma;
139 struct scatterlist meta_sg[1]; /* metadata requires single contiguous buffer */
141 struct scatterlist sg[0]; 140 struct scatterlist sg[0];
142}; 141};
143 142
diff --git a/include/uapi/linux/nvme.h b/include/uapi/linux/nvme.h
index 26386cf3db44..aef9a81b2d75 100644
--- a/include/uapi/linux/nvme.h
+++ b/include/uapi/linux/nvme.h
@@ -115,7 +115,13 @@ struct nvme_id_ns {
115 __le16 nawun; 115 __le16 nawun;
116 __le16 nawupf; 116 __le16 nawupf;
117 __le16 nacwu; 117 __le16 nacwu;
118 __u8 rsvd40[80]; 118 __le16 nabsn;
119 __le16 nabo;
120 __le16 nabspf;
121 __u16 rsvd46;
122 __le64 nvmcap[2];
123 __u8 rsvd64[40];
124 __u8 nguid[16];
119 __u8 eui64[8]; 125 __u8 eui64[8];
120 struct nvme_lbaf lbaf[16]; 126 struct nvme_lbaf lbaf[16];
121 __u8 rsvd192[192]; 127 __u8 rsvd192[192];
@@ -124,10 +130,22 @@ struct nvme_id_ns {
124 130
125enum { 131enum {
126 NVME_NS_FEAT_THIN = 1 << 0, 132 NVME_NS_FEAT_THIN = 1 << 0,
133 NVME_NS_FLBAS_LBA_MASK = 0xf,
134 NVME_NS_FLBAS_META_EXT = 0x10,
127 NVME_LBAF_RP_BEST = 0, 135 NVME_LBAF_RP_BEST = 0,
128 NVME_LBAF_RP_BETTER = 1, 136 NVME_LBAF_RP_BETTER = 1,
129 NVME_LBAF_RP_GOOD = 2, 137 NVME_LBAF_RP_GOOD = 2,
130 NVME_LBAF_RP_DEGRADED = 3, 138 NVME_LBAF_RP_DEGRADED = 3,
139 NVME_NS_DPC_PI_LAST = 1 << 4,
140 NVME_NS_DPC_PI_FIRST = 1 << 3,
141 NVME_NS_DPC_PI_TYPE3 = 1 << 2,
142 NVME_NS_DPC_PI_TYPE2 = 1 << 1,
143 NVME_NS_DPC_PI_TYPE1 = 1 << 0,
144 NVME_NS_DPS_PI_FIRST = 1 << 3,
145 NVME_NS_DPS_PI_MASK = 0x7,
146 NVME_NS_DPS_PI_TYPE1 = 1,
147 NVME_NS_DPS_PI_TYPE2 = 2,
148 NVME_NS_DPS_PI_TYPE3 = 3,
131}; 149};
132 150
133struct nvme_smart_log { 151struct nvme_smart_log {
@@ -261,6 +279,10 @@ enum {
261 NVME_RW_DSM_LATENCY_LOW = 3 << 4, 279 NVME_RW_DSM_LATENCY_LOW = 3 << 4,
262 NVME_RW_DSM_SEQ_REQ = 1 << 6, 280 NVME_RW_DSM_SEQ_REQ = 1 << 6,
263 NVME_RW_DSM_COMPRESSED = 1 << 7, 281 NVME_RW_DSM_COMPRESSED = 1 << 7,
282 NVME_RW_PRINFO_PRCHK_REF = 1 << 10,
283 NVME_RW_PRINFO_PRCHK_APP = 1 << 11,
284 NVME_RW_PRINFO_PRCHK_GUARD = 1 << 12,
285 NVME_RW_PRINFO_PRACT = 1 << 13,
264}; 286};
265 287
266struct nvme_dsm_cmd { 288struct nvme_dsm_cmd {
@@ -549,6 +571,8 @@ struct nvme_passthru_cmd {
549 __u32 result; 571 __u32 result;
550}; 572};
551 573
574#define NVME_VS(major, minor) (((major) << 16) | ((minor) << 8))
575
552#define nvme_admin_cmd nvme_passthru_cmd 576#define nvme_admin_cmd nvme_passthru_cmd
553 577
554#define NVME_IOCTL_ID _IO('N', 0x40) 578#define NVME_IOCTL_ID _IO('N', 0x40)