Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6:
  PCI: add acpi_find_root_bridge_handle
  PCI: acpi_pcihp: run _OSC on a root bridge
  x86/PCI: irq and pci_ids patch for Intel Ibex Peak PCHs
  x86/PCI: allow scanning of 255 PCI busses
  x86, pci: detect end_bus_number according to acpi/e820 reserved, v2
  pci: debug extra pci bus resources
  pci: debug extra pci resources range

2 files changed, 14 insertions, 0 deletions

diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
index 3ba25065fa96..8837928fbf33 100644
--- a/include/linux/pci-acpi.h
+++ b/include/linux/pci-acpi.h
@@ -57,6 +57,15 @@ static inline acpi_status pcie_osc_support_set(u32 flags)
 {
         return __pci_osc_support_set(flags, PCI_EXPRESS_ROOT_HID_STRING);
 }
+static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
+{
+        /* Find root host bridge */
+        while (pdev->bus->self)
+                pdev = pdev->bus->self;
+
+        return acpi_get_pci_rootbridge_handle(pci_domain_nr(pdev->bus),
+                        pdev->bus->number);
+}
 #else
 #if !defined(AE_ERROR)
 typedef u32             acpi_status;
@@ -66,6 +75,8 @@ static inline acpi_status pci_osc_control_set(acpi_handle handle, u32 flags)
 {return AE_ERROR;}
 static inline acpi_status pci_osc_support_set(u32 flags) {return AE_ERROR;} 
 static inline acpi_status pcie_osc_support_set(u32 flags) {return AE_ERROR;}
+static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
+{ return NULL; }
 #endif
 
 #endif  /* _PCI_ACPI_H_ */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 9ec2bcce8e83..f1624b396754 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2428,6 +2428,9 @@
 #define PCI_DEVICE_ID_INTEL_ICH10_3     0x3a1a
 #define PCI_DEVICE_ID_INTEL_ICH10_4     0x3a30
 #define PCI_DEVICE_ID_INTEL_ICH10_5     0x3a60
+#define PCI_DEVICE_ID_INTEL_PCH_0       0x3b10
+#define PCI_DEVICE_ID_INTEL_PCH_1       0x3b11
+#define PCI_DEVICE_ID_INTEL_PCH_2       0x3b30
 #define PCI_DEVICE_ID_INTEL_IOAT_SNB    0x402f
 #define PCI_DEVICE_ID_INTEL_5100_16     0x65f0
 #define PCI_DEVICE_ID_INTEL_5100_21     0x65f5