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authorSuresh Siddha <suresh.b.siddha@intel.com>2008-07-29 13:29:19 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-30 13:49:24 -0400
commitdc1e35c6e95e8923cf1d3510438b63c600fee1e2 (patch)
tree4348f51f1bfdd124efd6d16dcc552bd4a148fdfb /include
parenta648bf4632628c787abb0514277f2a231fca39ca (diff)
x86, xsave: enable xsave/xrstor on cpus with xsave support
Enables xsave/xrstor by turning on cr4.osxsave on cpu's which have the xsave support. For now, features that OS supports/enabled are FP and SSE. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include')
-rw-r--r--include/asm-x86/i387.h1
-rw-r--r--include/asm-x86/processor-flags.h1
-rw-r--r--include/asm-x86/processor.h12
-rw-r--r--include/asm-x86/xsave.h26
4 files changed, 40 insertions, 0 deletions
diff --git a/include/asm-x86/i387.h b/include/asm-x86/i387.h
index 3958de6aad0e..6a6647896670 100644
--- a/include/asm-x86/i387.h
+++ b/include/asm-x86/i387.h
@@ -18,6 +18,7 @@
18#include <asm/sigcontext.h> 18#include <asm/sigcontext.h>
19#include <asm/user.h> 19#include <asm/user.h>
20#include <asm/uaccess.h> 20#include <asm/uaccess.h>
21#include <asm/xsave.h>
21 22
22extern void fpu_init(void); 23extern void fpu_init(void);
23extern void mxcsr_feature_mask_init(void); 24extern void mxcsr_feature_mask_init(void);
diff --git a/include/asm-x86/processor-flags.h b/include/asm-x86/processor-flags.h
index 5dd79774f693..dc5f0712f9fa 100644
--- a/include/asm-x86/processor-flags.h
+++ b/include/asm-x86/processor-flags.h
@@ -59,6 +59,7 @@
59#define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU save and restore */ 59#define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU save and restore */
60#define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */ 60#define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */
61#define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */ 61#define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */
62#define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */
62 63
63/* 64/*
64 * x86-64 Task Priority Register, CR8 65 * x86-64 Task Priority Register, CR8
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index d60b4d81febe..d7c0221c0278 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -346,6 +346,18 @@ struct i387_soft_struct {
346 u32 entry_eip; 346 u32 entry_eip;
347}; 347};
348 348
349struct xsave_hdr_struct {
350 u64 xstate_bv;
351 u64 reserved1[2];
352 u64 reserved2[5];
353} __attribute__((packed));
354
355struct xsave_struct {
356 struct i387_fxsave_struct i387;
357 struct xsave_hdr_struct xsave_hdr;
358 /* new processor state extensions will go here */
359} __attribute__ ((packed, aligned (64)));
360
349union thread_xstate { 361union thread_xstate {
350 struct i387_fsave_struct fsave; 362 struct i387_fsave_struct fsave;
351 struct i387_fxsave_struct fxsave; 363 struct i387_fxsave_struct fxsave;
diff --git a/include/asm-x86/xsave.h b/include/asm-x86/xsave.h
new file mode 100644
index 000000000000..6d70e62c6bdc
--- /dev/null
+++ b/include/asm-x86/xsave.h
@@ -0,0 +1,26 @@
1#ifndef __ASM_X86_XSAVE_H
2#define __ASM_X86_XSAVE_H
3
4#include <asm/processor.h>
5#include <asm/i387.h>
6
7#define XSTATE_FP 0x1
8#define XSTATE_SSE 0x2
9
10#define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
11
12#define FXSAVE_SIZE 512
13
14/*
15 * These are the features that the OS can handle currently.
16 */
17#define XCNTXT_LMASK (XSTATE_FP | XSTATE_SSE)
18#define XCNTXT_HMASK 0x0
19
20extern unsigned int xstate_size, pcntxt_hmask, pcntxt_lmask;
21extern struct xsave_struct *init_xstate_buf;
22
23extern void xsave_cntxt_init(void);
24extern void xsave_init(void);
25
26#endif