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authoreric miao <eric.miao@marvell.com>2008-01-28 18:00:02 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-02-04 08:17:33 -0500
commitc4d1fb627ff307256d792280efcb09e1235affea (patch)
tree260ed71dd94883353de1e9256d3d7337d0a7b81a /include
parent16dfdbf038706c12c56f327d14c6b901edc376a3 (diff)
[ARM] pxa: add preliminary suspend/resume code for pxa3xx
1. clear RDH bit after resuming back from D3, otherwise, the multi function pins will retain the low power state 2. save/restore essential system registers Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-pxa/pxa3xx-regs.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/asm-arm/arch-pxa/pxa3xx-regs.h b/include/asm-arm/arch-pxa/pxa3xx-regs.h
index 66d54119757c..8e1b3ead827f 100644
--- a/include/asm-arm/arch-pxa/pxa3xx-regs.h
+++ b/include/asm-arm/arch-pxa/pxa3xx-regs.h
@@ -12,6 +12,19 @@
12 12
13#ifndef __ASM_ARCH_PXA3XX_REGS_H 13#ifndef __ASM_ARCH_PXA3XX_REGS_H
14#define __ASM_ARCH_PXA3XX_REGS_H 14#define __ASM_ARCH_PXA3XX_REGS_H
15/*
16 * Service Power Management Unit (MPMU)
17 */
18#define PMCR __REG(0x40F50000) /* Power Manager Control Register */
19#define PSR __REG(0x40F50004) /* Power Manager S2 Status Register */
20#define PSPR __REG(0x40F50008) /* Power Manager Scratch Pad Register */
21#define PCFR __REG(0x40F5000C) /* Power Manager General Configuration Register */
22#define PWER __REG(0x40F50010) /* Power Manager Wake-up Enable Register */
23#define PWSR __REG(0x40F50014) /* Power Manager Wake-up Status Register */
24#define PECR __REG(0x40F50018) /* Power Manager EXT_WAKEUP[1:0] Control Register */
25#define DCDCSR __REG(0x40F50080) /* DC-DC Controller Status Register */
26#define PVCR __REG(0x40F50100) /* Power Manager Voltage Change Control Register */
27#define PCMD(x) __REG(0x40F50110 + ((x) << 2))
15 28
16/* 29/*
17 * Slave Power Managment Unit 30 * Slave Power Managment Unit