diff options
| author | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2007-07-02 12:06:53 -0400 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2007-07-10 07:55:50 -0400 |
| commit | b6f41cc8304ce04a5afa3e1e5d2ff6e8088831b7 (patch) | |
| tree | e2c4d009108857ca89d084d9e407f956a1c7ce71 /include | |
| parent | 078f194045f892a10f4a5406e7cb06a7f8d42c57 (diff) | |
[POWERPC] Consolidate PowerPC 750 cputable features
The 750 CPU_FTR macros have quite a bit of duplication in them. Consolidate
them to use CPU_FTRS_750 and only list the unique features for derivatives.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-powerpc/cputable.h | 26 |
1 files changed, 6 insertions, 20 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index c8f0aa228648..3dc8e2dfca84 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h | |||
| @@ -225,26 +225,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, | |||
| 225 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ | 225 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ |
| 226 | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ | 226 | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ |
| 227 | CPU_FTR_PPC_LE) | 227 | CPU_FTR_PPC_LE) |
| 228 | #define CPU_FTRS_750CL (CPU_FTR_COMMON | \ | 228 | #define CPU_FTRS_750CL (CPU_FTRS_750 | CPU_FTR_HAS_HIGH_BATS) |
| 229 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ | 229 | #define CPU_FTRS_750FX1 (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM) |
| 230 | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ | 230 | #define CPU_FTRS_750FX2 (CPU_FTRS_750 | CPU_FTR_NO_DPM) |
| 231 | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) | 231 | #define CPU_FTRS_750FX (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | \ |
| 232 | #define CPU_FTRS_750FX1 (CPU_FTR_COMMON | \ | 232 | CPU_FTR_HAS_HIGH_BATS) |
| 233 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ | 233 | #define CPU_FTRS_750GX (CPU_FTRS_750FX) |
| 234 | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ | ||
| 235 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM | CPU_FTR_PPC_LE) | ||
| 236 | #define CPU_FTRS_750FX2 (CPU_FTR_COMMON | \ | ||
| 237 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ | ||
| 238 | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ | ||
| 239 | CPU_FTR_NO_DPM | CPU_FTR_PPC_LE) | ||
| 240 | #define CPU_FTRS_750FX (CPU_FTR_COMMON | \ | ||
| 241 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ | ||
| 242 | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ | ||
| 243 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) | ||
| 244 | #define CPU_FTRS_750GX (CPU_FTR_COMMON | \ | ||
| 245 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ | ||
| 246 | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ | ||
| 247 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) | ||
| 248 | #define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | \ | 234 | #define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | \ |
| 249 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ | 235 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ |
| 250 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \ | 236 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \ |