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authorArtem B. Bityuckiy <dedekind@infradead.org>2005-07-06 10:43:18 -0400
committerThomas Gleixner <tglx@mtd.linutronix.de>2005-07-06 13:40:38 -0400
commitb3539219c9ea20ebf6a5ea3cc534f423a3607c41 (patch)
treed17c31c0eac0a7290ba5011b59a100fd9e9c9532 /include
parent6430a8def12edebc1c9c7c2621d33ca0e8653c33 (diff)
parenta18bcb7450840f07a772a45229de4811d930f461 (diff)
Merge with rsync://fileserver/linux
Update to 2.6.12-rc3
Diffstat (limited to 'include')
-rw-r--r--include/acpi/acpi_bus.h17
-rw-r--r--include/acpi/acpi_drivers.h1
-rw-r--r--include/asm-alpha/pci.h19
-rw-r--r--include/asm-alpha/serial.h47
-rw-r--r--include/asm-arm/arch-ixp2000/ixdp2x00.h4
-rw-r--r--include/asm-arm/arch-ixp2000/ixdp2x01.h4
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h19
-rw-r--r--include/asm-arm/arch-ixp2000/vmalloc.h2
-rw-r--r--include/asm-arm/arch-ixp4xx/debug-macro.S2
-rw-r--r--include/asm-arm/arch-omap/usb.h9
-rw-r--r--include/asm-arm/arch-pxa/debug-macro.S2
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h2
-rw-r--r--include/asm-arm/arch-s3c2410/audio.h49
-rw-r--r--include/asm-arm/hardware/arm_timer.h21
-rw-r--r--include/asm-arm/ide.h2
-rw-r--r--include/asm-arm/io.h2
-rw-r--r--include/asm-arm/mach/arch.h34
-rw-r--r--include/asm-arm/mach/time.h2
-rw-r--r--include/asm-arm/pci.h10
-rw-r--r--include/asm-arm/stat.h2
-rw-r--r--include/asm-arm/system.h16
-rw-r--r--include/asm-arm/tlbflush.h28
-rw-r--r--include/asm-arm26/serial.h22
-rw-r--r--include/asm-frv/pci.h10
-rw-r--r--include/asm-i386/i8253.h6
-rw-r--r--include/asm-i386/ide.h12
-rw-r--r--include/asm-i386/mach-default/do_timer.h1
-rw-r--r--include/asm-i386/pci.h10
-rw-r--r--include/asm-i386/serial.h102
-rw-r--r--include/asm-i386/tlbflush.h12
-rw-r--r--include/asm-i386/unistd.h4
-rw-r--r--include/asm-ia64/iosapic.h12
-rw-r--r--include/asm-ia64/kprobes.h14
-rw-r--r--include/asm-ia64/mmu_context.h3
-rw-r--r--include/asm-ia64/pci.h19
-rw-r--r--include/asm-ia64/sections.h1
-rw-r--r--include/asm-ia64/sn/addrs.h17
-rw-r--r--include/asm-ia64/sn/l1.h1
-rw-r--r--include/asm-ia64/sn/shub_mmr.h346
-rw-r--r--include/asm-ia64/sn/simulator.h13
-rw-r--r--include/asm-ia64/sn/sn2/sn_hwperf.h2
-rw-r--r--include/asm-ia64/sn/sn_sal.h10
-rw-r--r--include/asm-ia64/sn/tioca_provider.h1
-rw-r--r--include/asm-ia64/unistd.h2
-rw-r--r--include/asm-ia64/vga.h5
-rw-r--r--include/asm-m68k/serial.h47
-rw-r--r--include/asm-mips/pci.h10
-rw-r--r--include/asm-mips/serial.h84
-rw-r--r--include/asm-parisc/pci.h19
-rw-r--r--include/asm-parisc/serial.h16
-rw-r--r--include/asm-ppc/mpc8xx.h4
-rw-r--r--include/asm-ppc/open_pic.h6
-rw-r--r--include/asm-ppc/pc_serial.h86
-rw-r--r--include/asm-ppc/pci.h16
-rw-r--r--include/asm-ppc/unistd.h4
-rw-r--r--include/asm-ppc64/byteorder.h10
-rw-r--r--include/asm-ppc64/iSeries/ItLpQueue.h15
-rw-r--r--include/asm-ppc64/kprobes.h5
-rw-r--r--include/asm-ppc64/paca.h3
-rw-r--r--include/asm-ppc64/pci.h26
-rw-r--r--include/asm-s390/system.h4
-rw-r--r--include/asm-sh/bigsur/serial.h5
-rw-r--r--include/asm-sh/ec3104/serial.h4
-rw-r--r--include/asm-sh/pci.h10
-rw-r--r--include/asm-sh/serial.h6
-rw-r--r--include/asm-sh64/pci.h10
-rw-r--r--include/asm-sh64/serial.h4
-rw-r--r--include/asm-sparc/pci.h10
-rw-r--r--include/asm-sparc64/auxio.h2
-rw-r--r--include/asm-sparc64/floppy.h16
-rw-r--r--include/asm-sparc64/irq.h56
-rw-r--r--include/asm-sparc64/pbm.h3
-rw-r--r--include/asm-sparc64/pci.h19
-rw-r--r--include/asm-sparc64/rwsem.h3
-rw-r--r--include/asm-sparc64/signal.h15
-rw-r--r--include/asm-sparc64/spinlock.h29
-rw-r--r--include/asm-sparc64/spitfire.h1
-rw-r--r--include/asm-v850/pci.h10
-rw-r--r--include/asm-x86_64/io_apic.h2
-rw-r--r--include/asm-x86_64/pci.h10
-rw-r--r--include/asm-x86_64/serial.h102
-rw-r--r--include/asm-x86_64/tlbflush.h12
-rw-r--r--include/asm-x86_64/unistd.h6
-rw-r--r--include/asm-xtensa/delay.h2
-rw-r--r--include/asm-xtensa/errno.h128
-rw-r--r--include/asm-xtensa/ipc.h20
-rw-r--r--include/linux/acpi.h19
-rw-r--r--include/linux/atalk.h2
-rw-r--r--include/linux/bio.h14
-rw-r--r--include/linux/blkdev.h26
-rw-r--r--include/linux/byteorder/swabb.h17
-rw-r--r--include/linux/cciss_ioctl.h1
-rw-r--r--include/linux/compat_ioctl.h19
-rw-r--r--include/linux/device.h7
-rw-r--r--include/linux/elevator.h8
-rw-r--r--include/linux/etherdevice.h3
-rw-r--r--include/linux/fs.h19
-rw-r--r--include/linux/i2c-dev.h1
-rw-r--r--include/linux/if_bonding.h7
-rw-r--r--include/linux/if_shaper.h2
-rw-r--r--include/linux/in6.h2
-rw-r--r--include/linux/init_task.h2
-rw-r--r--include/linux/input.h4
-rw-r--r--include/linux/ioprio.h88
-rw-r--r--include/linux/irq.h5
-rw-r--r--include/linux/joystick.h33
-rw-r--r--include/linux/kprobes.h30
-rw-r--r--include/linux/libps2.h1
-rw-r--r--include/linux/mod_devicetable.h46
-rw-r--r--include/linux/netlink.h1
-rw-r--r--include/linux/pci-dynids.h18
-rw-r--r--include/linux/pci.h38
-rw-r--r--include/linux/pci_ids.h10
-rw-r--r--include/linux/pkt_cls.h1
-rw-r--r--include/linux/pkt_sched.h9
-rw-r--r--include/linux/pmu.h6
-rw-r--r--include/linux/rtnetlink.h10
-rw-r--r--include/linux/sched.h6
-rw-r--r--include/linux/seccomp.h10
-rw-r--r--include/linux/serial_8250.h1
-rw-r--r--include/linux/serio.h6
-rw-r--r--include/linux/skbuff.h19
-rw-r--r--include/linux/sysctl.h1
-rw-r--r--include/linux/tc_ematch/tc_em_meta.h2
-rw-r--r--include/linux/tcp.h2
-rw-r--r--include/linux/usb_ch9.h189
-rw-r--r--include/linux/usb_gadget.h2
-rw-r--r--include/linux/usb_isp116x.h47
-rw-r--r--include/linux/videodev2.h2
-rw-r--r--include/linux/writeback.h8
-rw-r--r--include/linux/xattr_acl.h50
-rw-r--r--include/media/tuner.h20
-rw-r--r--include/net/ieee80211.h856
-rw-r--r--include/net/ipv6.h1
-rw-r--r--include/net/pkt_sched.h17
-rw-r--r--include/net/sch_generic.h13
-rw-r--r--include/net/sctp/constants.h18
-rw-r--r--include/net/sctp/structs.h4
-rw-r--r--include/net/slhc_vj.h21
-rw-r--r--include/net/sock.h7
-rw-r--r--include/net/tcp.h156
-rw-r--r--include/pcmcia/ciscode.h2
-rw-r--r--include/pcmcia/cs.h2
-rw-r--r--include/pcmcia/device_id.h249
-rw-r--r--include/pcmcia/ds.h9
-rw-r--r--include/pcmcia/ss.h34
146 files changed, 2577 insertions, 1385 deletions
diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h
index c627bc408a6b..9ad142476f33 100644
--- a/include/acpi/acpi_bus.h
+++ b/include/acpi/acpi_bus.h
@@ -108,6 +108,21 @@ typedef int (*acpi_op_unbind) (struct acpi_device *device);
108typedef int (*acpi_op_match) (struct acpi_device *device, 108typedef int (*acpi_op_match) (struct acpi_device *device,
109 struct acpi_driver *driver); 109 struct acpi_driver *driver);
110 110
111struct acpi_bus_ops {
112 u32 acpi_op_add:1;
113 u32 acpi_op_remove:1;
114 u32 acpi_op_lock:1;
115 u32 acpi_op_start:1;
116 u32 acpi_op_stop:1;
117 u32 acpi_op_suspend:1;
118 u32 acpi_op_resume:1;
119 u32 acpi_op_scan:1;
120 u32 acpi_op_bind:1;
121 u32 acpi_op_unbind:1;
122 u32 acpi_op_match:1;
123 u32 reserved:21;
124};
125
111struct acpi_device_ops { 126struct acpi_device_ops {
112 acpi_op_add add; 127 acpi_op_add add;
113 acpi_op_remove remove; 128 acpi_op_remove remove;
@@ -327,9 +342,9 @@ int acpi_bus_generate_event (struct acpi_device *device, u8 type, int data);
327int acpi_bus_receive_event (struct acpi_bus_event *event); 342int acpi_bus_receive_event (struct acpi_bus_event *event);
328int acpi_bus_register_driver (struct acpi_driver *driver); 343int acpi_bus_register_driver (struct acpi_driver *driver);
329int acpi_bus_unregister_driver (struct acpi_driver *driver); 344int acpi_bus_unregister_driver (struct acpi_driver *driver);
330int acpi_bus_scan (struct acpi_device *start);
331int acpi_bus_add (struct acpi_device **child, struct acpi_device *parent, 345int acpi_bus_add (struct acpi_device **child, struct acpi_device *parent,
332 acpi_handle handle, int type); 346 acpi_handle handle, int type);
347int acpi_bus_start (struct acpi_device *device);
333 348
334 349
335int acpi_match_ids (struct acpi_device *device, char *ids); 350int acpi_match_ids (struct acpi_device *device, char *ids);
diff --git a/include/acpi/acpi_drivers.h b/include/acpi/acpi_drivers.h
index c62e92ec43b2..4ec722d73381 100644
--- a/include/acpi/acpi_drivers.h
+++ b/include/acpi/acpi_drivers.h
@@ -68,6 +68,7 @@ void acpi_pci_irq_del_prt (int segment, int bus);
68 68
69struct pci_bus; 69struct pci_bus;
70 70
71acpi_status acpi_get_pci_id (acpi_handle handle, struct acpi_pci_id *id);
71int acpi_pci_bind (struct acpi_device *device); 72int acpi_pci_bind (struct acpi_device *device);
72int acpi_pci_unbind (struct acpi_device *device); 73int acpi_pci_unbind (struct acpi_device *device);
73int acpi_pci_bind_root (struct acpi_device *device, struct acpi_pci_id *id, struct pci_bus *bus); 74int acpi_pci_bind_root (struct acpi_device *device, struct acpi_pci_id *id, struct pci_bus *bus);
diff --git a/include/asm-alpha/pci.h b/include/asm-alpha/pci.h
index 0c7b57bc043a..b7806aa3785c 100644
--- a/include/asm-alpha/pci.h
+++ b/include/asm-alpha/pci.h
@@ -223,6 +223,25 @@ pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr,
223 /* Nothing to do. */ 223 /* Nothing to do. */
224} 224}
225 225
226#ifdef CONFIG_PCI
227static inline void pci_dma_burst_advice(struct pci_dev *pdev,
228 enum pci_dma_burst_strategy *strat,
229 unsigned long *strategy_parameter)
230{
231 unsigned long cacheline_size;
232 u8 byte;
233
234 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
235 if (byte == 0)
236 cacheline_size = 1024;
237 else
238 cacheline_size = (int) byte * 4;
239
240 *strat = PCI_DMA_BURST_BOUNDARY;
241 *strategy_parameter = cacheline_size;
242}
243#endif
244
226/* TODO: integrate with include/asm-generic/pci.h ? */ 245/* TODO: integrate with include/asm-generic/pci.h ? */
227static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 246static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
228{ 247{
diff --git a/include/asm-alpha/serial.h b/include/asm-alpha/serial.h
index 7b2d9ee95a44..7e4b2987d453 100644
--- a/include/asm-alpha/serial.h
+++ b/include/asm-alpha/serial.h
@@ -22,54 +22,9 @@
22#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF 22#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
23#endif 23#endif
24 24
25#ifdef CONFIG_SERIAL_MANY_PORTS 25#define SERIAL_PORT_DFNS \
26#define FOURPORT_FLAGS ASYNC_FOURPORT
27#define ACCENT_FLAGS 0
28#define BOCA_FLAGS 0
29#endif
30
31#define STD_SERIAL_PORT_DEFNS \
32 /* UART CLK PORT IRQ FLAGS */ \ 26 /* UART CLK PORT IRQ FLAGS */ \
33 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ 27 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
34 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ 28 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
35 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ 29 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
36 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ 30 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
37
38
39#ifdef CONFIG_SERIAL_MANY_PORTS
40#define EXTRA_SERIAL_PORT_DEFNS \
41 { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS }, /* ttyS4 */ \
42 { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS }, /* ttyS5 */ \
43 { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS }, /* ttyS6 */ \
44 { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS }, /* ttyS7 */ \
45 { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS }, /* ttyS8 */ \
46 { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS }, /* ttyS9 */ \
47 { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS }, /* ttyS10 */ \
48 { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS }, /* ttyS11 */ \
49 { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS }, /* ttyS12 */ \
50 { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS }, /* ttyS13 */ \
51 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS14 (spare) */ \
52 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS15 (spare) */ \
53 { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS }, /* ttyS16 */ \
54 { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS }, /* ttyS17 */ \
55 { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS }, /* ttyS18 */ \
56 { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS }, /* ttyS19 */ \
57 { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS }, /* ttyS20 */ \
58 { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS }, /* ttyS21 */ \
59 { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS }, /* ttyS22 */ \
60 { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS }, /* ttyS23 */ \
61 { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS }, /* ttyS24 */ \
62 { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS }, /* ttyS25 */ \
63 { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS }, /* ttyS26 */ \
64 { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS }, /* ttyS27 */ \
65 { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS }, /* ttyS28 */ \
66 { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS }, /* ttyS29 */ \
67 { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS }, /* ttyS30 */ \
68 { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS }, /* ttyS31 */
69#else
70#define EXTRA_SERIAL_PORT_DEFNS
71#endif
72
73#define SERIAL_PORT_DFNS \
74 STD_SERIAL_PORT_DEFNS \
75 EXTRA_SERIAL_PORT_DEFNS
diff --git a/include/asm-arm/arch-ixp2000/ixdp2x00.h b/include/asm-arm/arch-ixp2000/ixdp2x00.h
index 3a398dfbf125..229381c64283 100644
--- a/include/asm-arm/arch-ixp2000/ixdp2x00.h
+++ b/include/asm-arm/arch-ixp2000/ixdp2x00.h
@@ -21,8 +21,8 @@
21 * On board CPLD memory map 21 * On board CPLD memory map
22 */ 22 */
23#define IXDP2X00_PHYS_CPLD_BASE 0xc7000000 23#define IXDP2X00_PHYS_CPLD_BASE 0xc7000000
24#define IXDP2X00_VIRT_CPLD_BASE 0xfafff000 24#define IXDP2X00_VIRT_CPLD_BASE 0xfe000000
25#define IXDP2X00_CPLD_SIZE 0x00001000 25#define IXDP2X00_CPLD_SIZE 0x00100000
26 26
27 27
28#define IXDP2X00_CPLD_REG(x) \ 28#define IXDP2X00_CPLD_REG(x) \
diff --git a/include/asm-arm/arch-ixp2000/ixdp2x01.h b/include/asm-arm/arch-ixp2000/ixdp2x01.h
index b3a1bcda8d01..b768009c3a51 100644
--- a/include/asm-arm/arch-ixp2000/ixdp2x01.h
+++ b/include/asm-arm/arch-ixp2000/ixdp2x01.h
@@ -18,8 +18,8 @@
18#define __IXDP2X01_H__ 18#define __IXDP2X01_H__
19 19
20#define IXDP2X01_PHYS_CPLD_BASE 0xc6024000 20#define IXDP2X01_PHYS_CPLD_BASE 0xc6024000
21#define IXDP2X01_VIRT_CPLD_BASE 0xfafff000 21#define IXDP2X01_VIRT_CPLD_BASE 0xfe000000
22#define IXDP2X01_CPLD_REGION_SIZE 0x00001000 22#define IXDP2X01_CPLD_REGION_SIZE 0x00100000
23 23
24#define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg) 24#define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg)
25#define IXDP2X01_CPLD_PHYS_REG(reg) (volatile u32*)(IXDP2X01_PHYS_CPLD_BASE | reg) 25#define IXDP2X01_CPLD_PHYS_REG(reg) (volatile u32*)(IXDP2X01_PHYS_CPLD_BASE | reg)
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 5eb47d4bfbf6..75623f81ef75 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -18,6 +18,21 @@
18#ifndef _IXP2000_REGS_H_ 18#ifndef _IXP2000_REGS_H_
19#define _IXP2000_REGS_H_ 19#define _IXP2000_REGS_H_
20 20
21/*
22 * IXP2000 linux memory map:
23 *
24 * virt phys size
25 * fb000000 db000000 16M PCI CFG1
26 * fc000000 da000000 16M PCI CFG0
27 * fd000000 d8000000 16M PCI I/O
28 * fe[0-7]00000 8M per-platform mappings
29 * feb00000 c8000000 1M MSF
30 * fec00000 df000000 1M PCI CSRs
31 * fed00000 de000000 1M PCI CREG
32 * fee00000 d6000000 1M INTCTL
33 * fef00000 c0000000 1M CAP
34 */
35
21/* 36/*
22 * Static I/O regions. 37 * Static I/O regions.
23 * 38 *
@@ -71,6 +86,10 @@
71#define IXP2000_PCI_CSR_VIRT_BASE 0xfec00000 86#define IXP2000_PCI_CSR_VIRT_BASE 0xfec00000
72#define IXP2000_PCI_CSR_SIZE 0x00100000 87#define IXP2000_PCI_CSR_SIZE 0x00100000
73 88
89#define IXP2000_MSF_PHYS_BASE 0xc8000000
90#define IXP2000_MSF_VIRT_BASE 0xfeb00000
91#define IXP2000_MSF_SIZE 0x00100000
92
74#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 93#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000
75#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 94#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000
76#define IXP2000_PCI_IO_SIZE 0x01000000 95#define IXP2000_PCI_IO_SIZE 0x01000000
diff --git a/include/asm-arm/arch-ixp2000/vmalloc.h b/include/asm-arm/arch-ixp2000/vmalloc.h
index 473dff4ec561..275136963a0c 100644
--- a/include/asm-arm/arch-ixp2000/vmalloc.h
+++ b/include/asm-arm/arch-ixp2000/vmalloc.h
@@ -17,4 +17,4 @@
17 * The vmalloc() routines leaves a hole of 4kB between each vmalloced 17 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
18 * area for the same reason. ;) 18 * area for the same reason. ;)
19 */ 19 */
20#define VMALLOC_END 0xfaffefff 20#define VMALLOC_END 0xfb000000
diff --git a/include/asm-arm/arch-ixp4xx/debug-macro.S b/include/asm-arm/arch-ixp4xx/debug-macro.S
index 45a6c6cc29d5..2e23651e217f 100644
--- a/include/asm-arm/arch-ixp4xx/debug-macro.S
+++ b/include/asm-arm/arch-ixp4xx/debug-macro.S
@@ -14,8 +14,8 @@
14 mrc p15, 0, \rx, c1, c0 14 mrc p15, 0, \rx, c1, c0
15 tst \rx, #1 @ MMU enabled? 15 tst \rx, #1 @ MMU enabled?
16 moveq \rx, #0xc8000000 16 moveq \rx, #0xc8000000
17 orrne \rx, \rx, #0x00b00000
18 movne \rx, #0xff000000 17 movne \rx, #0xff000000
18 orrne \rx, \rx, #0x00b00000
19 add \rx,\rx,#3 @ Uart regs are at off set of 3 if 19 add \rx,\rx,#3 @ Uart regs are at off set of 3 if
20 @ byte writes used - Big Endian. 20 @ byte writes used - Big Endian.
21 .endm 21 .endm
diff --git a/include/asm-arm/arch-omap/usb.h b/include/asm-arm/arch-omap/usb.h
index 1438c6cef0ca..054fb9a8e0c6 100644
--- a/include/asm-arm/arch-omap/usb.h
+++ b/include/asm-arm/arch-omap/usb.h
@@ -47,6 +47,15 @@
47# define HMC_TLLATTACH (1 << 6) 47# define HMC_TLLATTACH (1 << 6)
48# define OTG_HMC(w) (((w)>>0)&0x3f) 48# define OTG_HMC(w) (((w)>>0)&0x3f)
49#define OTG_CTRL_REG OTG_REG32(0x0c) 49#define OTG_CTRL_REG OTG_REG32(0x0c)
50# define OTG_USB2_EN (1 << 29)
51# define OTG_USB2_DP (1 << 28)
52# define OTG_USB2_DM (1 << 27)
53# define OTG_USB1_EN (1 << 26)
54# define OTG_USB1_DP (1 << 25)
55# define OTG_USB1_DM (1 << 24)
56# define OTG_USB0_EN (1 << 23)
57# define OTG_USB0_DP (1 << 22)
58# define OTG_USB0_DM (1 << 21)
50# define OTG_ASESSVLD (1 << 20) 59# define OTG_ASESSVLD (1 << 20)
51# define OTG_BSESSEND (1 << 19) 60# define OTG_BSESSEND (1 << 19)
52# define OTG_BSESSVLD (1 << 18) 61# define OTG_BSESSVLD (1 << 18)
diff --git a/include/asm-arm/arch-pxa/debug-macro.S b/include/asm-arm/arch-pxa/debug-macro.S
index f288e74b67c2..b6ec68879176 100644
--- a/include/asm-arm/arch-pxa/debug-macro.S
+++ b/include/asm-arm/arch-pxa/debug-macro.S
@@ -11,6 +11,8 @@
11 * 11 *
12*/ 12*/
13 13
14#include "hardware.h"
15
14 .macro addruart,rx 16 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0 17 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled? 18 tst \rx, #1 @ MMU enabled?
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index b5e54a9e9fa7..51f0fe0ac165 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1505,6 +1505,7 @@
1505#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */ 1505#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */
1506#define PSSR_RDH (1 << 5) /* Read Disable Hold */ 1506#define PSSR_RDH (1 << 5) /* Read Disable Hold */
1507#define PSSR_PH (1 << 4) /* Peripheral Control Hold */ 1507#define PSSR_PH (1 << 4) /* Peripheral Control Hold */
1508#define PSSR_STS (1 << 3) /* Standby Mode Status */
1508#define PSSR_VFS (1 << 2) /* VDD Fault Status */ 1509#define PSSR_VFS (1 << 2) /* VDD Fault Status */
1509#define PSSR_BFS (1 << 1) /* Battery Fault Status */ 1510#define PSSR_BFS (1 << 1) /* Battery Fault Status */
1510#define PSSR_SSS (1 << 0) /* Software Sleep Status */ 1511#define PSSR_SSS (1 << 0) /* Software Sleep Status */
@@ -1965,6 +1966,7 @@
1965#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */ 1966#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
1966#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */ 1967#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
1967 1968
1969#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
1968#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ 1970#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
1969#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */ 1971#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
1970#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */ 1972#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
diff --git a/include/asm-arm/arch-s3c2410/audio.h b/include/asm-arm/arch-s3c2410/audio.h
new file mode 100644
index 000000000000..0d276e67f2fb
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/audio.h
@@ -0,0 +1,49 @@
1/* linux/include/asm-arm/arch-s3c2410/audio.h
2 *
3 * (c) 2004-2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/SWLINUX/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C24XX - Audio platfrom_device info
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * Changelog:
14 * 20-Nov-2004 BJD Created file
15 * 07-Mar-2005 BJD Added suspend/resume calls
16*/
17
18#ifndef __ASM_ARCH_AUDIO_H
19#define __ASM_ARCH_AUDIO_H __FILE__
20
21/* struct s3c24xx_iis_ops
22 *
23 * called from the s3c24xx audio core to deal with the architecture
24 * or the codec's setup and control.
25 *
26 * the pointer to itself is passed through in case the caller wants to
27 * embed this in an larger structure for easy reference to it's context.
28*/
29
30struct s3c24xx_iis_ops {
31 struct module *owner;
32
33 int (*startup)(struct s3c24xx_iis_ops *me);
34 void (*shutdown)(struct s3c24xx_iis_ops *me);
35 int (*suspend)(struct s3c24xx_iis_ops *me);
36 int (*resume)(struct s3c24xx_iis_ops *me);
37
38 int (*open)(struct s3c24xx_iis_ops *me, snd_pcm_substream_t *strm);
39 int (*close)(struct s3c24xx_iis_ops *me, snd_pcm_substream_t *strm);
40 int (*prepare)(struct s3c24xx_iis_ops *me, snd_pcm_substream_t *strm, snd_pcm_runtime_t *rt);
41};
42
43struct s3c24xx_platdata_iis {
44 const char *codec_clk;
45 struct s3c24xx_iis_ops *ops;
46 int (*match_dev)(struct device *dev);
47};
48
49#endif /* __ASM_ARCH_AUDIO_H */
diff --git a/include/asm-arm/hardware/arm_timer.h b/include/asm-arm/hardware/arm_timer.h
new file mode 100644
index 000000000000..04be3bdf46b8
--- /dev/null
+++ b/include/asm-arm/hardware/arm_timer.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H
2#define __ASM_ARM_HARDWARE_ARM_TIMER_H
3
4#define TIMER_LOAD 0x00
5#define TIMER_VALUE 0x04
6#define TIMER_CTRL 0x08
7#define TIMER_CTRL_ONESHOT (1 << 0)
8#define TIMER_CTRL_32BIT (1 << 1)
9#define TIMER_CTRL_DIV1 (0 << 2)
10#define TIMER_CTRL_DIV16 (1 << 2)
11#define TIMER_CTRL_DIV256 (2 << 2)
12#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable (versatile only) */
13#define TIMER_CTRL_PERIODIC (1 << 6)
14#define TIMER_CTRL_ENABLE (1 << 7)
15
16#define TIMER_INTCLR 0x0c
17#define TIMER_RIS 0x10
18#define TIMER_MIS 0x14
19#define TIMER_BGLOAD 0x18
20
21#endif
diff --git a/include/asm-arm/ide.h b/include/asm-arm/ide.h
index 2114acb3d237..4f68c8a5a199 100644
--- a/include/asm-arm/ide.h
+++ b/include/asm-arm/ide.h
@@ -5,7 +5,7 @@
5 */ 5 */
6 6
7/* 7/*
8 * This file contains the i386 architecture specific IDE code. 8 * This file contains the ARM architecture specific IDE code.
9 */ 9 */
10 10
11#ifndef __ASMARM_IDE_H 11#ifndef __ASMARM_IDE_H
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index cc4b5f5dbfcf..cfa71a0dffb6 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -82,7 +82,7 @@ extern void __readwrite_bug(const char *fn);
82 * only. Their primary purpose is to access PCI and ISA peripherals. 82 * only. Their primary purpose is to access PCI and ISA peripherals.
83 * 83 *
84 * Note that for a big endian machine, this implies that the following 84 * Note that for a big endian machine, this implies that the following
85 * big endian mode connectivity is in place, as described by numerious 85 * big endian mode connectivity is in place, as described by numerous
86 * ARM documents: 86 * ARM documents:
87 * 87 *
88 * PCI: D0-D7 D8-D15 D16-D23 D24-D31 88 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index 3a32e929ec8c..56c6bf4ab0c3 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -26,7 +26,7 @@ struct machine_desc {
26 * page tabe entry */ 26 * page tabe entry */
27 27
28 const char *name; /* architecture name */ 28 const char *name; /* architecture name */
29 unsigned int param_offset; /* parameter page */ 29 unsigned long boot_params; /* tagged list */
30 30
31 unsigned int video_start; /* start of video RAM */ 31 unsigned int video_start; /* start of video RAM */
32 unsigned int video_end; /* end of video RAM */ 32 unsigned int video_end; /* end of video RAM */
@@ -54,38 +54,6 @@ const struct machine_desc __mach_desc_##_type \
54 .nr = MACH_TYPE_##_type, \ 54 .nr = MACH_TYPE_##_type, \
55 .name = _name, 55 .name = _name,
56 56
57#define MAINTAINER(n)
58
59#define BOOT_MEM(_pram,_pio,_vio) \
60 .phys_ram = _pram, \
61 .phys_io = _pio, \
62 .io_pg_offst = ((_vio)>>18)&0xfffc,
63
64#define BOOT_PARAMS(_params) \
65 .param_offset = _params,
66
67#define VIDEO(_start,_end) \
68 .video_start = _start, \
69 .video_end = _end,
70
71#define DISABLE_PARPORT(_n) \
72 .reserve_lp##_n = 1,
73
74#define SOFT_REBOOT \
75 .soft_reboot = 1,
76
77#define FIXUP(_func) \
78 .fixup = _func,
79
80#define MAPIO(_func) \
81 .map_io = _func,
82
83#define INITIRQ(_func) \
84 .init_irq = _func,
85
86#define INIT_MACHINE(_func) \
87 .init_machine = _func,
88
89#define MACHINE_END \ 57#define MACHINE_END \
90}; 58};
91 59
diff --git a/include/asm-arm/mach/time.h b/include/asm-arm/mach/time.h
index 047980ad18d1..2cf279a44017 100644
--- a/include/asm-arm/mach/time.h
+++ b/include/asm-arm/mach/time.h
@@ -60,6 +60,8 @@ struct dyn_tick_timer {
60}; 60};
61 61
62void timer_dyn_reprogram(void); 62void timer_dyn_reprogram(void);
63#else
64#define timer_dyn_reprogram() do { } while (0)
63#endif 65#endif
64 66
65extern struct sys_timer *system_timer; 67extern struct sys_timer *system_timer;
diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h
index 40ffaefbeb1a..e300646fe650 100644
--- a/include/asm-arm/pci.h
+++ b/include/asm-arm/pci.h
@@ -42,6 +42,16 @@ static inline void pcibios_penalize_isa_irq(int irq)
42#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 42#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
43#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 43#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
44 44
45#ifdef CONFIG_PCI
46static inline void pci_dma_burst_advice(struct pci_dev *pdev,
47 enum pci_dma_burst_strategy *strat,
48 unsigned long *strategy_parameter)
49{
50 *strat = PCI_DMA_BURST_INFINITY;
51 *strategy_parameter = ~0UL;
52}
53#endif
54
45#define HAVE_PCI_MMAP 55#define HAVE_PCI_MMAP
46extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 56extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
47 enum pci_mmap_state mmap_state, int write_combine); 57 enum pci_mmap_state mmap_state, int write_combine);
diff --git a/include/asm-arm/stat.h b/include/asm-arm/stat.h
index ca8e7a8436da..ec4e2c2e3b47 100644
--- a/include/asm-arm/stat.h
+++ b/include/asm-arm/stat.h
@@ -89,6 +89,6 @@ struct stat64 {
89 unsigned long st_ctime_nsec; 89 unsigned long st_ctime_nsec;
90 90
91 unsigned long long st_ino; 91 unsigned long long st_ino;
92}; 92} __attribute__((packed));
93 93
94#endif 94#endif
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 3d0d2860b6db..2f44b2044214 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -85,7 +85,9 @@ struct pt_regs;
85void die(const char *msg, struct pt_regs *regs, int err) 85void die(const char *msg, struct pt_regs *regs, int err)
86 __attribute__((noreturn)); 86 __attribute__((noreturn));
87 87
88void die_if_kernel(const char *str, struct pt_regs *regs, int err); 88struct siginfo;
89void notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
90 unsigned long err, unsigned long trap);
89 91
90void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, 92void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
91 struct pt_regs *), 93 struct pt_regs *),
@@ -290,7 +292,6 @@ do { \
290}) 292})
291 293
292#ifdef CONFIG_SMP 294#ifdef CONFIG_SMP
293#error SMP not supported
294 295
295#define smp_mb() mb() 296#define smp_mb() mb()
296#define smp_rmb() rmb() 297#define smp_rmb() rmb()
@@ -304,6 +305,8 @@ do { \
304#define smp_wmb() barrier() 305#define smp_wmb() barrier()
305#define smp_read_barrier_depends() do { } while(0) 306#define smp_read_barrier_depends() do { } while(0)
306 307
308#endif /* CONFIG_SMP */
309
307#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) 310#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
308/* 311/*
309 * On the StrongARM, "swp" is terminally broken since it bypasses the 312 * On the StrongARM, "swp" is terminally broken since it bypasses the
@@ -316,9 +319,16 @@ do { \
316 * 319 *
317 * We choose (1) since its the "easiest" to achieve here and is not 320 * We choose (1) since its the "easiest" to achieve here and is not
318 * dependent on the processor type. 321 * dependent on the processor type.
322 *
323 * NOTE that this solution won't work on an SMP system, so explcitly
324 * forbid it here.
319 */ 325 */
326#ifdef CONFIG_SMP
327#error SMP is not supported on SA1100/SA110
328#else
320#define swp_is_buggy 329#define swp_is_buggy
321#endif 330#endif
331#endif
322 332
323static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) 333static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
324{ 334{
@@ -361,8 +371,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
361 return ret; 371 return ret;
362} 372}
363 373
364#endif /* CONFIG_SMP */
365
366#endif /* __ASSEMBLY__ */ 374#endif /* __ASSEMBLY__ */
367 375
368#define arch_align_stack(x) (x) 376#define arch_align_stack(x) (x)
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index 8a864b118569..9387a5e1ffe0 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -235,7 +235,7 @@ extern struct cpu_tlb_fns cpu_tlb;
235 235
236#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f))) 236#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
237 237
238static inline void flush_tlb_all(void) 238static inline void local_flush_tlb_all(void)
239{ 239{
240 const int zero = 0; 240 const int zero = 0;
241 const unsigned int __tlb_flag = __cpu_tlb_flags; 241 const unsigned int __tlb_flag = __cpu_tlb_flags;
@@ -253,7 +253,7 @@ static inline void flush_tlb_all(void)
253 asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero)); 253 asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero));
254} 254}
255 255
256static inline void flush_tlb_mm(struct mm_struct *mm) 256static inline void local_flush_tlb_mm(struct mm_struct *mm)
257{ 257{
258 const int zero = 0; 258 const int zero = 0;
259 const int asid = ASID(mm); 259 const int asid = ASID(mm);
@@ -282,7 +282,7 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
282} 282}
283 283
284static inline void 284static inline void
285flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) 285local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
286{ 286{
287 const int zero = 0; 287 const int zero = 0;
288 const unsigned int __tlb_flag = __cpu_tlb_flags; 288 const unsigned int __tlb_flag = __cpu_tlb_flags;
@@ -313,7 +313,7 @@ flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
313 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (uaddr)); 313 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (uaddr));
314} 314}
315 315
316static inline void flush_tlb_kernel_page(unsigned long kaddr) 316static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
317{ 317{
318 const int zero = 0; 318 const int zero = 0;
319 const unsigned int __tlb_flag = __cpu_tlb_flags; 319 const unsigned int __tlb_flag = __cpu_tlb_flags;
@@ -384,8 +384,24 @@ static inline void clean_pmd_entry(pmd_t *pmd)
384/* 384/*
385 * Convert calls to our calling convention. 385 * Convert calls to our calling convention.
386 */ 386 */
387#define flush_tlb_range(vma,start,end) __cpu_flush_user_tlb_range(start,end,vma) 387#define local_flush_tlb_range(vma,start,end) __cpu_flush_user_tlb_range(start,end,vma)
388#define flush_tlb_kernel_range(s,e) __cpu_flush_kern_tlb_range(s,e) 388#define local_flush_tlb_kernel_range(s,e) __cpu_flush_kern_tlb_range(s,e)
389
390#ifndef CONFIG_SMP
391#define flush_tlb_all local_flush_tlb_all
392#define flush_tlb_mm local_flush_tlb_mm
393#define flush_tlb_page local_flush_tlb_page
394#define flush_tlb_kernel_page local_flush_tlb_kernel_page
395#define flush_tlb_range local_flush_tlb_range
396#define flush_tlb_kernel_range local_flush_tlb_kernel_range
397#else
398extern void flush_tlb_all(void);
399extern void flush_tlb_mm(struct mm_struct *mm);
400extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr);
401extern void flush_tlb_kernel_page(unsigned long kaddr);
402extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
403extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
404#endif
389 405
390/* 406/*
391 * if PG_dcache_dirty is set for the page, we need to ensure that any 407 * if PG_dcache_dirty is set for the page, we need to ensure that any
diff --git a/include/asm-arm26/serial.h b/include/asm-arm26/serial.h
index 21e1df31f086..5fc747d1b501 100644
--- a/include/asm-arm26/serial.h
+++ b/include/asm-arm26/serial.h
@@ -30,34 +30,16 @@
30#if defined(CONFIG_ARCH_A5K) 30#if defined(CONFIG_ARCH_A5K)
31 /* UART CLK PORT IRQ FLAGS */ 31 /* UART CLK PORT IRQ FLAGS */
32 32
33#define STD_SERIAL_PORT_DEFNS \ 33#define SERIAL_PORT_DFNS \
34 { 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS }, /* ttyS0 */ \ 34 { 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS }, /* ttyS0 */ \
35 { 0, BASE_BAUD, 0x2F8, 10, STD_COM_FLAGS }, /* ttyS1 */ 35 { 0, BASE_BAUD, 0x2F8, 10, STD_COM_FLAGS }, /* ttyS1 */
36 36
37#else 37#else
38 38
39#define STD_SERIAL_PORT_DEFNS \ 39#define SERIAL_PORT_DFNS \
40 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS0 */ \ 40 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS0 */ \
41 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS1 */ 41 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS1 */
42 42
43#endif 43#endif
44 44
45#define EXTRA_SERIAL_PORT_DEFNS \
46 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS2 */ \
47 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS3 */ \
48 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS4 */ \
49 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS5 */ \
50 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS6 */ \
51 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS7 */ \
52 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS8 */ \
53 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS9 */ \
54 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS10 */ \
55 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS11 */ \
56 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS12 */ \
57 { 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS13 */
58
59#define SERIAL_PORT_DFNS \
60 STD_SERIAL_PORT_DEFNS \
61 EXTRA_SERIAL_PORT_DEFNS
62
63#endif 45#endif
diff --git a/include/asm-frv/pci.h b/include/asm-frv/pci.h
index a6a469231f62..b4efe5e3591a 100644
--- a/include/asm-frv/pci.h
+++ b/include/asm-frv/pci.h
@@ -57,6 +57,16 @@ extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
57 */ 57 */
58#define PCI_DMA_BUS_IS_PHYS (1) 58#define PCI_DMA_BUS_IS_PHYS (1)
59 59
60#ifdef CONFIG_PCI
61static inline void pci_dma_burst_advice(struct pci_dev *pdev,
62 enum pci_dma_burst_strategy *strat,
63 unsigned long *strategy_parameter)
64{
65 *strat = PCI_DMA_BURST_INFINITY;
66 *strategy_parameter = ~0UL;
67}
68#endif
69
60/* 70/*
61 * These are pretty much arbitary with the CoMEM implementation. 71 * These are pretty much arbitary with the CoMEM implementation.
62 * We have the whole address space to ourselves. 72 * We have the whole address space to ourselves.
diff --git a/include/asm-i386/i8253.h b/include/asm-i386/i8253.h
new file mode 100644
index 000000000000..015d8df07690
--- /dev/null
+++ b/include/asm-i386/i8253.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_I8253_H__
2#define __ASM_I8253_H__
3
4extern spinlock_t i8253_lock;
5
6#endif /* __ASM_I8253_H__ */
diff --git a/include/asm-i386/ide.h b/include/asm-i386/ide.h
index 859ebf4da632..79dfab87135d 100644
--- a/include/asm-i386/ide.h
+++ b/include/asm-i386/ide.h
@@ -41,13 +41,17 @@ static __inline__ int ide_default_irq(unsigned long base)
41 41
42static __inline__ unsigned long ide_default_io_base(int index) 42static __inline__ unsigned long ide_default_io_base(int index)
43{ 43{
44 if (pci_find_device(PCI_ANY_ID, PCI_ANY_ID, NULL) == NULL) {
45 switch(index) {
46 case 2: return 0x1e8;
47 case 3: return 0x168;
48 case 4: return 0x1e0;
49 case 5: return 0x160;
50 }
51 }
44 switch (index) { 52 switch (index) {
45 case 0: return 0x1f0; 53 case 0: return 0x1f0;
46 case 1: return 0x170; 54 case 1: return 0x170;
47 case 2: return 0x1e8;
48 case 3: return 0x168;
49 case 4: return 0x1e0;
50 case 5: return 0x160;
51 default: 55 default:
52 return 0; 56 return 0;
53 } 57 }
diff --git a/include/asm-i386/mach-default/do_timer.h b/include/asm-i386/mach-default/do_timer.h
index 03dd13a48a8c..56211414fc95 100644
--- a/include/asm-i386/mach-default/do_timer.h
+++ b/include/asm-i386/mach-default/do_timer.h
@@ -1,6 +1,7 @@
1/* defines for inline arch setup functions */ 1/* defines for inline arch setup functions */
2 2
3#include <asm/apic.h> 3#include <asm/apic.h>
4#include <asm/i8259.h>
4 5
5/** 6/**
6 * do_timer_interrupt_hook - hook into timer tick 7 * do_timer_interrupt_hook - hook into timer tick
diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h
index fb749b85a739..3561899eb826 100644
--- a/include/asm-i386/pci.h
+++ b/include/asm-i386/pci.h
@@ -99,6 +99,16 @@ static inline void pcibios_add_platform_entries(struct pci_dev *dev)
99{ 99{
100} 100}
101 101
102#ifdef CONFIG_PCI
103static inline void pci_dma_burst_advice(struct pci_dev *pdev,
104 enum pci_dma_burst_strategy *strat,
105 unsigned long *strategy_parameter)
106{
107 *strat = PCI_DMA_BURST_INFINITY;
108 *strategy_parameter = ~0UL;
109}
110#endif
111
102#endif /* __KERNEL__ */ 112#endif /* __KERNEL__ */
103 113
104/* implement the pci_ DMA API in terms of the generic device dma_ one */ 114/* implement the pci_ DMA API in terms of the generic device dma_ one */
diff --git a/include/asm-i386/serial.h b/include/asm-i386/serial.h
index 21ddecc77c77..e1ecfccb743b 100644
--- a/include/asm-i386/serial.h
+++ b/include/asm-i386/serial.h
@@ -22,109 +22,9 @@
22#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF 22#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
23#endif 23#endif
24 24
25#ifdef CONFIG_SERIAL_MANY_PORTS 25#define SERIAL_PORT_DFNS \
26#define FOURPORT_FLAGS ASYNC_FOURPORT
27#define ACCENT_FLAGS 0
28#define BOCA_FLAGS 0
29#define HUB6_FLAGS 0
30#endif
31
32#define MCA_COM_FLAGS (STD_COM_FLAGS|ASYNC_BOOT_ONLYMCA)
33
34/*
35 * The following define the access methods for the HUB6 card. All
36 * access is through two ports for all 24 possible chips. The card is
37 * selected through the high 2 bits, the port on that card with the
38 * "middle" 3 bits, and the register on that port with the bottom
39 * 3 bits.
40 *
41 * While the access port and interrupt is configurable, the default
42 * port locations are 0x302 for the port control register, and 0x303
43 * for the data read/write register. Normally, the interrupt is at irq3
44 * but can be anything from 3 to 7 inclusive. Note that using 3 will
45 * require disabling com2.
46 */
47
48#define C_P(card,port) (((card)<<6|(port)<<3) + 1)
49
50#define STD_SERIAL_PORT_DEFNS \
51 /* UART CLK PORT IRQ FLAGS */ \ 26 /* UART CLK PORT IRQ FLAGS */ \
52 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ 27 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
53 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ 28 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
54 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ 29 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
55 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ 30 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
56
57
58#ifdef CONFIG_SERIAL_MANY_PORTS
59#define EXTRA_SERIAL_PORT_DEFNS \
60 { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS }, /* ttyS4 */ \
61 { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS }, /* ttyS5 */ \
62 { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS }, /* ttyS6 */ \
63 { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS }, /* ttyS7 */ \
64 { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS }, /* ttyS8 */ \
65 { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS }, /* ttyS9 */ \
66 { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS }, /* ttyS10 */ \
67 { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS }, /* ttyS11 */ \
68 { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS }, /* ttyS12 */ \
69 { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS }, /* ttyS13 */ \
70 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS14 (spare) */ \
71 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS15 (spare) */ \
72 { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS }, /* ttyS16 */ \
73 { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS }, /* ttyS17 */ \
74 { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS }, /* ttyS18 */ \
75 { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS }, /* ttyS19 */ \
76 { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS }, /* ttyS20 */ \
77 { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS }, /* ttyS21 */ \
78 { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS }, /* ttyS22 */ \
79 { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS }, /* ttyS23 */ \
80 { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS }, /* ttyS24 */ \
81 { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS }, /* ttyS25 */ \
82 { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS }, /* ttyS26 */ \
83 { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS }, /* ttyS27 */ \
84 { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS }, /* ttyS28 */ \
85 { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS }, /* ttyS29 */ \
86 { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS }, /* ttyS30 */ \
87 { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS }, /* ttyS31 */
88#else
89#define EXTRA_SERIAL_PORT_DEFNS
90#endif
91
92/* You can have up to four HUB6's in the system, but I've only
93 * included two cards here for a total of twelve ports.
94 */
95#if (defined(CONFIG_HUB6) && defined(CONFIG_SERIAL_MANY_PORTS))
96#define HUB6_SERIAL_PORT_DFNS \
97 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,0) }, /* ttyS32 */ \
98 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,1) }, /* ttyS33 */ \
99 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,2) }, /* ttyS34 */ \
100 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,3) }, /* ttyS35 */ \
101 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,4) }, /* ttyS36 */ \
102 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,5) }, /* ttyS37 */ \
103 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,0) }, /* ttyS38 */ \
104 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,1) }, /* ttyS39 */ \
105 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,2) }, /* ttyS40 */ \
106 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,3) }, /* ttyS41 */ \
107 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,4) }, /* ttyS42 */ \
108 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,5) }, /* ttyS43 */
109#else
110#define HUB6_SERIAL_PORT_DFNS
111#endif
112
113#ifdef CONFIG_MCA
114#define MCA_SERIAL_PORT_DFNS \
115 { 0, BASE_BAUD, 0x3220, 3, MCA_COM_FLAGS }, \
116 { 0, BASE_BAUD, 0x3228, 3, MCA_COM_FLAGS }, \
117 { 0, BASE_BAUD, 0x4220, 3, MCA_COM_FLAGS }, \
118 { 0, BASE_BAUD, 0x4228, 3, MCA_COM_FLAGS }, \
119 { 0, BASE_BAUD, 0x5220, 3, MCA_COM_FLAGS }, \
120 { 0, BASE_BAUD, 0x5228, 3, MCA_COM_FLAGS },
121#else
122#define MCA_SERIAL_PORT_DFNS
123#endif
124
125#define SERIAL_PORT_DFNS \
126 STD_SERIAL_PORT_DEFNS \
127 EXTRA_SERIAL_PORT_DEFNS \
128 HUB6_SERIAL_PORT_DFNS \
129 MCA_SERIAL_PORT_DFNS
130
diff --git a/include/asm-i386/tlbflush.h b/include/asm-i386/tlbflush.h
index f22fab0cea26..ab216e1370ef 100644
--- a/include/asm-i386/tlbflush.h
+++ b/include/asm-i386/tlbflush.h
@@ -22,16 +22,18 @@
22 */ 22 */
23#define __flush_tlb_global() \ 23#define __flush_tlb_global() \
24 do { \ 24 do { \
25 unsigned int tmpreg; \ 25 unsigned int tmpreg, cr4, cr4_orig; \
26 \ 26 \
27 __asm__ __volatile__( \ 27 __asm__ __volatile__( \
28 "movl %1, %%cr4; # turn off PGE \n" \ 28 "movl %%cr4, %2; # turn off PGE \n" \
29 "movl %2, %1; \n" \
30 "andl %3, %1; \n" \
31 "movl %1, %%cr4; \n" \
29 "movl %%cr3, %0; \n" \ 32 "movl %%cr3, %0; \n" \
30 "movl %0, %%cr3; # flush TLB \n" \ 33 "movl %0, %%cr3; # flush TLB \n" \
31 "movl %2, %%cr4; # turn PGE back on \n" \ 34 "movl %2, %%cr4; # turn PGE back on \n" \
32 : "=&r" (tmpreg) \ 35 : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) \
33 : "r" (mmu_cr4_features & ~X86_CR4_PGE), \ 36 : "i" (~X86_CR4_PGE) \
34 "r" (mmu_cr4_features) \
35 : "memory"); \ 37 : "memory"); \
36 } while (0) 38 } while (0)
37 39
diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h
index 176413fb9ae3..e25e4c71a879 100644
--- a/include/asm-i386/unistd.h
+++ b/include/asm-i386/unistd.h
@@ -294,8 +294,10 @@
294#define __NR_add_key 286 294#define __NR_add_key 286
295#define __NR_request_key 287 295#define __NR_request_key 287
296#define __NR_keyctl 288 296#define __NR_keyctl 288
297#define __NR_ioprio_set 289
298#define __NR_ioprio_get 290
297 299
298#define NR_syscalls 289 300#define NR_syscalls 291
299 301
300/* 302/*
301 * user-visible error numbers are in the range -1 - -128: see 303 * user-visible error numbers are in the range -1 - -128: see
diff --git a/include/asm-ia64/iosapic.h b/include/asm-ia64/iosapic.h
index 38a7a72791cc..1093f35b3b90 100644
--- a/include/asm-ia64/iosapic.h
+++ b/include/asm-ia64/iosapic.h
@@ -71,8 +71,11 @@ static inline void iosapic_eoi(char __iomem *iosapic, u32 vector)
71} 71}
72 72
73extern void __init iosapic_system_init (int pcat_compat); 73extern void __init iosapic_system_init (int pcat_compat);
74extern void __init iosapic_init (unsigned long address, 74extern int __devinit iosapic_init (unsigned long address,
75 unsigned int gsi_base); 75 unsigned int gsi_base);
76#ifdef CONFIG_HOTPLUG
77extern int iosapic_remove (unsigned int gsi_base);
78#endif /* CONFIG_HOTPLUG */
76extern int gsi_to_vector (unsigned int gsi); 79extern int gsi_to_vector (unsigned int gsi);
77extern int gsi_to_irq (unsigned int gsi); 80extern int gsi_to_irq (unsigned int gsi);
78extern void iosapic_enable_intr (unsigned int vector); 81extern void iosapic_enable_intr (unsigned int vector);
@@ -94,11 +97,14 @@ extern unsigned int iosapic_version (char __iomem *addr);
94 97
95extern void iosapic_pci_fixup (int); 98extern void iosapic_pci_fixup (int);
96#ifdef CONFIG_NUMA 99#ifdef CONFIG_NUMA
97extern void __init map_iosapic_to_node (unsigned int, int); 100extern void __devinit map_iosapic_to_node (unsigned int, int);
98#endif 101#endif
99#else 102#else
100#define iosapic_system_init(pcat_compat) do { } while (0) 103#define iosapic_system_init(pcat_compat) do { } while (0)
101#define iosapic_init(address,gsi_base) do { } while (0) 104#define iosapic_init(address,gsi_base) (-EINVAL)
105#ifdef CONFIG_HOTPLUG
106#define iosapic_remove(gsi_base) (-ENODEV)
107#endif /* CONFIG_HOTPLUG */
102#define iosapic_register_intr(gsi,polarity,trigger) (gsi) 108#define iosapic_register_intr(gsi,polarity,trigger) (gsi)
103#define iosapic_unregister_intr(irq) do { } while (0) 109#define iosapic_unregister_intr(irq) do { } while (0)
104#define iosapic_override_isa_irq(isa_irq,gsi,polarity,trigger) do { } while (0) 110#define iosapic_override_isa_irq(isa_irq,gsi,polarity,trigger) do { } while (0)
diff --git a/include/asm-ia64/kprobes.h b/include/asm-ia64/kprobes.h
index 7b700035e36d..bf36a32e37e4 100644
--- a/include/asm-ia64/kprobes.h
+++ b/include/asm-ia64/kprobes.h
@@ -28,6 +28,7 @@
28#include <linux/ptrace.h> 28#include <linux/ptrace.h>
29#include <asm/break.h> 29#include <asm/break.h>
30 30
31#define MAX_INSN_SIZE 16
31#define BREAK_INST (long)(__IA64_BREAK_KPROBE << 6) 32#define BREAK_INST (long)(__IA64_BREAK_KPROBE << 6)
32 33
33typedef union cmp_inst { 34typedef union cmp_inst {
@@ -63,6 +64,8 @@ typedef struct _bundle {
63 64
64#define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)pentry 65#define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)pentry
65 66
67#define ARCH_SUPPORTS_KRETPROBES
68
66#define SLOT0_OPCODE_SHIFT (37) 69#define SLOT0_OPCODE_SHIFT (37)
67#define SLOT1_p1_OPCODE_SHIFT (37 - (64-46)) 70#define SLOT1_p1_OPCODE_SHIFT (37 - (64-46))
68#define SLOT2_OPCODE_SHIFT (37) 71#define SLOT2_OPCODE_SHIFT (37)
@@ -94,11 +97,6 @@ struct arch_specific_insn {
94}; 97};
95 98
96/* ia64 does not need this */ 99/* ia64 does not need this */
97static inline void jprobe_return(void)
98{
99}
100
101/* ia64 does not need this */
102static inline void arch_copy_kprobe(struct kprobe *p) 100static inline void arch_copy_kprobe(struct kprobe *p)
103{ 101{
104} 102}
@@ -106,6 +104,12 @@ static inline void arch_copy_kprobe(struct kprobe *p)
106#ifdef CONFIG_KPROBES 104#ifdef CONFIG_KPROBES
107extern int kprobe_exceptions_notify(struct notifier_block *self, 105extern int kprobe_exceptions_notify(struct notifier_block *self,
108 unsigned long val, void *data); 106 unsigned long val, void *data);
107
108/* ia64 does not need this */
109static inline void jprobe_return(void)
110{
111}
112
109#else /* !CONFIG_KPROBES */ 113#else /* !CONFIG_KPROBES */
110static inline int kprobe_exceptions_notify(struct notifier_block *self, 114static inline int kprobe_exceptions_notify(struct notifier_block *self,
111 unsigned long val, void *data) 115 unsigned long val, void *data)
diff --git a/include/asm-ia64/mmu_context.h b/include/asm-ia64/mmu_context.h
index 0096e7e05012..e3e5fededb04 100644
--- a/include/asm-ia64/mmu_context.h
+++ b/include/asm-ia64/mmu_context.h
@@ -132,6 +132,9 @@ reload_context (mm_context_t context)
132 ia64_srlz_i(); /* srlz.i implies srlz.d */ 132 ia64_srlz_i(); /* srlz.i implies srlz.d */
133} 133}
134 134
135/*
136 * Must be called with preemption off
137 */
135static inline void 138static inline void
136activate_context (struct mm_struct *mm) 139activate_context (struct mm_struct *mm)
137{ 140{
diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h
index a8314ee4e7d2..0c4c5d801d3f 100644
--- a/include/asm-ia64/pci.h
+++ b/include/asm-ia64/pci.h
@@ -82,6 +82,25 @@ extern int pcibios_prep_mwi (struct pci_dev *);
82#define sg_dma_len(sg) ((sg)->dma_length) 82#define sg_dma_len(sg) ((sg)->dma_length)
83#define sg_dma_address(sg) ((sg)->dma_address) 83#define sg_dma_address(sg) ((sg)->dma_address)
84 84
85#ifdef CONFIG_PCI
86static inline void pci_dma_burst_advice(struct pci_dev *pdev,
87 enum pci_dma_burst_strategy *strat,
88 unsigned long *strategy_parameter)
89{
90 unsigned long cacheline_size;
91 u8 byte;
92
93 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
94 if (byte == 0)
95 cacheline_size = 1024;
96 else
97 cacheline_size = (int) byte * 4;
98
99 *strat = PCI_DMA_BURST_MULTIPLE;
100 *strategy_parameter = cacheline_size;
101}
102#endif
103
85#define HAVE_PCI_MMAP 104#define HAVE_PCI_MMAP
86extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma, 105extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
87 enum pci_mmap_state mmap_state, int write_combine); 106 enum pci_mmap_state mmap_state, int write_combine);
diff --git a/include/asm-ia64/sections.h b/include/asm-ia64/sections.h
index 8e3dbde1b429..e9eb7f62d32b 100644
--- a/include/asm-ia64/sections.h
+++ b/include/asm-ia64/sections.h
@@ -17,6 +17,7 @@ extern char __start_gate_vtop_patchlist[], __end_gate_vtop_patchlist[];
17extern char __start_gate_fsyscall_patchlist[], __end_gate_fsyscall_patchlist[]; 17extern char __start_gate_fsyscall_patchlist[], __end_gate_fsyscall_patchlist[];
18extern char __start_gate_brl_fsys_bubble_down_patchlist[], __end_gate_brl_fsys_bubble_down_patchlist[]; 18extern char __start_gate_brl_fsys_bubble_down_patchlist[], __end_gate_brl_fsys_bubble_down_patchlist[];
19extern char __start_unwind[], __end_unwind[]; 19extern char __start_unwind[], __end_unwind[];
20extern char __start_ivt_text[], __end_ivt_text[];
20 21
21#endif /* _ASM_IA64_SECTIONS_H */ 22#endif /* _ASM_IA64_SECTIONS_H */
22 23
diff --git a/include/asm-ia64/sn/addrs.h b/include/asm-ia64/sn/addrs.h
index 1bfdfb4d7b01..103d745dc5f2 100644
--- a/include/asm-ia64/sn/addrs.h
+++ b/include/asm-ia64/sn/addrs.h
@@ -216,6 +216,10 @@
216#define TIO_SWIN_WIDGETNUM(x) (((x) >> TIO_SWIN_SIZE_BITS) & TIO_SWIN_WIDGET_MASK) 216#define TIO_SWIN_WIDGETNUM(x) (((x) >> TIO_SWIN_SIZE_BITS) & TIO_SWIN_WIDGET_MASK)
217 217
218 218
219#define TIO_IOSPACE_ADDR(n,x) \
220 /* Move in the Chiplet ID for TIO Local Block MMR */ \
221 (REMOTE_ADDR(n,x) | 1UL << (NASID_SHIFT - 2))
222
219/* 223/*
220 * The following macros produce the correct base virtual address for 224 * The following macros produce the correct base virtual address for
221 * the hub registers. The REMOTE_HUB_* macro produce 225 * the hub registers. The REMOTE_HUB_* macro produce
@@ -233,13 +237,16 @@
233#define REMOTE_HUB_ADDR(n,x) \ 237#define REMOTE_HUB_ADDR(n,x) \
234 ((n & 1) ? \ 238 ((n & 1) ? \
235 /* TIO: */ \ 239 /* TIO: */ \
236 ((volatile u64 *)(GLOBAL_MMR_ADDR(n,x))) \ 240 (is_shub2() ? \
237 : /* SHUB: */ \ 241 /* TIO on Shub2 */ \
238 (((x) & BWIN_TOP) ? ((volatile u64 *)(GLOBAL_MMR_ADDR(n,x)))\ 242 (volatile u64 *)(TIO_IOSPACE_ADDR(n,x)) \
243 : /* TIO on shub1 */ \
244 (volatile u64 *)(GLOBAL_MMR_ADDR(n,x))) \
245 \
246 : /* SHUB1 and SHUB2 MMRs: */ \
247 (((x) & BWIN_TOP) ? ((volatile u64 *)(GLOBAL_MMR_ADDR(n,x))) \
239 : ((volatile u64 *)(NODE_SWIN_BASE(n,1) + 0x800000 + (x))))) 248 : ((volatile u64 *)(NODE_SWIN_BASE(n,1) + 0x800000 + (x)))))
240 249
241
242
243#define HUB_L(x) (*((volatile typeof(*x) *)x)) 250#define HUB_L(x) (*((volatile typeof(*x) *)x))
244#define HUB_S(x,d) (*((volatile typeof(*x) *)x) = (d)) 251#define HUB_S(x,d) (*((volatile typeof(*x) *)x) = (d))
245 252
diff --git a/include/asm-ia64/sn/l1.h b/include/asm-ia64/sn/l1.h
index 08050d37b662..2e5f0aa38889 100644
--- a/include/asm-ia64/sn/l1.h
+++ b/include/asm-ia64/sn/l1.h
@@ -33,5 +33,6 @@
33#define L1_BRICKTYPE_PA 0x6a /* j */ 33#define L1_BRICKTYPE_PA 0x6a /* j */
34#define L1_BRICKTYPE_IA 0x6b /* k */ 34#define L1_BRICKTYPE_IA 0x6b /* k */
35#define L1_BRICKTYPE_ATHENA 0x2b /* + */ 35#define L1_BRICKTYPE_ATHENA 0x2b /* + */
36#define L1_BRICKTYPE_DAYTONA 0x7a /* z */
36 37
37#endif /* _ASM_IA64_SN_L1_H */ 38#endif /* _ASM_IA64_SN_L1_H */
diff --git a/include/asm-ia64/sn/shub_mmr.h b/include/asm-ia64/sn/shub_mmr.h
index 323fa0cd8d83..7de1d1d4b71a 100644
--- a/include/asm-ia64/sn/shub_mmr.h
+++ b/include/asm-ia64/sn/shub_mmr.h
@@ -14,96 +14,98 @@
14/* Register "SH_IPI_INT" */ 14/* Register "SH_IPI_INT" */
15/* SHub Inter-Processor Interrupt Registers */ 15/* SHub Inter-Processor Interrupt Registers */
16/* ==================================================================== */ 16/* ==================================================================== */
17#define SH1_IPI_INT 0x0000000110000380 17#define SH1_IPI_INT __IA64_UL_CONST(0x0000000110000380)
18#define SH2_IPI_INT 0x0000000010000380 18#define SH2_IPI_INT __IA64_UL_CONST(0x0000000010000380)
19 19
20/* SH_IPI_INT_TYPE */ 20/* SH_IPI_INT_TYPE */
21/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */ 21/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
22#define SH_IPI_INT_TYPE_SHFT 0 22#define SH_IPI_INT_TYPE_SHFT 0
23#define SH_IPI_INT_TYPE_MASK 0x0000000000000007 23#define SH_IPI_INT_TYPE_MASK __IA64_UL_CONST(0x0000000000000007)
24 24
25/* SH_IPI_INT_AGT */ 25/* SH_IPI_INT_AGT */
26/* Description: Agent, must be 0 for SHub */ 26/* Description: Agent, must be 0 for SHub */
27#define SH_IPI_INT_AGT_SHFT 3 27#define SH_IPI_INT_AGT_SHFT 3
28#define SH_IPI_INT_AGT_MASK 0x0000000000000008 28#define SH_IPI_INT_AGT_MASK __IA64_UL_CONST(0x0000000000000008)
29 29
30/* SH_IPI_INT_PID */ 30/* SH_IPI_INT_PID */
31/* Description: Processor ID, same setting as on targeted McKinley */ 31/* Description: Processor ID, same setting as on targeted McKinley */
32#define SH_IPI_INT_PID_SHFT 4 32#define SH_IPI_INT_PID_SHFT 4
33#define SH_IPI_INT_PID_MASK 0x00000000000ffff0 33#define SH_IPI_INT_PID_MASK __IA64_UL_CONST(0x00000000000ffff0)
34 34
35/* SH_IPI_INT_BASE */ 35/* SH_IPI_INT_BASE */
36/* Description: Optional interrupt vector area, 2MB aligned */ 36/* Description: Optional interrupt vector area, 2MB aligned */
37#define SH_IPI_INT_BASE_SHFT 21 37#define SH_IPI_INT_BASE_SHFT 21
38#define SH_IPI_INT_BASE_MASK 0x0003ffffffe00000 38#define SH_IPI_INT_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000)
39 39
40/* SH_IPI_INT_IDX */ 40/* SH_IPI_INT_IDX */
41/* Description: Targeted McKinley interrupt vector */ 41/* Description: Targeted McKinley interrupt vector */
42#define SH_IPI_INT_IDX_SHFT 52 42#define SH_IPI_INT_IDX_SHFT 52
43#define SH_IPI_INT_IDX_MASK 0x0ff0000000000000 43#define SH_IPI_INT_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000)
44 44
45/* SH_IPI_INT_SEND */ 45/* SH_IPI_INT_SEND */
46/* Description: Send Interrupt Message to PI, This generates a puls */ 46/* Description: Send Interrupt Message to PI, This generates a puls */
47#define SH_IPI_INT_SEND_SHFT 63 47#define SH_IPI_INT_SEND_SHFT 63
48#define SH_IPI_INT_SEND_MASK 0x8000000000000000 48#define SH_IPI_INT_SEND_MASK __IA64_UL_CONST(0x8000000000000000)
49 49
50/* ==================================================================== */ 50/* ==================================================================== */
51/* Register "SH_EVENT_OCCURRED" */ 51/* Register "SH_EVENT_OCCURRED" */
52/* SHub Interrupt Event Occurred */ 52/* SHub Interrupt Event Occurred */
53/* ==================================================================== */ 53/* ==================================================================== */
54#define SH1_EVENT_OCCURRED 0x0000000110010000 54#define SH1_EVENT_OCCURRED __IA64_UL_CONST(0x0000000110010000)
55#define SH1_EVENT_OCCURRED_ALIAS 0x0000000110010008 55#define SH1_EVENT_OCCURRED_ALIAS __IA64_UL_CONST(0x0000000110010008)
56#define SH2_EVENT_OCCURRED 0x0000000010010000 56#define SH2_EVENT_OCCURRED __IA64_UL_CONST(0x0000000010010000)
57#define SH2_EVENT_OCCURRED_ALIAS 0x0000000010010008 57#define SH2_EVENT_OCCURRED_ALIAS __IA64_UL_CONST(0x0000000010010008)
58 58
59/* ==================================================================== */ 59/* ==================================================================== */
60/* Register "SH_PI_CAM_CONTROL" */ 60/* Register "SH_PI_CAM_CONTROL" */
61/* CRB CAM MMR Access Control */ 61/* CRB CAM MMR Access Control */
62/* ==================================================================== */ 62/* ==================================================================== */
63#define SH1_PI_CAM_CONTROL 0x0000000120050300 63#define SH1_PI_CAM_CONTROL __IA64_UL_CONST(0x0000000120050300)
64 64
65/* ==================================================================== */ 65/* ==================================================================== */
66/* Register "SH_SHUB_ID" */ 66/* Register "SH_SHUB_ID" */
67/* SHub ID Number */ 67/* SHub ID Number */
68/* ==================================================================== */ 68/* ==================================================================== */
69#define SH1_SHUB_ID 0x0000000110060580 69#define SH1_SHUB_ID __IA64_UL_CONST(0x0000000110060580)
70#define SH1_SHUB_ID_REVISION_SHFT 28 70#define SH1_SHUB_ID_REVISION_SHFT 28
71#define SH1_SHUB_ID_REVISION_MASK 0x00000000f0000000 71#define SH1_SHUB_ID_REVISION_MASK __IA64_UL_CONST(0x00000000f0000000)
72 72
73/* ==================================================================== */ 73/* ==================================================================== */
74/* Register "SH_RTC" */ 74/* Register "SH_RTC" */
75/* Real-time Clock */ 75/* Real-time Clock */
76/* ==================================================================== */ 76/* ==================================================================== */
77#define SH1_RTC 0x00000001101c0000 77#define SH1_RTC __IA64_UL_CONST(0x00000001101c0000)
78#define SH2_RTC 0x00000002101c0000 78#define SH2_RTC __IA64_UL_CONST(0x00000002101c0000)
79#define SH_RTC_MASK 0x007fffffffffffff 79#define SH_RTC_MASK __IA64_UL_CONST(0x007fffffffffffff)
80 80
81/* ==================================================================== */ 81/* ==================================================================== */
82/* Register "SH_PIO_WRITE_STATUS_0|1" */ 82/* Register "SH_PIO_WRITE_STATUS_0|1" */
83/* PIO Write Status for CPU 0 & 1 */ 83/* PIO Write Status for CPU 0 & 1 */
84/* ==================================================================== */ 84/* ==================================================================== */
85#define SH1_PIO_WRITE_STATUS_0 0x0000000120070200 85#define SH1_PIO_WRITE_STATUS_0 __IA64_UL_CONST(0x0000000120070200)
86#define SH1_PIO_WRITE_STATUS_1 0x0000000120070280 86#define SH1_PIO_WRITE_STATUS_1 __IA64_UL_CONST(0x0000000120070280)
87#define SH2_PIO_WRITE_STATUS_0 0x0000000020070200 87#define SH2_PIO_WRITE_STATUS_0 __IA64_UL_CONST(0x0000000020070200)
88#define SH2_PIO_WRITE_STATUS_1 0x0000000020070280 88#define SH2_PIO_WRITE_STATUS_1 __IA64_UL_CONST(0x0000000020070280)
89#define SH2_PIO_WRITE_STATUS_2 0x0000000020070300 89#define SH2_PIO_WRITE_STATUS_2 __IA64_UL_CONST(0x0000000020070300)
90#define SH2_PIO_WRITE_STATUS_3 0x0000000020070380 90#define SH2_PIO_WRITE_STATUS_3 __IA64_UL_CONST(0x0000000020070380)
91 91
92/* SH_PIO_WRITE_STATUS_0_WRITE_DEADLOCK */ 92/* SH_PIO_WRITE_STATUS_0_WRITE_DEADLOCK */
93/* Description: Deadlock response detected */ 93/* Description: Deadlock response detected */
94#define SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_SHFT 1 94#define SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_SHFT 1
95#define SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK 0x0000000000000002 95#define SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK \
96 __IA64_UL_CONST(0x0000000000000002)
96 97
97/* SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT */ 98/* SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT */
98/* Description: Count of currently pending PIO writes */ 99/* Description: Count of currently pending PIO writes */
99#define SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_SHFT 56 100#define SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_SHFT 56
100#define SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK 0x3f00000000000000 101#define SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK \
102 __IA64_UL_CONST(0x3f00000000000000)
101 103
102/* ==================================================================== */ 104/* ==================================================================== */
103/* Register "SH_PIO_WRITE_STATUS_0_ALIAS" */ 105/* Register "SH_PIO_WRITE_STATUS_0_ALIAS" */
104/* ==================================================================== */ 106/* ==================================================================== */
105#define SH1_PIO_WRITE_STATUS_0_ALIAS 0x0000000120070208 107#define SH1_PIO_WRITE_STATUS_0_ALIAS __IA64_UL_CONST(0x0000000120070208)
106#define SH2_PIO_WRITE_STATUS_0_ALIAS 0x0000000020070208 108#define SH2_PIO_WRITE_STATUS_0_ALIAS __IA64_UL_CONST(0x0000000020070208)
107 109
108/* ==================================================================== */ 110/* ==================================================================== */
109/* Register "SH_EVENT_OCCURRED" */ 111/* Register "SH_EVENT_OCCURRED" */
@@ -111,33 +113,33 @@
111/* ==================================================================== */ 113/* ==================================================================== */
112/* SH_EVENT_OCCURRED_UART_INT */ 114/* SH_EVENT_OCCURRED_UART_INT */
113/* Description: Pending Junk Bus UART Interrupt */ 115/* Description: Pending Junk Bus UART Interrupt */
114#define SH_EVENT_OCCURRED_UART_INT_SHFT 20 116#define SH_EVENT_OCCURRED_UART_INT_SHFT 20
115#define SH_EVENT_OCCURRED_UART_INT_MASK 0x0000000000100000 117#define SH_EVENT_OCCURRED_UART_INT_MASK __IA64_UL_CONST(0x0000000000100000)
116 118
117/* SH_EVENT_OCCURRED_IPI_INT */ 119/* SH_EVENT_OCCURRED_IPI_INT */
118/* Description: Pending IPI Interrupt */ 120/* Description: Pending IPI Interrupt */
119#define SH_EVENT_OCCURRED_IPI_INT_SHFT 28 121#define SH_EVENT_OCCURRED_IPI_INT_SHFT 28
120#define SH_EVENT_OCCURRED_IPI_INT_MASK 0x0000000010000000 122#define SH_EVENT_OCCURRED_IPI_INT_MASK __IA64_UL_CONST(0x0000000010000000)
121 123
122/* SH_EVENT_OCCURRED_II_INT0 */ 124/* SH_EVENT_OCCURRED_II_INT0 */
123/* Description: Pending II 0 Interrupt */ 125/* Description: Pending II 0 Interrupt */
124#define SH_EVENT_OCCURRED_II_INT0_SHFT 29 126#define SH_EVENT_OCCURRED_II_INT0_SHFT 29
125#define SH_EVENT_OCCURRED_II_INT0_MASK 0x0000000020000000 127#define SH_EVENT_OCCURRED_II_INT0_MASK __IA64_UL_CONST(0x0000000020000000)
126 128
127/* SH_EVENT_OCCURRED_II_INT1 */ 129/* SH_EVENT_OCCURRED_II_INT1 */
128/* Description: Pending II 1 Interrupt */ 130/* Description: Pending II 1 Interrupt */
129#define SH_EVENT_OCCURRED_II_INT1_SHFT 30 131#define SH_EVENT_OCCURRED_II_INT1_SHFT 30
130#define SH_EVENT_OCCURRED_II_INT1_MASK 0x0000000040000000 132#define SH_EVENT_OCCURRED_II_INT1_MASK __IA64_UL_CONST(0x0000000040000000)
131 133
132/* SH2_EVENT_OCCURRED_EXTIO_INT2 */ 134/* SH2_EVENT_OCCURRED_EXTIO_INT2 */
133/* Description: Pending SHUB 2 EXT IO INT2 */ 135/* Description: Pending SHUB 2 EXT IO INT2 */
134#define SH2_EVENT_OCCURRED_EXTIO_INT2_SHFT 33 136#define SH2_EVENT_OCCURRED_EXTIO_INT2_SHFT 33
135#define SH2_EVENT_OCCURRED_EXTIO_INT2_MASK 0x0000000200000000 137#define SH2_EVENT_OCCURRED_EXTIO_INT2_MASK __IA64_UL_CONST(0x0000000200000000)
136 138
137/* SH2_EVENT_OCCURRED_EXTIO_INT3 */ 139/* SH2_EVENT_OCCURRED_EXTIO_INT3 */
138/* Description: Pending SHUB 2 EXT IO INT3 */ 140/* Description: Pending SHUB 2 EXT IO INT3 */
139#define SH2_EVENT_OCCURRED_EXTIO_INT3_SHFT 34 141#define SH2_EVENT_OCCURRED_EXTIO_INT3_SHFT 34
140#define SH2_EVENT_OCCURRED_EXTIO_INT3_MASK 0x0000000400000000 142#define SH2_EVENT_OCCURRED_EXTIO_INT3_MASK __IA64_UL_CONST(0x0000000400000000)
141 143
142#define SH_ALL_INT_MASK \ 144#define SH_ALL_INT_MASK \
143 (SH_EVENT_OCCURRED_UART_INT_MASK | SH_EVENT_OCCURRED_IPI_INT_MASK | \ 145 (SH_EVENT_OCCURRED_UART_INT_MASK | SH_EVENT_OCCURRED_IPI_INT_MASK | \
@@ -149,310 +151,310 @@
149/* ==================================================================== */ 151/* ==================================================================== */
150/* LEDS */ 152/* LEDS */
151/* ==================================================================== */ 153/* ==================================================================== */
152#define SH1_REAL_JUNK_BUS_LED0 0x7fed00000UL 154#define SH1_REAL_JUNK_BUS_LED0 0x7fed00000UL
153#define SH1_REAL_JUNK_BUS_LED1 0x7fed10000UL 155#define SH1_REAL_JUNK_BUS_LED1 0x7fed10000UL
154#define SH1_REAL_JUNK_BUS_LED2 0x7fed20000UL 156#define SH1_REAL_JUNK_BUS_LED2 0x7fed20000UL
155#define SH1_REAL_JUNK_BUS_LED3 0x7fed30000UL 157#define SH1_REAL_JUNK_BUS_LED3 0x7fed30000UL
156 158
157#define SH2_REAL_JUNK_BUS_LED0 0xf0000000UL 159#define SH2_REAL_JUNK_BUS_LED0 0xf0000000UL
158#define SH2_REAL_JUNK_BUS_LED1 0xf0010000UL 160#define SH2_REAL_JUNK_BUS_LED1 0xf0010000UL
159#define SH2_REAL_JUNK_BUS_LED2 0xf0020000UL 161#define SH2_REAL_JUNK_BUS_LED2 0xf0020000UL
160#define SH2_REAL_JUNK_BUS_LED3 0xf0030000UL 162#define SH2_REAL_JUNK_BUS_LED3 0xf0030000UL
161 163
162/* ==================================================================== */ 164/* ==================================================================== */
163/* Register "SH1_PTC_0" */ 165/* Register "SH1_PTC_0" */
164/* Puge Translation Cache Message Configuration Information */ 166/* Puge Translation Cache Message Configuration Information */
165/* ==================================================================== */ 167/* ==================================================================== */
166#define SH1_PTC_0 0x00000001101a0000 168#define SH1_PTC_0 __IA64_UL_CONST(0x00000001101a0000)
167 169
168/* SH1_PTC_0_A */ 170/* SH1_PTC_0_A */
169/* Description: Type */ 171/* Description: Type */
170#define SH1_PTC_0_A_SHFT 0 172#define SH1_PTC_0_A_SHFT 0
171 173
172/* SH1_PTC_0_PS */ 174/* SH1_PTC_0_PS */
173/* Description: Page Size */ 175/* Description: Page Size */
174#define SH1_PTC_0_PS_SHFT 2 176#define SH1_PTC_0_PS_SHFT 2
175 177
176/* SH1_PTC_0_RID */ 178/* SH1_PTC_0_RID */
177/* Description: Region ID */ 179/* Description: Region ID */
178#define SH1_PTC_0_RID_SHFT 8 180#define SH1_PTC_0_RID_SHFT 8
179 181
180/* SH1_PTC_0_START */ 182/* SH1_PTC_0_START */
181/* Description: Start */ 183/* Description: Start */
182#define SH1_PTC_0_START_SHFT 63 184#define SH1_PTC_0_START_SHFT 63
183 185
184/* ==================================================================== */ 186/* ==================================================================== */
185/* Register "SH1_PTC_1" */ 187/* Register "SH1_PTC_1" */
186/* Puge Translation Cache Message Configuration Information */ 188/* Puge Translation Cache Message Configuration Information */
187/* ==================================================================== */ 189/* ==================================================================== */
188#define SH1_PTC_1 0x00000001101a0080 190#define SH1_PTC_1 __IA64_UL_CONST(0x00000001101a0080)
189 191
190/* SH1_PTC_1_START */ 192/* SH1_PTC_1_START */
191/* Description: PTC_1 Start */ 193/* Description: PTC_1 Start */
192#define SH1_PTC_1_START_SHFT 63 194#define SH1_PTC_1_START_SHFT 63
193
194 195
195/* ==================================================================== */ 196/* ==================================================================== */
196/* Register "SH2_PTC" */ 197/* Register "SH2_PTC" */
197/* Puge Translation Cache Message Configuration Information */ 198/* Puge Translation Cache Message Configuration Information */
198/* ==================================================================== */ 199/* ==================================================================== */
199#define SH2_PTC 0x0000000170000000 200#define SH2_PTC __IA64_UL_CONST(0x0000000170000000)
200 201
201/* SH2_PTC_A */ 202/* SH2_PTC_A */
202/* Description: Type */ 203/* Description: Type */
203#define SH2_PTC_A_SHFT 0 204#define SH2_PTC_A_SHFT 0
204 205
205/* SH2_PTC_PS */ 206/* SH2_PTC_PS */
206/* Description: Page Size */ 207/* Description: Page Size */
207#define SH2_PTC_PS_SHFT 2 208#define SH2_PTC_PS_SHFT 2
208 209
209/* SH2_PTC_RID */ 210/* SH2_PTC_RID */
210/* Description: Region ID */ 211/* Description: Region ID */
211#define SH2_PTC_RID_SHFT 4 212#define SH2_PTC_RID_SHFT 4
212 213
213/* SH2_PTC_START */ 214/* SH2_PTC_START */
214/* Description: Start */ 215/* Description: Start */
215#define SH2_PTC_START_SHFT 63 216#define SH2_PTC_START_SHFT 63
216 217
217/* SH2_PTC_ADDR_RID */ 218/* SH2_PTC_ADDR_RID */
218/* Description: Region ID */ 219/* Description: Region ID */
219#define SH2_PTC_ADDR_SHFT 4 220#define SH2_PTC_ADDR_SHFT 4
220#define SH2_PTC_ADDR_MASK 0x1ffffffffffff000 221#define SH2_PTC_ADDR_MASK __IA64_UL_CONST(0x1ffffffffffff000)
221 222
222/* ==================================================================== */ 223/* ==================================================================== */
223/* Register "SH_RTC1_INT_CONFIG" */ 224/* Register "SH_RTC1_INT_CONFIG" */
224/* SHub RTC 1 Interrupt Config Registers */ 225/* SHub RTC 1 Interrupt Config Registers */
225/* ==================================================================== */ 226/* ==================================================================== */
226 227
227#define SH1_RTC1_INT_CONFIG 0x0000000110001480 228#define SH1_RTC1_INT_CONFIG __IA64_UL_CONST(0x0000000110001480)
228#define SH2_RTC1_INT_CONFIG 0x0000000010001480 229#define SH2_RTC1_INT_CONFIG __IA64_UL_CONST(0x0000000010001480)
229#define SH_RTC1_INT_CONFIG_MASK 0x0ff3ffffffefffff 230#define SH_RTC1_INT_CONFIG_MASK __IA64_UL_CONST(0x0ff3ffffffefffff)
230#define SH_RTC1_INT_CONFIG_INIT 0x0000000000000000 231#define SH_RTC1_INT_CONFIG_INIT __IA64_UL_CONST(0x0000000000000000)
231 232
232/* SH_RTC1_INT_CONFIG_TYPE */ 233/* SH_RTC1_INT_CONFIG_TYPE */
233/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */ 234/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
234#define SH_RTC1_INT_CONFIG_TYPE_SHFT 0 235#define SH_RTC1_INT_CONFIG_TYPE_SHFT 0
235#define SH_RTC1_INT_CONFIG_TYPE_MASK 0x0000000000000007 236#define SH_RTC1_INT_CONFIG_TYPE_MASK __IA64_UL_CONST(0x0000000000000007)
236 237
237/* SH_RTC1_INT_CONFIG_AGT */ 238/* SH_RTC1_INT_CONFIG_AGT */
238/* Description: Agent, must be 0 for SHub */ 239/* Description: Agent, must be 0 for SHub */
239#define SH_RTC1_INT_CONFIG_AGT_SHFT 3 240#define SH_RTC1_INT_CONFIG_AGT_SHFT 3
240#define SH_RTC1_INT_CONFIG_AGT_MASK 0x0000000000000008 241#define SH_RTC1_INT_CONFIG_AGT_MASK __IA64_UL_CONST(0x0000000000000008)
241 242
242/* SH_RTC1_INT_CONFIG_PID */ 243/* SH_RTC1_INT_CONFIG_PID */
243/* Description: Processor ID, same setting as on targeted McKinley */ 244/* Description: Processor ID, same setting as on targeted McKinley */
244#define SH_RTC1_INT_CONFIG_PID_SHFT 4 245#define SH_RTC1_INT_CONFIG_PID_SHFT 4
245#define SH_RTC1_INT_CONFIG_PID_MASK 0x00000000000ffff0 246#define SH_RTC1_INT_CONFIG_PID_MASK __IA64_UL_CONST(0x00000000000ffff0)
246 247
247/* SH_RTC1_INT_CONFIG_BASE */ 248/* SH_RTC1_INT_CONFIG_BASE */
248/* Description: Optional interrupt vector area, 2MB aligned */ 249/* Description: Optional interrupt vector area, 2MB aligned */
249#define SH_RTC1_INT_CONFIG_BASE_SHFT 21 250#define SH_RTC1_INT_CONFIG_BASE_SHFT 21
250#define SH_RTC1_INT_CONFIG_BASE_MASK 0x0003ffffffe00000 251#define SH_RTC1_INT_CONFIG_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000)
251 252
252/* SH_RTC1_INT_CONFIG_IDX */ 253/* SH_RTC1_INT_CONFIG_IDX */
253/* Description: Targeted McKinley interrupt vector */ 254/* Description: Targeted McKinley interrupt vector */
254#define SH_RTC1_INT_CONFIG_IDX_SHFT 52 255#define SH_RTC1_INT_CONFIG_IDX_SHFT 52
255#define SH_RTC1_INT_CONFIG_IDX_MASK 0x0ff0000000000000 256#define SH_RTC1_INT_CONFIG_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000)
256 257
257/* ==================================================================== */ 258/* ==================================================================== */
258/* Register "SH_RTC1_INT_ENABLE" */ 259/* Register "SH_RTC1_INT_ENABLE" */
259/* SHub RTC 1 Interrupt Enable Registers */ 260/* SHub RTC 1 Interrupt Enable Registers */
260/* ==================================================================== */ 261/* ==================================================================== */
261 262
262#define SH1_RTC1_INT_ENABLE 0x0000000110001500 263#define SH1_RTC1_INT_ENABLE __IA64_UL_CONST(0x0000000110001500)
263#define SH2_RTC1_INT_ENABLE 0x0000000010001500 264#define SH2_RTC1_INT_ENABLE __IA64_UL_CONST(0x0000000010001500)
264#define SH_RTC1_INT_ENABLE_MASK 0x0000000000000001 265#define SH_RTC1_INT_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001)
265#define SH_RTC1_INT_ENABLE_INIT 0x0000000000000000 266#define SH_RTC1_INT_ENABLE_INIT __IA64_UL_CONST(0x0000000000000000)
266 267
267/* SH_RTC1_INT_ENABLE_RTC1_ENABLE */ 268/* SH_RTC1_INT_ENABLE_RTC1_ENABLE */
268/* Description: Enable RTC 1 Interrupt */ 269/* Description: Enable RTC 1 Interrupt */
269#define SH_RTC1_INT_ENABLE_RTC1_ENABLE_SHFT 0 270#define SH_RTC1_INT_ENABLE_RTC1_ENABLE_SHFT 0
270#define SH_RTC1_INT_ENABLE_RTC1_ENABLE_MASK 0x0000000000000001 271#define SH_RTC1_INT_ENABLE_RTC1_ENABLE_MASK \
272 __IA64_UL_CONST(0x0000000000000001)
271 273
272/* ==================================================================== */ 274/* ==================================================================== */
273/* Register "SH_RTC2_INT_CONFIG" */ 275/* Register "SH_RTC2_INT_CONFIG" */
274/* SHub RTC 2 Interrupt Config Registers */ 276/* SHub RTC 2 Interrupt Config Registers */
275/* ==================================================================== */ 277/* ==================================================================== */
276 278
277#define SH1_RTC2_INT_CONFIG 0x0000000110001580 279#define SH1_RTC2_INT_CONFIG __IA64_UL_CONST(0x0000000110001580)
278#define SH2_RTC2_INT_CONFIG 0x0000000010001580 280#define SH2_RTC2_INT_CONFIG __IA64_UL_CONST(0x0000000010001580)
279#define SH_RTC2_INT_CONFIG_MASK 0x0ff3ffffffefffff 281#define SH_RTC2_INT_CONFIG_MASK __IA64_UL_CONST(0x0ff3ffffffefffff)
280#define SH_RTC2_INT_CONFIG_INIT 0x0000000000000000 282#define SH_RTC2_INT_CONFIG_INIT __IA64_UL_CONST(0x0000000000000000)
281 283
282/* SH_RTC2_INT_CONFIG_TYPE */ 284/* SH_RTC2_INT_CONFIG_TYPE */
283/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */ 285/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
284#define SH_RTC2_INT_CONFIG_TYPE_SHFT 0 286#define SH_RTC2_INT_CONFIG_TYPE_SHFT 0
285#define SH_RTC2_INT_CONFIG_TYPE_MASK 0x0000000000000007 287#define SH_RTC2_INT_CONFIG_TYPE_MASK __IA64_UL_CONST(0x0000000000000007)
286 288
287/* SH_RTC2_INT_CONFIG_AGT */ 289/* SH_RTC2_INT_CONFIG_AGT */
288/* Description: Agent, must be 0 for SHub */ 290/* Description: Agent, must be 0 for SHub */
289#define SH_RTC2_INT_CONFIG_AGT_SHFT 3 291#define SH_RTC2_INT_CONFIG_AGT_SHFT 3
290#define SH_RTC2_INT_CONFIG_AGT_MASK 0x0000000000000008 292#define SH_RTC2_INT_CONFIG_AGT_MASK __IA64_UL_CONST(0x0000000000000008)
291 293
292/* SH_RTC2_INT_CONFIG_PID */ 294/* SH_RTC2_INT_CONFIG_PID */
293/* Description: Processor ID, same setting as on targeted McKinley */ 295/* Description: Processor ID, same setting as on targeted McKinley */
294#define SH_RTC2_INT_CONFIG_PID_SHFT 4 296#define SH_RTC2_INT_CONFIG_PID_SHFT 4
295#define SH_RTC2_INT_CONFIG_PID_MASK 0x00000000000ffff0 297#define SH_RTC2_INT_CONFIG_PID_MASK __IA64_UL_CONST(0x00000000000ffff0)
296 298
297/* SH_RTC2_INT_CONFIG_BASE */ 299/* SH_RTC2_INT_CONFIG_BASE */
298/* Description: Optional interrupt vector area, 2MB aligned */ 300/* Description: Optional interrupt vector area, 2MB aligned */
299#define SH_RTC2_INT_CONFIG_BASE_SHFT 21 301#define SH_RTC2_INT_CONFIG_BASE_SHFT 21
300#define SH_RTC2_INT_CONFIG_BASE_MASK 0x0003ffffffe00000 302#define SH_RTC2_INT_CONFIG_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000)
301 303
302/* SH_RTC2_INT_CONFIG_IDX */ 304/* SH_RTC2_INT_CONFIG_IDX */
303/* Description: Targeted McKinley interrupt vector */ 305/* Description: Targeted McKinley interrupt vector */
304#define SH_RTC2_INT_CONFIG_IDX_SHFT 52 306#define SH_RTC2_INT_CONFIG_IDX_SHFT 52
305#define SH_RTC2_INT_CONFIG_IDX_MASK 0x0ff0000000000000 307#define SH_RTC2_INT_CONFIG_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000)
306 308
307/* ==================================================================== */ 309/* ==================================================================== */
308/* Register "SH_RTC2_INT_ENABLE" */ 310/* Register "SH_RTC2_INT_ENABLE" */
309/* SHub RTC 2 Interrupt Enable Registers */ 311/* SHub RTC 2 Interrupt Enable Registers */
310/* ==================================================================== */ 312/* ==================================================================== */
311 313
312#define SH1_RTC2_INT_ENABLE 0x0000000110001600 314#define SH1_RTC2_INT_ENABLE __IA64_UL_CONST(0x0000000110001600)
313#define SH2_RTC2_INT_ENABLE 0x0000000010001600 315#define SH2_RTC2_INT_ENABLE __IA64_UL_CONST(0x0000000010001600)
314#define SH_RTC2_INT_ENABLE_MASK 0x0000000000000001 316#define SH_RTC2_INT_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001)
315#define SH_RTC2_INT_ENABLE_INIT 0x0000000000000000 317#define SH_RTC2_INT_ENABLE_INIT __IA64_UL_CONST(0x0000000000000000)
316 318
317/* SH_RTC2_INT_ENABLE_RTC2_ENABLE */ 319/* SH_RTC2_INT_ENABLE_RTC2_ENABLE */
318/* Description: Enable RTC 2 Interrupt */ 320/* Description: Enable RTC 2 Interrupt */
319#define SH_RTC2_INT_ENABLE_RTC2_ENABLE_SHFT 0 321#define SH_RTC2_INT_ENABLE_RTC2_ENABLE_SHFT 0
320#define SH_RTC2_INT_ENABLE_RTC2_ENABLE_MASK 0x0000000000000001 322#define SH_RTC2_INT_ENABLE_RTC2_ENABLE_MASK \
323 __IA64_UL_CONST(0x0000000000000001)
321 324
322/* ==================================================================== */ 325/* ==================================================================== */
323/* Register "SH_RTC3_INT_CONFIG" */ 326/* Register "SH_RTC3_INT_CONFIG" */
324/* SHub RTC 3 Interrupt Config Registers */ 327/* SHub RTC 3 Interrupt Config Registers */
325/* ==================================================================== */ 328/* ==================================================================== */
326 329
327#define SH1_RTC3_INT_CONFIG 0x0000000110001680 330#define SH1_RTC3_INT_CONFIG __IA64_UL_CONST(0x0000000110001680)
328#define SH2_RTC3_INT_CONFIG 0x0000000010001680 331#define SH2_RTC3_INT_CONFIG __IA64_UL_CONST(0x0000000010001680)
329#define SH_RTC3_INT_CONFIG_MASK 0x0ff3ffffffefffff 332#define SH_RTC3_INT_CONFIG_MASK __IA64_UL_CONST(0x0ff3ffffffefffff)
330#define SH_RTC3_INT_CONFIG_INIT 0x0000000000000000 333#define SH_RTC3_INT_CONFIG_INIT __IA64_UL_CONST(0x0000000000000000)
331 334
332/* SH_RTC3_INT_CONFIG_TYPE */ 335/* SH_RTC3_INT_CONFIG_TYPE */
333/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */ 336/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
334#define SH_RTC3_INT_CONFIG_TYPE_SHFT 0 337#define SH_RTC3_INT_CONFIG_TYPE_SHFT 0
335#define SH_RTC3_INT_CONFIG_TYPE_MASK 0x0000000000000007 338#define SH_RTC3_INT_CONFIG_TYPE_MASK __IA64_UL_CONST(0x0000000000000007)
336 339
337/* SH_RTC3_INT_CONFIG_AGT */ 340/* SH_RTC3_INT_CONFIG_AGT */
338/* Description: Agent, must be 0 for SHub */ 341/* Description: Agent, must be 0 for SHub */
339#define SH_RTC3_INT_CONFIG_AGT_SHFT 3 342#define SH_RTC3_INT_CONFIG_AGT_SHFT 3
340#define SH_RTC3_INT_CONFIG_AGT_MASK 0x0000000000000008 343#define SH_RTC3_INT_CONFIG_AGT_MASK __IA64_UL_CONST(0x0000000000000008)
341 344
342/* SH_RTC3_INT_CONFIG_PID */ 345/* SH_RTC3_INT_CONFIG_PID */
343/* Description: Processor ID, same setting as on targeted McKinley */ 346/* Description: Processor ID, same setting as on targeted McKinley */
344#define SH_RTC3_INT_CONFIG_PID_SHFT 4 347#define SH_RTC3_INT_CONFIG_PID_SHFT 4
345#define SH_RTC3_INT_CONFIG_PID_MASK 0x00000000000ffff0 348#define SH_RTC3_INT_CONFIG_PID_MASK __IA64_UL_CONST(0x00000000000ffff0)
346 349
347/* SH_RTC3_INT_CONFIG_BASE */ 350/* SH_RTC3_INT_CONFIG_BASE */
348/* Description: Optional interrupt vector area, 2MB aligned */ 351/* Description: Optional interrupt vector area, 2MB aligned */
349#define SH_RTC3_INT_CONFIG_BASE_SHFT 21 352#define SH_RTC3_INT_CONFIG_BASE_SHFT 21
350#define SH_RTC3_INT_CONFIG_BASE_MASK 0x0003ffffffe00000 353#define SH_RTC3_INT_CONFIG_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000)
351 354
352/* SH_RTC3_INT_CONFIG_IDX */ 355/* SH_RTC3_INT_CONFIG_IDX */
353/* Description: Targeted McKinley interrupt vector */ 356/* Description: Targeted McKinley interrupt vector */
354#define SH_RTC3_INT_CONFIG_IDX_SHFT 52 357#define SH_RTC3_INT_CONFIG_IDX_SHFT 52
355#define SH_RTC3_INT_CONFIG_IDX_MASK 0x0ff0000000000000 358#define SH_RTC3_INT_CONFIG_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000)
356 359
357/* ==================================================================== */ 360/* ==================================================================== */
358/* Register "SH_RTC3_INT_ENABLE" */ 361/* Register "SH_RTC3_INT_ENABLE" */
359/* SHub RTC 3 Interrupt Enable Registers */ 362/* SHub RTC 3 Interrupt Enable Registers */
360/* ==================================================================== */ 363/* ==================================================================== */
361 364
362#define SH1_RTC3_INT_ENABLE 0x0000000110001700 365#define SH1_RTC3_INT_ENABLE __IA64_UL_CONST(0x0000000110001700)
363#define SH2_RTC3_INT_ENABLE 0x0000000010001700 366#define SH2_RTC3_INT_ENABLE __IA64_UL_CONST(0x0000000010001700)
364#define SH_RTC3_INT_ENABLE_MASK 0x0000000000000001 367#define SH_RTC3_INT_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001)
365#define SH_RTC3_INT_ENABLE_INIT 0x0000000000000000 368#define SH_RTC3_INT_ENABLE_INIT __IA64_UL_CONST(0x0000000000000000)
366 369
367/* SH_RTC3_INT_ENABLE_RTC3_ENABLE */ 370/* SH_RTC3_INT_ENABLE_RTC3_ENABLE */
368/* Description: Enable RTC 3 Interrupt */ 371/* Description: Enable RTC 3 Interrupt */
369#define SH_RTC3_INT_ENABLE_RTC3_ENABLE_SHFT 0 372#define SH_RTC3_INT_ENABLE_RTC3_ENABLE_SHFT 0
370#define SH_RTC3_INT_ENABLE_RTC3_ENABLE_MASK 0x0000000000000001 373#define SH_RTC3_INT_ENABLE_RTC3_ENABLE_MASK \
374 __IA64_UL_CONST(0x0000000000000001)
371 375
372/* SH_EVENT_OCCURRED_RTC1_INT */ 376/* SH_EVENT_OCCURRED_RTC1_INT */
373/* Description: Pending RTC 1 Interrupt */ 377/* Description: Pending RTC 1 Interrupt */
374#define SH_EVENT_OCCURRED_RTC1_INT_SHFT 24 378#define SH_EVENT_OCCURRED_RTC1_INT_SHFT 24
375#define SH_EVENT_OCCURRED_RTC1_INT_MASK 0x0000000001000000 379#define SH_EVENT_OCCURRED_RTC1_INT_MASK __IA64_UL_CONST(0x0000000001000000)
376 380
377/* SH_EVENT_OCCURRED_RTC2_INT */ 381/* SH_EVENT_OCCURRED_RTC2_INT */
378/* Description: Pending RTC 2 Interrupt */ 382/* Description: Pending RTC 2 Interrupt */
379#define SH_EVENT_OCCURRED_RTC2_INT_SHFT 25 383#define SH_EVENT_OCCURRED_RTC2_INT_SHFT 25
380#define SH_EVENT_OCCURRED_RTC2_INT_MASK 0x0000000002000000 384#define SH_EVENT_OCCURRED_RTC2_INT_MASK __IA64_UL_CONST(0x0000000002000000)
381 385
382/* SH_EVENT_OCCURRED_RTC3_INT */ 386/* SH_EVENT_OCCURRED_RTC3_INT */
383/* Description: Pending RTC 3 Interrupt */ 387/* Description: Pending RTC 3 Interrupt */
384#define SH_EVENT_OCCURRED_RTC3_INT_SHFT 26 388#define SH_EVENT_OCCURRED_RTC3_INT_SHFT 26
385#define SH_EVENT_OCCURRED_RTC3_INT_MASK 0x0000000004000000 389#define SH_EVENT_OCCURRED_RTC3_INT_MASK __IA64_UL_CONST(0x0000000004000000)
386 390
387/* ==================================================================== */ 391/* ==================================================================== */
388/* Register "SH_IPI_ACCESS" */ 392/* Register "SH_IPI_ACCESS" */
389/* CPU interrupt Access Permission Bits */ 393/* CPU interrupt Access Permission Bits */
390/* ==================================================================== */ 394/* ==================================================================== */
391 395
392#define SH1_IPI_ACCESS 0x0000000110060480 396#define SH1_IPI_ACCESS __IA64_UL_CONST(0x0000000110060480)
393#define SH2_IPI_ACCESS0 0x0000000010060c00 397#define SH2_IPI_ACCESS0 __IA64_UL_CONST(0x0000000010060c00)
394#define SH2_IPI_ACCESS1 0x0000000010060c80 398#define SH2_IPI_ACCESS1 __IA64_UL_CONST(0x0000000010060c80)
395#define SH2_IPI_ACCESS2 0x0000000010060d00 399#define SH2_IPI_ACCESS2 __IA64_UL_CONST(0x0000000010060d00)
396#define SH2_IPI_ACCESS3 0x0000000010060d80 400#define SH2_IPI_ACCESS3 __IA64_UL_CONST(0x0000000010060d80)
397 401
398/* ==================================================================== */ 402/* ==================================================================== */
399/* Register "SH_INT_CMPB" */ 403/* Register "SH_INT_CMPB" */
400/* RTC Compare Value for Processor B */ 404/* RTC Compare Value for Processor B */
401/* ==================================================================== */ 405/* ==================================================================== */
402 406
403#define SH1_INT_CMPB 0x00000001101b0080 407#define SH1_INT_CMPB __IA64_UL_CONST(0x00000001101b0080)
404#define SH2_INT_CMPB 0x00000000101b0080 408#define SH2_INT_CMPB __IA64_UL_CONST(0x00000000101b0080)
405#define SH_INT_CMPB_MASK 0x007fffffffffffff 409#define SH_INT_CMPB_MASK __IA64_UL_CONST(0x007fffffffffffff)
406#define SH_INT_CMPB_INIT 0x0000000000000000 410#define SH_INT_CMPB_INIT __IA64_UL_CONST(0x0000000000000000)
407 411
408/* SH_INT_CMPB_REAL_TIME_CMPB */ 412/* SH_INT_CMPB_REAL_TIME_CMPB */
409/* Description: Real Time Clock Compare */ 413/* Description: Real Time Clock Compare */
410#define SH_INT_CMPB_REAL_TIME_CMPB_SHFT 0 414#define SH_INT_CMPB_REAL_TIME_CMPB_SHFT 0
411#define SH_INT_CMPB_REAL_TIME_CMPB_MASK 0x007fffffffffffff 415#define SH_INT_CMPB_REAL_TIME_CMPB_MASK __IA64_UL_CONST(0x007fffffffffffff)
412 416
413/* ==================================================================== */ 417/* ==================================================================== */
414/* Register "SH_INT_CMPC" */ 418/* Register "SH_INT_CMPC" */
415/* RTC Compare Value for Processor C */ 419/* RTC Compare Value for Processor C */
416/* ==================================================================== */ 420/* ==================================================================== */
417 421
418#define SH1_INT_CMPC 0x00000001101b0100 422#define SH1_INT_CMPC __IA64_UL_CONST(0x00000001101b0100)
419#define SH2_INT_CMPC 0x00000000101b0100 423#define SH2_INT_CMPC __IA64_UL_CONST(0x00000000101b0100)
420#define SH_INT_CMPC_MASK 0x007fffffffffffff 424#define SH_INT_CMPC_MASK __IA64_UL_CONST(0x007fffffffffffff)
421#define SH_INT_CMPC_INIT 0x0000000000000000 425#define SH_INT_CMPC_INIT __IA64_UL_CONST(0x0000000000000000)
422 426
423/* SH_INT_CMPC_REAL_TIME_CMPC */ 427/* SH_INT_CMPC_REAL_TIME_CMPC */
424/* Description: Real Time Clock Compare */ 428/* Description: Real Time Clock Compare */
425#define SH_INT_CMPC_REAL_TIME_CMPC_SHFT 0 429#define SH_INT_CMPC_REAL_TIME_CMPC_SHFT 0
426#define SH_INT_CMPC_REAL_TIME_CMPC_MASK 0x007fffffffffffff 430#define SH_INT_CMPC_REAL_TIME_CMPC_MASK __IA64_UL_CONST(0x007fffffffffffff)
427 431
428/* ==================================================================== */ 432/* ==================================================================== */
429/* Register "SH_INT_CMPD" */ 433/* Register "SH_INT_CMPD" */
430/* RTC Compare Value for Processor D */ 434/* RTC Compare Value for Processor D */
431/* ==================================================================== */ 435/* ==================================================================== */
432 436
433#define SH1_INT_CMPD 0x00000001101b0180 437#define SH1_INT_CMPD __IA64_UL_CONST(0x00000001101b0180)
434#define SH2_INT_CMPD 0x00000000101b0180 438#define SH2_INT_CMPD __IA64_UL_CONST(0x00000000101b0180)
435#define SH_INT_CMPD_MASK 0x007fffffffffffff 439#define SH_INT_CMPD_MASK __IA64_UL_CONST(0x007fffffffffffff)
436#define SH_INT_CMPD_INIT 0x0000000000000000 440#define SH_INT_CMPD_INIT __IA64_UL_CONST(0x0000000000000000)
437 441
438/* SH_INT_CMPD_REAL_TIME_CMPD */ 442/* SH_INT_CMPD_REAL_TIME_CMPD */
439/* Description: Real Time Clock Compare */ 443/* Description: Real Time Clock Compare */
440#define SH_INT_CMPD_REAL_TIME_CMPD_SHFT 0 444#define SH_INT_CMPD_REAL_TIME_CMPD_SHFT 0
441#define SH_INT_CMPD_REAL_TIME_CMPD_MASK 0x007fffffffffffff 445#define SH_INT_CMPD_REAL_TIME_CMPD_MASK __IA64_UL_CONST(0x007fffffffffffff)
442 446
443/* ==================================================================== */ 447/* ==================================================================== */
444/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC0" */ 448/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC0" */
445/* privilege vector for acc=0 */ 449/* privilege vector for acc=0 */
446/* ==================================================================== */ 450/* ==================================================================== */
447 451#define SH1_MD_DQLP_MMR_DIR_PRIVEC0 __IA64_UL_CONST(0x0000000100030300)
448#define SH1_MD_DQLP_MMR_DIR_PRIVEC0 0x0000000100030300
449 452
450/* ==================================================================== */ 453/* ==================================================================== */
451/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC0" */ 454/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC0" */
452/* privilege vector for acc=0 */ 455/* privilege vector for acc=0 */
453/* ==================================================================== */ 456/* ==================================================================== */
454 457#define SH1_MD_DQRP_MMR_DIR_PRIVEC0 __IA64_UL_CONST(0x0000000100050300)
455#define SH1_MD_DQRP_MMR_DIR_PRIVEC0 0x0000000100050300
456 458
457/* ==================================================================== */ 459/* ==================================================================== */
458/* Some MMRs are functionally identical (or close enough) on both SHUB1 */ 460/* Some MMRs are functionally identical (or close enough) on both SHUB1 */
@@ -484,17 +486,17 @@
484/* Engine 0 Control and Status Register */ 486/* Engine 0 Control and Status Register */
485/* ========================================================================== */ 487/* ========================================================================== */
486 488
487#define SH2_BT_ENG_CSR_0 0x0000000030040000 489#define SH2_BT_ENG_CSR_0 __IA64_UL_CONST(0x0000000030040000)
488#define SH2_BT_ENG_SRC_ADDR_0 0x0000000030040080 490#define SH2_BT_ENG_SRC_ADDR_0 __IA64_UL_CONST(0x0000000030040080)
489#define SH2_BT_ENG_DEST_ADDR_0 0x0000000030040100 491#define SH2_BT_ENG_DEST_ADDR_0 __IA64_UL_CONST(0x0000000030040100)
490#define SH2_BT_ENG_NOTIF_ADDR_0 0x0000000030040180 492#define SH2_BT_ENG_NOTIF_ADDR_0 __IA64_UL_CONST(0x0000000030040180)
491 493
492/* ========================================================================== */ 494/* ========================================================================== */
493/* BTE interfaces 1-3 */ 495/* BTE interfaces 1-3 */
494/* ========================================================================== */ 496/* ========================================================================== */
495 497
496#define SH2_BT_ENG_CSR_1 0x0000000030050000 498#define SH2_BT_ENG_CSR_1 __IA64_UL_CONST(0x0000000030050000)
497#define SH2_BT_ENG_CSR_2 0x0000000030060000 499#define SH2_BT_ENG_CSR_2 __IA64_UL_CONST(0x0000000030060000)
498#define SH2_BT_ENG_CSR_3 0x0000000030070000 500#define SH2_BT_ENG_CSR_3 __IA64_UL_CONST(0x0000000030070000)
499 501
500#endif /* _ASM_IA64_SN_SHUB_MMR_H */ 502#endif /* _ASM_IA64_SN_SHUB_MMR_H */
diff --git a/include/asm-ia64/sn/simulator.h b/include/asm-ia64/sn/simulator.h
index 78eb4f869c8b..cf770e246af5 100644
--- a/include/asm-ia64/sn/simulator.h
+++ b/include/asm-ia64/sn/simulator.h
@@ -10,16 +10,17 @@
10 10
11#include <linux/config.h> 11#include <linux/config.h>
12 12
13#ifdef CONFIG_IA64_SGI_SN_SIM
14
15#define SNMAGIC 0xaeeeeeee8badbeefL 13#define SNMAGIC 0xaeeeeeee8badbeefL
16#define IS_RUNNING_ON_SIMULATOR() ({long sn; asm("mov %0=cpuid[%1]" : "=r"(sn) : "r"(2)); sn == SNMAGIC;}) 14#define IS_MEDUSA() ({long sn; asm("mov %0=cpuid[%1]" : "=r"(sn) : "r"(2)); sn == SNMAGIC;})
17
18#define SIMULATOR_SLEEP() asm("nop.i 0x8beef")
19 15
16#ifdef CONFIG_IA64_SGI_SN_SIM
17#define SIMULATOR_SLEEP() asm("nop.i 0x8beef")
18#define IS_RUNNING_ON_SIMULATOR() (sn_prom_type)
19#define IS_RUNNING_ON_FAKE_PROM() (sn_prom_type == 2)
20extern int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
20#else 21#else
21
22#define IS_RUNNING_ON_SIMULATOR() (0) 22#define IS_RUNNING_ON_SIMULATOR() (0)
23#define IS_RUNNING_ON_FAKE_PROM() (0)
23#define SIMULATOR_SLEEP() 24#define SIMULATOR_SLEEP()
24 25
25#endif 26#endif
diff --git a/include/asm-ia64/sn/sn2/sn_hwperf.h b/include/asm-ia64/sn/sn2/sn_hwperf.h
index b0c4d6dd77ba..df75f4c4aec3 100644
--- a/include/asm-ia64/sn/sn2/sn_hwperf.h
+++ b/include/asm-ia64/sn/sn2/sn_hwperf.h
@@ -223,4 +223,6 @@ struct sn_hwperf_ioctl_args {
223#define SN_HWPERF_OP_RECONFIGURE 253 223#define SN_HWPERF_OP_RECONFIGURE 253
224#define SN_HWPERF_OP_INVAL 254 224#define SN_HWPERF_OP_INVAL 254
225 225
226int sn_topology_open(struct inode *inode, struct file *file);
227int sn_topology_release(struct inode *inode, struct file *file);
226#endif /* SN_HWPERF_H */ 228#endif /* SN_HWPERF_H */
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index eb0395ad0d6a..1455375d2ce4 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -132,6 +132,8 @@
132#define SALRET_INVALID_ARG (-2) 132#define SALRET_INVALID_ARG (-2)
133#define SALRET_ERROR (-3) 133#define SALRET_ERROR (-3)
134 134
135#define SN_SAL_FAKE_PROM 0x02009999
136
135 137
136/** 138/**
137 * sn_sal_rev_major - get the major SGI SAL revision number 139 * sn_sal_rev_major - get the major SGI SAL revision number
@@ -1105,4 +1107,12 @@ ia64_sn_bte_recovery(nasid_t nasid)
1105 return (int) rv.status; 1107 return (int) rv.status;
1106} 1108}
1107 1109
1110static inline int
1111ia64_sn_is_fake_prom(void)
1112{
1113 struct ia64_sal_retval rv;
1114 SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0);
1115 return (rv.status == 0);
1116}
1117
1108#endif /* _ASM_IA64_SN_SN_SAL_H */ 1118#endif /* _ASM_IA64_SN_SN_SAL_H */
diff --git a/include/asm-ia64/sn/tioca_provider.h b/include/asm-ia64/sn/tioca_provider.h
index b6acc22ab239..5ccec608d325 100644
--- a/include/asm-ia64/sn/tioca_provider.h
+++ b/include/asm-ia64/sn/tioca_provider.h
@@ -201,6 +201,7 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
201} 201}
202 202
203extern uint32_t tioca_gart_found; 203extern uint32_t tioca_gart_found;
204extern struct list_head tioca_list;
204extern int tioca_init_provider(void); 205extern int tioca_init_provider(void);
205extern void tioca_fastwrite_enable(struct tioca_kernel *tioca_kern); 206extern void tioca_fastwrite_enable(struct tioca_kernel *tioca_kern);
206#endif /* _ASM_IA64_SN_TIO_CA_AGP_PROVIDER_H */ 207#endif /* _ASM_IA64_SN_TIO_CA_AGP_PROVIDER_H */
diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h
index f7f43ec2483a..517f1649ee64 100644
--- a/include/asm-ia64/unistd.h
+++ b/include/asm-ia64/unistd.h
@@ -263,6 +263,8 @@
263#define __NR_add_key 1271 263#define __NR_add_key 1271
264#define __NR_request_key 1272 264#define __NR_request_key 1272
265#define __NR_keyctl 1273 265#define __NR_keyctl 1273
266#define __NR_ioprio_set 1274
267#define __NR_ioprio_get 1275
266#define __NR_set_zone_reclaim 1276 268#define __NR_set_zone_reclaim 1276
267 269
268#ifdef __KERNEL__ 270#ifdef __KERNEL__
diff --git a/include/asm-ia64/vga.h b/include/asm-ia64/vga.h
index 1f446d6841f6..bc3349ffc505 100644
--- a/include/asm-ia64/vga.h
+++ b/include/asm-ia64/vga.h
@@ -14,7 +14,10 @@
14 * videoram directly without any black magic. 14 * videoram directly without any black magic.
15 */ 15 */
16 16
17#define VGA_MAP_MEM(x) ((unsigned long) ioremap((x), 0)) 17extern unsigned long vga_console_iobase;
18extern unsigned long vga_console_membase;
19
20#define VGA_MAP_MEM(x) ((unsigned long) ioremap(vga_console_membase + (x), 0))
18 21
19#define vga_readb(x) (*(x)) 22#define vga_readb(x) (*(x))
20#define vga_writeb(x,y) (*(y) = (x)) 23#define vga_writeb(x,y) (*(y) = (x))
diff --git a/include/asm-m68k/serial.h b/include/asm-m68k/serial.h
index 9f5bcdc105fc..3fe29f8b0194 100644
--- a/include/asm-m68k/serial.h
+++ b/include/asm-m68k/serial.h
@@ -26,54 +26,9 @@
26#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF 26#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
27#endif 27#endif
28 28
29#ifdef CONFIG_SERIAL_MANY_PORTS 29#define SERIAL_PORT_DFNS \
30#define FOURPORT_FLAGS ASYNC_FOURPORT
31#define ACCENT_FLAGS 0
32#define BOCA_FLAGS 0
33#endif
34
35#define STD_SERIAL_PORT_DEFNS \
36 /* UART CLK PORT IRQ FLAGS */ \ 30 /* UART CLK PORT IRQ FLAGS */ \
37 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ 31 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
38 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ 32 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
39 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ 33 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
40 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ 34 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
41
42
43#ifdef CONFIG_SERIAL_MANY_PORTS
44#define EXTRA_SERIAL_PORT_DEFNS \
45 { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS }, /* ttyS4 */ \
46 { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS }, /* ttyS5 */ \
47 { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS }, /* ttyS6 */ \
48 { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS }, /* ttyS7 */ \
49 { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS }, /* ttyS8 */ \
50 { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS }, /* ttyS9 */ \
51 { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS }, /* ttyS10 */ \
52 { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS }, /* ttyS11 */ \
53 { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS }, /* ttyS12 */ \
54 { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS }, /* ttyS13 */ \
55 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS14 (spare) */ \
56 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS15 (spare) */ \
57 { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS }, /* ttyS16 */ \
58 { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS }, /* ttyS17 */ \
59 { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS }, /* ttyS18 */ \
60 { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS }, /* ttyS19 */ \
61 { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS }, /* ttyS20 */ \
62 { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS }, /* ttyS21 */ \
63 { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS }, /* ttyS22 */ \
64 { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS }, /* ttyS23 */ \
65 { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS }, /* ttyS24 */ \
66 { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS }, /* ttyS25 */ \
67 { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS }, /* ttyS26 */ \
68 { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS }, /* ttyS27 */ \
69 { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS }, /* ttyS28 */ \
70 { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS }, /* ttyS29 */ \
71 { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS }, /* ttyS30 */ \
72 { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS }, /* ttyS31 */
73#else
74#define EXTRA_SERIAL_PORT_DEFNS
75#endif
76
77#define SERIAL_PORT_DFNS \
78 STD_SERIAL_PORT_DEFNS \
79 EXTRA_SERIAL_PORT_DEFNS
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index c9c576b48556..2d323b6e147d 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -130,6 +130,16 @@ extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
130extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, 130extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
131 dma64_addr_t dma_addr, size_t len, int direction); 131 dma64_addr_t dma_addr, size_t len, int direction);
132 132
133#ifdef CONFIG_PCI
134static inline void pci_dma_burst_advice(struct pci_dev *pdev,
135 enum pci_dma_burst_strategy *strat,
136 unsigned long *strategy_parameter)
137{
138 *strat = PCI_DMA_BURST_INFINITY;
139 *strategy_parameter = ~0UL;
140}
141#endif
142
133extern void pcibios_resource_to_bus(struct pci_dev *dev, 143extern void pcibios_resource_to_bus(struct pci_dev *dev,
134 struct pci_bus_region *region, struct resource *res); 144 struct pci_bus_region *region, struct resource *res);
135 145
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h
index 8a70ff58f760..4eed8e2acdc3 100644
--- a/include/asm-mips/serial.h
+++ b/include/asm-mips/serial.h
@@ -29,32 +29,6 @@
29#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF 29#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
30#endif 30#endif
31 31
32#ifdef CONFIG_SERIAL_MANY_PORTS
33#define FOURPORT_FLAGS ASYNC_FOURPORT
34#define ACCENT_FLAGS 0
35#define BOCA_FLAGS 0
36#define HUB6_FLAGS 0
37#define RS_TABLE_SIZE 64
38#else
39#define RS_TABLE_SIZE
40#endif
41
42/*
43 * The following define the access methods for the HUB6 card. All
44 * access is through two ports for all 24 possible chips. The card is
45 * selected through the high 2 bits, the port on that card with the
46 * "middle" 3 bits, and the register on that port with the bottom
47 * 3 bits.
48 *
49 * While the access port and interrupt is configurable, the default
50 * port locations are 0x302 for the port control register, and 0x303
51 * for the data read/write register. Normally, the interrupt is at irq3
52 * but can be anything from 3 to 7 inclusive. Note that using 3 will
53 * require disabling com2.
54 */
55
56#define C_P(card,port) (((card)<<6|(port)<<3) + 1)
57
58#ifdef CONFIG_MACH_JAZZ 32#ifdef CONFIG_MACH_JAZZ
59#include <asm/jazz.h> 33#include <asm/jazz.h>
60 34
@@ -240,66 +214,10 @@
240 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ 214 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
241 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ 215 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
242 216
243#ifdef CONFIG_SERIAL_MANY_PORTS
244#define EXTRA_SERIAL_PORT_DEFNS \
245 { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS }, /* ttyS4 */ \
246 { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS }, /* ttyS5 */ \
247 { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS }, /* ttyS6 */ \
248 { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS }, /* ttyS7 */ \
249 { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS }, /* ttyS8 */ \
250 { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS }, /* ttyS9 */ \
251 { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS }, /* ttyS10 */ \
252 { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS }, /* ttyS11 */ \
253 { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS }, /* ttyS12 */ \
254 { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS }, /* ttyS13 */ \
255 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS14 (spare) */ \
256 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS15 (spare) */ \
257 { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS }, /* ttyS16 */ \
258 { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS }, /* ttyS17 */ \
259 { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS }, /* ttyS18 */ \
260 { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS }, /* ttyS19 */ \
261 { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS }, /* ttyS20 */ \
262 { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS }, /* ttyS21 */ \
263 { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS }, /* ttyS22 */ \
264 { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS }, /* ttyS23 */ \
265 { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS }, /* ttyS24 */ \
266 { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS }, /* ttyS25 */ \
267 { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS }, /* ttyS26 */ \
268 { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS }, /* ttyS27 */ \
269 { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS }, /* ttyS28 */ \
270 { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS }, /* ttyS29 */ \
271 { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS }, /* ttyS30 */ \
272 { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS }, /* ttyS31 */
273#else /* CONFIG_SERIAL_MANY_PORTS */
274#define EXTRA_SERIAL_PORT_DEFNS
275#endif /* CONFIG_SERIAL_MANY_PORTS */
276
277#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ 217#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
278#define STD_SERIAL_PORT_DEFNS 218#define STD_SERIAL_PORT_DEFNS
279#define EXTRA_SERIAL_PORT_DEFNS
280#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ 219#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
281 220
282/* You can have up to four HUB6's in the system, but I've only
283 * included two cards here for a total of twelve ports.
284 */
285#if (defined(CONFIG_HUB6) && defined(CONFIG_SERIAL_MANY_PORTS))
286#define HUB6_SERIAL_PORT_DFNS \
287 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,0) }, /* ttyS32 */ \
288 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,1) }, /* ttyS33 */ \
289 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,2) }, /* ttyS34 */ \
290 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,3) }, /* ttyS35 */ \
291 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,4) }, /* ttyS36 */ \
292 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,5) }, /* ttyS37 */ \
293 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,0) }, /* ttyS38 */ \
294 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,1) }, /* ttyS39 */ \
295 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,2) }, /* ttyS40 */ \
296 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,3) }, /* ttyS41 */ \
297 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,4) }, /* ttyS42 */ \
298 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,5) }, /* ttyS43 */
299#else
300#define HUB6_SERIAL_PORT_DFNS
301#endif
302
303#ifdef CONFIG_MOMENCO_JAGUAR_ATX 221#ifdef CONFIG_MOMENCO_JAGUAR_ATX
304/* Ordinary NS16552 duart with a 20MHz crystal. */ 222/* Ordinary NS16552 duart with a 20MHz crystal. */
305#define JAGUAR_ATX_UART_CLK 20000000 223#define JAGUAR_ATX_UART_CLK 20000000
@@ -427,8 +345,6 @@
427 COBALT_SERIAL_PORT_DEFNS \ 345 COBALT_SERIAL_PORT_DEFNS \
428 DDB5477_SERIAL_PORT_DEFNS \ 346 DDB5477_SERIAL_PORT_DEFNS \
429 EV96100_SERIAL_PORT_DEFNS \ 347 EV96100_SERIAL_PORT_DEFNS \
430 EXTRA_SERIAL_PORT_DEFNS \
431 HUB6_SERIAL_PORT_DFNS \
432 IP32_SERIAL_PORT_DEFNS \ 348 IP32_SERIAL_PORT_DEFNS \
433 ITE_SERIAL_PORT_DEFNS \ 349 ITE_SERIAL_PORT_DEFNS \
434 IVR_SERIAL_PORT_DEFNS \ 350 IVR_SERIAL_PORT_DEFNS \
diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h
index 0763c2982fb0..ee741c150176 100644
--- a/include/asm-parisc/pci.h
+++ b/include/asm-parisc/pci.h
@@ -230,6 +230,25 @@ extern inline void pcibios_register_hba(struct pci_hba_data *x)
230/* export the pci_ DMA API in terms of the dma_ one */ 230/* export the pci_ DMA API in terms of the dma_ one */
231#include <asm-generic/pci-dma-compat.h> 231#include <asm-generic/pci-dma-compat.h>
232 232
233#ifdef CONFIG_PCI
234static inline void pci_dma_burst_advice(struct pci_dev *pdev,
235 enum pci_dma_burst_strategy *strat,
236 unsigned long *strategy_parameter)
237{
238 unsigned long cacheline_size;
239 u8 byte;
240
241 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
242 if (byte == 0)
243 cacheline_size = 1024;
244 else
245 cacheline_size = (int) byte * 4;
246
247 *strat = PCI_DMA_BURST_MULTIPLE;
248 *strategy_parameter = cacheline_size;
249}
250#endif
251
233extern void 252extern void
234pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 253pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
235 struct resource *res); 254 struct resource *res);
diff --git a/include/asm-parisc/serial.h b/include/asm-parisc/serial.h
index 239c5dcab7e6..82fd820d684f 100644
--- a/include/asm-parisc/serial.h
+++ b/include/asm-parisc/serial.h
@@ -19,18 +19,4 @@
19 * A500 w/ PCI serial cards: 5 + 4 * card ~= 17 19 * A500 w/ PCI serial cards: 5 + 4 * card ~= 17
20 */ 20 */
21 21
22#define STD_SERIAL_PORT_DEFNS \ 22#define SERIAL_PORT_DFNS
23 { 0, }, /* ttyS0 */ \
24 { 0, }, /* ttyS1 */ \
25 { 0, }, /* ttyS2 */ \
26 { 0, }, /* ttyS3 */ \
27 { 0, }, /* ttyS4 */ \
28 { 0, }, /* ttyS5 */ \
29 { 0, }, /* ttyS6 */ \
30 { 0, }, /* ttyS7 */ \
31 { 0, }, /* ttyS8 */
32
33
34#define SERIAL_PORT_DFNS \
35 STD_SERIAL_PORT_DEFNS
36
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
index 714d69c819d3..7c31f2d564a1 100644
--- a/include/asm-ppc/mpc8xx.h
+++ b/include/asm-ppc/mpc8xx.h
@@ -68,6 +68,10 @@
68#include <platforms/lantec.h> 68#include <platforms/lantec.h>
69#endif 69#endif
70 70
71#if defined(CONFIG_MPC885ADS)
72#include <platforms/mpc885ads.h>
73#endif
74
71/* Currently, all 8xx boards that support a processor to PCI/ISA bridge 75/* Currently, all 8xx boards that support a processor to PCI/ISA bridge
72 * use the same memory map. 76 * use the same memory map.
73 */ 77 */
diff --git a/include/asm-ppc/open_pic.h b/include/asm-ppc/open_pic.h
index dbe853319741..7848aa610c05 100644
--- a/include/asm-ppc/open_pic.h
+++ b/include/asm-ppc/open_pic.h
@@ -25,6 +25,11 @@
25#define OPENPIC_VEC_IPI 118 /* and up */ 25#define OPENPIC_VEC_IPI 118 /* and up */
26#define OPENPIC_VEC_SPURIOUS 255 26#define OPENPIC_VEC_SPURIOUS 255
27 27
28/* Priorities */
29#define OPENPIC_PRIORITY_IPI_BASE 10
30#define OPENPIC_PRIORITY_DEFAULT 4
31#define OPENPIC_PRIORITY_NMI 9
32
28/* OpenPIC IRQ controller structure */ 33/* OpenPIC IRQ controller structure */
29extern struct hw_interrupt_type open_pic; 34extern struct hw_interrupt_type open_pic;
30 35
@@ -42,6 +47,7 @@ extern int epic_serial_mode;
42extern void openpic_set_sources(int first_irq, int num_irqs, void __iomem *isr); 47extern void openpic_set_sources(int first_irq, int num_irqs, void __iomem *isr);
43extern void openpic_init(int linux_irq_offset); 48extern void openpic_init(int linux_irq_offset);
44extern void openpic_init_nmi_irq(u_int irq); 49extern void openpic_init_nmi_irq(u_int irq);
50extern void openpic_set_irq_priority(u_int irq, u_int pri);
45extern void openpic_hookup_cascade(u_int irq, char *name, 51extern void openpic_hookup_cascade(u_int irq, char *name,
46 int (*cascade_fn)(struct pt_regs *)); 52 int (*cascade_fn)(struct pt_regs *));
47extern u_int openpic_irq(void); 53extern u_int openpic_irq(void);
diff --git a/include/asm-ppc/pc_serial.h b/include/asm-ppc/pc_serial.h
index fa9cbb67ce3e..8f994f9f8857 100644
--- a/include/asm-ppc/pc_serial.h
+++ b/include/asm-ppc/pc_serial.h
@@ -35,93 +35,9 @@
35#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF 35#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
36#endif 36#endif
37 37
38#ifdef CONFIG_SERIAL_MANY_PORTS 38#define SERIAL_PORT_DFNS \
39#define FOURPORT_FLAGS ASYNC_FOURPORT
40#define ACCENT_FLAGS 0
41#define BOCA_FLAGS 0
42#define HUB6_FLAGS 0
43#endif
44
45/*
46 * The following define the access methods for the HUB6 card. All
47 * access is through two ports for all 24 possible chips. The card is
48 * selected through the high 2 bits, the port on that card with the
49 * "middle" 3 bits, and the register on that port with the bottom
50 * 3 bits.
51 *
52 * While the access port and interrupt is configurable, the default
53 * port locations are 0x302 for the port control register, and 0x303
54 * for the data read/write register. Normally, the interrupt is at irq3
55 * but can be anything from 3 to 7 inclusive. Note that using 3 will
56 * require disabling com2.
57 */
58
59#define C_P(card,port) (((card)<<6|(port)<<3) + 1)
60
61#define STD_SERIAL_PORT_DEFNS \
62 /* UART CLK PORT IRQ FLAGS */ \ 39 /* UART CLK PORT IRQ FLAGS */ \
63 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ 40 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
64 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ 41 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
65 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ 42 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
66 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ 43 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
67
68
69#ifdef CONFIG_SERIAL_MANY_PORTS
70#define EXTRA_SERIAL_PORT_DEFNS \
71 { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS }, /* ttyS4 */ \
72 { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS }, /* ttyS5 */ \
73 { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS }, /* ttyS6 */ \
74 { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS }, /* ttyS7 */ \
75 { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS }, /* ttyS8 */ \
76 { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS }, /* ttyS9 */ \
77 { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS }, /* ttyS10 */ \
78 { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS }, /* ttyS11 */ \
79 { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS }, /* ttyS12 */ \
80 { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS }, /* ttyS13 */ \
81 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS14 (spare) */ \
82 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS15 (spare) */ \
83 { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS }, /* ttyS16 */ \
84 { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS }, /* ttyS17 */ \
85 { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS }, /* ttyS18 */ \
86 { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS }, /* ttyS19 */ \
87 { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS }, /* ttyS20 */ \
88 { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS }, /* ttyS21 */ \
89 { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS }, /* ttyS22 */ \
90 { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS }, /* ttyS23 */ \
91 { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS }, /* ttyS24 */ \
92 { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS }, /* ttyS25 */ \
93 { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS }, /* ttyS26 */ \
94 { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS }, /* ttyS27 */ \
95 { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS }, /* ttyS28 */ \
96 { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS }, /* ttyS29 */ \
97 { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS }, /* ttyS30 */ \
98 { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS }, /* ttyS31 */
99#else
100#define EXTRA_SERIAL_PORT_DEFNS
101#endif
102
103/* You can have up to four HUB6's in the system, but I've only
104 * included two cards here for a total of twelve ports.
105 */
106#if (defined(CONFIG_HUB6) && defined(CONFIG_SERIAL_MANY_PORTS))
107#define HUB6_SERIAL_PORT_DFNS \
108 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,0) }, /* ttyS32 */ \
109 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,1) }, /* ttyS33 */ \
110 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,2) }, /* ttyS34 */ \
111 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,3) }, /* ttyS35 */ \
112 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,4) }, /* ttyS36 */ \
113 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,5) }, /* ttyS37 */ \
114 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,0) }, /* ttyS38 */ \
115 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,1) }, /* ttyS39 */ \
116 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,2) }, /* ttyS40 */ \
117 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,3) }, /* ttyS41 */ \
118 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,4) }, /* ttyS42 */ \
119 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,5) }, /* ttyS43 */
120#else
121#define HUB6_SERIAL_PORT_DFNS
122#endif
123
124#define SERIAL_PORT_DFNS \
125 STD_SERIAL_PORT_DEFNS \
126 EXTRA_SERIAL_PORT_DEFNS \
127 HUB6_SERIAL_PORT_DFNS
diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h
index ce5ae6d048f5..db0a2a0ec74d 100644
--- a/include/asm-ppc/pci.h
+++ b/include/asm-ppc/pci.h
@@ -69,6 +69,16 @@ extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr);
69#define pci_unmap_len(PTR, LEN_NAME) (0) 69#define pci_unmap_len(PTR, LEN_NAME) (0)
70#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 70#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
71 71
72#ifdef CONFIG_PCI
73static inline void pci_dma_burst_advice(struct pci_dev *pdev,
74 enum pci_dma_burst_strategy *strat,
75 unsigned long *strategy_parameter)
76{
77 *strat = PCI_DMA_BURST_INFINITY;
78 *strategy_parameter = ~0UL;
79}
80#endif
81
72/* 82/*
73 * At present there are very few 32-bit PPC machines that can have 83 * At present there are very few 32-bit PPC machines that can have
74 * memory above the 4GB point, and we don't support that. 84 * memory above the 4GB point, and we don't support that.
@@ -103,6 +113,12 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file,
103 unsigned long size, 113 unsigned long size,
104 pgprot_t prot); 114 pgprot_t prot);
105 115
116#define HAVE_ARCH_PCI_RESOURCE_TO_USER
117extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
118 const struct resource *rsrc,
119 u64 *start, u64 *end);
120
121
106#endif /* __KERNEL__ */ 122#endif /* __KERNEL__ */
107 123
108#endif /* __PPC_PCI_H */ 124#endif /* __PPC_PCI_H */
diff --git a/include/asm-ppc/unistd.h b/include/asm-ppc/unistd.h
index cc51e5c9acc2..e8b79220b29c 100644
--- a/include/asm-ppc/unistd.h
+++ b/include/asm-ppc/unistd.h
@@ -277,8 +277,10 @@
277#define __NR_request_key 270 277#define __NR_request_key 270
278#define __NR_keyctl 271 278#define __NR_keyctl 271
279#define __NR_waitid 272 279#define __NR_waitid 272
280#define __NR_ioprio_set 273
281#define __NR_ioprio_get 274
280 282
281#define __NR_syscalls 273 283#define __NR_syscalls 275
282 284
283#define __NR(n) #n 285#define __NR(n) #n
284 286
diff --git a/include/asm-ppc64/byteorder.h b/include/asm-ppc64/byteorder.h
index 80327532de64..8b57da62b674 100644
--- a/include/asm-ppc64/byteorder.h
+++ b/include/asm-ppc64/byteorder.h
@@ -40,7 +40,6 @@ static __inline__ void st_le32(volatile __u32 *addr, const __u32 val)
40 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); 40 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
41} 41}
42 42
43#if 0
44static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value) 43static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value)
45{ 44{
46 __u16 result; 45 __u16 result;
@@ -63,17 +62,8 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value)
63 return result; 62 return result;
64} 63}
65 64
66static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 value)
67{
68 __u64 result;
69#error implement me
70}
71
72#define __arch__swab16(x) ___arch__swab16(x) 65#define __arch__swab16(x) ___arch__swab16(x)
73#define __arch__swab32(x) ___arch__swab32(x) 66#define __arch__swab32(x) ___arch__swab32(x)
74#define __arch__swab64(x) ___arch__swab64(x)
75
76#endif
77 67
78/* The same, but returns converted value from the location pointer by addr. */ 68/* The same, but returns converted value from the location pointer by addr. */
79#define __arch__swab16p(addr) ld_le16(addr) 69#define __arch__swab16p(addr) ld_le16(addr)
diff --git a/include/asm-ppc64/iSeries/ItLpQueue.h b/include/asm-ppc64/iSeries/ItLpQueue.h
index 393299e04d7f..69b26ad74135 100644
--- a/include/asm-ppc64/iSeries/ItLpQueue.h
+++ b/include/asm-ppc64/iSeries/ItLpQueue.h
@@ -41,7 +41,7 @@ struct HvLpEvent;
41#define LpEventMaxSize 256 41#define LpEventMaxSize 256
42#define LpEventAlign 64 42#define LpEventAlign 64
43 43
44struct ItLpQueue { 44struct hvlpevent_queue {
45/* 45/*
46 * The xSlicCurEventPtr is the pointer to the next event stack entry 46 * The xSlicCurEventPtr is the pointer to the next event stack entry
47 * that will become valid. The OS must peek at this entry to determine 47 * that will become valid. The OS must peek at this entry to determine
@@ -69,16 +69,13 @@ struct ItLpQueue {
69 char *xSlicEventStackPtr; // 0x20 69 char *xSlicEventStackPtr; // 0x20
70 u8 xIndex; // 0x28 unique sequential index. 70 u8 xIndex; // 0x28 unique sequential index.
71 u8 xSlicRsvd[3]; // 0x29-2b 71 u8 xSlicRsvd[3]; // 0x29-2b
72 u32 xInUseWord; // 0x2C 72 spinlock_t lock;
73 u64 xLpIntCount; // 0x30 Total Lp Int msgs processed
74 u64 xLpIntCountByType[9]; // 0x38-0x7F Event counts by type
75}; 73};
76 74
77extern struct ItLpQueue xItLpQueue; 75extern struct hvlpevent_queue hvlpevent_queue;
78 76
79extern struct HvLpEvent *ItLpQueue_getNextLpEvent(struct ItLpQueue *); 77extern int hvlpevent_is_pending(void);
80extern int ItLpQueue_isLpIntPending(struct ItLpQueue *); 78extern void process_hvlpevents(struct pt_regs *);
81extern unsigned ItLpQueue_process(struct ItLpQueue *, struct pt_regs *); 79extern void setup_hvlpevent_queue(void);
82extern void ItLpQueue_clearValid(struct HvLpEvent *);
83 80
84#endif /* _ITLPQUEUE_H */ 81#endif /* _ITLPQUEUE_H */
diff --git a/include/asm-ppc64/kprobes.h b/include/asm-ppc64/kprobes.h
index 19b468bed059..0802919c3235 100644
--- a/include/asm-ppc64/kprobes.h
+++ b/include/asm-ppc64/kprobes.h
@@ -42,10 +42,13 @@ typedef unsigned int kprobe_opcode_t;
42 42
43#define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)((func_descr_t *)pentry) 43#define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)((func_descr_t *)pentry)
44 44
45#define ARCH_SUPPORTS_KRETPROBES
46void kretprobe_trampoline(void);
47
45/* Architecture specific copy of original instruction */ 48/* Architecture specific copy of original instruction */
46struct arch_specific_insn { 49struct arch_specific_insn {
47 /* copy of original instruction */ 50 /* copy of original instruction */
48 kprobe_opcode_t insn[MAX_INSN_SIZE]; 51 kprobe_opcode_t *insn;
49}; 52};
50 53
51#ifdef CONFIG_KPROBES 54#ifdef CONFIG_KPROBES
diff --git a/include/asm-ppc64/paca.h b/include/asm-ppc64/paca.h
index ae76cae1483f..2f0f36f73d38 100644
--- a/include/asm-ppc64/paca.h
+++ b/include/asm-ppc64/paca.h
@@ -20,7 +20,6 @@
20#include <asm/types.h> 20#include <asm/types.h>
21#include <asm/lppaca.h> 21#include <asm/lppaca.h>
22#include <asm/iSeries/ItLpRegSave.h> 22#include <asm/iSeries/ItLpRegSave.h>
23#include <asm/iSeries/ItLpQueue.h>
24#include <asm/mmu.h> 23#include <asm/mmu.h>
25 24
26register struct paca_struct *local_paca asm("r13"); 25register struct paca_struct *local_paca asm("r13");
@@ -62,7 +61,6 @@ struct paca_struct {
62 u16 paca_index; /* Logical processor number */ 61 u16 paca_index; /* Logical processor number */
63 62
64 u32 default_decr; /* Default decrementer value */ 63 u32 default_decr; /* Default decrementer value */
65 struct ItLpQueue *lpqueue_ptr; /* LpQueue handled by this CPU */
66 u64 kernel_toc; /* Kernel TOC address */ 64 u64 kernel_toc; /* Kernel TOC address */
67 u64 stab_real; /* Absolute address of segment table */ 65 u64 stab_real; /* Absolute address of segment table */
68 u64 stab_addr; /* Virtual address of segment table */ 66 u64 stab_addr; /* Virtual address of segment table */
@@ -91,7 +89,6 @@ struct paca_struct {
91 u64 next_jiffy_update_tb; /* TB value for next jiffy update */ 89 u64 next_jiffy_update_tb; /* TB value for next jiffy update */
92 u64 saved_r1; /* r1 save for RTAS calls */ 90 u64 saved_r1; /* r1 save for RTAS calls */
93 u64 saved_msr; /* MSR saved here by enter_rtas */ 91 u64 saved_msr; /* MSR saved here by enter_rtas */
94 u32 lpevent_count; /* lpevents processed */
95 u8 proc_enabled; /* irq soft-enable flag */ 92 u8 proc_enabled; /* irq soft-enable flag */
96 93
97 /* not yet used */ 94 /* not yet used */
diff --git a/include/asm-ppc64/pci.h b/include/asm-ppc64/pci.h
index 6cd593f660a0..d12dfce21e20 100644
--- a/include/asm-ppc64/pci.h
+++ b/include/asm-ppc64/pci.h
@@ -78,6 +78,25 @@ static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
78 return 0; 78 return 0;
79} 79}
80 80
81#ifdef CONFIG_PCI
82static inline void pci_dma_burst_advice(struct pci_dev *pdev,
83 enum pci_dma_burst_strategy *strat,
84 unsigned long *strategy_parameter)
85{
86 unsigned long cacheline_size;
87 u8 byte;
88
89 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
90 if (byte == 0)
91 cacheline_size = 1024;
92 else
93 cacheline_size = (int) byte * 4;
94
95 *strat = PCI_DMA_BURST_MULTIPLE;
96 *strategy_parameter = cacheline_size;
97}
98#endif
99
81extern int pci_domain_nr(struct pci_bus *bus); 100extern int pci_domain_nr(struct pci_bus *bus);
82 101
83/* Decide whether to display the domain number in /proc */ 102/* Decide whether to display the domain number in /proc */
@@ -136,6 +155,13 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file,
136 unsigned long size, 155 unsigned long size,
137 pgprot_t prot); 156 pgprot_t prot);
138 157
158#ifdef CONFIG_PPC_MULTIPLATFORM
159#define HAVE_ARCH_PCI_RESOURCE_TO_USER
160extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
161 const struct resource *rsrc,
162 u64 *start, u64 *end);
163#endif /* CONFIG_PPC_MULTIPLATFORM */
164
139 165
140#endif /* __KERNEL__ */ 166#endif /* __KERNEL__ */
141 167
diff --git a/include/asm-s390/system.h b/include/asm-s390/system.h
index b4a9f05a93d6..864cae7e1fd6 100644
--- a/include/asm-s390/system.h
+++ b/include/asm-s390/system.h
@@ -107,11 +107,9 @@ static inline void restore_access_regs(unsigned int *acrs)
107#ifdef CONFIG_VIRT_CPU_ACCOUNTING 107#ifdef CONFIG_VIRT_CPU_ACCOUNTING
108extern void account_user_vtime(struct task_struct *); 108extern void account_user_vtime(struct task_struct *);
109extern void account_system_vtime(struct task_struct *); 109extern void account_system_vtime(struct task_struct *);
110#else
111#define account_system_vtime(prev) do { } while (0)
112#endif 110#endif
113 111
114#define finish_arch_switch(rq, prev) do { \ 112#define finish_arch_switch(prev) do { \
115 set_fs(current->thread.mm_segment); \ 113 set_fs(current->thread.mm_segment); \
116 account_system_vtime(prev); \ 114 account_system_vtime(prev); \
117} while (0) 115} while (0)
diff --git a/include/asm-sh/bigsur/serial.h b/include/asm-sh/bigsur/serial.h
index 540f12205923..7233af42f755 100644
--- a/include/asm-sh/bigsur/serial.h
+++ b/include/asm-sh/bigsur/serial.h
@@ -14,13 +14,10 @@
14#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) 14#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
15 15
16 16
17#define STD_SERIAL_PORT_DEFNS \ 17#define SERIAL_PORT_DFNS \
18 /* UART CLK PORT IRQ FLAGS */ \ 18 /* UART CLK PORT IRQ FLAGS */ \
19 { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */ 19 { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */
20 20
21
22#define SERIAL_PORT_DFNS STD_SERIAL_PORT_DEFNS
23
24/* XXX: This should be moved ino irq.h */ 21/* XXX: This should be moved ino irq.h */
25#define irq_cannonicalize(x) (x) 22#define irq_cannonicalize(x) (x)
26 23
diff --git a/include/asm-sh/ec3104/serial.h b/include/asm-sh/ec3104/serial.h
index f8eb16312ed9..cfe4d78ec1ee 100644
--- a/include/asm-sh/ec3104/serial.h
+++ b/include/asm-sh/ec3104/serial.h
@@ -10,13 +10,11 @@
10 * it's got the keyboard controller behind it so we can't really use it 10 * it's got the keyboard controller behind it so we can't really use it
11 * (without moving the keyboard driver to userspace, which doesn't sound 11 * (without moving the keyboard driver to userspace, which doesn't sound
12 * like a very good idea) */ 12 * like a very good idea) */
13#define STD_SERIAL_PORT_DEFNS \ 13#define SERIAL_PORT_DFNS \
14 /* UART CLK PORT IRQ FLAGS */ \ 14 /* UART CLK PORT IRQ FLAGS */ \
15 { 0, BASE_BAUD, 0x11C00, EC3104_IRQBASE+7, STD_COM_FLAGS }, /* ttyS0 */ \ 15 { 0, BASE_BAUD, 0x11C00, EC3104_IRQBASE+7, STD_COM_FLAGS }, /* ttyS0 */ \
16 { 0, BASE_BAUD, 0x12000, EC3104_IRQBASE+8, STD_COM_FLAGS }, /* ttyS1 */ \ 16 { 0, BASE_BAUD, 0x12000, EC3104_IRQBASE+8, STD_COM_FLAGS }, /* ttyS1 */ \
17 { 0, BASE_BAUD, 0x12400, EC3104_IRQBASE+9, STD_COM_FLAGS }, /* ttyS2 */ 17 { 0, BASE_BAUD, 0x12400, EC3104_IRQBASE+9, STD_COM_FLAGS }, /* ttyS2 */
18 18
19#define SERIAL_PORT_DFNS STD_SERIAL_PORT_DEFNS
20
21/* XXX: This should be moved ino irq.h */ 19/* XXX: This should be moved ino irq.h */
22#define irq_cannonicalize(x) (x) 20#define irq_cannonicalize(x) (x)
diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h
index 9c3b63d0105e..26044889c770 100644
--- a/include/asm-sh/pci.h
+++ b/include/asm-sh/pci.h
@@ -96,6 +96,16 @@ static inline void pcibios_penalize_isa_irq(int irq)
96#define sg_dma_address(sg) (virt_to_bus((sg)->dma_address)) 96#define sg_dma_address(sg) (virt_to_bus((sg)->dma_address))
97#define sg_dma_len(sg) ((sg)->length) 97#define sg_dma_len(sg) ((sg)->length)
98 98
99#ifdef CONFIG_PCI
100static inline void pci_dma_burst_advice(struct pci_dev *pdev,
101 enum pci_dma_burst_strategy *strat,
102 unsigned long *strategy_parameter)
103{
104 *strat = PCI_DMA_BURST_INFINITY;
105 *strategy_parameter = ~0UL;
106}
107#endif
108
99/* Board-specific fixup routines. */ 109/* Board-specific fixup routines. */
100extern void pcibios_fixup(void); 110extern void pcibios_fixup(void);
101extern void pcibios_fixup_irqs(void); 111extern void pcibios_fixup_irqs(void);
diff --git a/include/asm-sh/serial.h b/include/asm-sh/serial.h
index 5474dbdbaa86..f51e232d5cd9 100644
--- a/include/asm-sh/serial.h
+++ b/include/asm-sh/serial.h
@@ -29,20 +29,18 @@
29#ifdef CONFIG_HD64465 29#ifdef CONFIG_HD64465
30#include <asm/hd64465.h> 30#include <asm/hd64465.h>
31 31
32#define STD_SERIAL_PORT_DEFNS \ 32#define SERIAL_PORT_DFNS \
33 /* UART CLK PORT IRQ FLAGS */ \ 33 /* UART CLK PORT IRQ FLAGS */ \
34 { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */ 34 { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */
35 35
36#else 36#else
37 37
38#define STD_SERIAL_PORT_DEFNS \ 38#define SERIAL_PORT_DFNS \
39 /* UART CLK PORT IRQ FLAGS */ \ 39 /* UART CLK PORT IRQ FLAGS */ \
40 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ 40 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
41 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS } /* ttyS1 */ 41 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS } /* ttyS1 */
42 42
43#endif 43#endif
44 44
45#define SERIAL_PORT_DFNS STD_SERIAL_PORT_DEFNS
46
47#endif 45#endif
48#endif /* _ASM_SERIAL_H */ 46#endif /* _ASM_SERIAL_H */
diff --git a/include/asm-sh64/pci.h b/include/asm-sh64/pci.h
index 8cc14e139750..c68870e02d91 100644
--- a/include/asm-sh64/pci.h
+++ b/include/asm-sh64/pci.h
@@ -86,6 +86,16 @@ static inline void pcibios_penalize_isa_irq(int irq)
86#define sg_dma_address(sg) ((sg)->dma_address) 86#define sg_dma_address(sg) ((sg)->dma_address)
87#define sg_dma_len(sg) ((sg)->length) 87#define sg_dma_len(sg) ((sg)->length)
88 88
89#ifdef CONFIG_PCI
90static inline void pci_dma_burst_advice(struct pci_dev *pdev,
91 enum pci_dma_burst_strategy *strat,
92 unsigned long *strategy_parameter)
93{
94 *strat = PCI_DMA_BURST_INFINITY;
95 *strategy_parameter = ~0UL;
96}
97#endif
98
89/* Board-specific fixup routines. */ 99/* Board-specific fixup routines. */
90extern void pcibios_fixup(void); 100extern void pcibios_fixup(void);
91extern void pcibios_fixup_irqs(void); 101extern void pcibios_fixup_irqs(void);
diff --git a/include/asm-sh64/serial.h b/include/asm-sh64/serial.h
index 8e39b4e90c76..29c9be15112b 100644
--- a/include/asm-sh64/serial.h
+++ b/include/asm-sh64/serial.h
@@ -20,13 +20,11 @@
20 20
21#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) 21#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
22 22
23#define STD_SERIAL_PORT_DEFNS \ 23#define SERIAL_PORT_DFNS \
24 /* UART CLK PORT IRQ FLAGS */ \ 24 /* UART CLK PORT IRQ FLAGS */ \
25 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ 25 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
26 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS } /* ttyS1 */ 26 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS } /* ttyS1 */
27 27
28#define SERIAL_PORT_DFNS STD_SERIAL_PORT_DEFNS
29
30/* XXX: This should be moved ino irq.h */ 28/* XXX: This should be moved ino irq.h */
31#define irq_cannonicalize(x) (x) 29#define irq_cannonicalize(x) (x)
32 30
diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h
index d200a25a7373..44bb38758c96 100644
--- a/include/asm-sparc/pci.h
+++ b/include/asm-sparc/pci.h
@@ -144,6 +144,16 @@ extern inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
144 144
145#define pci_dac_dma_supported(dev, mask) (0) 145#define pci_dac_dma_supported(dev, mask) (0)
146 146
147#ifdef CONFIG_PCI
148static inline void pci_dma_burst_advice(struct pci_dev *pdev,
149 enum pci_dma_burst_strategy *strat,
150 unsigned long *strategy_parameter)
151{
152 *strat = PCI_DMA_BURST_INFINITY;
153 *strategy_parameter = ~0UL;
154}
155#endif
156
147static inline void pcibios_add_platform_entries(struct pci_dev *dev) 157static inline void pcibios_add_platform_entries(struct pci_dev *dev)
148{ 158{
149} 159}
diff --git a/include/asm-sparc64/auxio.h b/include/asm-sparc64/auxio.h
index 5eb01dd47150..81a590a50a1f 100644
--- a/include/asm-sparc64/auxio.h
+++ b/include/asm-sparc64/auxio.h
@@ -75,6 +75,8 @@
75 75
76#ifndef __ASSEMBLY__ 76#ifndef __ASSEMBLY__
77 77
78extern void __iomem *auxio_register;
79
78#define AUXIO_LTE_ON 1 80#define AUXIO_LTE_ON 1
79#define AUXIO_LTE_OFF 0 81#define AUXIO_LTE_OFF 0
80 82
diff --git a/include/asm-sparc64/floppy.h b/include/asm-sparc64/floppy.h
index e071b4b4edfd..49d49a285943 100644
--- a/include/asm-sparc64/floppy.h
+++ b/include/asm-sparc64/floppy.h
@@ -159,7 +159,7 @@ static void sun_82077_fd_outb(unsigned char value, unsigned long port)
159 * underruns. If non-zero, doing_pdma encodes the direction of 159 * underruns. If non-zero, doing_pdma encodes the direction of
160 * the transfer for debugging. 1=read 2=write 160 * the transfer for debugging. 1=read 2=write
161 */ 161 */
162char *pdma_vaddr; 162unsigned char *pdma_vaddr;
163unsigned long pdma_size; 163unsigned long pdma_size;
164volatile int doing_pdma = 0; 164volatile int doing_pdma = 0;
165 165
@@ -209,8 +209,7 @@ static void sun_fd_enable_dma(void)
209 pdma_areasize = pdma_size; 209 pdma_areasize = pdma_size;
210} 210}
211 211
212/* Our low-level entry point in arch/sparc/kernel/entry.S */ 212extern irqreturn_t sparc_floppy_irq(int, void *, struct pt_regs *);
213extern irqreturn_t floppy_hardint(int irq, void *unused, struct pt_regs *regs);
214 213
215static int sun_fd_request_irq(void) 214static int sun_fd_request_irq(void)
216{ 215{
@@ -220,8 +219,8 @@ static int sun_fd_request_irq(void)
220 if(!once) { 219 if(!once) {
221 once = 1; 220 once = 1;
222 221
223 error = request_fast_irq(FLOPPY_IRQ, floppy_hardint, 222 error = request_irq(FLOPPY_IRQ, sparc_floppy_irq,
224 SA_INTERRUPT, "floppy", NULL); 223 SA_INTERRUPT, "floppy", NULL);
225 224
226 return ((error == 0) ? 0 : -1); 225 return ((error == 0) ? 0 : -1);
227 } 226 }
@@ -615,7 +614,7 @@ static unsigned long __init sun_floppy_init(void)
615 struct linux_ebus *ebus; 614 struct linux_ebus *ebus;
616 struct linux_ebus_device *edev = NULL; 615 struct linux_ebus_device *edev = NULL;
617 unsigned long config = 0; 616 unsigned long config = 0;
618 unsigned long auxio_reg; 617 void __iomem *auxio_reg;
619 618
620 for_each_ebus(ebus) { 619 for_each_ebus(ebus) {
621 for_each_ebusdev(edev, ebus) { 620 for_each_ebusdev(edev, ebus) {
@@ -642,7 +641,7 @@ static unsigned long __init sun_floppy_init(void)
642 /* Make sure the high density bit is set, some systems 641 /* Make sure the high density bit is set, some systems
643 * (most notably Ultra5/Ultra10) come up with it clear. 642 * (most notably Ultra5/Ultra10) come up with it clear.
644 */ 643 */
645 auxio_reg = edev->resource[2].start; 644 auxio_reg = (void __iomem *) edev->resource[2].start;
646 writel(readl(auxio_reg)|0x2, auxio_reg); 645 writel(readl(auxio_reg)|0x2, auxio_reg);
647 646
648 sun_pci_ebus_dev = ebus->self; 647 sun_pci_ebus_dev = ebus->self;
@@ -650,7 +649,8 @@ static unsigned long __init sun_floppy_init(void)
650 spin_lock_init(&sun_pci_fd_ebus_dma.lock); 649 spin_lock_init(&sun_pci_fd_ebus_dma.lock);
651 650
652 /* XXX ioremap */ 651 /* XXX ioremap */
653 sun_pci_fd_ebus_dma.regs = edev->resource[1].start; 652 sun_pci_fd_ebus_dma.regs = (void __iomem *)
653 edev->resource[1].start;
654 if (!sun_pci_fd_ebus_dma.regs) 654 if (!sun_pci_fd_ebus_dma.regs)
655 return 0; 655 return 0;
656 656
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index 3aef0ca67750..8b70edcb80dc 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -16,10 +16,22 @@
16#include <asm/pil.h> 16#include <asm/pil.h>
17#include <asm/ptrace.h> 17#include <asm/ptrace.h>
18 18
19struct ino_bucket;
20
21#define MAX_IRQ_DESC_ACTION 4
22
23struct irq_desc {
24 void (*pre_handler)(struct ino_bucket *, void *, void *);
25 void *pre_handler_arg1;
26 void *pre_handler_arg2;
27 u32 action_active_mask;
28 struct irqaction action[MAX_IRQ_DESC_ACTION];
29};
30
19/* You should not mess with this directly. That's the job of irq.c. 31/* You should not mess with this directly. That's the job of irq.c.
20 * 32 *
21 * If you make changes here, please update hand coded assembler of 33 * If you make changes here, please update hand coded assembler of
22 * SBUS/floppy interrupt handler in entry.S -DaveM 34 * the vectored interrupt trap handler in entry.S -DaveM
23 * 35 *
24 * This is currently one DCACHE line, two buckets per L2 cache 36 * This is currently one DCACHE line, two buckets per L2 cache
25 * line. Keep this in mind please. 37 * line. Keep this in mind please.
@@ -42,24 +54,11 @@ struct ino_bucket {
42 /* Miscellaneous flags. */ 54 /* Miscellaneous flags. */
43/*0x06*/unsigned char flags; 55/*0x06*/unsigned char flags;
44 56
45 /* This is used to deal with IBF_DMA_SYNC on 57 /* Currently unused. */
46 * Sabre systems. 58/*0x07*/unsigned char __pad;
47 */ 59
48/*0x07*/unsigned char synctab_ent; 60 /* Reference to IRQ descriptor for this bucket. */
49 61/*0x08*/struct irq_desc *irq_info;
50 /* Reference to handler for this IRQ. If this is
51 * non-NULL this means it is active and should be
52 * serviced. Else the pending member is set to one
53 * and later registry of the interrupt checks for
54 * this condition.
55 *
56 * Normally this is just an irq_action structure.
57 * But, on PCI, if multiple interrupt sources behind
58 * a bridge have multiple interrupt sources that share
59 * the same INO bucket, this points to an array of
60 * pointers to four IRQ action structures.
61 */
62/*0x08*/void *irq_info;
63 62
64 /* Sun5 Interrupt Clear Register. */ 63 /* Sun5 Interrupt Clear Register. */
65/*0x10*/unsigned long iclr; 64/*0x10*/unsigned long iclr;
@@ -69,12 +68,6 @@ struct ino_bucket {
69 68
70}; 69};
71 70
72#ifdef CONFIG_PCI
73extern unsigned long pci_dma_wsync;
74extern unsigned long dma_sync_reg_table[256];
75extern unsigned char dma_sync_reg_table_entry;
76#endif
77
78/* IMAP/ICLR register defines */ 71/* IMAP/ICLR register defines */
79#define IMAP_VALID 0x80000000 /* IRQ Enabled */ 72#define IMAP_VALID 0x80000000 /* IRQ Enabled */
80#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */ 73#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */
@@ -90,11 +83,9 @@ extern unsigned char dma_sync_reg_table_entry;
90#define ICLR_PENDING 0x00000003 /* Pending state */ 83#define ICLR_PENDING 0x00000003 /* Pending state */
91 84
92/* Only 8-bits are available, be careful. -DaveM */ 85/* Only 8-bits are available, be careful. -DaveM */
93#define IBF_DMA_SYNC 0x01 /* DMA synchronization behind PCI bridge needed. */ 86#define IBF_PCI 0x02 /* PSYCHO/SABRE/SCHIZO PCI interrupt. */
94#define IBF_PCI 0x02 /* Indicates PSYCHO/SABRE/SCHIZO PCI interrupt. */ 87#define IBF_ACTIVE 0x04 /* Interrupt is active and has a handler.*/
95#define IBF_ACTIVE 0x04 /* This interrupt is active and has a handler. */ 88#define IBF_INPROGRESS 0x10 /* IRQ is being serviced. */
96#define IBF_MULTI 0x08 /* On PCI, indicates shared bucket. */
97#define IBF_INPROGRESS 0x10 /* IRQ is being serviced. */
98 89
99#define NUM_IVECS (IMAP_INR + 1) 90#define NUM_IVECS (IMAP_INR + 1)
100extern struct ino_bucket ivector_table[NUM_IVECS]; 91extern struct ino_bucket ivector_table[NUM_IVECS];
@@ -122,11 +113,6 @@ extern void enable_irq(unsigned int);
122extern unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap); 113extern unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap);
123extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); 114extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
124 115
125extern int request_fast_irq(unsigned int irq,
126 irqreturn_t (*handler)(int, void *, struct pt_regs *),
127 unsigned long flags, __const__ char *devname,
128 void *dev_id);
129
130static __inline__ void set_softint(unsigned long bits) 116static __inline__ void set_softint(unsigned long bits)
131{ 117{
132 __asm__ __volatile__("wr %0, 0x0, %%set_softint" 118 __asm__ __volatile__("wr %0, 0x0, %%set_softint"
diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h
index 4c15610a2bac..38bbbccb4068 100644
--- a/include/asm-sparc64/pbm.h
+++ b/include/asm-sparc64/pbm.h
@@ -145,6 +145,9 @@ struct pci_pbm_info {
145 /* Physical address base of PBM registers. */ 145 /* Physical address base of PBM registers. */
146 unsigned long pbm_regs; 146 unsigned long pbm_regs;
147 147
148 /* Physical address of DMA sync register, if any. */
149 unsigned long sync_reg;
150
148 /* Opaque 32-bit system bus Port ID. */ 151 /* Opaque 32-bit system bus Port ID. */
149 u32 portid; 152 u32 portid;
150 153
diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h
index 2a0c85cd1c11..84e41c1ef3f8 100644
--- a/include/asm-sparc64/pci.h
+++ b/include/asm-sparc64/pci.h
@@ -220,6 +220,25 @@ static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
220 return (dma_addr == PCI_DMA_ERROR_CODE); 220 return (dma_addr == PCI_DMA_ERROR_CODE);
221} 221}
222 222
223#ifdef CONFIG_PCI
224static inline void pci_dma_burst_advice(struct pci_dev *pdev,
225 enum pci_dma_burst_strategy *strat,
226 unsigned long *strategy_parameter)
227{
228 unsigned long cacheline_size;
229 u8 byte;
230
231 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
232 if (byte == 0)
233 cacheline_size = 1024;
234 else
235 cacheline_size = (int) byte * 4;
236
237 *strat = PCI_DMA_BURST_BOUNDARY;
238 *strategy_parameter = cacheline_size;
239}
240#endif
241
223/* Return the index of the PCI controller for device PDEV. */ 242/* Return the index of the PCI controller for device PDEV. */
224 243
225extern int pci_domain_nr(struct pci_bus *bus); 244extern int pci_domain_nr(struct pci_bus *bus);
diff --git a/include/asm-sparc64/rwsem.h b/include/asm-sparc64/rwsem.h
index bf2ae90ed3df..a1cc94f95984 100644
--- a/include/asm-sparc64/rwsem.h
+++ b/include/asm-sparc64/rwsem.h
@@ -55,8 +55,9 @@ static __inline__ int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
55 "add %%g1, %1, %%g7\n\t" 55 "add %%g1, %1, %%g7\n\t"
56 "cas [%2], %%g1, %%g7\n\t" 56 "cas [%2], %%g1, %%g7\n\t"
57 "cmp %%g1, %%g7\n\t" 57 "cmp %%g1, %%g7\n\t"
58 "membar #StoreLoad | #StoreStore\n\t"
58 "bne,pn %%icc, 1b\n\t" 59 "bne,pn %%icc, 1b\n\t"
59 " membar #StoreLoad | #StoreStore\n\t" 60 " nop\n\t"
60 "mov %%g7, %0\n\t" 61 "mov %%g7, %0\n\t"
61 : "=&r" (tmp) 62 : "=&r" (tmp)
62 : "0" (tmp), "r" (sem) 63 : "0" (tmp), "r" (sem)
diff --git a/include/asm-sparc64/signal.h b/include/asm-sparc64/signal.h
index becdf1bc5924..e3059bb4a465 100644
--- a/include/asm-sparc64/signal.h
+++ b/include/asm-sparc64/signal.h
@@ -162,21 +162,6 @@ struct sigstack {
162#define MINSIGSTKSZ 4096 162#define MINSIGSTKSZ 4096
163#define SIGSTKSZ 16384 163#define SIGSTKSZ 16384
164 164
165#ifdef __KERNEL__
166/*
167 * DJHR
168 * SA_STATIC_ALLOC is used for the SPARC system to indicate that this
169 * interrupt handler's irq structure should be statically allocated
170 * by the request_irq routine.
171 * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge
172 * of interrupt usage and that sucks. Also without a flag like this
173 * it may be possible for the free_irq routine to attempt to free
174 * statically allocated data.. which is NOT GOOD.
175 *
176 */
177#define SA_STATIC_ALLOC 0x80
178#endif
179
180#include <asm-generic/signal.h> 165#include <asm-generic/signal.h>
181 166
182struct __new_sigaction { 167struct __new_sigaction {
diff --git a/include/asm-sparc64/spinlock.h b/include/asm-sparc64/spinlock.h
index db7581bdb531..9cb93a5c2b4f 100644
--- a/include/asm-sparc64/spinlock.h
+++ b/include/asm-sparc64/spinlock.h
@@ -52,12 +52,14 @@ static inline void _raw_spin_lock(spinlock_t *lock)
52 52
53 __asm__ __volatile__( 53 __asm__ __volatile__(
54"1: ldstub [%1], %0\n" 54"1: ldstub [%1], %0\n"
55" membar #StoreLoad | #StoreStore\n"
55" brnz,pn %0, 2f\n" 56" brnz,pn %0, 2f\n"
56" membar #StoreLoad | #StoreStore\n" 57" nop\n"
57" .subsection 2\n" 58" .subsection 2\n"
58"2: ldub [%1], %0\n" 59"2: ldub [%1], %0\n"
60" membar #LoadLoad\n"
59" brnz,pt %0, 2b\n" 61" brnz,pt %0, 2b\n"
60" membar #LoadLoad\n" 62" nop\n"
61" ba,a,pt %%xcc, 1b\n" 63" ba,a,pt %%xcc, 1b\n"
62" .previous" 64" .previous"
63 : "=&r" (tmp) 65 : "=&r" (tmp)
@@ -95,16 +97,18 @@ static inline void _raw_spin_lock_flags(spinlock_t *lock, unsigned long flags)
95 97
96 __asm__ __volatile__( 98 __asm__ __volatile__(
97"1: ldstub [%2], %0\n" 99"1: ldstub [%2], %0\n"
98" brnz,pn %0, 2f\n"
99" membar #StoreLoad | #StoreStore\n" 100" membar #StoreLoad | #StoreStore\n"
101" brnz,pn %0, 2f\n"
102" nop\n"
100" .subsection 2\n" 103" .subsection 2\n"
101"2: rdpr %%pil, %1\n" 104"2: rdpr %%pil, %1\n"
102" wrpr %3, %%pil\n" 105" wrpr %3, %%pil\n"
103"3: ldub [%2], %0\n" 106"3: ldub [%2], %0\n"
104" brnz,pt %0, 3b\n"
105" membar #LoadLoad\n" 107" membar #LoadLoad\n"
108" brnz,pt %0, 3b\n"
109" nop\n"
106" ba,pt %%xcc, 1b\n" 110" ba,pt %%xcc, 1b\n"
107" wrpr %1, %%pil\n" 111" wrpr %1, %%pil\n"
108" .previous" 112" .previous"
109 : "=&r" (tmp1), "=&r" (tmp2) 113 : "=&r" (tmp1), "=&r" (tmp2)
110 : "r"(lock), "r"(flags) 114 : "r"(lock), "r"(flags)
@@ -162,12 +166,14 @@ static void inline __read_lock(rwlock_t *lock)
162"4: add %0, 1, %1\n" 166"4: add %0, 1, %1\n"
163" cas [%2], %0, %1\n" 167" cas [%2], %0, %1\n"
164" cmp %0, %1\n" 168" cmp %0, %1\n"
169" membar #StoreLoad | #StoreStore\n"
165" bne,pn %%icc, 1b\n" 170" bne,pn %%icc, 1b\n"
166" membar #StoreLoad | #StoreStore\n" 171" nop\n"
167" .subsection 2\n" 172" .subsection 2\n"
168"2: ldsw [%2], %0\n" 173"2: ldsw [%2], %0\n"
174" membar #LoadLoad\n"
169" brlz,pt %0, 2b\n" 175" brlz,pt %0, 2b\n"
170" membar #LoadLoad\n" 176" nop\n"
171" ba,a,pt %%xcc, 4b\n" 177" ba,a,pt %%xcc, 4b\n"
172" .previous" 178" .previous"
173 : "=&r" (tmp1), "=&r" (tmp2) 179 : "=&r" (tmp1), "=&r" (tmp2)
@@ -204,12 +210,14 @@ static void inline __write_lock(rwlock_t *lock)
204"4: or %0, %3, %1\n" 210"4: or %0, %3, %1\n"
205" cas [%2], %0, %1\n" 211" cas [%2], %0, %1\n"
206" cmp %0, %1\n" 212" cmp %0, %1\n"
213" membar #StoreLoad | #StoreStore\n"
207" bne,pn %%icc, 1b\n" 214" bne,pn %%icc, 1b\n"
208" membar #StoreLoad | #StoreStore\n" 215" nop\n"
209" .subsection 2\n" 216" .subsection 2\n"
210"2: lduw [%2], %0\n" 217"2: lduw [%2], %0\n"
218" membar #LoadLoad\n"
211" brnz,pt %0, 2b\n" 219" brnz,pt %0, 2b\n"
212" membar #LoadLoad\n" 220" nop\n"
213" ba,a,pt %%xcc, 4b\n" 221" ba,a,pt %%xcc, 4b\n"
214" .previous" 222" .previous"
215 : "=&r" (tmp1), "=&r" (tmp2) 223 : "=&r" (tmp1), "=&r" (tmp2)
@@ -240,8 +248,9 @@ static int inline __write_trylock(rwlock_t *lock)
240" or %0, %4, %1\n" 248" or %0, %4, %1\n"
241" cas [%3], %0, %1\n" 249" cas [%3], %0, %1\n"
242" cmp %0, %1\n" 250" cmp %0, %1\n"
251" membar #StoreLoad | #StoreStore\n"
243" bne,pn %%icc, 1b\n" 252" bne,pn %%icc, 1b\n"
244" membar #StoreLoad | #StoreStore\n" 253" nop\n"
245" mov 1, %2\n" 254" mov 1, %2\n"
246"2:" 255"2:"
247 : "=&r" (tmp1), "=&r" (tmp2), "=&r" (result) 256 : "=&r" (tmp1), "=&r" (tmp2), "=&r" (result)
diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h
index 9d7613eea812..1aa932773af8 100644
--- a/include/asm-sparc64/spitfire.h
+++ b/include/asm-sparc64/spitfire.h
@@ -111,7 +111,6 @@ static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long
111 "membar #Sync" 111 "membar #Sync"
112 : /* No outputs */ 112 : /* No outputs */
113 : "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG)); 113 : "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG));
114 __asm__ __volatile__ ("membar #Sync" : : : "memory");
115} 114}
116 115
117/* The instruction cache lines are flushed with this, but note that 116/* The instruction cache lines are flushed with this, but note that
diff --git a/include/asm-v850/pci.h b/include/asm-v850/pci.h
index e41941447b49..8e79be0fe99d 100644
--- a/include/asm-v850/pci.h
+++ b/include/asm-v850/pci.h
@@ -81,6 +81,16 @@ extern void
81pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr, 81pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr,
82 dma_addr_t dma_addr); 82 dma_addr_t dma_addr);
83 83
84#ifdef CONFIG_PCI
85static inline void pci_dma_burst_advice(struct pci_dev *pdev,
86 enum pci_dma_burst_strategy *strat,
87 unsigned long *strategy_parameter)
88{
89 *strat = PCI_DMA_BURST_INFINITY;
90 *strategy_parameter = ~0UL;
91}
92#endif
93
84static inline void pcibios_add_platform_entries(struct pci_dev *dev) 94static inline void pcibios_add_platform_entries(struct pci_dev *dev)
85{ 95{
86} 96}
diff --git a/include/asm-x86_64/io_apic.h b/include/asm-x86_64/io_apic.h
index 32573749004c..a8babd2bbe84 100644
--- a/include/asm-x86_64/io_apic.h
+++ b/include/asm-x86_64/io_apic.h
@@ -217,4 +217,6 @@ extern int assign_irq_vector(int irq);
217 217
218void enable_NMI_through_LVT0 (void * dummy); 218void enable_NMI_through_LVT0 (void * dummy);
219 219
220extern spinlock_t i8259A_lock;
221
220#endif 222#endif
diff --git a/include/asm-x86_64/pci.h b/include/asm-x86_64/pci.h
index 8712520ca47f..c1961db88fac 100644
--- a/include/asm-x86_64/pci.h
+++ b/include/asm-x86_64/pci.h
@@ -123,6 +123,16 @@ pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr,
123 flush_write_buffers(); 123 flush_write_buffers();
124} 124}
125 125
126#ifdef CONFIG_PCI
127static inline void pci_dma_burst_advice(struct pci_dev *pdev,
128 enum pci_dma_burst_strategy *strat,
129 unsigned long *strategy_parameter)
130{
131 *strat = PCI_DMA_BURST_INFINITY;
132 *strategy_parameter = ~0UL;
133}
134#endif
135
126#define HAVE_PCI_MMAP 136#define HAVE_PCI_MMAP
127extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 137extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
128 enum pci_mmap_state mmap_state, int write_combine); 138 enum pci_mmap_state mmap_state, int write_combine);
diff --git a/include/asm-x86_64/serial.h b/include/asm-x86_64/serial.h
index dbab232044cd..dc752eafa681 100644
--- a/include/asm-x86_64/serial.h
+++ b/include/asm-x86_64/serial.h
@@ -22,109 +22,9 @@
22#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF 22#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
23#endif 23#endif
24 24
25#ifdef CONFIG_SERIAL_MANY_PORTS 25#define SERIAL_PORT_DFNS \
26#define FOURPORT_FLAGS ASYNC_FOURPORT
27#define ACCENT_FLAGS 0
28#define BOCA_FLAGS 0
29#define HUB6_FLAGS 0
30#endif
31
32#define MCA_COM_FLAGS (STD_COM_FLAGS|ASYNC_BOOT_ONLYMCA)
33
34/*
35 * The following define the access methods for the HUB6 card. All
36 * access is through two ports for all 24 possible chips. The card is
37 * selected through the high 2 bits, the port on that card with the
38 * "middle" 3 bits, and the register on that port with the bottom
39 * 3 bits.
40 *
41 * While the access port and interrupt is configurable, the default
42 * port locations are 0x302 for the port control register, and 0x303
43 * for the data read/write register. Normally, the interrupt is at irq3
44 * but can be anything from 3 to 7 inclusive. Note that using 3 will
45 * require disabling com2.
46 */
47
48#define C_P(card,port) (((card)<<6|(port)<<3) + 1)
49
50#define STD_SERIAL_PORT_DEFNS \
51 /* UART CLK PORT IRQ FLAGS */ \ 26 /* UART CLK PORT IRQ FLAGS */ \
52 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ 27 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
53 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ 28 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
54 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ 29 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
55 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ 30 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
56
57
58#ifdef CONFIG_SERIAL_MANY_PORTS
59#define EXTRA_SERIAL_PORT_DEFNS \
60 { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS }, /* ttyS4 */ \
61 { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS }, /* ttyS5 */ \
62 { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS }, /* ttyS6 */ \
63 { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS }, /* ttyS7 */ \
64 { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS }, /* ttyS8 */ \
65 { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS }, /* ttyS9 */ \
66 { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS }, /* ttyS10 */ \
67 { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS }, /* ttyS11 */ \
68 { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS }, /* ttyS12 */ \
69 { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS }, /* ttyS13 */ \
70 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS14 (spare) */ \
71 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS15 (spare) */ \
72 { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS }, /* ttyS16 */ \
73 { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS }, /* ttyS17 */ \
74 { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS }, /* ttyS18 */ \
75 { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS }, /* ttyS19 */ \
76 { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS }, /* ttyS20 */ \
77 { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS }, /* ttyS21 */ \
78 { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS }, /* ttyS22 */ \
79 { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS }, /* ttyS23 */ \
80 { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS }, /* ttyS24 */ \
81 { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS }, /* ttyS25 */ \
82 { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS }, /* ttyS26 */ \
83 { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS }, /* ttyS27 */ \
84 { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS }, /* ttyS28 */ \
85 { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS }, /* ttyS29 */ \
86 { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS }, /* ttyS30 */ \
87 { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS }, /* ttyS31 */
88#else
89#define EXTRA_SERIAL_PORT_DEFNS
90#endif
91
92/* You can have up to four HUB6's in the system, but I've only
93 * included two cards here for a total of twelve ports.
94 */
95#if (defined(CONFIG_HUB6) && defined(CONFIG_SERIAL_MANY_PORTS))
96#define HUB6_SERIAL_PORT_DFNS \
97 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,0) }, /* ttyS32 */ \
98 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,1) }, /* ttyS33 */ \
99 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,2) }, /* ttyS34 */ \
100 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,3) }, /* ttyS35 */ \
101 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,4) }, /* ttyS36 */ \
102 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,5) }, /* ttyS37 */ \
103 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,0) }, /* ttyS38 */ \
104 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,1) }, /* ttyS39 */ \
105 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,2) }, /* ttyS40 */ \
106 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,3) }, /* ttyS41 */ \
107 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,4) }, /* ttyS42 */ \
108 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,5) }, /* ttyS43 */
109#else
110#define HUB6_SERIAL_PORT_DFNS
111#endif
112
113#ifdef CONFIG_MCA
114#define MCA_SERIAL_PORT_DFNS \
115 { 0, BASE_BAUD, 0x3220, 3, MCA_COM_FLAGS }, \
116 { 0, BASE_BAUD, 0x3228, 3, MCA_COM_FLAGS }, \
117 { 0, BASE_BAUD, 0x4220, 3, MCA_COM_FLAGS }, \
118 { 0, BASE_BAUD, 0x4228, 3, MCA_COM_FLAGS }, \
119 { 0, BASE_BAUD, 0x5220, 3, MCA_COM_FLAGS }, \
120 { 0, BASE_BAUD, 0x5228, 3, MCA_COM_FLAGS },
121#else
122#define MCA_SERIAL_PORT_DFNS
123#endif
124
125#define SERIAL_PORT_DFNS \
126 STD_SERIAL_PORT_DEFNS \
127 EXTRA_SERIAL_PORT_DEFNS \
128 HUB6_SERIAL_PORT_DFNS \
129 MCA_SERIAL_PORT_DFNS
130
diff --git a/include/asm-x86_64/tlbflush.h b/include/asm-x86_64/tlbflush.h
index 2e811ac262af..061742382520 100644
--- a/include/asm-x86_64/tlbflush.h
+++ b/include/asm-x86_64/tlbflush.h
@@ -22,16 +22,18 @@
22 */ 22 */
23#define __flush_tlb_global() \ 23#define __flush_tlb_global() \
24 do { \ 24 do { \
25 unsigned long tmpreg; \ 25 unsigned long tmpreg, cr4, cr4_orig; \
26 \ 26 \
27 __asm__ __volatile__( \ 27 __asm__ __volatile__( \
28 "movq %1, %%cr4; # turn off PGE \n" \ 28 "movq %%cr4, %2; # turn off PGE \n" \
29 "movq %2, %1; \n" \
30 "andq %3, %1; \n" \
31 "movq %1, %%cr4; \n" \
29 "movq %%cr3, %0; # flush TLB \n" \ 32 "movq %%cr3, %0; # flush TLB \n" \
30 "movq %0, %%cr3; \n" \ 33 "movq %0, %%cr3; \n" \
31 "movq %2, %%cr4; # turn PGE back on \n" \ 34 "movq %2, %%cr4; # turn PGE back on \n" \
32 : "=&r" (tmpreg) \ 35 : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) \
33 : "r" (mmu_cr4_features & ~X86_CR4_PGE), \ 36 : "i" (~X86_CR4_PGE) \
34 "r" (mmu_cr4_features) \
35 : "memory"); \ 37 : "memory"); \
36 } while (0) 38 } while (0)
37 39
diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h
index d767adcbf0ff..6560439a83e4 100644
--- a/include/asm-x86_64/unistd.h
+++ b/include/asm-x86_64/unistd.h
@@ -561,8 +561,12 @@ __SYSCALL(__NR_add_key, sys_add_key)
561__SYSCALL(__NR_request_key, sys_request_key) 561__SYSCALL(__NR_request_key, sys_request_key)
562#define __NR_keyctl 250 562#define __NR_keyctl 250
563__SYSCALL(__NR_keyctl, sys_keyctl) 563__SYSCALL(__NR_keyctl, sys_keyctl)
564#define __NR_ioprio_set 251
565__SYSCALL(__NR_ioprio_set, sys_ioprio_set)
566#define __NR_ioprio_get 252
567__SYSCALL(__NR_ioprio_get, sys_ioprio_get)
564 568
565#define __NR_syscall_max __NR_keyctl 569#define __NR_syscall_max __NR_ioprio_get
566#ifndef __NO_STUBS 570#ifndef __NO_STUBS
567 571
568/* user-visible error numbers are in the range -1 - -4095 */ 572/* user-visible error numbers are in the range -1 - -4095 */
diff --git a/include/asm-xtensa/delay.h b/include/asm-xtensa/delay.h
index 6359c55e77a8..0a123d53a636 100644
--- a/include/asm-xtensa/delay.h
+++ b/include/asm-xtensa/delay.h
@@ -21,7 +21,7 @@ extern unsigned long loops_per_jiffy;
21extern __inline__ void __delay(unsigned long loops) 21extern __inline__ void __delay(unsigned long loops)
22{ 22{
23 /* 2 cycles per loop. */ 23 /* 2 cycles per loop. */
24 __asm__ __volatile__ ("1: addi %0, %0, -2; bgeui %0, 1, 1b" 24 __asm__ __volatile__ ("1: addi %0, %0, -2; bgeui %0, 2, 1b"
25 : "=r" (loops) : "0" (loops)); 25 : "=r" (loops) : "0" (loops));
26} 26}
27 27
diff --git a/include/asm-xtensa/errno.h b/include/asm-xtensa/errno.h
index ced5194d2750..a0f3b96b79b4 100644
--- a/include/asm-xtensa/errno.h
+++ b/include/asm-xtensa/errno.h
@@ -11,132 +11,6 @@
11#ifndef _XTENSA_ERRNO_H 11#ifndef _XTENSA_ERRNO_H
12#define _XTENSA_ERRNO_H 12#define _XTENSA_ERRNO_H
13 13
14#define EPERM 1 /* Operation not permitted */ 14#include <asm-generic/errno.h>
15#define ENOENT 2 /* No such file or directory */
16#define ESRCH 3 /* No such process */
17#define EINTR 4 /* Interrupted system call */
18#define EIO 5 /* I/O error */
19#define ENXIO 6 /* No such device or address */
20#define E2BIG 7 /* Arg list too long */
21#define ENOEXEC 8 /* Exec format error */
22#define EBADF 9 /* Bad file number */
23#define ECHILD 10 /* No child processes */
24#define EAGAIN 11 /* Try again */
25#define ENOMEM 12 /* Out of memory */
26#define EACCES 13 /* Permission denied */
27#define EFAULT 14 /* Bad address */
28#define ENOTBLK 15 /* Block device required */
29#define EBUSY 16 /* Device or resource busy */
30#define EEXIST 17 /* File exists */
31#define EXDEV 18 /* Cross-device link */
32#define ENODEV 19 /* No such device */
33#define ENOTDIR 20 /* Not a directory */
34#define EISDIR 21 /* Is a directory */
35#define EINVAL 22 /* Invalid argument */
36#define ENFILE 23 /* File table overflow */
37#define EMFILE 24 /* Too many open files */
38#define ENOTTY 25 /* Not a typewriter */
39#define ETXTBSY 26 /* Text file busy */
40#define EFBIG 27 /* File too large */
41#define ENOSPC 28 /* No space left on device */
42#define ESPIPE 29 /* Illegal seek */
43#define EROFS 30 /* Read-only file system */
44#define EMLINK 31 /* Too many links */
45#define EPIPE 32 /* Broken pipe */
46#define EDOM 33 /* Math argument out of domain of func */
47#define ERANGE 34 /* Math result not representable */
48#define EDEADLK 35 /* Resource deadlock would occur */
49#define ENAMETOOLONG 36 /* File name too long */
50#define ENOLCK 37 /* No record locks available */
51#define ENOSYS 38 /* Function not implemented */
52#define ENOTEMPTY 39 /* Directory not empty */
53#define ELOOP 40 /* Too many symbolic links encountered */
54#define EWOULDBLOCK EAGAIN /* Operation would block */
55#define ENOMSG 42 /* No message of desired type */
56#define EIDRM 43 /* Identifier removed */
57#define ECHRNG 44 /* Channel number out of range */
58#define EL2NSYNC 45 /* Level 2 not synchronized */
59#define EL3HLT 46 /* Level 3 halted */
60#define EL3RST 47 /* Level 3 reset */
61#define ELNRNG 48 /* Link number out of range */
62#define EUNATCH 49 /* Protocol driver not attached */
63#define ENOCSI 50 /* No CSI structure available */
64#define EL2HLT 51 /* Level 2 halted */
65#define EBADE 52 /* Invalid exchange */
66#define EBADR 53 /* Invalid request descriptor */
67#define EXFULL 54 /* Exchange full */
68#define ENOANO 55 /* No anode */
69#define EBADRQC 56 /* Invalid request code */
70#define EBADSLT 57 /* Invalid slot */
71
72#define EDEADLOCK EDEADLK
73
74#define EBFONT 59 /* Bad font file format */
75#define ENOSTR 60 /* Device not a stream */
76#define ENODATA 61 /* No data available */
77#define ETIME 62 /* Timer expired */
78#define ENOSR 63 /* Out of streams resources */
79#define ENONET 64 /* Machine is not on the network */
80#define ENOPKG 65 /* Package not installed */
81#define EREMOTE 66 /* Object is remote */
82#define ENOLINK 67 /* Link has been severed */
83#define EADV 68 /* Advertise error */
84#define ESRMNT 69 /* Srmount error */
85#define ECOMM 70 /* Communication error on send */
86#define EPROTO 71 /* Protocol error */
87#define EMULTIHOP 72 /* Multihop attempted */
88#define EDOTDOT 73 /* RFS specific error */
89#define EBADMSG 74 /* Not a data message */
90#define EOVERFLOW 75 /* Value too large for defined data type */
91#define ENOTUNIQ 76 /* Name not unique on network */
92#define EBADFD 77 /* File descriptor in bad state */
93#define EREMCHG 78 /* Remote address changed */
94#define ELIBACC 79 /* Can not access a needed shared library */
95#define ELIBBAD 80 /* Accessing a corrupted shared library */
96#define ELIBSCN 81 /* .lib section in a.out corrupted */
97#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
98#define ELIBEXEC 83 /* Cannot exec a shared library directly */
99#define EILSEQ 84 /* Illegal byte sequence */
100#define ERESTART 85 /* Interrupted system call should be restarted */
101#define ESTRPIPE 86 /* Streams pipe error */
102#define EUSERS 87 /* Too many users */
103#define ENOTSOCK 88 /* Socket operation on non-socket */
104#define EDESTADDRREQ 89 /* Destination address required */
105#define EMSGSIZE 90 /* Message too long */
106#define EPROTOTYPE 91 /* Protocol wrong type for socket */
107#define ENOPROTOOPT 92 /* Protocol not available */
108#define EPROTONOSUPPORT 93 /* Protocol not supported */
109#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
110#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
111#define EPFNOSUPPORT 96 /* Protocol family not supported */
112#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
113#define EADDRINUSE 98 /* Address already in use */
114#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
115#define ENETDOWN 100 /* Network is down */
116#define ENETUNREACH 101 /* Network is unreachable */
117#define ENETRESET 102 /* Network dropped connection because of reset */
118#define ECONNABORTED 103 /* Software caused connection abort */
119#define ECONNRESET 104 /* Connection reset by peer */
120#define ENOBUFS 105 /* No buffer space available */
121#define EISCONN 106 /* Transport endpoint is already connected */
122#define ENOTCONN 107 /* Transport endpoint is not connected */
123#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
124#define ETOOMANYREFS 109 /* Too many references: cannot splice */
125#define ETIMEDOUT 110 /* Connection timed out */
126#define ECONNREFUSED 111 /* Connection refused */
127#define EHOSTDOWN 112 /* Host is down */
128#define EHOSTUNREACH 113 /* No route to host */
129#define EALREADY 114 /* Operation already in progress */
130#define EINPROGRESS 115 /* Operation now in progress */
131#define ESTALE 116 /* Stale NFS file handle */
132#define EUCLEAN 117 /* Structure needs cleaning */
133#define ENOTNAM 118 /* Not a XENIX named type file */
134#define ENAVAIL 119 /* No XENIX semaphores available */
135#define EISNAM 120 /* Is a named type file */
136#define EREMOTEIO 121 /* Remote I/O error */
137#define EDQUOT 122 /* Quota exceeded */
138
139#define ENOMEDIUM 123 /* No medium found */
140#define EMEDIUMTYPE 124 /* Wrong medium type */
141 15
142#endif /* _XTENSA_ERRNO_H */ 16#endif /* _XTENSA_ERRNO_H */
diff --git a/include/asm-xtensa/ipc.h b/include/asm-xtensa/ipc.h
index d37bdb4d4c9c..a9eed4e21cb9 100644
--- a/include/asm-xtensa/ipc.h
+++ b/include/asm-xtensa/ipc.h
@@ -11,24 +11,6 @@
11#ifndef _XTENSA_IPC_H 11#ifndef _XTENSA_IPC_H
12#define _XTENSA_IPC_H 12#define _XTENSA_IPC_H
13 13
14struct ipc_kludge { 14#include <asm-generic/ipc.h>
15 struct msgbuf __user *msgp;
16 long msgtyp;
17};
18
19#define SEMOP 1
20#define SEMGET 2
21#define SEMCTL 3
22#define SEMTIMEDOP 4
23#define MSGSND 11
24#define MSGRCV 12
25#define MSGGET 13
26#define MSGCTL 14
27#define SHMAT 21
28#define SHMDT 22
29#define SHMGET 23
30#define SHMCTL 24
31
32#define IPCCALL(version,op) ((version)<<16 | (op))
33 15
34#endif /* _XTENSA_IPC_H */ 16#endif /* _XTENSA_IPC_H */
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index b123cc08773d..ef8483673aa3 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -342,11 +342,19 @@ struct acpi_table_ecdt {
342 342
343/* PCI MMCONFIG */ 343/* PCI MMCONFIG */
344 344
345/* Defined in PCI Firmware Specification 3.0 */
346struct acpi_table_mcfg_config {
347 u32 base_address;
348 u32 base_reserved;
349 u16 pci_segment_group_number;
350 u8 start_bus_number;
351 u8 end_bus_number;
352 u8 reserved[4];
353} __attribute__ ((packed));
345struct acpi_table_mcfg { 354struct acpi_table_mcfg {
346 struct acpi_table_header header; 355 struct acpi_table_header header;
347 u8 reserved[8]; 356 u8 reserved[8];
348 u32 base_address; 357 struct acpi_table_mcfg_config config[0];
349 u32 base_reserved;
350} __attribute__ ((packed)); 358} __attribute__ ((packed));
351 359
352/* Table Handlers */ 360/* Table Handlers */
@@ -391,6 +399,7 @@ int acpi_table_parse (enum acpi_table_id id, acpi_table_handler handler);
391int acpi_get_table_header_early (enum acpi_table_id id, struct acpi_table_header **header); 399int acpi_get_table_header_early (enum acpi_table_id id, struct acpi_table_header **header);
392int acpi_table_parse_madt (enum acpi_madt_entry_id id, acpi_madt_entry_handler handler, unsigned int max_entries); 400int acpi_table_parse_madt (enum acpi_madt_entry_id id, acpi_madt_entry_handler handler, unsigned int max_entries);
393int acpi_table_parse_srat (enum acpi_srat_entry_id id, acpi_madt_entry_handler handler, unsigned int max_entries); 401int acpi_table_parse_srat (enum acpi_srat_entry_id id, acpi_madt_entry_handler handler, unsigned int max_entries);
402int acpi_parse_mcfg (unsigned long phys_addr, unsigned long size);
394void acpi_table_print (struct acpi_table_header *header, unsigned long phys_addr); 403void acpi_table_print (struct acpi_table_header *header, unsigned long phys_addr);
395void acpi_table_print_madt_entry (acpi_table_entry_header *madt); 404void acpi_table_print_madt_entry (acpi_table_entry_header *madt);
396void acpi_table_print_srat_entry (acpi_table_entry_header *srat); 405void acpi_table_print_srat_entry (acpi_table_entry_header *srat);
@@ -407,9 +416,13 @@ int acpi_map_lsapic(acpi_handle handle, int *pcpu);
407int acpi_unmap_lsapic(int cpu); 416int acpi_unmap_lsapic(int cpu);
408#endif /* CONFIG_ACPI_HOTPLUG_CPU */ 417#endif /* CONFIG_ACPI_HOTPLUG_CPU */
409 418
419int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base);
420int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base);
421
410extern int acpi_mp_config; 422extern int acpi_mp_config;
411 423
412extern u32 pci_mmcfg_base_addr; 424extern struct acpi_table_mcfg_config *pci_mmcfg_config;
425extern int pci_mmcfg_config_num;
413 426
414extern int sbf_port ; 427extern int sbf_port ;
415 428
diff --git a/include/linux/atalk.h b/include/linux/atalk.h
index 09a1451c1159..911c09cb9bf9 100644
--- a/include/linux/atalk.h
+++ b/include/linux/atalk.h
@@ -1,6 +1,8 @@
1#ifndef __LINUX_ATALK_H__ 1#ifndef __LINUX_ATALK_H__
2#define __LINUX_ATALK_H__ 2#define __LINUX_ATALK_H__
3 3
4#include <asm/byteorder.h>
5
4/* 6/*
5 * AppleTalk networking structures 7 * AppleTalk networking structures
6 * 8 *
diff --git a/include/linux/bio.h b/include/linux/bio.h
index 038022763f09..36ef29fa0d8b 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -22,6 +22,7 @@
22 22
23#include <linux/highmem.h> 23#include <linux/highmem.h>
24#include <linux/mempool.h> 24#include <linux/mempool.h>
25#include <linux/ioprio.h>
25 26
26/* Platforms may set this to teach the BIO layer about IOMMU hardware. */ 27/* Platforms may set this to teach the BIO layer about IOMMU hardware. */
27#include <asm/io.h> 28#include <asm/io.h>
@@ -150,6 +151,19 @@ struct bio {
150#define BIO_RW_SYNC 4 151#define BIO_RW_SYNC 4
151 152
152/* 153/*
154 * upper 16 bits of bi_rw define the io priority of this bio
155 */
156#define BIO_PRIO_SHIFT (8 * sizeof(unsigned long) - IOPRIO_BITS)
157#define bio_prio(bio) ((bio)->bi_rw >> BIO_PRIO_SHIFT)
158#define bio_prio_valid(bio) ioprio_valid(bio_prio(bio))
159
160#define bio_set_prio(bio, prio) do { \
161 WARN_ON(prio >= (1 << IOPRIO_BITS)); \
162 (bio)->bi_rw &= ((1UL << BIO_PRIO_SHIFT) - 1); \
163 (bio)->bi_rw |= ((unsigned long) (prio) << BIO_PRIO_SHIFT); \
164} while (0)
165
166/*
153 * various member access, note that bio_data should of course not be used 167 * various member access, note that bio_data should of course not be used
154 * on highmem page vectors 168 * on highmem page vectors
155 */ 169 */
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index b54a0348a890..0881b5cdee3d 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -54,16 +54,23 @@ struct as_io_context {
54 54
55struct cfq_queue; 55struct cfq_queue;
56struct cfq_io_context { 56struct cfq_io_context {
57 void (*dtor)(struct cfq_io_context *);
58 void (*exit)(struct cfq_io_context *);
59
60 struct io_context *ioc;
61
62 /* 57 /*
63 * circular list of cfq_io_contexts belonging to a process io context 58 * circular list of cfq_io_contexts belonging to a process io context
64 */ 59 */
65 struct list_head list; 60 struct list_head list;
66 struct cfq_queue *cfqq; 61 struct cfq_queue *cfqq;
62 void *key;
63
64 struct io_context *ioc;
65
66 unsigned long last_end_request;
67 unsigned long last_queue;
68 unsigned long ttime_total;
69 unsigned long ttime_samples;
70 unsigned long ttime_mean;
71
72 void (*dtor)(struct cfq_io_context *);
73 void (*exit)(struct cfq_io_context *);
67}; 74};
68 75
69/* 76/*
@@ -73,7 +80,9 @@ struct cfq_io_context {
73 */ 80 */
74struct io_context { 81struct io_context {
75 atomic_t refcount; 82 atomic_t refcount;
76 pid_t pid; 83 struct task_struct *task;
84
85 int (*set_ioprio)(struct io_context *, unsigned int);
77 86
78 /* 87 /*
79 * For request batching 88 * For request batching
@@ -81,14 +90,13 @@ struct io_context {
81 unsigned long last_waited; /* Time last woken after wait for request */ 90 unsigned long last_waited; /* Time last woken after wait for request */
82 int nr_batch_requests; /* Number of requests left in the batch */ 91 int nr_batch_requests; /* Number of requests left in the batch */
83 92
84 spinlock_t lock;
85
86 struct as_io_context *aic; 93 struct as_io_context *aic;
87 struct cfq_io_context *cic; 94 struct cfq_io_context *cic;
88}; 95};
89 96
90void put_io_context(struct io_context *ioc); 97void put_io_context(struct io_context *ioc);
91void exit_io_context(void); 98void exit_io_context(void);
99struct io_context *current_io_context(int gfp_flags);
92struct io_context *get_io_context(int gfp_flags); 100struct io_context *get_io_context(int gfp_flags);
93void copy_io_context(struct io_context **pdst, struct io_context **psrc); 101void copy_io_context(struct io_context **pdst, struct io_context **psrc);
94void swap_io_context(struct io_context **ioc1, struct io_context **ioc2); 102void swap_io_context(struct io_context **ioc1, struct io_context **ioc2);
@@ -134,6 +142,8 @@ struct request {
134 142
135 void *elevator_private; 143 void *elevator_private;
136 144
145 unsigned short ioprio;
146
137 int rq_status; /* should split this into a few status bits */ 147 int rq_status; /* should split this into a few status bits */
138 struct gendisk *rq_disk; 148 struct gendisk *rq_disk;
139 int errors; 149 int errors;
diff --git a/include/linux/byteorder/swabb.h b/include/linux/byteorder/swabb.h
index d28d9a804d3b..d5f2a3205109 100644
--- a/include/linux/byteorder/swabb.h
+++ b/include/linux/byteorder/swabb.h
@@ -92,29 +92,32 @@
92#endif /* OPTIMIZE */ 92#endif /* OPTIMIZE */
93 93
94 94
95static __inline__ __const__ __u32 __fswahw32(__u32 x) 95static inline __u32 __fswahw32(__u32 x)
96{ 96{
97 return __arch__swahw32(x); 97 return __arch__swahw32(x);
98} 98}
99static __inline__ __u32 __swahw32p(__u32 *x) 99
100static inline __u32 __swahw32p(__u32 *x)
100{ 101{
101 return __arch__swahw32p(x); 102 return __arch__swahw32p(x);
102} 103}
103static __inline__ void __swahw32s(__u32 *addr) 104
105static inline void __swahw32s(__u32 *addr)
104{ 106{
105 __arch__swahw32s(addr); 107 __arch__swahw32s(addr);
106} 108}
107 109
108 110static inline __u32 __fswahb32(__u32 x)
109static __inline__ __const__ __u32 __fswahb32(__u32 x)
110{ 111{
111 return __arch__swahb32(x); 112 return __arch__swahb32(x);
112} 113}
113static __inline__ __u32 __swahb32p(__u32 *x) 114
115static inline __u32 __swahb32p(__u32 *x)
114{ 116{
115 return __arch__swahb32p(x); 117 return __arch__swahb32p(x);
116} 118}
117static __inline__ void __swahb32s(__u32 *addr) 119
120static inline void __swahb32s(__u32 *addr)
118{ 121{
119 __arch__swahb32s(addr); 122 __arch__swahb32s(addr);
120} 123}
diff --git a/include/linux/cciss_ioctl.h b/include/linux/cciss_ioctl.h
index ee0c6e8995da..424d5e622b43 100644
--- a/include/linux/cciss_ioctl.h
+++ b/include/linux/cciss_ioctl.h
@@ -10,6 +10,7 @@
10typedef struct _cciss_pci_info_struct 10typedef struct _cciss_pci_info_struct
11{ 11{
12 unsigned char bus; 12 unsigned char bus;
13 unsigned short domain;
13 unsigned char dev_fn; 14 unsigned char dev_fn;
14 __u32 board_id; 15 __u32 board_id;
15} cciss_pci_info_struct; 16} cciss_pci_info_struct;
diff --git a/include/linux/compat_ioctl.h b/include/linux/compat_ioctl.h
index 70a4ebb5d964..ecb0d39c0798 100644
--- a/include/linux/compat_ioctl.h
+++ b/include/linux/compat_ioctl.h
@@ -346,10 +346,27 @@ COMPATIBLE_IOCTL(PPPOEIOCDFWD)
346/* LP */ 346/* LP */
347COMPATIBLE_IOCTL(LPGETSTATUS) 347COMPATIBLE_IOCTL(LPGETSTATUS)
348/* ppdev */ 348/* ppdev */
349COMPATIBLE_IOCTL(PPSETMODE)
350COMPATIBLE_IOCTL(PPRSTATUS)
351COMPATIBLE_IOCTL(PPRCONTROL)
352COMPATIBLE_IOCTL(PPWCONTROL)
353COMPATIBLE_IOCTL(PPFCONTROL)
354COMPATIBLE_IOCTL(PPRDATA)
355COMPATIBLE_IOCTL(PPWDATA)
349COMPATIBLE_IOCTL(PPCLAIM) 356COMPATIBLE_IOCTL(PPCLAIM)
350COMPATIBLE_IOCTL(PPRELEASE) 357COMPATIBLE_IOCTL(PPRELEASE)
351COMPATIBLE_IOCTL(PPEXCL)
352COMPATIBLE_IOCTL(PPYIELD) 358COMPATIBLE_IOCTL(PPYIELD)
359COMPATIBLE_IOCTL(PPEXCL)
360COMPATIBLE_IOCTL(PPDATADIR)
361COMPATIBLE_IOCTL(PPNEGOT)
362COMPATIBLE_IOCTL(PPWCTLONIRQ)
363COMPATIBLE_IOCTL(PPCLRIRQ)
364COMPATIBLE_IOCTL(PPSETPHASE)
365COMPATIBLE_IOCTL(PPGETMODES)
366COMPATIBLE_IOCTL(PPGETMODE)
367COMPATIBLE_IOCTL(PPGETPHASE)
368COMPATIBLE_IOCTL(PPGETFLAGS)
369COMPATIBLE_IOCTL(PPSETFLAGS)
353/* CDROM stuff */ 370/* CDROM stuff */
354COMPATIBLE_IOCTL(CDROMPAUSE) 371COMPATIBLE_IOCTL(CDROMPAUSE)
355COMPATIBLE_IOCTL(CDROMRESUME) 372COMPATIBLE_IOCTL(CDROMRESUME)
diff --git a/include/linux/device.h b/include/linux/device.h
index 7b781a72b293..f378c846e6d5 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -69,7 +69,7 @@ struct bus_type {
69extern int bus_register(struct bus_type * bus); 69extern int bus_register(struct bus_type * bus);
70extern void bus_unregister(struct bus_type * bus); 70extern void bus_unregister(struct bus_type * bus);
71 71
72extern int bus_rescan_devices(struct bus_type * bus); 72extern void bus_rescan_devices(struct bus_type * bus);
73 73
74extern struct bus_type * get_bus(struct bus_type * bus); 74extern struct bus_type * get_bus(struct bus_type * bus);
75extern void put_bus(struct bus_type * bus); 75extern void put_bus(struct bus_type * bus);
@@ -80,6 +80,8 @@ extern struct bus_type * find_bus(char * name);
80 80
81int bus_for_each_dev(struct bus_type * bus, struct device * start, void * data, 81int bus_for_each_dev(struct bus_type * bus, struct device * start, void * data,
82 int (*fn)(struct device *, void *)); 82 int (*fn)(struct device *, void *));
83struct device * bus_find_device(struct bus_type *bus, struct device *start,
84 void *data, int (*match)(struct device *, void *));
83 85
84int bus_for_each_drv(struct bus_type * bus, struct device_driver * start, 86int bus_for_each_drv(struct bus_type * bus, struct device_driver * start,
85 void * data, int (*fn)(struct device_driver *, void *)); 87 void * data, int (*fn)(struct device_driver *, void *));
@@ -142,6 +144,9 @@ extern void driver_remove_file(struct device_driver *, struct driver_attribute *
142 144
143extern int driver_for_each_device(struct device_driver * drv, struct device * start, 145extern int driver_for_each_device(struct device_driver * drv, struct device * start,
144 void * data, int (*fn)(struct device *, void *)); 146 void * data, int (*fn)(struct device *, void *));
147struct device * driver_find_device(struct device_driver *drv,
148 struct device *start, void *data,
149 int (*match)(struct device *, void *));
145 150
146 151
147/* 152/*
diff --git a/include/linux/elevator.h b/include/linux/elevator.h
index ee54f81faad5..ea6bbc2d7407 100644
--- a/include/linux/elevator.h
+++ b/include/linux/elevator.h
@@ -16,9 +16,9 @@ typedef void (elevator_remove_req_fn) (request_queue_t *, struct request *);
16typedef void (elevator_requeue_req_fn) (request_queue_t *, struct request *); 16typedef void (elevator_requeue_req_fn) (request_queue_t *, struct request *);
17typedef struct request *(elevator_request_list_fn) (request_queue_t *, struct request *); 17typedef struct request *(elevator_request_list_fn) (request_queue_t *, struct request *);
18typedef void (elevator_completed_req_fn) (request_queue_t *, struct request *); 18typedef void (elevator_completed_req_fn) (request_queue_t *, struct request *);
19typedef int (elevator_may_queue_fn) (request_queue_t *, int); 19typedef int (elevator_may_queue_fn) (request_queue_t *, int, struct bio *);
20 20
21typedef int (elevator_set_req_fn) (request_queue_t *, struct request *, int); 21typedef int (elevator_set_req_fn) (request_queue_t *, struct request *, struct bio *, int);
22typedef void (elevator_put_req_fn) (request_queue_t *, struct request *); 22typedef void (elevator_put_req_fn) (request_queue_t *, struct request *);
23typedef void (elevator_deactivate_req_fn) (request_queue_t *, struct request *); 23typedef void (elevator_deactivate_req_fn) (request_queue_t *, struct request *);
24 24
@@ -96,9 +96,9 @@ extern struct request *elv_former_request(request_queue_t *, struct request *);
96extern struct request *elv_latter_request(request_queue_t *, struct request *); 96extern struct request *elv_latter_request(request_queue_t *, struct request *);
97extern int elv_register_queue(request_queue_t *q); 97extern int elv_register_queue(request_queue_t *q);
98extern void elv_unregister_queue(request_queue_t *q); 98extern void elv_unregister_queue(request_queue_t *q);
99extern int elv_may_queue(request_queue_t *, int); 99extern int elv_may_queue(request_queue_t *, int, struct bio *);
100extern void elv_completed_request(request_queue_t *, struct request *); 100extern void elv_completed_request(request_queue_t *, struct request *);
101extern int elv_set_request(request_queue_t *, struct request *, int); 101extern int elv_set_request(request_queue_t *, struct request *, struct bio *, int);
102extern void elv_put_request(request_queue_t *, struct request *); 102extern void elv_put_request(request_queue_t *, struct request *);
103 103
104/* 104/*
diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h
index a1478258d002..cf3847edc50f 100644
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -25,6 +25,7 @@
25#define _LINUX_ETHERDEVICE_H 25#define _LINUX_ETHERDEVICE_H
26 26
27#include <linux/if_ether.h> 27#include <linux/if_ether.h>
28#include <linux/netdevice.h>
28#include <linux/random.h> 29#include <linux/random.h>
29 30
30#ifdef __KERNEL__ 31#ifdef __KERNEL__
@@ -65,7 +66,7 @@ static inline int is_zero_ether_addr(const u8 *addr)
65 */ 66 */
66static inline int is_multicast_ether_addr(const u8 *addr) 67static inline int is_multicast_ether_addr(const u8 *addr)
67{ 68{
68 return addr[0] & 0x01; 69 return ((addr[0] != 0xff) && (0x01 & addr[0]));
69} 70}
70 71
71/** 72/**
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 3ae8e37bdfc8..047bde30836a 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -213,6 +213,7 @@ extern int dir_notify_enable;
213#include <linux/radix-tree.h> 213#include <linux/radix-tree.h>
214#include <linux/prio_tree.h> 214#include <linux/prio_tree.h>
215#include <linux/init.h> 215#include <linux/init.h>
216#include <linux/sched.h>
216 217
217#include <asm/atomic.h> 218#include <asm/atomic.h>
218#include <asm/semaphore.h> 219#include <asm/semaphore.h>
@@ -822,16 +823,34 @@ enum {
822#define vfs_check_frozen(sb, level) \ 823#define vfs_check_frozen(sb, level) \
823 wait_event((sb)->s_wait_unfrozen, ((sb)->s_frozen < (level))) 824 wait_event((sb)->s_wait_unfrozen, ((sb)->s_frozen < (level)))
824 825
826static inline void get_fs_excl(void)
827{
828 atomic_inc(&current->fs_excl);
829}
830
831static inline void put_fs_excl(void)
832{
833 atomic_dec(&current->fs_excl);
834}
835
836static inline int has_fs_excl(void)
837{
838 return atomic_read(&current->fs_excl);
839}
840
841
825/* 842/*
826 * Superblock locking. 843 * Superblock locking.
827 */ 844 */
828static inline void lock_super(struct super_block * sb) 845static inline void lock_super(struct super_block * sb)
829{ 846{
847 get_fs_excl();
830 down(&sb->s_lock); 848 down(&sb->s_lock);
831} 849}
832 850
833static inline void unlock_super(struct super_block * sb) 851static inline void unlock_super(struct super_block * sb)
834{ 852{
853 put_fs_excl();
835 up(&sb->s_lock); 854 up(&sb->s_lock);
836} 855}
837 856
diff --git a/include/linux/i2c-dev.h b/include/linux/i2c-dev.h
index d228230ffe5d..541695679762 100644
--- a/include/linux/i2c-dev.h
+++ b/include/linux/i2c-dev.h
@@ -25,6 +25,7 @@
25#define _LINUX_I2C_DEV_H 25#define _LINUX_I2C_DEV_H
26 26
27#include <linux/types.h> 27#include <linux/types.h>
28#include <linux/compiler.h>
28 29
29/* Some IOCTL commands are defined in <linux/i2c.h> */ 30/* Some IOCTL commands are defined in <linux/i2c.h> */
30/* Note: 10-bit addresses are NOT supported! */ 31/* Note: 10-bit addresses are NOT supported! */
diff --git a/include/linux/if_bonding.h b/include/linux/if_bonding.h
index 57024ce2c74f..84598fa2e9de 100644
--- a/include/linux/if_bonding.h
+++ b/include/linux/if_bonding.h
@@ -35,6 +35,9 @@
35 * 35 *
36 * 2003/12/01 - Shmulik Hen <shmulik.hen at intel dot com> 36 * 2003/12/01 - Shmulik Hen <shmulik.hen at intel dot com>
37 * - Code cleanup and style changes 37 * - Code cleanup and style changes
38 *
39 * 2005/05/05 - Jason Gabler <jygabler at lbl dot gov>
40 * - added definitions for various XOR hashing policies
38 */ 41 */
39 42
40#ifndef _LINUX_IF_BONDING_H 43#ifndef _LINUX_IF_BONDING_H
@@ -80,6 +83,10 @@
80 83
81#define BOND_DEFAULT_MAX_BONDS 1 /* Default maximum number of devices to support */ 84#define BOND_DEFAULT_MAX_BONDS 1 /* Default maximum number of devices to support */
82 85
86/* hashing types */
87#define BOND_XMIT_POLICY_LAYER2 0 /* layer 2 (MAC only), default */
88#define BOND_XMIT_POLICY_LAYER34 1 /* layer 3+4 (IP ^ MAC) */
89
83typedef struct ifbond { 90typedef struct ifbond {
84 __s32 bond_mode; 91 __s32 bond_mode;
85 __s32 num_slaves; 92 __s32 num_slaves;
diff --git a/include/linux/if_shaper.h b/include/linux/if_shaper.h
index 004e6f09a6e2..68c896a36a34 100644
--- a/include/linux/if_shaper.h
+++ b/include/linux/if_shaper.h
@@ -23,7 +23,7 @@ struct shaper
23 __u32 shapeclock; 23 __u32 shapeclock;
24 unsigned long recovery; /* Time we can next clock a packet out on 24 unsigned long recovery; /* Time we can next clock a packet out on
25 an empty queue */ 25 an empty queue */
26 struct semaphore sem; 26 spinlock_t lock;
27 struct net_device_stats stats; 27 struct net_device_stats stats;
28 struct net_device *dev; 28 struct net_device *dev;
29 int (*hard_start_xmit) (struct sk_buff *skb, 29 int (*hard_start_xmit) (struct sk_buff *skb,
diff --git a/include/linux/in6.h b/include/linux/in6.h
index f8256c582845..dcf5720ffcbb 100644
--- a/include/linux/in6.h
+++ b/include/linux/in6.h
@@ -156,7 +156,7 @@ struct in6_flowlabel_req
156#define IPV6_CHECKSUM 7 156#define IPV6_CHECKSUM 7
157#define IPV6_HOPLIMIT 8 157#define IPV6_HOPLIMIT 8
158#define IPV6_NEXTHOP 9 158#define IPV6_NEXTHOP 9
159#define IPV6_AUTHHDR 10 159#define IPV6_AUTHHDR 10 /* obsolete */
160#define IPV6_FLOWINFO 11 160#define IPV6_FLOWINFO 11
161 161
162#define IPV6_UNICAST_HOPS 16 162#define IPV6_UNICAST_HOPS 16
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index 03206a425d7a..c727c195a91a 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -81,6 +81,7 @@ extern struct group_info init_groups;
81 .mm = NULL, \ 81 .mm = NULL, \
82 .active_mm = &init_mm, \ 82 .active_mm = &init_mm, \
83 .run_list = LIST_HEAD_INIT(tsk.run_list), \ 83 .run_list = LIST_HEAD_INIT(tsk.run_list), \
84 .ioprio = 0, \
84 .time_slice = HZ, \ 85 .time_slice = HZ, \
85 .tasks = LIST_HEAD_INIT(tsk.tasks), \ 86 .tasks = LIST_HEAD_INIT(tsk.tasks), \
86 .ptrace_children= LIST_HEAD_INIT(tsk.ptrace_children), \ 87 .ptrace_children= LIST_HEAD_INIT(tsk.ptrace_children), \
@@ -110,6 +111,7 @@ extern struct group_info init_groups;
110 .proc_lock = SPIN_LOCK_UNLOCKED, \ 111 .proc_lock = SPIN_LOCK_UNLOCKED, \
111 .journal_info = NULL, \ 112 .journal_info = NULL, \
112 .cpu_timers = INIT_CPU_TIMERS(tsk.cpu_timers), \ 113 .cpu_timers = INIT_CPU_TIMERS(tsk.cpu_timers), \
114 .fs_excl = ATOMIC_INIT(0), \
113} 115}
114 116
115 117
diff --git a/include/linux/input.h b/include/linux/input.h
index 9d9598ed760d..b9cc0ac71f44 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -859,6 +859,10 @@ struct input_dev {
859 int (*erase_effect)(struct input_dev *dev, int effect_id); 859 int (*erase_effect)(struct input_dev *dev, int effect_id);
860 860
861 struct input_handle *grab; 861 struct input_handle *grab;
862
863 struct semaphore sem; /* serializes open and close operations */
864 unsigned int users;
865
862 struct device *dev; 866 struct device *dev;
863 867
864 struct list_head h_list; 868 struct list_head h_list;
diff --git a/include/linux/ioprio.h b/include/linux/ioprio.h
new file mode 100644
index 000000000000..8a453a0b5e4b
--- /dev/null
+++ b/include/linux/ioprio.h
@@ -0,0 +1,88 @@
1#ifndef IOPRIO_H
2#define IOPRIO_H
3
4#include <linux/sched.h>
5
6/*
7 * Gives us 8 prio classes with 13-bits of data for each class
8 */
9#define IOPRIO_BITS (16)
10#define IOPRIO_CLASS_SHIFT (13)
11#define IOPRIO_PRIO_MASK ((1UL << IOPRIO_CLASS_SHIFT) - 1)
12
13#define IOPRIO_PRIO_CLASS(mask) ((mask) >> IOPRIO_CLASS_SHIFT)
14#define IOPRIO_PRIO_DATA(mask) ((mask) & IOPRIO_PRIO_MASK)
15#define IOPRIO_PRIO_VALUE(class, data) (((class) << IOPRIO_CLASS_SHIFT) | data)
16
17#define ioprio_valid(mask) (IOPRIO_PRIO_CLASS((mask)) != IOPRIO_CLASS_NONE)
18
19/*
20 * These are the io priority groups as implemented by CFQ. RT is the realtime
21 * class, it always gets premium service. BE is the best-effort scheduling
22 * class, the default for any process. IDLE is the idle scheduling class, it
23 * is only served when no one else is using the disk.
24 */
25enum {
26 IOPRIO_CLASS_NONE,
27 IOPRIO_CLASS_RT,
28 IOPRIO_CLASS_BE,
29 IOPRIO_CLASS_IDLE,
30};
31
32/*
33 * 8 best effort priority levels are supported
34 */
35#define IOPRIO_BE_NR (8)
36
37asmlinkage int sys_ioprio_set(int, int, int);
38asmlinkage int sys_ioprio_get(int, int);
39
40enum {
41 IOPRIO_WHO_PROCESS = 1,
42 IOPRIO_WHO_PGRP,
43 IOPRIO_WHO_USER,
44};
45
46/*
47 * if process has set io priority explicitly, use that. if not, convert
48 * the cpu scheduler nice value to an io priority
49 */
50#define IOPRIO_NORM (4)
51static inline int task_ioprio(struct task_struct *task)
52{
53 WARN_ON(!ioprio_valid(task->ioprio));
54 return IOPRIO_PRIO_DATA(task->ioprio);
55}
56
57static inline int task_nice_ioprio(struct task_struct *task)
58{
59 return (task_nice(task) + 20) / 5;
60}
61
62/*
63 * For inheritance, return the highest of the two given priorities
64 */
65static inline int ioprio_best(unsigned short aprio, unsigned short bprio)
66{
67 unsigned short aclass = IOPRIO_PRIO_CLASS(aprio);
68 unsigned short bclass = IOPRIO_PRIO_CLASS(bprio);
69
70 if (!ioprio_valid(aprio))
71 return bprio;
72 if (!ioprio_valid(bprio))
73 return aprio;
74
75 if (aclass == IOPRIO_CLASS_NONE)
76 aclass = IOPRIO_CLASS_BE;
77 if (bclass == IOPRIO_CLASS_NONE)
78 bclass = IOPRIO_CLASS_BE;
79
80 if (aclass == bclass)
81 return min(aprio, bprio);
82 if (aclass > bclass)
83 return bprio;
84 else
85 return aprio;
86}
87
88#endif
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 12277799c007..069d3b84d311 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -85,9 +85,10 @@ extern int no_irq_affinity;
85extern int noirqdebug_setup(char *str); 85extern int noirqdebug_setup(char *str);
86 86
87extern fastcall int handle_IRQ_event(unsigned int irq, struct pt_regs *regs, 87extern fastcall int handle_IRQ_event(unsigned int irq, struct pt_regs *regs,
88 struct irqaction *action); 88 struct irqaction *action);
89extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs); 89extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs);
90extern void note_interrupt(unsigned int irq, irq_desc_t *desc, int action_ret); 90extern void note_interrupt(unsigned int irq, irq_desc_t *desc,
91 int action_ret, struct pt_regs *regs);
91extern int can_request_irq(unsigned int irq, unsigned long irqflags); 92extern int can_request_irq(unsigned int irq, unsigned long irqflags);
92 93
93extern void init_irq_proc(void); 94extern void init_irq_proc(void);
diff --git a/include/linux/joystick.h b/include/linux/joystick.h
index b7e0ab622cd7..06b9af77eb7f 100644
--- a/include/linux/joystick.h
+++ b/include/linux/joystick.h
@@ -111,18 +111,35 @@ struct js_corr {
111#define JS_SET_ALL 8 111#define JS_SET_ALL 8
112 112
113struct JS_DATA_TYPE { 113struct JS_DATA_TYPE {
114 int buttons; 114 __s32 buttons;
115 int x; 115 __s32 x;
116 int y; 116 __s32 y;
117}; 117};
118 118
119struct JS_DATA_SAVE_TYPE { 119struct JS_DATA_SAVE_TYPE_32 {
120 int JS_TIMEOUT; 120 __s32 JS_TIMEOUT;
121 int BUSY; 121 __s32 BUSY;
122 long JS_EXPIRETIME; 122 __s32 JS_EXPIRETIME;
123 long JS_TIMELIMIT; 123 __s32 JS_TIMELIMIT;
124 struct JS_DATA_TYPE JS_SAVE; 124 struct JS_DATA_TYPE JS_SAVE;
125 struct JS_DATA_TYPE JS_CORR; 125 struct JS_DATA_TYPE JS_CORR;
126}; 126};
127 127
128struct JS_DATA_SAVE_TYPE_64 {
129 __s32 JS_TIMEOUT;
130 __s32 BUSY;
131 __s64 JS_EXPIRETIME;
132 __s64 JS_TIMELIMIT;
133 struct JS_DATA_TYPE JS_SAVE;
134 struct JS_DATA_TYPE JS_CORR;
135};
136
137#if BITS_PER_LONG == 64
138#define JS_DATA_SAVE_TYPE JS_DATA_SAVE_TYPE_64
139#elif BITS_PER_LONG == 32
140#define JS_DATA_SAVE_TYPE JS_DATA_SAVE_TYPE_32
141#else
142#error Unexpected BITS_PER_LONG
143#endif
144
128#endif /* _LINUX_JOYSTICK_H */ 145#endif /* _LINUX_JOYSTICK_H */
diff --git a/include/linux/kprobes.h b/include/linux/kprobes.h
index 5e1a7b0d7b3f..e050fc2d4c26 100644
--- a/include/linux/kprobes.h
+++ b/include/linux/kprobes.h
@@ -104,33 +104,12 @@ struct jprobe {
104}; 104};
105 105
106#ifdef ARCH_SUPPORTS_KRETPROBES 106#ifdef ARCH_SUPPORTS_KRETPROBES
107extern int trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs);
108extern void trampoline_post_handler(struct kprobe *p, struct pt_regs *regs,
109 unsigned long flags);
110extern struct task_struct *arch_get_kprobe_task(void *ptr);
111extern void arch_prepare_kretprobe(struct kretprobe *rp, struct pt_regs *regs); 107extern void arch_prepare_kretprobe(struct kretprobe *rp, struct pt_regs *regs);
112extern void arch_kprobe_flush_task(struct task_struct *tk);
113#else /* ARCH_SUPPORTS_KRETPROBES */ 108#else /* ARCH_SUPPORTS_KRETPROBES */
114static inline void kretprobe_trampoline(void)
115{
116}
117static inline int trampoline_probe_handler(struct kprobe *p,
118 struct pt_regs *regs)
119{
120 return 0;
121}
122static inline void trampoline_post_handler(struct kprobe *p,
123 struct pt_regs *regs, unsigned long flags)
124{
125}
126static inline void arch_prepare_kretprobe(struct kretprobe *rp, 109static inline void arch_prepare_kretprobe(struct kretprobe *rp,
127 struct pt_regs *regs) 110 struct pt_regs *regs)
128{ 111{
129} 112}
130static inline void arch_kprobe_flush_task(struct task_struct *tk)
131{
132}
133#define arch_get_kprobe_task(ptr) ((struct task_struct *)NULL)
134#endif /* ARCH_SUPPORTS_KRETPROBES */ 113#endif /* ARCH_SUPPORTS_KRETPROBES */
135/* 114/*
136 * Function-return probe - 115 * Function-return probe -
@@ -155,8 +134,8 @@ struct kretprobe_instance {
155 struct hlist_node uflist; /* either on free list or used list */ 134 struct hlist_node uflist; /* either on free list or used list */
156 struct hlist_node hlist; 135 struct hlist_node hlist;
157 struct kretprobe *rp; 136 struct kretprobe *rp;
158 void *ret_addr; 137 kprobe_opcode_t *ret_addr;
159 void *stack_addr; 138 struct task_struct *task;
160}; 139};
161 140
162#ifdef CONFIG_KPROBES 141#ifdef CONFIG_KPROBES
@@ -176,7 +155,10 @@ extern void arch_copy_kprobe(struct kprobe *p);
176extern void arch_arm_kprobe(struct kprobe *p); 155extern void arch_arm_kprobe(struct kprobe *p);
177extern void arch_disarm_kprobe(struct kprobe *p); 156extern void arch_disarm_kprobe(struct kprobe *p);
178extern void arch_remove_kprobe(struct kprobe *p); 157extern void arch_remove_kprobe(struct kprobe *p);
158extern int arch_init_kprobes(void);
179extern void show_registers(struct pt_regs *regs); 159extern void show_registers(struct pt_regs *regs);
160extern kprobe_opcode_t *get_insn_slot(void);
161extern void free_insn_slot(kprobe_opcode_t *slot);
180 162
181/* Get the kprobe at this addr (if any). Must have called lock_kprobes */ 163/* Get the kprobe at this addr (if any). Must have called lock_kprobes */
182struct kprobe *get_kprobe(void *addr); 164struct kprobe *get_kprobe(void *addr);
@@ -194,8 +176,6 @@ int register_kretprobe(struct kretprobe *rp);
194void unregister_kretprobe(struct kretprobe *rp); 176void unregister_kretprobe(struct kretprobe *rp);
195 177
196struct kretprobe_instance *get_free_rp_inst(struct kretprobe *rp); 178struct kretprobe_instance *get_free_rp_inst(struct kretprobe *rp);
197struct kretprobe_instance *get_rp_inst(void *sara);
198struct kretprobe_instance *get_rp_inst_tsk(struct task_struct *tk);
199void add_rp_inst(struct kretprobe_instance *ri); 179void add_rp_inst(struct kretprobe_instance *ri);
200void kprobe_flush_task(struct task_struct *tk); 180void kprobe_flush_task(struct task_struct *tk);
201void recycle_rp_inst(struct kretprobe_instance *ri); 181void recycle_rp_inst(struct kretprobe_instance *ri);
diff --git a/include/linux/libps2.h b/include/linux/libps2.h
index 923bdbc6d9e4..a710bddda4eb 100644
--- a/include/linux/libps2.h
+++ b/include/linux/libps2.h
@@ -41,6 +41,7 @@ struct ps2dev {
41 41
42void ps2_init(struct ps2dev *ps2dev, struct serio *serio); 42void ps2_init(struct ps2dev *ps2dev, struct serio *serio);
43int ps2_sendbyte(struct ps2dev *ps2dev, unsigned char byte, int timeout); 43int ps2_sendbyte(struct ps2dev *ps2dev, unsigned char byte, int timeout);
44void ps2_drain(struct ps2dev *ps2dev, int maxbytes, int timeout);
44int ps2_command(struct ps2dev *ps2dev, unsigned char *param, int command); 45int ps2_command(struct ps2dev *ps2dev, unsigned char *param, int command);
45int ps2_schedule_command(struct ps2dev *ps2dev, unsigned char *param, int command); 46int ps2_schedule_command(struct ps2dev *ps2dev, unsigned char *param, int command);
46int ps2_handle_ack(struct ps2dev *ps2dev, unsigned char data); 47int ps2_handle_ack(struct ps2dev *ps2dev, unsigned char data);
diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
index d6eb7b2efc04..9b6d05172ed4 100644
--- a/include/linux/mod_devicetable.h
+++ b/include/linux/mod_devicetable.h
@@ -175,4 +175,50 @@ struct serio_device_id {
175}; 175};
176 176
177 177
178/* PCMCIA */
179
180struct pcmcia_device_id {
181 __u16 match_flags;
182
183 __u16 manf_id;
184 __u16 card_id;
185
186 __u8 func_id;
187
188 /* for real multi-function devices */
189 __u8 function;
190
191 /* for pseude multi-function devices */
192 __u8 device_no;
193
194 __u32 prod_id_hash[4];
195
196 /* not matched against in kernelspace*/
197#ifdef __KERNEL__
198 const char * prod_id[4];
199#else
200 kernel_ulong_t prod_id[4];
201#endif
202
203 /* not matched against */
204 kernel_ulong_t driver_info;
205#ifdef __KERNEL__
206 char * cisfile;
207#else
208 kernel_ulong_t cisfile;
209#endif
210};
211
212#define PCMCIA_DEV_ID_MATCH_MANF_ID 0x0001
213#define PCMCIA_DEV_ID_MATCH_CARD_ID 0x0002
214#define PCMCIA_DEV_ID_MATCH_FUNC_ID 0x0004
215#define PCMCIA_DEV_ID_MATCH_FUNCTION 0x0008
216#define PCMCIA_DEV_ID_MATCH_PROD_ID1 0x0010
217#define PCMCIA_DEV_ID_MATCH_PROD_ID2 0x0020
218#define PCMCIA_DEV_ID_MATCH_PROD_ID3 0x0040
219#define PCMCIA_DEV_ID_MATCH_PROD_ID4 0x0080
220#define PCMCIA_DEV_ID_MATCH_DEVICE_NO 0x0100
221#define PCMCIA_DEV_ID_MATCH_FAKE_CIS 0x0200
222#define PCMCIA_DEV_ID_MATCH_ANONYMOUS 0x0400
223
178#endif /* LINUX_MOD_DEVICETABLE_H */ 224#endif /* LINUX_MOD_DEVICETABLE_H */
diff --git a/include/linux/netlink.h b/include/linux/netlink.h
index 3029cad63a01..27e4d164a108 100644
--- a/include/linux/netlink.h
+++ b/include/linux/netlink.h
@@ -168,6 +168,7 @@ __nlmsg_put(struct sk_buff *skb, u32 pid, u32 seq, int type, int len, int flags)
168 nlh->nlmsg_flags = flags; 168 nlh->nlmsg_flags = flags;
169 nlh->nlmsg_pid = pid; 169 nlh->nlmsg_pid = pid;
170 nlh->nlmsg_seq = seq; 170 nlh->nlmsg_seq = seq;
171 memset(NLMSG_DATA(nlh) + len, 0, NLMSG_ALIGN(size) - size);
171 return nlh; 172 return nlh;
172} 173}
173 174
diff --git a/include/linux/pci-dynids.h b/include/linux/pci-dynids.h
deleted file mode 100644
index 183b6b0de81c..000000000000
--- a/include/linux/pci-dynids.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * PCI defines and function prototypes
3 * Copyright 2003 Dell Inc.
4 * by Matt Domsch <Matt_Domsch@dell.com>
5 */
6
7#ifndef LINUX_PCI_DYNIDS_H
8#define LINUX_PCI_DYNIDS_H
9
10#include <linux/list.h>
11#include <linux/mod_devicetable.h>
12
13struct dynid {
14 struct list_head node;
15 struct pci_device_id id;
16};
17
18#endif
diff --git a/include/linux/pci.h b/include/linux/pci.h
index b5238bd18830..7ac14961ba22 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -586,7 +586,7 @@ struct pci_dev {
586#define PCI_NUM_RESOURCES 11 586#define PCI_NUM_RESOURCES 11
587 587
588#ifndef PCI_BUS_NUM_RESOURCES 588#ifndef PCI_BUS_NUM_RESOURCES
589#define PCI_BUS_NUM_RESOURCES 4 589#define PCI_BUS_NUM_RESOURCES 8
590#endif 590#endif
591 591
592#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ 592#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
@@ -734,16 +734,20 @@ void pcibios_update_irq(struct pci_dev *, int irq);
734/* Generic PCI functions used internally */ 734/* Generic PCI functions used internally */
735 735
736extern struct pci_bus *pci_find_bus(int domain, int busnr); 736extern struct pci_bus *pci_find_bus(int domain, int busnr);
737void pci_bus_add_devices(struct pci_bus *bus);
737struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata); 738struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
738static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata) 739static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
739{ 740{
740 return pci_scan_bus_parented(NULL, bus, ops, sysdata); 741 struct pci_bus *root_bus;
742 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
743 if (root_bus)
744 pci_bus_add_devices(root_bus);
745 return root_bus;
741} 746}
742int pci_scan_slot(struct pci_bus *bus, int devfn); 747int pci_scan_slot(struct pci_bus *bus, int devfn);
743struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn); 748struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
744unsigned int pci_scan_child_bus(struct pci_bus *bus); 749unsigned int pci_scan_child_bus(struct pci_bus *bus);
745void pci_bus_add_device(struct pci_dev *dev); 750void pci_bus_add_device(struct pci_dev *dev);
746void pci_bus_add_devices(struct pci_bus *bus);
747void pci_name_device(struct pci_dev *dev); 751void pci_name_device(struct pci_dev *dev);
748char *pci_class_name(u32 class); 752char *pci_class_name(u32 class);
749void pci_read_bridge_bases(struct pci_bus *child); 753void pci_read_bridge_bases(struct pci_bus *child);
@@ -856,7 +860,8 @@ int pci_register_driver(struct pci_driver *);
856void pci_unregister_driver(struct pci_driver *); 860void pci_unregister_driver(struct pci_driver *);
857void pci_remove_behind_bridge(struct pci_dev *); 861void pci_remove_behind_bridge(struct pci_dev *);
858struct pci_driver *pci_dev_driver(const struct pci_dev *); 862struct pci_driver *pci_dev_driver(const struct pci_dev *);
859const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev); 863const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
864const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
860int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass); 865int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
861 866
862/* kmem_cache style wrapper around pci_alloc_consistent() */ 867/* kmem_cache style wrapper around pci_alloc_consistent() */
@@ -870,6 +875,15 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass
870#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) 875#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
871#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) 876#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
872 877
878enum pci_dma_burst_strategy {
879 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
880 strategy_parameter is N/A */
881 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
882 byte boundaries */
883 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
884 strategy_parameter byte boundaries */
885};
886
873#if defined(CONFIG_ISA) || defined(CONFIG_EISA) 887#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
874extern struct pci_dev *isa_bridge; 888extern struct pci_dev *isa_bridge;
875#endif 889#endif
@@ -972,6 +986,8 @@ static inline int pci_proc_domain(struct pci_bus *bus)
972} 986}
973#endif 987#endif
974 988
989#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
990
975#endif /* !CONFIG_PCI */ 991#endif /* !CONFIG_PCI */
976 992
977/* these helpers provide future and backwards compatibility 993/* these helpers provide future and backwards compatibility
@@ -1016,6 +1032,20 @@ static inline char *pci_name(struct pci_dev *pdev)
1016#define pci_pretty_name(dev) "" 1032#define pci_pretty_name(dev) ""
1017#endif 1033#endif
1018 1034
1035
1036/* Some archs don't want to expose struct resource to userland as-is
1037 * in sysfs and /proc
1038 */
1039#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1040static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1041 const struct resource *rsrc, u64 *start, u64 *end)
1042{
1043 *start = rsrc->start;
1044 *end = rsrc->end;
1045}
1046#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1047
1048
1019/* 1049/*
1020 * The world is not perfect and supplies us with broken PCI devices. 1050 * The world is not perfect and supplies us with broken PCI devices.
1021 * For at least a part of these bugs we need a work-around, so both 1051 * For at least a part of these bugs we need a work-around, so both
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index bf608808a60c..27348c22dacb 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -62,6 +62,8 @@
62 62
63#define PCI_BASE_CLASS_SYSTEM 0x08 63#define PCI_BASE_CLASS_SYSTEM 0x08
64#define PCI_CLASS_SYSTEM_PIC 0x0800 64#define PCI_CLASS_SYSTEM_PIC 0x0800
65#define PCI_CLASS_SYSTEM_PIC_IOAPIC 0x080010
66#define PCI_CLASS_SYSTEM_PIC_IOXAPIC 0x080020
65#define PCI_CLASS_SYSTEM_DMA 0x0801 67#define PCI_CLASS_SYSTEM_DMA 0x0801
66#define PCI_CLASS_SYSTEM_TIMER 0x0802 68#define PCI_CLASS_SYSTEM_TIMER 0x0802
67#define PCI_CLASS_SYSTEM_RTC 0x0803 69#define PCI_CLASS_SYSTEM_RTC 0x0803
@@ -712,8 +714,9 @@
712#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290 714#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290
713#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301 715#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301
714#define PCI_DEVICE_ID_HP_CISSA 0x3220 716#define PCI_DEVICE_ID_HP_CISSA 0x3220
715#define PCI_DEVICE_ID_HP_CISSB 0x3230 717#define PCI_DEVICE_ID_HP_CISSB 0x3222
716#define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031 718#define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031
719#define PCI_DEVICE_ID_HP_CISSC 0x3230
717 720
718#define PCI_VENDOR_ID_PCTECH 0x1042 721#define PCI_VENDOR_ID_PCTECH 0x1042
719#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 722#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000
@@ -1235,6 +1238,7 @@
1235#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE 0x0265 1238#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE 0x0265
1236#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266 1239#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266
1237#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267 1240#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267
1241#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE 0x036E
1238#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268 1242#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268
1239#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269 1243#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269
1240#define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B 1244#define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B
@@ -1284,6 +1288,8 @@
1284#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_2 0x0348 1288#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_2 0x0348
1285#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO1000 0x034C 1289#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO1000 0x034C
1286#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1100 0x034E 1290#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1100 0x034E
1291#define PCI_DEVICE_ID_NVIDIA_NVENET_14 0x0372
1292#define PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373
1287 1293
1288#define PCI_VENDOR_ID_IMS 0x10e0 1294#define PCI_VENDOR_ID_IMS 0x10e0
1289#define PCI_DEVICE_ID_IMS_8849 0x8849 1295#define PCI_DEVICE_ID_IMS_8849 0x8849
@@ -1812,6 +1818,8 @@
1812#define PCI_VENDOR_ID_ITE 0x1283 1818#define PCI_VENDOR_ID_ITE 0x1283
1813#define PCI_DEVICE_ID_ITE_IT8172G 0x8172 1819#define PCI_DEVICE_ID_ITE_IT8172G 0x8172
1814#define PCI_DEVICE_ID_ITE_IT8172G_AUDIO 0x0801 1820#define PCI_DEVICE_ID_ITE_IT8172G_AUDIO 0x0801
1821#define PCI_DEVICE_ID_ITE_8211 0x8211
1822#define PCI_DEVICE_ID_ITE_8212 0x8212
1815#define PCI_DEVICE_ID_ITE_8872 0x8872 1823#define PCI_DEVICE_ID_ITE_8872 0x8872
1816#define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886 1824#define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886
1817 1825
diff --git a/include/linux/pkt_cls.h b/include/linux/pkt_cls.h
index 25d2d67c1faf..bd2c5a2bbbf5 100644
--- a/include/linux/pkt_cls.h
+++ b/include/linux/pkt_cls.h
@@ -276,6 +276,7 @@ struct tc_rsvp_pinfo
276 __u8 protocol; 276 __u8 protocol;
277 __u8 tunnelid; 277 __u8 tunnelid;
278 __u8 tunnelhdr; 278 __u8 tunnelhdr;
279 __u8 pad;
279}; 280};
280 281
281/* ROUTE filter */ 282/* ROUTE filter */
diff --git a/include/linux/pkt_sched.h b/include/linux/pkt_sched.h
index 1d9da36eb9db..60ffcb9c5791 100644
--- a/include/linux/pkt_sched.h
+++ b/include/linux/pkt_sched.h
@@ -221,9 +221,11 @@ struct tc_gred_qopt
221/* gred setup */ 221/* gred setup */
222struct tc_gred_sopt 222struct tc_gred_sopt
223{ 223{
224 __u32 DPs; 224 __u32 DPs;
225 __u32 def_DP; 225 __u32 def_DP;
226 __u8 grio; 226 __u8 grio;
227 __u8 pad1;
228 __u16 pad2;
227}; 229};
228 230
229/* HTB section */ 231/* HTB section */
@@ -351,6 +353,7 @@ struct tc_cbq_ovl
351#define TC_CBQ_OVL_DROP 3 353#define TC_CBQ_OVL_DROP 3
352#define TC_CBQ_OVL_RCLASSIC 4 354#define TC_CBQ_OVL_RCLASSIC 4
353 unsigned char priority2; 355 unsigned char priority2;
356 __u16 pad;
354 __u32 penalty; 357 __u32 penalty;
355}; 358};
356 359
diff --git a/include/linux/pmu.h b/include/linux/pmu.h
index 6d73eada277e..373bd3b9b330 100644
--- a/include/linux/pmu.h
+++ b/include/linux/pmu.h
@@ -166,7 +166,7 @@ extern int pmu_i2c_simple_read(int bus, int addr, u8* data, int len);
166extern int pmu_i2c_simple_write(int bus, int addr, u8* data, int len); 166extern int pmu_i2c_simple_write(int bus, int addr, u8* data, int len);
167 167
168 168
169#ifdef CONFIG_PMAC_PBOOK 169#ifdef CONFIG_PM
170/* 170/*
171 * Stuff for putting the powerbook to sleep and waking it again. 171 * Stuff for putting the powerbook to sleep and waking it again.
172 * 172 *
@@ -208,6 +208,8 @@ struct pmu_sleep_notifier
208int pmu_register_sleep_notifier(struct pmu_sleep_notifier* notifier); 208int pmu_register_sleep_notifier(struct pmu_sleep_notifier* notifier);
209int pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* notifier); 209int pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* notifier);
210 210
211#endif /* CONFIG_PM */
212
211#define PMU_MAX_BATTERIES 2 213#define PMU_MAX_BATTERIES 2
212 214
213/* values for pmu_power_flags */ 215/* values for pmu_power_flags */
@@ -235,6 +237,4 @@ extern int pmu_battery_count;
235extern struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; 237extern struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
236extern unsigned int pmu_power_flags; 238extern unsigned int pmu_power_flags;
237 239
238#endif /* CONFIG_PMAC_PBOOK */
239
240#endif /* __KERNEL__ */ 240#endif /* __KERNEL__ */
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index d021888b58f1..657c05ab8f9e 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -363,6 +363,8 @@ enum
363struct rta_session 363struct rta_session
364{ 364{
365 __u8 proto; 365 __u8 proto;
366 __u8 pad1;
367 __u16 pad2;
366 368
367 union { 369 union {
368 struct { 370 struct {
@@ -635,10 +637,13 @@ struct ifinfomsg
635struct prefixmsg 637struct prefixmsg
636{ 638{
637 unsigned char prefix_family; 639 unsigned char prefix_family;
640 unsigned char prefix_pad1;
641 unsigned short prefix_pad2;
638 int prefix_ifindex; 642 int prefix_ifindex;
639 unsigned char prefix_type; 643 unsigned char prefix_type;
640 unsigned char prefix_len; 644 unsigned char prefix_len;
641 unsigned char prefix_flags; 645 unsigned char prefix_flags;
646 unsigned char prefix_pad3;
642}; 647};
643 648
644enum 649enum
@@ -898,7 +903,9 @@ extern void __rta_fill(struct sk_buff *skb, int attrtype, int attrlen, const voi
898 memcpy(skb_put(skb, attrlen), data, attrlen); }) 903 memcpy(skb_put(skb, attrlen), data, attrlen); })
899 904
900#define RTA_PUT_NOHDR(skb, attrlen, data) \ 905#define RTA_PUT_NOHDR(skb, attrlen, data) \
901 RTA_APPEND(skb, RTA_ALIGN(attrlen), data) 906({ RTA_APPEND(skb, RTA_ALIGN(attrlen), data); \
907 memset(skb->tail - (RTA_ALIGN(attrlen) - attrlen), 0, \
908 RTA_ALIGN(attrlen) - attrlen); })
902 909
903#define RTA_PUT_U8(skb, attrtype, value) \ 910#define RTA_PUT_U8(skb, attrtype, value) \
904({ u8 _tmp = (value); \ 911({ u8 _tmp = (value); \
@@ -978,6 +985,7 @@ __rta_reserve(struct sk_buff *skb, int attrtype, int attrlen)
978 rta = (struct rtattr*)skb_put(skb, RTA_ALIGN(size)); 985 rta = (struct rtattr*)skb_put(skb, RTA_ALIGN(size));
979 rta->rta_type = attrtype; 986 rta->rta_type = attrtype;
980 rta->rta_len = size; 987 rta->rta_len = size;
988 memset(RTA_DATA(rta) + attrlen, 0, RTA_ALIGN(size) - size);
981 return rta; 989 return rta;
982} 990}
983 991
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 9530b1903160..ff48815bd3a2 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -608,6 +608,8 @@ struct task_struct {
608 struct list_head run_list; 608 struct list_head run_list;
609 prio_array_t *array; 609 prio_array_t *array;
610 610
611 unsigned short ioprio;
612
611 unsigned long sleep_avg; 613 unsigned long sleep_avg;
612 unsigned long long timestamp, last_ran; 614 unsigned long long timestamp, last_ran;
613 unsigned long long sched_time; /* sched_clock time spent running */ 615 unsigned long long sched_time; /* sched_clock time spent running */
@@ -763,6 +765,7 @@ struct task_struct {
763 nodemask_t mems_allowed; 765 nodemask_t mems_allowed;
764 int cpuset_mems_generation; 766 int cpuset_mems_generation;
765#endif 767#endif
768 atomic_t fs_excl; /* holding fs exclusive resources */
766}; 769};
767 770
768static inline pid_t process_group(struct task_struct *tsk) 771static inline pid_t process_group(struct task_struct *tsk)
@@ -1112,7 +1115,8 @@ extern void unhash_process(struct task_struct *p);
1112 1115
1113/* 1116/*
1114 * Protects ->fs, ->files, ->mm, ->ptrace, ->group_info, ->comm, keyring 1117 * Protects ->fs, ->files, ->mm, ->ptrace, ->group_info, ->comm, keyring
1115 * subscriptions and synchronises with wait4(). Also used in procfs. 1118 * subscriptions and synchronises with wait4(). Also used in procfs. Also
1119 * pins the final release of task.io_context.
1116 * 1120 *
1117 * Nests both inside and outside of read_lock(&tasklist_lock). 1121 * Nests both inside and outside of read_lock(&tasklist_lock).
1118 * It must not be nested with write_lock_irq(&tasklist_lock), 1122 * It must not be nested with write_lock_irq(&tasklist_lock),
diff --git a/include/linux/seccomp.h b/include/linux/seccomp.h
index 3a2702bbb1d6..dc89116bb1ca 100644
--- a/include/linux/seccomp.h
+++ b/include/linux/seccomp.h
@@ -19,6 +19,11 @@ static inline void secure_computing(int this_syscall)
19 __secure_computing(this_syscall); 19 __secure_computing(this_syscall);
20} 20}
21 21
22static inline int has_secure_computing(struct thread_info *ti)
23{
24 return unlikely(test_ti_thread_flag(ti, TIF_SECCOMP));
25}
26
22#else /* CONFIG_SECCOMP */ 27#else /* CONFIG_SECCOMP */
23 28
24#if (__GNUC__ > 2) 29#if (__GNUC__ > 2)
@@ -28,6 +33,11 @@ static inline void secure_computing(int this_syscall)
28#endif 33#endif
29 34
30#define secure_computing(x) do { } while (0) 35#define secure_computing(x) do { } while (0)
36/* static inline to preserve typechecking */
37static inline int has_secure_computing(struct thread_info *ti)
38{
39 return 0;
40}
31 41
32#endif /* CONFIG_SECCOMP */ 42#endif /* CONFIG_SECCOMP */
33 43
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index 823181af6ddf..3e3c1fa35b06 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -22,6 +22,7 @@ struct plat_serial8250_port {
22 unsigned int uartclk; /* UART clock rate */ 22 unsigned int uartclk; /* UART clock rate */
23 unsigned char regshift; /* register shift */ 23 unsigned char regshift; /* register shift */
24 unsigned char iotype; /* UPIO_* */ 24 unsigned char iotype; /* UPIO_* */
25 unsigned char hub6;
25 unsigned int flags; /* UPF_* flags */ 26 unsigned int flags; /* UPF_* flags */
26}; 27};
27 28
diff --git a/include/linux/serio.h b/include/linux/serio.h
index a2d3b9ae06f4..aa4d6493a034 100644
--- a/include/linux/serio.h
+++ b/include/linux/serio.h
@@ -83,6 +83,7 @@ static inline void serio_register_port(struct serio *serio)
83} 83}
84 84
85void serio_unregister_port(struct serio *serio); 85void serio_unregister_port(struct serio *serio);
86void serio_unregister_child_port(struct serio *serio);
86void __serio_unregister_port_delayed(struct serio *serio, struct module *owner); 87void __serio_unregister_port_delayed(struct serio *serio, struct module *owner);
87static inline void serio_unregister_port_delayed(struct serio *serio) 88static inline void serio_unregister_port_delayed(struct serio *serio)
88{ 89{
@@ -153,6 +154,11 @@ static inline int serio_pin_driver(struct serio *serio)
153 return down_interruptible(&serio->drv_sem); 154 return down_interruptible(&serio->drv_sem);
154} 155}
155 156
157static inline void serio_pin_driver_uninterruptible(struct serio *serio)
158{
159 down(&serio->drv_sem);
160}
161
156static inline void serio_unpin_driver(struct serio *serio) 162static inline void serio_unpin_driver(struct serio *serio)
157{ 163{
158 up(&serio->drv_sem); 164 up(&serio->drv_sem);
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 416a2e4024b2..14b950413495 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -183,7 +183,6 @@ struct skb_shared_info {
183 * @priority: Packet queueing priority 183 * @priority: Packet queueing priority
184 * @users: User count - see {datagram,tcp}.c 184 * @users: User count - see {datagram,tcp}.c
185 * @protocol: Packet protocol from driver 185 * @protocol: Packet protocol from driver
186 * @security: Security level of packet
187 * @truesize: Buffer size 186 * @truesize: Buffer size
188 * @head: Head of buffer 187 * @head: Head of buffer
189 * @data: Data head pointer 188 * @data: Data head pointer
@@ -249,18 +248,18 @@ struct sk_buff {
249 data_len, 248 data_len,
250 mac_len, 249 mac_len,
251 csum; 250 csum;
252 unsigned char local_df,
253 cloned:1,
254 nohdr:1,
255 pkt_type,
256 ip_summed;
257 __u32 priority; 251 __u32 priority;
258 unsigned short protocol, 252 __u8 local_df:1,
259 security; 253 cloned:1,
254 ip_summed:2,
255 nohdr:1;
256 /* 3 bits spare */
257 __u8 pkt_type;
258 __u16 protocol;
260 259
261 void (*destructor)(struct sk_buff *skb); 260 void (*destructor)(struct sk_buff *skb);
262#ifdef CONFIG_NETFILTER 261#ifdef CONFIG_NETFILTER
263 unsigned long nfmark; 262 unsigned long nfmark;
264 __u32 nfcache; 263 __u32 nfcache;
265 __u32 nfctinfo; 264 __u32 nfctinfo;
266 struct nf_conntrack *nfct; 265 struct nf_conntrack *nfct;
@@ -1211,7 +1210,7 @@ static inline void *skb_header_pointer(const struct sk_buff *skb, int offset,
1211{ 1210{
1212 int hlen = skb_headlen(skb); 1211 int hlen = skb_headlen(skb);
1213 1212
1214 if (offset + len <= hlen) 1213 if (hlen - offset >= len)
1215 return skb->data + offset; 1214 return skb->data + offset;
1216 1215
1217 if (skb_copy_bits(skb, offset, buffer, len) < 0) 1216 if (skb_copy_bits(skb, offset, buffer, len) < 0)
diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h
index ebfe1250f0a4..5b5f434ac9a0 100644
--- a/include/linux/sysctl.h
+++ b/include/linux/sysctl.h
@@ -641,6 +641,7 @@ enum {
641 NET_SCTP_ADDIP_ENABLE = 13, 641 NET_SCTP_ADDIP_ENABLE = 13,
642 NET_SCTP_PRSCTP_ENABLE = 14, 642 NET_SCTP_PRSCTP_ENABLE = 14,
643 NET_SCTP_SNDBUF_POLICY = 15, 643 NET_SCTP_SNDBUF_POLICY = 15,
644 NET_SCTP_SACK_TIMEOUT = 16,
644}; 645};
645 646
646/* /proc/sys/net/bridge */ 647/* /proc/sys/net/bridge */
diff --git a/include/linux/tc_ematch/tc_em_meta.h b/include/linux/tc_ematch/tc_em_meta.h
index a6b2cc530af5..bcb762d93123 100644
--- a/include/linux/tc_ematch/tc_em_meta.h
+++ b/include/linux/tc_ematch/tc_em_meta.h
@@ -45,7 +45,7 @@ enum
45 TCF_META_ID_REALDEV, 45 TCF_META_ID_REALDEV,
46 TCF_META_ID_PRIORITY, 46 TCF_META_ID_PRIORITY,
47 TCF_META_ID_PROTOCOL, 47 TCF_META_ID_PROTOCOL,
48 TCF_META_ID_SECURITY, 48 TCF_META_ID_SECURITY, /* obsolete */
49 TCF_META_ID_PKTTYPE, 49 TCF_META_ID_PKTTYPE,
50 TCF_META_ID_PKTLEN, 50 TCF_META_ID_PKTLEN,
51 TCF_META_ID_DATALEN, 51 TCF_META_ID_DATALEN,
diff --git a/include/linux/tcp.h b/include/linux/tcp.h
index dfd93d03f5d2..e4fd82e42104 100644
--- a/include/linux/tcp.h
+++ b/include/linux/tcp.h
@@ -286,7 +286,7 @@ struct tcp_sock {
286 __u32 max_window; /* Maximal window ever seen from peer */ 286 __u32 max_window; /* Maximal window ever seen from peer */
287 __u32 pmtu_cookie; /* Last pmtu seen by socket */ 287 __u32 pmtu_cookie; /* Last pmtu seen by socket */
288 __u32 mss_cache; /* Cached effective mss, not including SACKS */ 288 __u32 mss_cache; /* Cached effective mss, not including SACKS */
289 __u16 mss_cache_std; /* Like mss_cache, but without TSO */ 289 __u16 xmit_size_goal; /* Goal for segmenting output packets */
290 __u16 ext_header_len; /* Network protocol overhead (IP/IPv6 options) */ 290 __u16 ext_header_len; /* Network protocol overhead (IP/IPv6 options) */
291 __u8 ca_state; /* State of fast-retransmit machine */ 291 __u8 ca_state; /* State of fast-retransmit machine */
292 __u8 retransmits; /* Number of unrecovered RTO timeouts. */ 292 __u8 retransmits; /* Number of unrecovered RTO timeouts. */
diff --git a/include/linux/usb_ch9.h b/include/linux/usb_ch9.h
index f5fe94e09a03..ee21e6bf3867 100644
--- a/include/linux/usb_ch9.h
+++ b/include/linux/usb_ch9.h
@@ -6,17 +6,20 @@
6 * 6 *
7 * - the master/host side Linux-USB kernel driver API; 7 * - the master/host side Linux-USB kernel driver API;
8 * - the "usbfs" user space API; and 8 * - the "usbfs" user space API; and
9 * - (eventually) a Linux "gadget" slave/device side driver API. 9 * - the Linux "gadget" slave/device/peripheral side driver API.
10 * 10 *
11 * USB 2.0 adds an additional "On The Go" (OTG) mode, which lets systems 11 * USB 2.0 adds an additional "On The Go" (OTG) mode, which lets systems
12 * act either as a USB master/host or as a USB slave/device. That means 12 * act either as a USB master/host or as a USB slave/device. That means
13 * the master and slave side APIs will benefit from working well together. 13 * the master and slave side APIs benefit from working well together.
14 *
15 * There's also "Wireless USB", using low power short range radios for
16 * peripheral interconnection but otherwise building on the USB framework.
14 */ 17 */
15 18
16#ifndef __LINUX_USB_CH9_H 19#ifndef __LINUX_USB_CH9_H
17#define __LINUX_USB_CH9_H 20#define __LINUX_USB_CH9_H
18 21
19#include <asm/types.h> /* __u8 etc */ 22#include <linux/types.h> /* __u8 etc */
20 23
21/*-------------------------------------------------------------------------*/ 24/*-------------------------------------------------------------------------*/
22 25
@@ -68,6 +71,18 @@
68#define USB_REQ_SET_INTERFACE 0x0B 71#define USB_REQ_SET_INTERFACE 0x0B
69#define USB_REQ_SYNCH_FRAME 0x0C 72#define USB_REQ_SYNCH_FRAME 0x0C
70 73
74#define USB_REQ_SET_ENCRYPTION 0x0D /* Wireless USB */
75#define USB_REQ_GET_ENCRYPTION 0x0E
76#define USB_REQ_SET_HANDSHAKE 0x0F
77#define USB_REQ_GET_HANDSHAKE 0x10
78#define USB_REQ_SET_CONNECTION 0x11
79#define USB_REQ_SET_SECURITY_DATA 0x12
80#define USB_REQ_GET_SECURITY_DATA 0x13
81#define USB_REQ_SET_WUSB_DATA 0x14
82#define USB_REQ_LOOPBACK_DATA_WRITE 0x15
83#define USB_REQ_LOOPBACK_DATA_READ 0x16
84#define USB_REQ_SET_INTERFACE_DS 0x17
85
71/* 86/*
72 * USB feature flags are written using USB_REQ_{CLEAR,SET}_FEATURE, and 87 * USB feature flags are written using USB_REQ_{CLEAR,SET}_FEATURE, and
73 * are read as a bit array returned by USB_REQ_GET_STATUS. (So there 88 * are read as a bit array returned by USB_REQ_GET_STATUS. (So there
@@ -75,10 +90,12 @@
75 */ 90 */
76#define USB_DEVICE_SELF_POWERED 0 /* (read only) */ 91#define USB_DEVICE_SELF_POWERED 0 /* (read only) */
77#define USB_DEVICE_REMOTE_WAKEUP 1 /* dev may initiate wakeup */ 92#define USB_DEVICE_REMOTE_WAKEUP 1 /* dev may initiate wakeup */
78#define USB_DEVICE_TEST_MODE 2 /* (high speed only) */ 93#define USB_DEVICE_TEST_MODE 2 /* (wired high speed only) */
79#define USB_DEVICE_B_HNP_ENABLE 3 /* dev may initiate HNP */ 94#define USB_DEVICE_BATTERY 2 /* (wireless) */
80#define USB_DEVICE_A_HNP_SUPPORT 4 /* RH port supports HNP */ 95#define USB_DEVICE_B_HNP_ENABLE 3 /* (otg) dev may initiate HNP */
81#define USB_DEVICE_A_ALT_HNP_SUPPORT 5 /* other RH port does */ 96#define USB_DEVICE_WUSB_DEVICE 3 /* (wireless)*/
97#define USB_DEVICE_A_HNP_SUPPORT 4 /* (otg) RH port supports HNP */
98#define USB_DEVICE_A_ALT_HNP_SUPPORT 5 /* (otg) other RH port does */
82#define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */ 99#define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */
83 100
84#define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */ 101#define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */
@@ -135,6 +152,13 @@ struct usb_ctrlrequest {
135#define USB_DT_OTG 0x09 152#define USB_DT_OTG 0x09
136#define USB_DT_DEBUG 0x0a 153#define USB_DT_DEBUG 0x0a
137#define USB_DT_INTERFACE_ASSOCIATION 0x0b 154#define USB_DT_INTERFACE_ASSOCIATION 0x0b
155/* these are from the Wireless USB spec */
156#define USB_DT_SECURITY 0x0c
157#define USB_DT_KEY 0x0d
158#define USB_DT_ENCRYPTION_TYPE 0x0e
159#define USB_DT_BOS 0x0f
160#define USB_DT_DEVICE_CAPABILITY 0x10
161#define USB_DT_WIRELESS_ENDPOINT_COMP 0x11
138 162
139/* conventional codes for class-specific descriptors */ 163/* conventional codes for class-specific descriptors */
140#define USB_DT_CS_DEVICE 0x21 164#define USB_DT_CS_DEVICE 0x21
@@ -192,6 +216,7 @@ struct usb_device_descriptor {
192#define USB_CLASS_CSCID 0x0b /* chip+ smart card */ 216#define USB_CLASS_CSCID 0x0b /* chip+ smart card */
193#define USB_CLASS_CONTENT_SEC 0x0d /* content security */ 217#define USB_CLASS_CONTENT_SEC 0x0d /* content security */
194#define USB_CLASS_VIDEO 0x0e 218#define USB_CLASS_VIDEO 0x0e
219#define USB_CLASS_WIRELESS_CONTROLLER 0xe0
195#define USB_CLASS_APP_SPEC 0xfe 220#define USB_CLASS_APP_SPEC 0xfe
196#define USB_CLASS_VENDOR_SPEC 0xff 221#define USB_CLASS_VENDOR_SPEC 0xff
197 222
@@ -223,6 +248,7 @@ struct usb_config_descriptor {
223#define USB_CONFIG_ATT_ONE (1 << 7) /* must be set */ 248#define USB_CONFIG_ATT_ONE (1 << 7) /* must be set */
224#define USB_CONFIG_ATT_SELFPOWER (1 << 6) /* self powered */ 249#define USB_CONFIG_ATT_SELFPOWER (1 << 6) /* self powered */
225#define USB_CONFIG_ATT_WAKEUP (1 << 5) /* can wakeup */ 250#define USB_CONFIG_ATT_WAKEUP (1 << 5) /* can wakeup */
251#define USB_CONFIG_ATT_BATTERY (1 << 4) /* battery powered */
226 252
227/*-------------------------------------------------------------------------*/ 253/*-------------------------------------------------------------------------*/
228 254
@@ -268,8 +294,8 @@ struct usb_endpoint_descriptor {
268 __le16 wMaxPacketSize; 294 __le16 wMaxPacketSize;
269 __u8 bInterval; 295 __u8 bInterval;
270 296
271 // NOTE: these two are _only_ in audio endpoints. 297 /* NOTE: these two are _only_ in audio endpoints. */
272 // use USB_DT_ENDPOINT*_SIZE in bLength, not sizeof. 298 /* use USB_DT_ENDPOINT*_SIZE in bLength, not sizeof. */
273 __u8 bRefresh; 299 __u8 bRefresh;
274 __u8 bSynchAddress; 300 __u8 bSynchAddress;
275} __attribute__ ((packed)); 301} __attribute__ ((packed));
@@ -289,6 +315,7 @@ struct usb_endpoint_descriptor {
289#define USB_ENDPOINT_XFER_ISOC 1 315#define USB_ENDPOINT_XFER_ISOC 1
290#define USB_ENDPOINT_XFER_BULK 2 316#define USB_ENDPOINT_XFER_BULK 2
291#define USB_ENDPOINT_XFER_INT 3 317#define USB_ENDPOINT_XFER_INT 3
318#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80
292 319
293 320
294/*-------------------------------------------------------------------------*/ 321/*-------------------------------------------------------------------------*/
@@ -352,12 +379,154 @@ struct usb_interface_assoc_descriptor {
352 379
353/*-------------------------------------------------------------------------*/ 380/*-------------------------------------------------------------------------*/
354 381
382/* USB_DT_SECURITY: group of wireless security descriptors, including
383 * encryption types available for setting up a CC/association.
384 */
385struct usb_security_descriptor {
386 __u8 bLength;
387 __u8 bDescriptorType;
388
389 __le16 wTotalLength;
390 __u8 bNumEncryptionTypes;
391};
392
393/*-------------------------------------------------------------------------*/
394
395/* USB_DT_KEY: used with {GET,SET}_SECURITY_DATA; only public keys
396 * may be retrieved.
397 */
398struct usb_key_descriptor {
399 __u8 bLength;
400 __u8 bDescriptorType;
401
402 __u8 tTKID[3];
403 __u8 bReserved;
404 __u8 bKeyData[0];
405};
406
407/*-------------------------------------------------------------------------*/
408
409/* USB_DT_ENCRYPTION_TYPE: bundled in DT_SECURITY groups */
410struct usb_encryption_descriptor {
411 __u8 bLength;
412 __u8 bDescriptorType;
413
414 __u8 bEncryptionType;
415#define USB_ENC_TYPE_UNSECURE 0
416#define USB_ENC_TYPE_WIRED 1 /* non-wireless mode */
417#define USB_ENC_TYPE_CCM_1 2 /* aes128/cbc session */
418#define USB_ENC_TYPE_RSA_1 3 /* rsa3072/sha1 auth */
419 __u8 bEncryptionValue; /* use in SET_ENCRYPTION */
420 __u8 bAuthKeyIndex;
421};
422
423
424/*-------------------------------------------------------------------------*/
425
426/* USB_DT_BOS: group of wireless capabilities */
427struct usb_bos_descriptor {
428 __u8 bLength;
429 __u8 bDescriptorType;
430
431 __le16 wTotalLength;
432 __u8 bNumDeviceCaps;
433};
434
435/*-------------------------------------------------------------------------*/
436
437/* USB_DT_DEVICE_CAPABILITY: grouped with BOS */
438struct usb_dev_cap_header {
439 __u8 bLength;
440 __u8 bDescriptorType;
441 __u8 bDevCapabilityType;
442};
443
444#define USB_CAP_TYPE_WIRELESS_USB 1
445
446struct usb_wireless_cap_descriptor { /* Ultra Wide Band */
447 __u8 bLength;
448 __u8 bDescriptorType;
449 __u8 bDevCapabilityType;
450
451 __u8 bmAttributes;
452#define USB_WIRELESS_P2P_DRD (1 << 1)
453#define USB_WIRELESS_BEACON_MASK (3 << 2)
454#define USB_WIRELESS_BEACON_SELF (1 << 2)
455#define USB_WIRELESS_BEACON_DIRECTED (2 << 2)
456#define USB_WIRELESS_BEACON_NONE (3 << 2)
457 __le16 wPHYRates; /* bit rates, Mbps */
458#define USB_WIRELESS_PHY_53 (1 << 0) /* always set */
459#define USB_WIRELESS_PHY_80 (1 << 1)
460#define USB_WIRELESS_PHY_107 (1 << 2) /* always set */
461#define USB_WIRELESS_PHY_160 (1 << 3)
462#define USB_WIRELESS_PHY_200 (1 << 4) /* always set */
463#define USB_WIRELESS_PHY_320 (1 << 5)
464#define USB_WIRELESS_PHY_400 (1 << 6)
465#define USB_WIRELESS_PHY_480 (1 << 7)
466 __u8 bmTFITXPowerInfo; /* TFI power levels */
467 __u8 bmFFITXPowerInfo; /* FFI power levels */
468 __le16 bmBandGroup;
469 __u8 bReserved;
470};
471
472/*-------------------------------------------------------------------------*/
473
474/* USB_DT_WIRELESS_ENDPOINT_COMP: companion descriptor associated with
475 * each endpoint descriptor for a wireless device
476 */
477struct usb_wireless_ep_comp_descriptor {
478 __u8 bLength;
479 __u8 bDescriptorType;
480
481 __u8 bMaxBurst;
482 __u8 bMaxSequence;
483 __le16 wMaxStreamDelay;
484 __le16 wOverTheAirPacketSize;
485 __u8 bOverTheAirInterval;
486 __u8 bmCompAttributes;
487#define USB_ENDPOINT_SWITCH_MASK 0x03 /* in bmCompAttributes */
488#define USB_ENDPOINT_SWITCH_NO 0
489#define USB_ENDPOINT_SWITCH_SWITCH 1
490#define USB_ENDPOINT_SWITCH_SCALE 2
491};
492
493/*-------------------------------------------------------------------------*/
494
495/* USB_REQ_SET_HANDSHAKE is a four-way handshake used between a wireless
496 * host and a device for connection set up, mutual authentication, and
497 * exchanging short lived session keys. The handshake depends on a CC.
498 */
499struct usb_handshake {
500 __u8 bMessageNumber;
501 __u8 bStatus;
502 __u8 tTKID[3];
503 __u8 bReserved;
504 __u8 CDID[16];
505 __u8 nonce[16];
506 __u8 MIC[8];
507};
508
509/*-------------------------------------------------------------------------*/
510
511/* USB_REQ_SET_CONNECTION modifies or revokes a connection context (CC).
512 * A CC may also be set up using non-wireless secure channels (including
513 * wired USB!), and some devices may support CCs with multiple hosts.
514 */
515struct usb_connection_context {
516 __u8 CHID[16]; /* persistent host id */
517 __u8 CDID[16]; /* device id (unique w/in host context) */
518 __u8 CK[16]; /* connection key */
519};
520
521/*-------------------------------------------------------------------------*/
522
355/* USB 2.0 defines three speeds, here's how Linux identifies them */ 523/* USB 2.0 defines three speeds, here's how Linux identifies them */
356 524
357enum usb_device_speed { 525enum usb_device_speed {
358 USB_SPEED_UNKNOWN = 0, /* enumerating */ 526 USB_SPEED_UNKNOWN = 0, /* enumerating */
359 USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */ 527 USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */
360 USB_SPEED_HIGH /* usb 2.0 */ 528 USB_SPEED_HIGH, /* usb 2.0 */
529 USB_SPEED_VARIABLE, /* wireless (usb 2.5) */
361}; 530};
362 531
363enum usb_device_state { 532enum usb_device_state {
diff --git a/include/linux/usb_gadget.h b/include/linux/usb_gadget.h
index 9bba9997947b..b00f127cb447 100644
--- a/include/linux/usb_gadget.h
+++ b/include/linux/usb_gadget.h
@@ -711,7 +711,7 @@ usb_gadget_disconnect (struct usb_gadget *gadget)
711 * the hardware level driver. Most calls must be handled by 711 * the hardware level driver. Most calls must be handled by
712 * the gadget driver, including descriptor and configuration 712 * the gadget driver, including descriptor and configuration
713 * management. The 16 bit members of the setup data are in 713 * management. The 16 bit members of the setup data are in
714 * cpu order. Called in_interrupt; this may not sleep. Driver 714 * USB byte order. Called in_interrupt; this may not sleep. Driver
715 * queues a response to ep0, or returns negative to stall. 715 * queues a response to ep0, or returns negative to stall.
716 * @disconnect: Invoked after all transfers have been stopped, 716 * @disconnect: Invoked after all transfers have been stopped,
717 * when the host is disconnected. May be called in_interrupt; this 717 * when the host is disconnected. May be called in_interrupt; this
diff --git a/include/linux/usb_isp116x.h b/include/linux/usb_isp116x.h
new file mode 100644
index 000000000000..5f5a9d9bd6c2
--- /dev/null
+++ b/include/linux/usb_isp116x.h
@@ -0,0 +1,47 @@
1
2/*
3 * Board initialization code should put one of these into dev->platform_data
4 * and place the isp116x onto platform_bus.
5 */
6
7struct isp116x_platform_data {
8 /* Enable internal resistors on downstream ports */
9 unsigned sel15Kres:1;
10 /* Chip's internal clock won't be stopped in suspended state.
11 Setting/unsetting this bit takes effect only if
12 'remote_wakeup_enable' below is not set. */
13 unsigned clknotstop:1;
14 /* On-chip overcurrent protection */
15 unsigned oc_enable:1;
16 /* INT output polarity */
17 unsigned int_act_high:1;
18 /* INT edge or level triggered */
19 unsigned int_edge_triggered:1;
20 /* WAKEUP pin connected - NOT SUPPORTED */
21 /* unsigned remote_wakeup_connected:1; */
22 /* Wakeup by devices on usb bus enabled */
23 unsigned remote_wakeup_enable:1;
24 /* Switch or not to switch (keep always powered) */
25 unsigned no_power_switching:1;
26 /* Ganged port power switching (0) or individual port
27 power switching (1) */
28 unsigned power_switching_mode:1;
29 /* Given port_power, msec/2 after power on till power good */
30 u8 potpg;
31 /* Hardware reset set/clear. If implemented, this function must:
32 if set == 0, deassert chip's HW reset pin
33 otherwise, assert chip's HW reset pin */
34 void (*reset) (struct device * dev, int set);
35 /* Hardware clock start/stop. If implemented, this function must:
36 if start == 0, stop the external clock
37 otherwise, start the external clock
38 */
39 void (*clock) (struct device * dev, int start);
40 /* Inter-io delay (ns). The chip is picky about access timings; it
41 expects at least:
42 150ns delay between consecutive accesses to DATA_REG,
43 300ns delay between access to ADDR_REG and DATA_REG
44 OE, WE MUST NOT be changed during these intervals
45 */
46 void (*delay) (struct device * dev, int delay);
47};
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index 4e0edce53760..acbfc525576d 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -221,6 +221,8 @@ struct v4l2_pix_format
221/* Vendor-specific formats */ 221/* Vendor-specific formats */
222#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W','N','V','A') /* Winnov hw compress */ 222#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W','N','V','A') /* Winnov hw compress */
223#define V4L2_PIX_FMT_SN9C10X v4l2_fourcc('S','9','1','0') /* SN9C10x compression */ 223#define V4L2_PIX_FMT_SN9C10X v4l2_fourcc('S','9','1','0') /* SN9C10x compression */
224#define V4L2_PIX_FMT_PWC1 v4l2_fourcc('P','W','C','1') /* pwc older webcam */
225#define V4L2_PIX_FMT_PWC2 v4l2_fourcc('P','W','C','2') /* pwc newer webcam */
224 226
225/* 227/*
226 * F O R M A T E N U M E R A T I O N 228 * F O R M A T E N U M E R A T I O N
diff --git a/include/linux/writeback.h b/include/linux/writeback.h
index 1262cb43c3ab..542dbaee6512 100644
--- a/include/linux/writeback.h
+++ b/include/linux/writeback.h
@@ -14,11 +14,13 @@ extern struct list_head inode_unused;
14 * Yes, writeback.h requires sched.h 14 * Yes, writeback.h requires sched.h
15 * No, sched.h is not included from here. 15 * No, sched.h is not included from here.
16 */ 16 */
17static inline int current_is_pdflush(void) 17static inline int task_is_pdflush(struct task_struct *task)
18{ 18{
19 return current->flags & PF_FLUSHER; 19 return task->flags & PF_FLUSHER;
20} 20}
21 21
22#define current_is_pdflush() task_is_pdflush(current)
23
22/* 24/*
23 * fs/fs-writeback.c 25 * fs/fs-writeback.c
24 */ 26 */
@@ -83,7 +85,7 @@ static inline void wait_on_inode(struct inode *inode)
83/* 85/*
84 * mm/page-writeback.c 86 * mm/page-writeback.c
85 */ 87 */
86int wakeup_bdflush(long nr_pages); 88int wakeup_pdflush(long nr_pages);
87void laptop_io_completion(void); 89void laptop_io_completion(void);
88void laptop_sync_completion(void); 90void laptop_sync_completion(void);
89void throttle_vm_writeout(void); 91void throttle_vm_writeout(void);
diff --git a/include/linux/xattr_acl.h b/include/linux/xattr_acl.h
deleted file mode 100644
index 7a1f9b93a45f..000000000000
--- a/include/linux/xattr_acl.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/*
2 File: linux/xattr_acl.h
3
4 (extended attribute representation of access control lists)
5
6 (C) 2000 Andreas Gruenbacher, <a.gruenbacher@computer.org>
7*/
8
9#ifndef _LINUX_XATTR_ACL_H
10#define _LINUX_XATTR_ACL_H
11
12#include <linux/posix_acl.h>
13
14#define XATTR_NAME_ACL_ACCESS "system.posix_acl_access"
15#define XATTR_NAME_ACL_DEFAULT "system.posix_acl_default"
16
17#define XATTR_ACL_VERSION 0x0002
18
19typedef struct {
20 __u16 e_tag;
21 __u16 e_perm;
22 __u32 e_id;
23} xattr_acl_entry;
24
25typedef struct {
26 __u32 a_version;
27 xattr_acl_entry a_entries[0];
28} xattr_acl_header;
29
30static inline size_t xattr_acl_size(int count)
31{
32 return sizeof(xattr_acl_header) + count * sizeof(xattr_acl_entry);
33}
34
35static inline int xattr_acl_count(size_t size)
36{
37 if (size < sizeof(xattr_acl_header))
38 return -1;
39 size -= sizeof(xattr_acl_header);
40 if (size % sizeof(xattr_acl_entry))
41 return -1;
42 return size / sizeof(xattr_acl_entry);
43}
44
45struct posix_acl * posix_acl_from_xattr(const void *value, size_t size);
46int posix_acl_to_xattr(const struct posix_acl *acl, void *buffer, size_t size);
47
48
49
50#endif /* _LINUX_XATTR_ACL_H */
diff --git a/include/media/tuner.h b/include/media/tuner.h
index 2dd8310901e8..4794c5632360 100644
--- a/include/media/tuner.h
+++ b/include/media/tuner.h
@@ -1,5 +1,6 @@
1 1
2/* 2/* $Id: tuner.h,v 1.33 2005/06/21 14:58:08 mkrufky Exp $
3 *
3 tuner.h - definition for different tuners 4 tuner.h - definition for different tuners
4 5
5 Copyright (C) 1997 Markus Schroeder (schroedm@uni-duesseldorf.de) 6 Copyright (C) 1997 Markus Schroeder (schroedm@uni-duesseldorf.de)
@@ -23,6 +24,8 @@
23#ifndef _TUNER_H 24#ifndef _TUNER_H
24#define _TUNER_H 25#define _TUNER_H
25 26
27#include <linux/videodev2.h>
28
26#include "id.h" 29#include "id.h"
27 30
28#define ADDR_UNSET (255) 31#define ADDR_UNSET (255)
@@ -88,7 +91,7 @@
88#define TUNER_LG_NTSC_TAPE 47 91#define TUNER_LG_NTSC_TAPE 47
89 92
90#define TUNER_TNF_8831BGFF 48 93#define TUNER_TNF_8831BGFF 48
91#define TUNER_MICROTUNE_4042FI5 49 /* FusionHDTV 3 Gold - 4042 FI5 (3X 8147) */ 94#define TUNER_MICROTUNE_4042FI5 49 /* DViCO FusionHDTV 3 Gold-Q - 4042 FI5 (3X 8147) */
92#define TUNER_TCL_2002N 50 95#define TUNER_TCL_2002N 50
93#define TUNER_PHILIPS_FM1256_IH3 51 96#define TUNER_PHILIPS_FM1256_IH3 51
94 97
@@ -98,18 +101,18 @@
98#define TUNER_LG_PAL_TAPE 55 /* Hauppauge PVR-150 PAL */ 101#define TUNER_LG_PAL_TAPE 55 /* Hauppauge PVR-150 PAL */
99 102
100#define TUNER_PHILIPS_FQ1216AME_MK4 56 /* Hauppauge PVR-150 PAL */ 103#define TUNER_PHILIPS_FQ1216AME_MK4 56 /* Hauppauge PVR-150 PAL */
101#define TUNER_PHILIPS_FQ1236A_MK4 57 /* Hauppauge PVR-500MCE NTSC */ 104#define TUNER_PHILIPS_FQ1236A_MK4 57 /* Hauppauge PVR-500MCE NTSC */
102 105
103#define TUNER_YMEC_TVF_8531MF 58 106#define TUNER_YMEC_TVF_8531MF 58
104#define TUNER_YMEC_TVF_5533MF 59 /* Pixelview Pro Ultra NTSC */ 107#define TUNER_YMEC_TVF_5533MF 59 /* Pixelview Pro Ultra NTSC */
105#define TUNER_THOMSON_DTT7611 60 108#define TUNER_THOMSON_DTT7611 60 /* DViCO FusionHDTV 3 Gold-T */
106#define TUNER_TENA_9533_DI 61 109#define TUNER_TENA_9533_DI 61
110
107#define TUNER_TEA5767 62 /* Only FM Radio Tuner */ 111#define TUNER_TEA5767 62 /* Only FM Radio Tuner */
112#define TUNER_PHILIPS_FMD1216ME_MK3 63
108 113
109#define TEA5767_TUNER_NAME "Philips TEA5767HN FM Radio" 114#define TEA5767_TUNER_NAME "Philips TEA5767HN FM Radio"
110 115
111#define TUNER_THOMSON_DTT7611 60
112
113#define NOTUNER 0 116#define NOTUNER 0
114#define PAL 1 /* PAL_BG */ 117#define PAL 1 /* PAL_BG */
115#define PAL_I 2 118#define PAL_I 2
@@ -194,11 +197,15 @@ struct tuner {
194 unsigned char i2c_easy_mode[2]; 197 unsigned char i2c_easy_mode[2];
195 unsigned char i2c_set_freq[8]; 198 unsigned char i2c_set_freq[8];
196 199
200 /* used to keep track of audmode */
201 unsigned int audmode;
202
197 /* function ptrs */ 203 /* function ptrs */
198 void (*tv_freq)(struct i2c_client *c, unsigned int freq); 204 void (*tv_freq)(struct i2c_client *c, unsigned int freq);
199 void (*radio_freq)(struct i2c_client *c, unsigned int freq); 205 void (*radio_freq)(struct i2c_client *c, unsigned int freq);
200 int (*has_signal)(struct i2c_client *c); 206 int (*has_signal)(struct i2c_client *c);
201 int (*is_stereo)(struct i2c_client *c); 207 int (*is_stereo)(struct i2c_client *c);
208 int (*set_tuner)(struct i2c_client *c, struct v4l2_tuner *v);
202}; 209};
203 210
204extern unsigned int tuner_debug; 211extern unsigned int tuner_debug;
@@ -206,6 +213,7 @@ extern unsigned const int tuner_count;
206 213
207extern int microtune_init(struct i2c_client *c); 214extern int microtune_init(struct i2c_client *c);
208extern int tda8290_init(struct i2c_client *c); 215extern int tda8290_init(struct i2c_client *c);
216extern int tea5767_tuner_init(struct i2c_client *c);
209extern int default_tuner_init(struct i2c_client *c); 217extern int default_tuner_init(struct i2c_client *c);
210 218
211#define tuner_warn(fmt, arg...) \ 219#define tuner_warn(fmt, arg...) \
diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h
new file mode 100644
index 000000000000..db09580ad14b
--- /dev/null
+++ b/include/net/ieee80211.h
@@ -0,0 +1,856 @@
1/*
2 * Merged with mainline ieee80211.h in Aug 2004. Original ieee802_11
3 * remains copyright by the original authors
4 *
5 * Portions of the merged code are based on Host AP (software wireless
6 * LAN access point) driver for Intersil Prism2/2.5/3.
7 *
8 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
9 * <jkmaline@cc.hut.fi>
10 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
11 *
12 * Adaption to a generic IEEE 802.11 stack by James Ketrenos
13 * <jketreno@linux.intel.com>
14 * Copyright (c) 2004, Intel Corporation
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation. See README and COPYING for
19 * more details.
20 */
21#ifndef IEEE80211_H
22#define IEEE80211_H
23
24#include <linux/if_ether.h> /* ETH_ALEN */
25#include <linux/kernel.h> /* ARRAY_SIZE */
26
27#if WIRELESS_EXT < 17
28#define IW_QUAL_QUAL_INVALID 0x10
29#define IW_QUAL_LEVEL_INVALID 0x20
30#define IW_QUAL_NOISE_INVALID 0x40
31#define IW_QUAL_QUAL_UPDATED 0x1
32#define IW_QUAL_LEVEL_UPDATED 0x2
33#define IW_QUAL_NOISE_UPDATED 0x4
34#endif
35
36#define IEEE80211_DATA_LEN 2304
37/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
38 6.2.1.1.2.
39
40 The figure in section 7.1.2 suggests a body size of up to 2312
41 bytes is allowed, which is a bit confusing, I suspect this
42 represents the 2304 bytes of real data, plus a possible 8 bytes of
43 WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
44
45
46#define IEEE80211_HLEN 30
47#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
48
49struct ieee80211_hdr {
50 u16 frame_ctl;
51 u16 duration_id;
52 u8 addr1[ETH_ALEN];
53 u8 addr2[ETH_ALEN];
54 u8 addr3[ETH_ALEN];
55 u16 seq_ctl;
56 u8 addr4[ETH_ALEN];
57} __attribute__ ((packed));
58
59struct ieee80211_hdr_3addr {
60 u16 frame_ctl;
61 u16 duration_id;
62 u8 addr1[ETH_ALEN];
63 u8 addr2[ETH_ALEN];
64 u8 addr3[ETH_ALEN];
65 u16 seq_ctl;
66} __attribute__ ((packed));
67
68enum eap_type {
69 EAP_PACKET = 0,
70 EAPOL_START,
71 EAPOL_LOGOFF,
72 EAPOL_KEY,
73 EAPOL_ENCAP_ASF_ALERT
74};
75
76static const char *eap_types[] = {
77 [EAP_PACKET] = "EAP-Packet",
78 [EAPOL_START] = "EAPOL-Start",
79 [EAPOL_LOGOFF] = "EAPOL-Logoff",
80 [EAPOL_KEY] = "EAPOL-Key",
81 [EAPOL_ENCAP_ASF_ALERT] = "EAPOL-Encap-ASF-Alert"
82};
83
84static inline const char *eap_get_type(int type)
85{
86 return (type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
87}
88
89struct eapol {
90 u8 snap[6];
91 u16 ethertype;
92 u8 version;
93 u8 type;
94 u16 length;
95} __attribute__ ((packed));
96
97#define IEEE80211_1ADDR_LEN 10
98#define IEEE80211_2ADDR_LEN 16
99#define IEEE80211_3ADDR_LEN 24
100#define IEEE80211_4ADDR_LEN 30
101#define IEEE80211_FCS_LEN 4
102
103#define MIN_FRAG_THRESHOLD 256U
104#define MAX_FRAG_THRESHOLD 2346U
105
106/* Frame control field constants */
107#define IEEE80211_FCTL_VERS 0x0002
108#define IEEE80211_FCTL_FTYPE 0x000c
109#define IEEE80211_FCTL_STYPE 0x00f0
110#define IEEE80211_FCTL_TODS 0x0100
111#define IEEE80211_FCTL_FROMDS 0x0200
112#define IEEE80211_FCTL_MOREFRAGS 0x0400
113#define IEEE80211_FCTL_RETRY 0x0800
114#define IEEE80211_FCTL_PM 0x1000
115#define IEEE80211_FCTL_MOREDATA 0x2000
116#define IEEE80211_FCTL_WEP 0x4000
117#define IEEE80211_FCTL_ORDER 0x8000
118
119#define IEEE80211_FTYPE_MGMT 0x0000
120#define IEEE80211_FTYPE_CTL 0x0004
121#define IEEE80211_FTYPE_DATA 0x0008
122
123/* management */
124#define IEEE80211_STYPE_ASSOC_REQ 0x0000
125#define IEEE80211_STYPE_ASSOC_RESP 0x0010
126#define IEEE80211_STYPE_REASSOC_REQ 0x0020
127#define IEEE80211_STYPE_REASSOC_RESP 0x0030
128#define IEEE80211_STYPE_PROBE_REQ 0x0040
129#define IEEE80211_STYPE_PROBE_RESP 0x0050
130#define IEEE80211_STYPE_BEACON 0x0080
131#define IEEE80211_STYPE_ATIM 0x0090
132#define IEEE80211_STYPE_DISASSOC 0x00A0
133#define IEEE80211_STYPE_AUTH 0x00B0
134#define IEEE80211_STYPE_DEAUTH 0x00C0
135
136/* control */
137#define IEEE80211_STYPE_PSPOLL 0x00A0
138#define IEEE80211_STYPE_RTS 0x00B0
139#define IEEE80211_STYPE_CTS 0x00C0
140#define IEEE80211_STYPE_ACK 0x00D0
141#define IEEE80211_STYPE_CFEND 0x00E0
142#define IEEE80211_STYPE_CFENDACK 0x00F0
143
144/* data */
145#define IEEE80211_STYPE_DATA 0x0000
146#define IEEE80211_STYPE_DATA_CFACK 0x0010
147#define IEEE80211_STYPE_DATA_CFPOLL 0x0020
148#define IEEE80211_STYPE_DATA_CFACKPOLL 0x0030
149#define IEEE80211_STYPE_NULLFUNC 0x0040
150#define IEEE80211_STYPE_CFACK 0x0050
151#define IEEE80211_STYPE_CFPOLL 0x0060
152#define IEEE80211_STYPE_CFACKPOLL 0x0070
153
154#define IEEE80211_SCTL_FRAG 0x000F
155#define IEEE80211_SCTL_SEQ 0xFFF0
156
157
158/* debug macros */
159
160#ifdef CONFIG_IEEE80211_DEBUG
161extern u32 ieee80211_debug_level;
162#define IEEE80211_DEBUG(level, fmt, args...) \
163do { if (ieee80211_debug_level & (level)) \
164 printk(KERN_DEBUG "ieee80211: %c %s " fmt, \
165 in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0)
166#else
167#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
168#endif /* CONFIG_IEEE80211_DEBUG */
169
170/*
171 * To use the debug system;
172 *
173 * If you are defining a new debug classification, simply add it to the #define
174 * list here in the form of:
175 *
176 * #define IEEE80211_DL_xxxx VALUE
177 *
178 * shifting value to the left one bit from the previous entry. xxxx should be
179 * the name of the classification (for example, WEP)
180 *
181 * You then need to either add a IEEE80211_xxxx_DEBUG() macro definition for your
182 * classification, or use IEEE80211_DEBUG(IEEE80211_DL_xxxx, ...) whenever you want
183 * to send output to that classification.
184 *
185 * To add your debug level to the list of levels seen when you perform
186 *
187 * % cat /proc/net/ipw/debug_level
188 *
189 * you simply need to add your entry to the ipw_debug_levels array.
190 *
191 * If you do not see debug_level in /proc/net/ipw then you do not have
192 * CONFIG_IEEE80211_DEBUG defined in your kernel configuration
193 *
194 */
195
196#define IEEE80211_DL_INFO (1<<0)
197#define IEEE80211_DL_WX (1<<1)
198#define IEEE80211_DL_SCAN (1<<2)
199#define IEEE80211_DL_STATE (1<<3)
200#define IEEE80211_DL_MGMT (1<<4)
201#define IEEE80211_DL_FRAG (1<<5)
202#define IEEE80211_DL_EAP (1<<6)
203#define IEEE80211_DL_DROP (1<<7)
204
205#define IEEE80211_DL_TX (1<<8)
206#define IEEE80211_DL_RX (1<<9)
207
208#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a)
209#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a)
210#define IEEE80211_DEBUG_INFO(f, a...) IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a)
211
212#define IEEE80211_DEBUG_WX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_WX, f, ## a)
213#define IEEE80211_DEBUG_SCAN(f, a...) IEEE80211_DEBUG(IEEE80211_DL_SCAN, f, ## a)
214#define IEEE80211_DEBUG_STATE(f, a...) IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a)
215#define IEEE80211_DEBUG_MGMT(f, a...) IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a)
216#define IEEE80211_DEBUG_FRAG(f, a...) IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a)
217#define IEEE80211_DEBUG_EAP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_EAP, f, ## a)
218#define IEEE80211_DEBUG_DROP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a)
219#define IEEE80211_DEBUG_TX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a)
220#define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
221#include <linux/netdevice.h>
222#include <linux/wireless.h>
223#include <linux/if_arp.h> /* ARPHRD_ETHER */
224
225#ifndef WIRELESS_SPY
226#define WIRELESS_SPY // enable iwspy support
227#endif
228#include <net/iw_handler.h> // new driver API
229
230#ifndef ETH_P_PAE
231#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
232#endif /* ETH_P_PAE */
233
234#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
235
236#ifndef ETH_P_80211_RAW
237#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
238#endif
239
240/* IEEE 802.11 defines */
241
242#define P80211_OUI_LEN 3
243
244struct ieee80211_snap_hdr {
245
246 u8 dsap; /* always 0xAA */
247 u8 ssap; /* always 0xAA */
248 u8 ctrl; /* always 0x03 */
249 u8 oui[P80211_OUI_LEN]; /* organizational universal id */
250
251} __attribute__ ((packed));
252
253#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
254
255#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
256#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
257
258#define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG)
259#define WLAN_GET_SEQ_SEQ(seq) ((seq) & IEEE80211_SCTL_SEQ)
260
261/* Authentication algorithms */
262#define WLAN_AUTH_OPEN 0
263#define WLAN_AUTH_SHARED_KEY 1
264
265#define WLAN_AUTH_CHALLENGE_LEN 128
266
267#define WLAN_CAPABILITY_BSS (1<<0)
268#define WLAN_CAPABILITY_IBSS (1<<1)
269#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
270#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
271#define WLAN_CAPABILITY_PRIVACY (1<<4)
272#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
273#define WLAN_CAPABILITY_PBCC (1<<6)
274#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
275
276/* Status codes */
277#define WLAN_STATUS_SUCCESS 0
278#define WLAN_STATUS_UNSPECIFIED_FAILURE 1
279#define WLAN_STATUS_CAPS_UNSUPPORTED 10
280#define WLAN_STATUS_REASSOC_NO_ASSOC 11
281#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12
282#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13
283#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14
284#define WLAN_STATUS_CHALLENGE_FAIL 15
285#define WLAN_STATUS_AUTH_TIMEOUT 16
286#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17
287#define WLAN_STATUS_ASSOC_DENIED_RATES 18
288/* 802.11b */
289#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19
290#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20
291#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21
292
293/* Reason codes */
294#define WLAN_REASON_UNSPECIFIED 1
295#define WLAN_REASON_PREV_AUTH_NOT_VALID 2
296#define WLAN_REASON_DEAUTH_LEAVING 3
297#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4
298#define WLAN_REASON_DISASSOC_AP_BUSY 5
299#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6
300#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7
301#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8
302#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9
303
304
305#define IEEE80211_STATMASK_SIGNAL (1<<0)
306#define IEEE80211_STATMASK_RSSI (1<<1)
307#define IEEE80211_STATMASK_NOISE (1<<2)
308#define IEEE80211_STATMASK_RATE (1<<3)
309#define IEEE80211_STATMASK_WEMASK 0x7
310
311
312#define IEEE80211_CCK_MODULATION (1<<0)
313#define IEEE80211_OFDM_MODULATION (1<<1)
314
315#define IEEE80211_24GHZ_BAND (1<<0)
316#define IEEE80211_52GHZ_BAND (1<<1)
317
318#define IEEE80211_CCK_RATE_1MB 0x02
319#define IEEE80211_CCK_RATE_2MB 0x04
320#define IEEE80211_CCK_RATE_5MB 0x0B
321#define IEEE80211_CCK_RATE_11MB 0x16
322#define IEEE80211_OFDM_RATE_6MB 0x0C
323#define IEEE80211_OFDM_RATE_9MB 0x12
324#define IEEE80211_OFDM_RATE_12MB 0x18
325#define IEEE80211_OFDM_RATE_18MB 0x24
326#define IEEE80211_OFDM_RATE_24MB 0x30
327#define IEEE80211_OFDM_RATE_36MB 0x48
328#define IEEE80211_OFDM_RATE_48MB 0x60
329#define IEEE80211_OFDM_RATE_54MB 0x6C
330#define IEEE80211_BASIC_RATE_MASK 0x80
331
332#define IEEE80211_CCK_RATE_1MB_MASK (1<<0)
333#define IEEE80211_CCK_RATE_2MB_MASK (1<<1)
334#define IEEE80211_CCK_RATE_5MB_MASK (1<<2)
335#define IEEE80211_CCK_RATE_11MB_MASK (1<<3)
336#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4)
337#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5)
338#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6)
339#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7)
340#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8)
341#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9)
342#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10)
343#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11)
344
345#define IEEE80211_CCK_RATES_MASK 0x0000000F
346#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \
347 IEEE80211_CCK_RATE_2MB_MASK)
348#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \
349 IEEE80211_CCK_RATE_5MB_MASK | \
350 IEEE80211_CCK_RATE_11MB_MASK)
351
352#define IEEE80211_OFDM_RATES_MASK 0x00000FF0
353#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \
354 IEEE80211_OFDM_RATE_12MB_MASK | \
355 IEEE80211_OFDM_RATE_24MB_MASK)
356#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \
357 IEEE80211_OFDM_RATE_9MB_MASK | \
358 IEEE80211_OFDM_RATE_18MB_MASK | \
359 IEEE80211_OFDM_RATE_36MB_MASK | \
360 IEEE80211_OFDM_RATE_48MB_MASK | \
361 IEEE80211_OFDM_RATE_54MB_MASK)
362#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
363 IEEE80211_CCK_DEFAULT_RATES_MASK)
364
365#define IEEE80211_NUM_OFDM_RATES 8
366#define IEEE80211_NUM_CCK_RATES 4
367#define IEEE80211_OFDM_SHIFT_MASK_A 4
368
369
370
371
372/* NOTE: This data is for statistical purposes; not all hardware provides this
373 * information for frames received. Not setting these will not cause
374 * any adverse affects. */
375struct ieee80211_rx_stats {
376 u32 mac_time;
377 s8 rssi;
378 u8 signal;
379 u8 noise;
380 u16 rate; /* in 100 kbps */
381 u8 received_channel;
382 u8 control;
383 u8 mask;
384 u8 freq;
385 u16 len;
386};
387
388/* IEEE 802.11 requires that STA supports concurrent reception of at least
389 * three fragmented frames. This define can be increased to support more
390 * concurrent frames, but it should be noted that each entry can consume about
391 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
392#define IEEE80211_FRAG_CACHE_LEN 4
393
394struct ieee80211_frag_entry {
395 unsigned long first_frag_time;
396 unsigned int seq;
397 unsigned int last_frag;
398 struct sk_buff *skb;
399 u8 src_addr[ETH_ALEN];
400 u8 dst_addr[ETH_ALEN];
401};
402
403struct ieee80211_stats {
404 unsigned int tx_unicast_frames;
405 unsigned int tx_multicast_frames;
406 unsigned int tx_fragments;
407 unsigned int tx_unicast_octets;
408 unsigned int tx_multicast_octets;
409 unsigned int tx_deferred_transmissions;
410 unsigned int tx_single_retry_frames;
411 unsigned int tx_multiple_retry_frames;
412 unsigned int tx_retry_limit_exceeded;
413 unsigned int tx_discards;
414 unsigned int rx_unicast_frames;
415 unsigned int rx_multicast_frames;
416 unsigned int rx_fragments;
417 unsigned int rx_unicast_octets;
418 unsigned int rx_multicast_octets;
419 unsigned int rx_fcs_errors;
420 unsigned int rx_discards_no_buffer;
421 unsigned int tx_discards_wrong_sa;
422 unsigned int rx_discards_undecryptable;
423 unsigned int rx_message_in_msg_fragments;
424 unsigned int rx_message_in_bad_msg_fragments;
425};
426
427struct ieee80211_device;
428
429#if 0 /* for later */
430#include "ieee80211_crypt.h"
431#endif
432
433#define SEC_KEY_1 (1<<0)
434#define SEC_KEY_2 (1<<1)
435#define SEC_KEY_3 (1<<2)
436#define SEC_KEY_4 (1<<3)
437#define SEC_ACTIVE_KEY (1<<4)
438#define SEC_AUTH_MODE (1<<5)
439#define SEC_UNICAST_GROUP (1<<6)
440#define SEC_LEVEL (1<<7)
441#define SEC_ENABLED (1<<8)
442
443#define SEC_LEVEL_0 0 /* None */
444#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */
445#define SEC_LEVEL_2 2 /* Level 1 + TKIP */
446#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
447#define SEC_LEVEL_3 4 /* Level 2 + CCMP */
448
449#define WEP_KEYS 4
450#define WEP_KEY_LEN 13
451
452struct ieee80211_security {
453 u16 active_key:2,
454 enabled:1,
455 auth_mode:2,
456 auth_algo:4,
457 unicast_uses_group:1;
458 u8 key_sizes[WEP_KEYS];
459 u8 keys[WEP_KEYS][WEP_KEY_LEN];
460 u8 level;
461 u16 flags;
462} __attribute__ ((packed));
463
464
465/*
466
467 802.11 data frame from AP
468
469 ,-------------------------------------------------------------------.
470Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
471 |------|------|---------|---------|---------|------|---------|------|
472Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
473 | | tion | (BSSID) | | | ence | data | |
474 `-------------------------------------------------------------------'
475
476Total: 28-2340 bytes
477
478*/
479
480#define BEACON_PROBE_SSID_ID_POSITION 12
481
482/* Management Frame Information Element Types */
483#define MFIE_TYPE_SSID 0
484#define MFIE_TYPE_RATES 1
485#define MFIE_TYPE_FH_SET 2
486#define MFIE_TYPE_DS_SET 3
487#define MFIE_TYPE_CF_SET 4
488#define MFIE_TYPE_TIM 5
489#define MFIE_TYPE_IBSS_SET 6
490#define MFIE_TYPE_CHALLENGE 16
491#define MFIE_TYPE_RSN 48
492#define MFIE_TYPE_RATES_EX 50
493#define MFIE_TYPE_GENERIC 221
494
495struct ieee80211_info_element_hdr {
496 u8 id;
497 u8 len;
498} __attribute__ ((packed));
499
500struct ieee80211_info_element {
501 u8 id;
502 u8 len;
503 u8 data[0];
504} __attribute__ ((packed));
505
506/*
507 * These are the data types that can make up management packets
508 *
509 u16 auth_algorithm;
510 u16 auth_sequence;
511 u16 beacon_interval;
512 u16 capability;
513 u8 current_ap[ETH_ALEN];
514 u16 listen_interval;
515 struct {
516 u16 association_id:14, reserved:2;
517 } __attribute__ ((packed));
518 u32 time_stamp[2];
519 u16 reason;
520 u16 status;
521*/
522
523struct ieee80211_authentication {
524 struct ieee80211_hdr_3addr header;
525 u16 algorithm;
526 u16 transaction;
527 u16 status;
528 struct ieee80211_info_element info_element;
529} __attribute__ ((packed));
530
531
532struct ieee80211_probe_response {
533 struct ieee80211_hdr_3addr header;
534 u32 time_stamp[2];
535 u16 beacon_interval;
536 u16 capability;
537 struct ieee80211_info_element info_element;
538} __attribute__ ((packed));
539
540struct ieee80211_assoc_request_frame {
541 u16 capability;
542 u16 listen_interval;
543 u8 current_ap[ETH_ALEN];
544 struct ieee80211_info_element info_element;
545} __attribute__ ((packed));
546
547struct ieee80211_assoc_response_frame {
548 struct ieee80211_hdr_3addr header;
549 u16 capability;
550 u16 status;
551 u16 aid;
552 struct ieee80211_info_element info_element; /* supported rates */
553} __attribute__ ((packed));
554
555
556struct ieee80211_txb {
557 u8 nr_frags;
558 u8 encrypted;
559 u16 reserved;
560 u16 frag_size;
561 u16 payload_size;
562 struct sk_buff *fragments[0];
563};
564
565
566/* SWEEP TABLE ENTRIES NUMBER*/
567#define MAX_SWEEP_TAB_ENTRIES 42
568#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
569/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
570 * only use 8, and then use extended rates for the remaining supported
571 * rates. Other APs, however, stick all of their supported rates on the
572 * main rates information element... */
573#define MAX_RATES_LENGTH ((u8)12)
574#define MAX_RATES_EX_LENGTH ((u8)16)
575#define MAX_NETWORK_COUNT 128
576
577#define CRC_LENGTH 4U
578
579#define MAX_WPA_IE_LEN 64
580
581#define NETWORK_EMPTY_ESSID (1<<0)
582#define NETWORK_HAS_OFDM (1<<1)
583#define NETWORK_HAS_CCK (1<<2)
584
585struct ieee80211_network {
586 /* These entries are used to identify a unique network */
587 u8 bssid[ETH_ALEN];
588 u8 channel;
589 /* Ensure null-terminated for any debug msgs */
590 u8 ssid[IW_ESSID_MAX_SIZE + 1];
591 u8 ssid_len;
592
593 /* These are network statistics */
594 struct ieee80211_rx_stats stats;
595 u16 capability;
596 u8 rates[MAX_RATES_LENGTH];
597 u8 rates_len;
598 u8 rates_ex[MAX_RATES_EX_LENGTH];
599 u8 rates_ex_len;
600 unsigned long last_scanned;
601 u8 mode;
602 u8 flags;
603 u32 last_associate;
604 u32 time_stamp[2];
605 u16 beacon_interval;
606 u16 listen_interval;
607 u16 atim_window;
608 u8 wpa_ie[MAX_WPA_IE_LEN];
609 size_t wpa_ie_len;
610 u8 rsn_ie[MAX_WPA_IE_LEN];
611 size_t rsn_ie_len;
612 struct list_head list;
613};
614
615enum ieee80211_state {
616 IEEE80211_UNINITIALIZED = 0,
617 IEEE80211_INITIALIZED,
618 IEEE80211_ASSOCIATING,
619 IEEE80211_ASSOCIATED,
620 IEEE80211_AUTHENTICATING,
621 IEEE80211_AUTHENTICATED,
622 IEEE80211_SHUTDOWN
623};
624
625#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
626#define DEFAULT_FTS 2346
627#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
628#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
629
630
631#define CFG_IEEE80211_RESERVE_FCS (1<<0)
632#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
633
634struct ieee80211_device {
635 struct net_device *dev;
636
637 /* Bookkeeping structures */
638 struct net_device_stats stats;
639 struct ieee80211_stats ieee_stats;
640
641 /* Probe / Beacon management */
642 struct list_head network_free_list;
643 struct list_head network_list;
644 struct ieee80211_network *networks;
645 int scans;
646 int scan_age;
647
648 int iw_mode; /* operating mode (IW_MODE_*) */
649
650 spinlock_t lock;
651
652 int tx_headroom; /* Set to size of any additional room needed at front
653 * of allocated Tx SKBs */
654 u32 config;
655
656 /* WEP and other encryption related settings at the device level */
657 int open_wep; /* Set to 1 to allow unencrypted frames */
658
659 int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
660 * WEP key changes */
661
662 /* If the host performs {en,de}cryption, then set to 1 */
663 int host_encrypt;
664 int host_decrypt;
665 int ieee802_1x; /* is IEEE 802.1X used */
666
667 /* WPA data */
668 int wpa_enabled;
669 int drop_unencrypted;
670 int tkip_countermeasures;
671 int privacy_invoked;
672 size_t wpa_ie_len;
673 u8 *wpa_ie;
674
675 struct list_head crypt_deinit_list;
676 struct ieee80211_crypt_data *crypt[WEP_KEYS];
677 int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
678 struct timer_list crypt_deinit_timer;
679
680 int bcrx_sta_key; /* use individual keys to override default keys even
681 * with RX of broad/multicast frames */
682
683 /* Fragmentation structures */
684 struct ieee80211_frag_entry frag_cache[IEEE80211_FRAG_CACHE_LEN];
685 unsigned int frag_next_idx;
686 u16 fts; /* Fragmentation Threshold */
687
688 /* Association info */
689 u8 bssid[ETH_ALEN];
690
691 enum ieee80211_state state;
692
693 int mode; /* A, B, G */
694 int modulation; /* CCK, OFDM */
695 int freq_band; /* 2.4Ghz, 5.2Ghz, Mixed */
696 int abg_ture; /* ABG flag */
697
698 /* Callback functions */
699 void (*set_security)(struct net_device *dev,
700 struct ieee80211_security *sec);
701 int (*hard_start_xmit)(struct ieee80211_txb *txb,
702 struct net_device *dev);
703 int (*reset_port)(struct net_device *dev);
704
705 /* This must be the last item so that it points to the data
706 * allocated beyond this structure by alloc_ieee80211 */
707 u8 priv[0];
708};
709
710#define IEEE_A (1<<0)
711#define IEEE_B (1<<1)
712#define IEEE_G (1<<2)
713#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
714
715extern inline void *ieee80211_priv(struct net_device *dev)
716{
717 return ((struct ieee80211_device *)netdev_priv(dev))->priv;
718}
719
720extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
721{
722 /* Single white space is for Linksys APs */
723 if (essid_len == 1 && essid[0] == ' ')
724 return 1;
725
726 /* Otherwise, if the entire essid is 0, we assume it is hidden */
727 while (essid_len) {
728 essid_len--;
729 if (essid[essid_len] != '\0')
730 return 0;
731 }
732
733 return 1;
734}
735
736extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)
737{
738 /*
739 * It is possible for both access points and our device to support
740 * combinations of modes, so as long as there is one valid combination
741 * of ap/device supported modes, then return success
742 *
743 */
744 if ((mode & IEEE_A) &&
745 (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
746 (ieee->freq_band & IEEE80211_52GHZ_BAND))
747 return 1;
748
749 if ((mode & IEEE_G) &&
750 (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
751 (ieee->freq_band & IEEE80211_24GHZ_BAND))
752 return 1;
753
754 if ((mode & IEEE_B) &&
755 (ieee->modulation & IEEE80211_CCK_MODULATION) &&
756 (ieee->freq_band & IEEE80211_24GHZ_BAND))
757 return 1;
758
759 return 0;
760}
761
762extern inline int ieee80211_get_hdrlen(u16 fc)
763{
764 int hdrlen = IEEE80211_3ADDR_LEN;
765
766 switch (WLAN_FC_GET_TYPE(fc)) {
767 case IEEE80211_FTYPE_DATA:
768 if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
769 hdrlen = IEEE80211_4ADDR_LEN;
770 break;
771 case IEEE80211_FTYPE_CTL:
772 switch (WLAN_FC_GET_STYPE(fc)) {
773 case IEEE80211_STYPE_CTS:
774 case IEEE80211_STYPE_ACK:
775 hdrlen = IEEE80211_1ADDR_LEN;
776 break;
777 default:
778 hdrlen = IEEE80211_2ADDR_LEN;
779 break;
780 }
781 break;
782 }
783
784 return hdrlen;
785}
786
787
788
789/* ieee80211.c */
790extern void free_ieee80211(struct net_device *dev);
791extern struct net_device *alloc_ieee80211(int sizeof_priv);
792
793extern int ieee80211_set_encryption(struct ieee80211_device *ieee);
794
795/* ieee80211_tx.c */
796
797
798extern int ieee80211_xmit(struct sk_buff *skb,
799 struct net_device *dev);
800extern void ieee80211_txb_free(struct ieee80211_txb *);
801
802
803/* ieee80211_rx.c */
804extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
805 struct ieee80211_rx_stats *rx_stats);
806extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
807 struct ieee80211_hdr *header,
808 struct ieee80211_rx_stats *stats);
809
810/* iee80211_wx.c */
811extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
812 struct iw_request_info *info,
813 union iwreq_data *wrqu, char *key);
814extern int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
815 struct iw_request_info *info,
816 union iwreq_data *wrqu, char *key);
817extern int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
818 struct iw_request_info *info,
819 union iwreq_data *wrqu, char *key);
820
821
822extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
823{
824 ieee->scans++;
825}
826
827extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
828{
829 return ieee->scans;
830}
831
832static inline const char *escape_essid(const char *essid, u8 essid_len) {
833 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
834 const char *s = essid;
835 char *d = escaped;
836
837 if (ieee80211_is_empty_essid(essid, essid_len)) {
838 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
839 return escaped;
840 }
841
842 essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
843 while (essid_len--) {
844 if (*s == '\0') {
845 *d++ = '\\';
846 *d++ = '0';
847 s++;
848 } else {
849 *d++ = *s++;
850 }
851 }
852 *d = '\0';
853 return escaped;
854}
855
856#endif /* IEEE80211_H */
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index 771b47e30f86..69324465e8b3 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -183,7 +183,6 @@ struct ipv6_txoptions
183 struct ipv6_opt_hdr *hopopt; 183 struct ipv6_opt_hdr *hopopt;
184 struct ipv6_opt_hdr *dst0opt; 184 struct ipv6_opt_hdr *dst0opt;
185 struct ipv6_rt_hdr *srcrt; /* Routing Header */ 185 struct ipv6_rt_hdr *srcrt; /* Routing Header */
186 struct ipv6_opt_hdr *auth;
187 struct ipv6_opt_hdr *dst1opt; 186 struct ipv6_opt_hdr *dst1opt;
188 187
189 /* Option buffer, as read by IPV6_PKTOPTIONS, starts here. */ 188 /* Option buffer, as read by IPV6_PKTOPTIONS, starts here. */
diff --git a/include/net/pkt_sched.h b/include/net/pkt_sched.h
index fcb05a387dbe..6492e7363d84 100644
--- a/include/net/pkt_sched.h
+++ b/include/net/pkt_sched.h
@@ -13,13 +13,12 @@ struct qdisc_walker
13 13
14extern rwlock_t qdisc_tree_lock; 14extern rwlock_t qdisc_tree_lock;
15 15
16#define QDISC_ALIGN 32 16#define QDISC_ALIGNTO 32
17#define QDISC_ALIGN_CONST (QDISC_ALIGN - 1) 17#define QDISC_ALIGN(len) (((len) + QDISC_ALIGNTO-1) & ~(QDISC_ALIGNTO-1))
18 18
19static inline void *qdisc_priv(struct Qdisc *q) 19static inline void *qdisc_priv(struct Qdisc *q)
20{ 20{
21 return (char *)q + ((sizeof(struct Qdisc) + QDISC_ALIGN_CONST) 21 return (char *) q + QDISC_ALIGN(sizeof(struct Qdisc));
22 & ~QDISC_ALIGN_CONST);
23} 22}
24 23
25/* 24/*
@@ -207,8 +206,6 @@ psched_tod_diff(int delta_sec, int bound)
207 206
208#endif /* !CONFIG_NET_SCH_CLK_GETTIMEOFDAY */ 207#endif /* !CONFIG_NET_SCH_CLK_GETTIMEOFDAY */
209 208
210extern struct Qdisc noop_qdisc;
211extern struct Qdisc_ops noop_qdisc_ops;
212extern struct Qdisc_ops pfifo_qdisc_ops; 209extern struct Qdisc_ops pfifo_qdisc_ops;
213extern struct Qdisc_ops bfifo_qdisc_ops; 210extern struct Qdisc_ops bfifo_qdisc_ops;
214 211
@@ -216,14 +213,6 @@ extern int register_qdisc(struct Qdisc_ops *qops);
216extern int unregister_qdisc(struct Qdisc_ops *qops); 213extern int unregister_qdisc(struct Qdisc_ops *qops);
217extern struct Qdisc *qdisc_lookup(struct net_device *dev, u32 handle); 214extern struct Qdisc *qdisc_lookup(struct net_device *dev, u32 handle);
218extern struct Qdisc *qdisc_lookup_class(struct net_device *dev, u32 handle); 215extern struct Qdisc *qdisc_lookup_class(struct net_device *dev, u32 handle);
219extern void dev_init_scheduler(struct net_device *dev);
220extern void dev_shutdown(struct net_device *dev);
221extern void dev_activate(struct net_device *dev);
222extern void dev_deactivate(struct net_device *dev);
223extern void qdisc_reset(struct Qdisc *qdisc);
224extern void qdisc_destroy(struct Qdisc *qdisc);
225extern struct Qdisc * qdisc_create_dflt(struct net_device *dev,
226 struct Qdisc_ops *ops);
227extern struct qdisc_rate_table *qdisc_get_rtab(struct tc_ratespec *r, 216extern struct qdisc_rate_table *qdisc_get_rtab(struct tc_ratespec *r,
228 struct rtattr *tab); 217 struct rtattr *tab);
229extern void qdisc_put_rtab(struct qdisc_rate_table *tab); 218extern void qdisc_put_rtab(struct qdisc_rate_table *tab);
diff --git a/include/net/sch_generic.h b/include/net/sch_generic.h
index 7b97405e2dbf..7b6ec9986715 100644
--- a/include/net/sch_generic.h
+++ b/include/net/sch_generic.h
@@ -164,6 +164,19 @@ extern void qdisc_unlock_tree(struct net_device *dev);
164#define tcf_tree_lock(tp) qdisc_lock_tree((tp)->q->dev) 164#define tcf_tree_lock(tp) qdisc_lock_tree((tp)->q->dev)
165#define tcf_tree_unlock(tp) qdisc_unlock_tree((tp)->q->dev) 165#define tcf_tree_unlock(tp) qdisc_unlock_tree((tp)->q->dev)
166 166
167extern struct Qdisc noop_qdisc;
168extern struct Qdisc_ops noop_qdisc_ops;
169
170extern void dev_init_scheduler(struct net_device *dev);
171extern void dev_shutdown(struct net_device *dev);
172extern void dev_activate(struct net_device *dev);
173extern void dev_deactivate(struct net_device *dev);
174extern void qdisc_reset(struct Qdisc *qdisc);
175extern void qdisc_destroy(struct Qdisc *qdisc);
176extern struct Qdisc *qdisc_alloc(struct net_device *dev, struct Qdisc_ops *ops);
177extern struct Qdisc *qdisc_create_dflt(struct net_device *dev,
178 struct Qdisc_ops *ops);
179
167static inline void 180static inline void
168tcf_destroy(struct tcf_proto *tp) 181tcf_destroy(struct tcf_proto *tp)
169{ 182{
diff --git a/include/net/sctp/constants.h b/include/net/sctp/constants.h
index 4868c7f7749d..5999e5684bbf 100644
--- a/include/net/sctp/constants.h
+++ b/include/net/sctp/constants.h
@@ -263,23 +263,11 @@ enum { SCTP_MIN_PMTU = 576 };
263enum { SCTP_MAX_DUP_TSNS = 16 }; 263enum { SCTP_MAX_DUP_TSNS = 16 };
264enum { SCTP_MAX_GABS = 16 }; 264enum { SCTP_MAX_GABS = 16 };
265 265
266/* Here we define the default timers. */ 266/* Heartbeat interval - 30 secs */
267#define SCTP_DEFAULT_TIMEOUT_HEARTBEAT (30 * HZ)
267 268
268/* cookie timer def = ? seconds */ 269/* Delayed sack timer - 200ms */
269#define SCTP_DEFAULT_TIMEOUT_T1_COOKIE (3 * HZ)
270
271/* init timer def = 3 seconds */
272#define SCTP_DEFAULT_TIMEOUT_T1_INIT (3 * HZ)
273
274/* shutdown timer def = 300 ms */
275#define SCTP_DEFAULT_TIMEOUT_T2_SHUTDOWN ((300 * HZ) / 1000)
276
277/* 0 seconds + RTO */
278#define SCTP_DEFAULT_TIMEOUT_HEARTBEAT (10 * HZ)
279
280/* recv timer def = 200ms (in usec) */
281#define SCTP_DEFAULT_TIMEOUT_SACK ((200 * HZ) / 1000) 270#define SCTP_DEFAULT_TIMEOUT_SACK ((200 * HZ) / 1000)
282#define SCTP_DEFAULT_TIMEOUT_SACK_MAX ((500 * HZ) / 1000) /* 500 ms */
283 271
284/* RTO.Initial - 3 seconds 272/* RTO.Initial - 3 seconds
285 * RTO.Min - 1 second 273 * RTO.Min - 1 second
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index dfad4d3c581c..47727c7cc628 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -161,6 +161,9 @@ extern struct sctp_globals {
161 */ 161 */
162 int sndbuf_policy; 162 int sndbuf_policy;
163 163
164 /* Delayed SACK timeout 200ms default*/
165 int sack_timeout;
166
164 /* HB.interval - 30 seconds */ 167 /* HB.interval - 30 seconds */
165 int hb_interval; 168 int hb_interval;
166 169
@@ -217,6 +220,7 @@ extern struct sctp_globals {
217#define sctp_sndbuf_policy (sctp_globals.sndbuf_policy) 220#define sctp_sndbuf_policy (sctp_globals.sndbuf_policy)
218#define sctp_max_retrans_path (sctp_globals.max_retrans_path) 221#define sctp_max_retrans_path (sctp_globals.max_retrans_path)
219#define sctp_max_retrans_init (sctp_globals.max_retrans_init) 222#define sctp_max_retrans_init (sctp_globals.max_retrans_init)
223#define sctp_sack_timeout (sctp_globals.sack_timeout)
220#define sctp_hb_interval (sctp_globals.hb_interval) 224#define sctp_hb_interval (sctp_globals.hb_interval)
221#define sctp_max_instreams (sctp_globals.max_instreams) 225#define sctp_max_instreams (sctp_globals.max_instreams)
222#define sctp_max_outstreams (sctp_globals.max_outstreams) 226#define sctp_max_outstreams (sctp_globals.max_outstreams)
diff --git a/include/net/slhc_vj.h b/include/net/slhc_vj.h
index 0b2c2784f333..8716d5942b65 100644
--- a/include/net/slhc_vj.h
+++ b/include/net/slhc_vj.h
@@ -170,19 +170,14 @@ struct slcompress {
170}; 170};
171#define NULLSLCOMPR (struct slcompress *)0 171#define NULLSLCOMPR (struct slcompress *)0
172 172
173#define __ARGS(x) x
174
175/* In slhc.c: */ 173/* In slhc.c: */
176struct slcompress *slhc_init __ARGS((int rslots, int tslots)); 174struct slcompress *slhc_init(int rslots, int tslots);
177void slhc_free __ARGS((struct slcompress *comp)); 175void slhc_free(struct slcompress *comp);
178 176
179int slhc_compress __ARGS((struct slcompress *comp, unsigned char *icp, 177int slhc_compress(struct slcompress *comp, unsigned char *icp, int isize,
180 int isize, unsigned char *ocp, unsigned char **cpp, 178 unsigned char *ocp, unsigned char **cpp, int compress_cid);
181 int compress_cid)); 179int slhc_uncompress(struct slcompress *comp, unsigned char *icp, int isize);
182int slhc_uncompress __ARGS((struct slcompress *comp, unsigned char *icp, 180int slhc_remember(struct slcompress *comp, unsigned char *icp, int isize);
183 int isize)); 181int slhc_toss(struct slcompress *comp);
184int slhc_remember __ARGS((struct slcompress *comp, unsigned char *icp,
185 int isize));
186int slhc_toss __ARGS((struct slcompress *comp));
187 182
188#endif /* _SLHC_H */ 183#endif /* _SLHC_H */
diff --git a/include/net/sock.h b/include/net/sock.h
index e593af5b1ecc..7b76f891ae2d 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -1134,13 +1134,16 @@ static inline void sk_stream_moderate_sndbuf(struct sock *sk)
1134static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk, 1134static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk,
1135 int size, int mem, int gfp) 1135 int size, int mem, int gfp)
1136{ 1136{
1137 struct sk_buff *skb = alloc_skb(size + sk->sk_prot->max_header, gfp); 1137 struct sk_buff *skb;
1138 int hdr_len;
1138 1139
1140 hdr_len = SKB_DATA_ALIGN(sk->sk_prot->max_header);
1141 skb = alloc_skb(size + hdr_len, gfp);
1139 if (skb) { 1142 if (skb) {
1140 skb->truesize += mem; 1143 skb->truesize += mem;
1141 if (sk->sk_forward_alloc >= (int)skb->truesize || 1144 if (sk->sk_forward_alloc >= (int)skb->truesize ||
1142 sk_stream_mem_schedule(sk, skb->truesize, 0)) { 1145 sk_stream_mem_schedule(sk, skb->truesize, 0)) {
1143 skb_reserve(skb, sk->sk_prot->max_header); 1146 skb_reserve(skb, hdr_len);
1144 return skb; 1147 return skb;
1145 } 1148 }
1146 __kfree_skb(skb); 1149 __kfree_skb(skb);
diff --git a/include/net/tcp.h b/include/net/tcp.h
index ec9e20c27179..a166918ca56d 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -721,11 +721,16 @@ static inline int tcp_ack_scheduled(struct tcp_sock *tp)
721 return tp->ack.pending&TCP_ACK_SCHED; 721 return tp->ack.pending&TCP_ACK_SCHED;
722} 722}
723 723
724static __inline__ void tcp_dec_quickack_mode(struct tcp_sock *tp) 724static __inline__ void tcp_dec_quickack_mode(struct tcp_sock *tp, unsigned int pkts)
725{ 725{
726 if (tp->ack.quick && --tp->ack.quick == 0) { 726 if (tp->ack.quick) {
727 /* Leaving quickack mode we deflate ATO. */ 727 if (pkts >= tp->ack.quick) {
728 tp->ack.ato = TCP_ATO_MIN; 728 tp->ack.quick = 0;
729
730 /* Leaving quickack mode we deflate ATO. */
731 tp->ack.ato = TCP_ATO_MIN;
732 } else
733 tp->ack.quick -= pkts;
729 } 734 }
730} 735}
731 736
@@ -843,7 +848,9 @@ extern __u32 cookie_v4_init_sequence(struct sock *sk, struct sk_buff *skb,
843 848
844/* tcp_output.c */ 849/* tcp_output.c */
845 850
846extern int tcp_write_xmit(struct sock *, int nonagle); 851extern void __tcp_push_pending_frames(struct sock *sk, struct tcp_sock *tp,
852 unsigned int cur_mss, int nonagle);
853extern int tcp_may_send_now(struct sock *sk, struct tcp_sock *tp);
847extern int tcp_retransmit_skb(struct sock *, struct sk_buff *); 854extern int tcp_retransmit_skb(struct sock *, struct sk_buff *);
848extern void tcp_xmit_retransmit_queue(struct sock *); 855extern void tcp_xmit_retransmit_queue(struct sock *);
849extern void tcp_simple_retransmit(struct sock *); 856extern void tcp_simple_retransmit(struct sock *);
@@ -855,10 +862,13 @@ extern int tcp_write_wakeup(struct sock *);
855extern void tcp_send_fin(struct sock *sk); 862extern void tcp_send_fin(struct sock *sk);
856extern void tcp_send_active_reset(struct sock *sk, int priority); 863extern void tcp_send_active_reset(struct sock *sk, int priority);
857extern int tcp_send_synack(struct sock *); 864extern int tcp_send_synack(struct sock *);
858extern void tcp_push_one(struct sock *, unsigned mss_now); 865extern void tcp_push_one(struct sock *, unsigned int mss_now);
859extern void tcp_send_ack(struct sock *sk); 866extern void tcp_send_ack(struct sock *sk);
860extern void tcp_send_delayed_ack(struct sock *sk); 867extern void tcp_send_delayed_ack(struct sock *sk);
861 868
869/* tcp_input.c */
870extern void tcp_cwnd_application_limited(struct sock *sk);
871
862/* tcp_timer.c */ 872/* tcp_timer.c */
863extern void tcp_init_xmit_timers(struct sock *); 873extern void tcp_init_xmit_timers(struct sock *);
864extern void tcp_clear_xmit_timers(struct sock *); 874extern void tcp_clear_xmit_timers(struct sock *);
@@ -958,7 +968,7 @@ static inline void tcp_reset_xmit_timer(struct sock *sk, int what, unsigned long
958static inline void tcp_initialize_rcv_mss(struct sock *sk) 968static inline void tcp_initialize_rcv_mss(struct sock *sk)
959{ 969{
960 struct tcp_sock *tp = tcp_sk(sk); 970 struct tcp_sock *tp = tcp_sk(sk);
961 unsigned int hint = min(tp->advmss, tp->mss_cache_std); 971 unsigned int hint = min_t(unsigned int, tp->advmss, tp->mss_cache);
962 972
963 hint = min(hint, tp->rcv_wnd/2); 973 hint = min(hint, tp->rcv_wnd/2);
964 hint = min(hint, TCP_MIN_RCVMSS); 974 hint = min(hint, TCP_MIN_RCVMSS);
@@ -1225,28 +1235,6 @@ static inline void tcp_sync_left_out(struct tcp_sock *tp)
1225 tp->left_out = tp->sacked_out + tp->lost_out; 1235 tp->left_out = tp->sacked_out + tp->lost_out;
1226} 1236}
1227 1237
1228extern void tcp_cwnd_application_limited(struct sock *sk);
1229
1230/* Congestion window validation. (RFC2861) */
1231
1232static inline void tcp_cwnd_validate(struct sock *sk, struct tcp_sock *tp)
1233{
1234 __u32 packets_out = tp->packets_out;
1235
1236 if (packets_out >= tp->snd_cwnd) {
1237 /* Network is feed fully. */
1238 tp->snd_cwnd_used = 0;
1239 tp->snd_cwnd_stamp = tcp_time_stamp;
1240 } else {
1241 /* Network starves. */
1242 if (tp->packets_out > tp->snd_cwnd_used)
1243 tp->snd_cwnd_used = tp->packets_out;
1244
1245 if ((s32)(tcp_time_stamp - tp->snd_cwnd_stamp) >= tp->rto)
1246 tcp_cwnd_application_limited(sk);
1247 }
1248}
1249
1250/* Set slow start threshould and cwnd not falling to slow start */ 1238/* Set slow start threshould and cwnd not falling to slow start */
1251static inline void __tcp_enter_cwr(struct tcp_sock *tp) 1239static inline void __tcp_enter_cwr(struct tcp_sock *tp)
1252{ 1240{
@@ -1279,12 +1267,6 @@ static __inline__ __u32 tcp_max_burst(const struct tcp_sock *tp)
1279 return 3; 1267 return 3;
1280} 1268}
1281 1269
1282static __inline__ int tcp_minshall_check(const struct tcp_sock *tp)
1283{
1284 return after(tp->snd_sml,tp->snd_una) &&
1285 !after(tp->snd_sml, tp->snd_nxt);
1286}
1287
1288static __inline__ void tcp_minshall_update(struct tcp_sock *tp, int mss, 1270static __inline__ void tcp_minshall_update(struct tcp_sock *tp, int mss,
1289 const struct sk_buff *skb) 1271 const struct sk_buff *skb)
1290{ 1272{
@@ -1292,122 +1274,18 @@ static __inline__ void tcp_minshall_update(struct tcp_sock *tp, int mss,
1292 tp->snd_sml = TCP_SKB_CB(skb)->end_seq; 1274 tp->snd_sml = TCP_SKB_CB(skb)->end_seq;
1293} 1275}
1294 1276
1295/* Return 0, if packet can be sent now without violation Nagle's rules:
1296 1. It is full sized.
1297 2. Or it contains FIN.
1298 3. Or TCP_NODELAY was set.
1299 4. Or TCP_CORK is not set, and all sent packets are ACKed.
1300 With Minshall's modification: all sent small packets are ACKed.
1301 */
1302
1303static __inline__ int
1304tcp_nagle_check(const struct tcp_sock *tp, const struct sk_buff *skb,
1305 unsigned mss_now, int nonagle)
1306{
1307 return (skb->len < mss_now &&
1308 !(TCP_SKB_CB(skb)->flags & TCPCB_FLAG_FIN) &&
1309 ((nonagle&TCP_NAGLE_CORK) ||
1310 (!nonagle &&
1311 tp->packets_out &&
1312 tcp_minshall_check(tp))));
1313}
1314
1315extern void tcp_set_skb_tso_segs(struct sock *, struct sk_buff *);
1316
1317/* This checks if the data bearing packet SKB (usually sk->sk_send_head)
1318 * should be put on the wire right now.
1319 */
1320static __inline__ int tcp_snd_test(struct sock *sk,
1321 struct sk_buff *skb,
1322 unsigned cur_mss, int nonagle)
1323{
1324 struct tcp_sock *tp = tcp_sk(sk);
1325 int pkts = tcp_skb_pcount(skb);
1326
1327 if (!pkts) {
1328 tcp_set_skb_tso_segs(sk, skb);
1329 pkts = tcp_skb_pcount(skb);
1330 }
1331
1332 /* RFC 1122 - section 4.2.3.4
1333 *
1334 * We must queue if
1335 *
1336 * a) The right edge of this frame exceeds the window
1337 * b) There are packets in flight and we have a small segment
1338 * [SWS avoidance and Nagle algorithm]
1339 * (part of SWS is done on packetization)
1340 * Minshall version sounds: there are no _small_
1341 * segments in flight. (tcp_nagle_check)
1342 * c) We have too many packets 'in flight'
1343 *
1344 * Don't use the nagle rule for urgent data (or
1345 * for the final FIN -DaveM).
1346 *
1347 * Also, Nagle rule does not apply to frames, which
1348 * sit in the middle of queue (they have no chances
1349 * to get new data) and if room at tail of skb is
1350 * not enough to save something seriously (<32 for now).
1351 */
1352
1353 /* Don't be strict about the congestion window for the
1354 * final FIN frame. -DaveM
1355 */
1356 return (((nonagle&TCP_NAGLE_PUSH) || tp->urg_mode
1357 || !tcp_nagle_check(tp, skb, cur_mss, nonagle)) &&
1358 (((tcp_packets_in_flight(tp) + (pkts-1)) < tp->snd_cwnd) ||
1359 (TCP_SKB_CB(skb)->flags & TCPCB_FLAG_FIN)) &&
1360 !after(TCP_SKB_CB(skb)->end_seq, tp->snd_una + tp->snd_wnd));
1361}
1362
1363static __inline__ void tcp_check_probe_timer(struct sock *sk, struct tcp_sock *tp) 1277static __inline__ void tcp_check_probe_timer(struct sock *sk, struct tcp_sock *tp)
1364{ 1278{
1365 if (!tp->packets_out && !tp->pending) 1279 if (!tp->packets_out && !tp->pending)
1366 tcp_reset_xmit_timer(sk, TCP_TIME_PROBE0, tp->rto); 1280 tcp_reset_xmit_timer(sk, TCP_TIME_PROBE0, tp->rto);
1367} 1281}
1368 1282
1369static __inline__ int tcp_skb_is_last(const struct sock *sk,
1370 const struct sk_buff *skb)
1371{
1372 return skb->next == (struct sk_buff *)&sk->sk_write_queue;
1373}
1374
1375/* Push out any pending frames which were held back due to
1376 * TCP_CORK or attempt at coalescing tiny packets.
1377 * The socket must be locked by the caller.
1378 */
1379static __inline__ void __tcp_push_pending_frames(struct sock *sk,
1380 struct tcp_sock *tp,
1381 unsigned cur_mss,
1382 int nonagle)
1383{
1384 struct sk_buff *skb = sk->sk_send_head;
1385
1386 if (skb) {
1387 if (!tcp_skb_is_last(sk, skb))
1388 nonagle = TCP_NAGLE_PUSH;
1389 if (!tcp_snd_test(sk, skb, cur_mss, nonagle) ||
1390 tcp_write_xmit(sk, nonagle))
1391 tcp_check_probe_timer(sk, tp);
1392 }
1393 tcp_cwnd_validate(sk, tp);
1394}
1395
1396static __inline__ void tcp_push_pending_frames(struct sock *sk, 1283static __inline__ void tcp_push_pending_frames(struct sock *sk,
1397 struct tcp_sock *tp) 1284 struct tcp_sock *tp)
1398{ 1285{
1399 __tcp_push_pending_frames(sk, tp, tcp_current_mss(sk, 1), tp->nonagle); 1286 __tcp_push_pending_frames(sk, tp, tcp_current_mss(sk, 1), tp->nonagle);
1400} 1287}
1401 1288
1402static __inline__ int tcp_may_send_now(struct sock *sk, struct tcp_sock *tp)
1403{
1404 struct sk_buff *skb = sk->sk_send_head;
1405
1406 return (skb &&
1407 tcp_snd_test(sk, skb, tcp_current_mss(sk, 1),
1408 tcp_skb_is_last(sk, skb) ? TCP_NAGLE_PUSH : tp->nonagle));
1409}
1410
1411static __inline__ void tcp_init_wl(struct tcp_sock *tp, u32 ack, u32 seq) 1289static __inline__ void tcp_init_wl(struct tcp_sock *tp, u32 ack, u32 seq)
1412{ 1290{
1413 tp->snd_wl1 = seq; 1291 tp->snd_wl1 = seq;
diff --git a/include/pcmcia/ciscode.h b/include/pcmcia/ciscode.h
index 2000b43ece91..da19c297dd65 100644
--- a/include/pcmcia/ciscode.h
+++ b/include/pcmcia/ciscode.h
@@ -112,6 +112,8 @@
112 112
113#define MANFID_TDK 0x0105 113#define MANFID_TDK 0x0105
114#define PRODID_TDK_CF010 0x0900 114#define PRODID_TDK_CF010 0x0900
115#define PRODID_TDK_NP9610 0x0d0a
116#define PRODID_TDK_MN3200 0x0e0a
115#define PRODID_TDK_GN3410 0x4815 117#define PRODID_TDK_GN3410 0x4815
116 118
117#define MANFID_TOSHIBA 0x0098 119#define MANFID_TOSHIBA 0x0098
diff --git a/include/pcmcia/cs.h b/include/pcmcia/cs.h
index 8d8643adc786..b42ddc0c1143 100644
--- a/include/pcmcia/cs.h
+++ b/include/pcmcia/cs.h
@@ -396,7 +396,6 @@ struct pcmcia_socket;
396int pcmcia_access_configuration_register(client_handle_t handle, conf_reg_t *reg); 396int pcmcia_access_configuration_register(client_handle_t handle, conf_reg_t *reg);
397int pcmcia_deregister_client(client_handle_t handle); 397int pcmcia_deregister_client(client_handle_t handle);
398int pcmcia_get_configuration_info(client_handle_t handle, config_info_t *config); 398int pcmcia_get_configuration_info(client_handle_t handle, config_info_t *config);
399int pcmcia_get_card_services_info(servinfo_t *info);
400int pcmcia_get_first_window(window_handle_t *win, win_req_t *req); 399int pcmcia_get_first_window(window_handle_t *win, win_req_t *req);
401int pcmcia_get_next_window(window_handle_t *win, win_req_t *req); 400int pcmcia_get_next_window(window_handle_t *win, win_req_t *req);
402int pcmcia_get_status(client_handle_t handle, cs_status_t *status); 401int pcmcia_get_status(client_handle_t handle, cs_status_t *status);
@@ -417,7 +416,6 @@ int pcmcia_suspend_card(struct pcmcia_socket *skt);
417int pcmcia_resume_card(struct pcmcia_socket *skt); 416int pcmcia_resume_card(struct pcmcia_socket *skt);
418int pcmcia_eject_card(struct pcmcia_socket *skt); 417int pcmcia_eject_card(struct pcmcia_socket *skt);
419int pcmcia_insert_card(struct pcmcia_socket *skt); 418int pcmcia_insert_card(struct pcmcia_socket *skt);
420int pcmcia_report_error(client_handle_t handle, error_info_t *err);
421 419
422struct pcmcia_socket * pcmcia_get_socket(struct pcmcia_socket *skt); 420struct pcmcia_socket * pcmcia_get_socket(struct pcmcia_socket *skt);
423void pcmcia_put_socket(struct pcmcia_socket *skt); 421void pcmcia_put_socket(struct pcmcia_socket *skt);
diff --git a/include/pcmcia/device_id.h b/include/pcmcia/device_id.h
new file mode 100644
index 000000000000..346d81ece287
--- /dev/null
+++ b/include/pcmcia/device_id.h
@@ -0,0 +1,249 @@
1/*
2 * Copyright (2003-2004) Dominik Brodowski <linux@brodo.de>
3 * David Woodhouse
4 *
5 * License: GPL v2
6 */
7
8#define PCMCIA_DEVICE_MANF_CARD(manf, card) { \
9 .match_flags = PCMCIA_DEV_ID_MATCH_MANF_ID| \
10 PCMCIA_DEV_ID_MATCH_CARD_ID, \
11 .manf_id = (manf), \
12 .card_id = (card), }
13
14#define PCMCIA_DEVICE_FUNC_ID(func) { \
15 .match_flags = PCMCIA_DEV_ID_MATCH_FUNC_ID, \
16 .func_id = (func), }
17
18#define PCMCIA_DEVICE_PROD_ID1(v1, vh1) { \
19 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1, \
20 .prod_id = { (v1), NULL, NULL, NULL }, \
21 .prod_id_hash = { (vh1), 0, 0, 0 }, }
22
23#define PCMCIA_DEVICE_PROD_ID2(v2, vh2) { \
24 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID2, \
25 .prod_id = { NULL, (v2), NULL, NULL }, \
26 .prod_id_hash = { 0, (vh2), 0, 0 }, }
27
28#define PCMCIA_DEVICE_PROD_ID12(v1, v2, vh1, vh2) { \
29 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
30 PCMCIA_DEV_ID_MATCH_PROD_ID2, \
31 .prod_id = { (v1), (v2), NULL, NULL }, \
32 .prod_id_hash = { (vh1), (vh2), 0, 0 }, }
33
34#define PCMCIA_DEVICE_PROD_ID13(v1, v3, vh1, vh3) { \
35 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
36 PCMCIA_DEV_ID_MATCH_PROD_ID3, \
37 .prod_id = { (v1), NULL, (v3), NULL }, \
38 .prod_id_hash = { (vh1), 0, (vh3), 0 }, }
39
40#define PCMCIA_DEVICE_PROD_ID14(v1, v4, vh1, vh4) { \
41 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
42 PCMCIA_DEV_ID_MATCH_PROD_ID4, \
43 .prod_id = { (v1), NULL, NULL, (v4) }, \
44 .prod_id_hash = { (vh1), 0, 0, (vh4) }, }
45
46#define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \
47 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
48 PCMCIA_DEV_ID_MATCH_PROD_ID2| \
49 PCMCIA_DEV_ID_MATCH_PROD_ID3, \
50 .prod_id = { (v1), (v2), (v3), NULL },\
51 .prod_id_hash = { (vh1), (vh2), (vh3), 0 }, }
52
53#define PCMCIA_DEVICE_PROD_ID124(v1, v2, v4, vh1, vh2, vh4) { \
54 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
55 PCMCIA_DEV_ID_MATCH_PROD_ID2| \
56 PCMCIA_DEV_ID_MATCH_PROD_ID4, \
57 .prod_id = { (v1), (v2), NULL, (v4) }, \
58 .prod_id_hash = { (vh1), (vh2), 0, (vh4) }, }
59
60#define PCMCIA_DEVICE_PROD_ID134(v1, v3, v4, vh1, vh3, vh4) { \
61 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
62 PCMCIA_DEV_ID_MATCH_PROD_ID3| \
63 PCMCIA_DEV_ID_MATCH_PROD_ID4, \
64 .prod_id = { (v1), NULL, (v3), (v4) }, \
65 .prod_id_hash = { (vh1), 0, (vh3), (vh4) }, }
66
67#define PCMCIA_DEVICE_PROD_ID1234(v1, v2, v3, v4, vh1, vh2, vh3, vh4) { \
68 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
69 PCMCIA_DEV_ID_MATCH_PROD_ID2| \
70 PCMCIA_DEV_ID_MATCH_PROD_ID3| \
71 PCMCIA_DEV_ID_MATCH_PROD_ID4, \
72 .prod_id = { (v1), (v2), (v3), (v4) }, \
73 .prod_id_hash = { (vh1), (vh2), (vh3), (vh4) }, }
74
75
76/* multi-function devices */
77
78#define PCMCIA_MFC_DEVICE_MANF_CARD(mfc, manf, card) { \
79 .match_flags = PCMCIA_DEV_ID_MATCH_MANF_ID| \
80 PCMCIA_DEV_ID_MATCH_CARD_ID| \
81 PCMCIA_DEV_ID_MATCH_FUNCTION, \
82 .manf_id = (manf), \
83 .card_id = (card), \
84 .function = (mfc), }
85
86#define PCMCIA_MFC_DEVICE_PROD_ID1(mfc, v1, vh1) { \
87 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
88 PCMCIA_DEV_ID_MATCH_FUNCTION, \
89 .prod_id = { (v1), NULL, NULL, NULL }, \
90 .prod_id_hash = { (vh1), 0, 0, 0 }, \
91 .function = (mfc), }
92
93#define PCMCIA_MFC_DEVICE_PROD_ID2(mfc, v2, vh2) { \
94 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID2| \
95 PCMCIA_DEV_ID_MATCH_FUNCTION, \
96 .prod_id = { NULL, (v2), NULL, NULL }, \
97 .prod_id_hash = { 0, (vh2), 0, 0 }, \
98 .function = (mfc), }
99
100#define PCMCIA_MFC_DEVICE_PROD_ID12(mfc, v1, v2, vh1, vh2) { \
101 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
102 PCMCIA_DEV_ID_MATCH_PROD_ID2| \
103 PCMCIA_DEV_ID_MATCH_FUNCTION, \
104 .prod_id = { (v1), (v2), NULL, NULL }, \
105 .prod_id_hash = { (vh1), (vh2), 0, 0 }, \
106 .function = (mfc), }
107
108#define PCMCIA_MFC_DEVICE_PROD_ID13(mfc, v1, v3, vh1, vh3) { \
109 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
110 PCMCIA_DEV_ID_MATCH_PROD_ID3| \
111 PCMCIA_DEV_ID_MATCH_FUNCTION, \
112 .prod_id = { (v1), NULL, (v3), NULL }, \
113 .prod_id_hash = { (vh1), 0, (vh3), 0 }, \
114 .function = (mfc), }
115
116#define PCMCIA_MFC_DEVICE_PROD_ID123(mfc, v1, v2, v3, vh1, vh2, vh3) { \
117 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
118 PCMCIA_DEV_ID_MATCH_PROD_ID2| \
119 PCMCIA_DEV_ID_MATCH_PROD_ID3| \
120 PCMCIA_DEV_ID_MATCH_FUNCTION, \
121 .prod_id = { (v1), (v2), (v3), NULL },\
122 .prod_id_hash = { (vh1), (vh2), (vh3), 0 }, \
123 .function = (mfc), }
124
125/* pseudo multi-function devices */
126
127#define PCMCIA_PFC_DEVICE_MANF_CARD(mfc, manf, card) { \
128 .match_flags = PCMCIA_DEV_ID_MATCH_MANF_ID| \
129 PCMCIA_DEV_ID_MATCH_CARD_ID| \
130 PCMCIA_DEV_ID_MATCH_DEVICE_NO, \
131 .manf_id = (manf), \
132 .card_id = (card), \
133 .device_no = (mfc), }
134
135#define PCMCIA_PFC_DEVICE_PROD_ID1(mfc, v1, vh1) { \
136 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
137 PCMCIA_DEV_ID_MATCH_DEVICE_NO, \
138 .prod_id = { (v1), NULL, NULL, NULL }, \
139 .prod_id_hash = { (vh1), 0, 0, 0 }, \
140 .device_no = (mfc), }
141
142#define PCMCIA_PFC_DEVICE_PROD_ID2(mfc, v2, vh2) { \
143 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID2| \
144 PCMCIA_DEV_ID_MATCH_DEVICE_NO, \
145 .prod_id = { NULL, (v2), NULL, NULL }, \
146 .prod_id_hash = { 0, (vh2), 0, 0 }, \
147 .device_no = (mfc), }
148
149#define PCMCIA_PFC_DEVICE_PROD_ID12(mfc, v1, v2, vh1, vh2) { \
150 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
151 PCMCIA_DEV_ID_MATCH_PROD_ID2| \
152 PCMCIA_DEV_ID_MATCH_DEVICE_NO, \
153 .prod_id = { (v1), (v2), NULL, NULL }, \
154 .prod_id_hash = { (vh1), (vh2), 0, 0 }, \
155 .device_no = (mfc), }
156
157#define PCMCIA_PFC_DEVICE_PROD_ID13(mfc, v1, v3, vh1, vh3) { \
158 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
159 PCMCIA_DEV_ID_MATCH_PROD_ID3| \
160 PCMCIA_DEV_ID_MATCH_DEVICE_NO, \
161 .prod_id = { (v1), NULL, (v3), NULL }, \
162 .prod_id_hash = { (vh1), 0, (vh3), 0 }, \
163 .device_no = (mfc), }
164
165#define PCMCIA_PFC_DEVICE_PROD_ID123(mfc, v1, v2, v3, vh1, vh2, vh3) { \
166 .match_flags = PCMCIA_DEV_ID_MATCH_PROD_ID1| \
167 PCMCIA_DEV_ID_MATCH_PROD_ID2| \
168 PCMCIA_DEV_ID_MATCH_PROD_ID3| \
169 PCMCIA_DEV_ID_MATCH_DEVICE_NO, \
170 .prod_id = { (v1), (v2), (v3), NULL },\
171 .prod_id_hash = { (vh1), (vh2), (vh3), 0 }, \
172 .device_no = (mfc), }
173
174/* cards needing a CIS override */
175
176#define PCMCIA_DEVICE_CIS_MANF_CARD(manf, card, _cisfile) { \
177 .match_flags = PCMCIA_DEV_ID_MATCH_FAKE_CIS | \
178 PCMCIA_DEV_ID_MATCH_MANF_ID| \
179 PCMCIA_DEV_ID_MATCH_CARD_ID, \
180 .manf_id = (manf), \
181 .card_id = (card), \
182 .cisfile = (_cisfile)}
183
184#define PCMCIA_DEVICE_CIS_PROD_ID12(v1, v2, vh1, vh2, _cisfile) { \
185 .match_flags = PCMCIA_DEV_ID_MATCH_FAKE_CIS | \
186 PCMCIA_DEV_ID_MATCH_PROD_ID1| \
187 PCMCIA_DEV_ID_MATCH_PROD_ID2, \
188 .prod_id = { (v1), (v2), NULL, NULL }, \
189 .prod_id_hash = { (vh1), (vh2), 0, 0 }, \
190 .cisfile = (_cisfile)}
191
192#define PCMCIA_DEVICE_CIS_PROD_ID123(v1, v2, v3, vh1, vh2, vh3, _cisfile) { \
193 .match_flags = PCMCIA_DEV_ID_MATCH_FAKE_CIS | \
194 PCMCIA_DEV_ID_MATCH_PROD_ID1| \
195 PCMCIA_DEV_ID_MATCH_PROD_ID2| \
196 PCMCIA_DEV_ID_MATCH_PROD_ID3, \
197 .prod_id = { (v1), (v2), (v3), NULL },\
198 .prod_id_hash = { (vh1), (vh2), (vh3), 0 }, \
199 .cisfile = (_cisfile)}
200
201
202#define PCMCIA_DEVICE_CIS_PROD_ID2(v2, vh2, _cisfile) { \
203 .match_flags = PCMCIA_DEV_ID_MATCH_FAKE_CIS | \
204 PCMCIA_DEV_ID_MATCH_PROD_ID2, \
205 .prod_id = { NULL, (v2), NULL, NULL }, \
206 .prod_id_hash = { 0, (vh2), 0, 0 }, \
207 .cisfile = (_cisfile)}
208
209#define PCMCIA_PFC_DEVICE_CIS_PROD_ID12(mfc, v1, v2, vh1, vh2, _cisfile) { \
210 .match_flags = PCMCIA_DEV_ID_MATCH_FAKE_CIS | \
211 PCMCIA_DEV_ID_MATCH_PROD_ID1| \
212 PCMCIA_DEV_ID_MATCH_PROD_ID2| \
213 PCMCIA_DEV_ID_MATCH_DEVICE_NO, \
214 .prod_id = { (v1), (v2), NULL, NULL }, \
215 .prod_id_hash = { (vh1), (vh2), 0, 0 },\
216 .device_no = (mfc), \
217 .cisfile = (_cisfile)}
218
219#define PCMCIA_MFC_DEVICE_CIS_MANF_CARD(mfc, manf, card, _cisfile) { \
220 .match_flags = PCMCIA_DEV_ID_MATCH_FAKE_CIS | \
221 PCMCIA_DEV_ID_MATCH_MANF_ID| \
222 PCMCIA_DEV_ID_MATCH_CARD_ID| \
223 PCMCIA_DEV_ID_MATCH_FUNCTION, \
224 .manf_id = (manf), \
225 .card_id = (card), \
226 .function = (mfc), \
227 .cisfile = (_cisfile)}
228
229#define PCMCIA_MFC_DEVICE_CIS_PROD_ID12(mfc, v1, v2, vh1, vh2, _cisfile) { \
230 .match_flags = PCMCIA_DEV_ID_MATCH_FAKE_CIS | \
231 PCMCIA_DEV_ID_MATCH_PROD_ID1| \
232 PCMCIA_DEV_ID_MATCH_PROD_ID2| \
233 PCMCIA_DEV_ID_MATCH_FUNCTION, \
234 .prod_id = { (v1), (v2), NULL, NULL }, \
235 .prod_id_hash = { (vh1), (vh2), 0, 0 }, \
236 .function = (mfc), \
237 .cisfile = (_cisfile)}
238
239#define PCMCIA_MFC_DEVICE_CIS_PROD_ID4(mfc, v4, vh4, _cisfile) { \
240 .match_flags = PCMCIA_DEV_ID_MATCH_FAKE_CIS | \
241 PCMCIA_DEV_ID_MATCH_PROD_ID4| \
242 PCMCIA_DEV_ID_MATCH_FUNCTION, \
243 .prod_id = { NULL, NULL, NULL, (v4) }, \
244 .prod_id_hash = { 0, 0, 0, (vh4) }, \
245 .function = (mfc), \
246 .cisfile = (_cisfile)}
247
248
249#define PCMCIA_DEVICE_NULL { .match_flags = 0, }
diff --git a/include/pcmcia/ds.h b/include/pcmcia/ds.h
index 312fd958c901..2b52553f2d94 100644
--- a/include/pcmcia/ds.h
+++ b/include/pcmcia/ds.h
@@ -18,6 +18,8 @@
18 18
19#include <pcmcia/bulkmem.h> 19#include <pcmcia/bulkmem.h>
20#include <pcmcia/cs_types.h> 20#include <pcmcia/cs_types.h>
21#include <pcmcia/device_id.h>
22#include <linux/mod_devicetable.h>
21 23
22typedef struct tuple_parse_t { 24typedef struct tuple_parse_t {
23 tuple_t tuple; 25 tuple_t tuple;
@@ -129,12 +131,11 @@ typedef struct dev_link_t {
129 131
130struct pcmcia_socket; 132struct pcmcia_socket;
131 133
132extern struct bus_type pcmcia_bus_type;
133
134struct pcmcia_driver { 134struct pcmcia_driver {
135 dev_link_t *(*attach)(void); 135 dev_link_t *(*attach)(void);
136 void (*detach)(dev_link_t *); 136 void (*detach)(dev_link_t *);
137 struct module *owner; 137 struct module *owner;
138 struct pcmcia_device_id *id_table;
138 struct device_driver drv; 139 struct device_driver drv;
139}; 140};
140 141
@@ -173,7 +174,9 @@ struct pcmcia_device {
173 u8 has_manf_id:1; 174 u8 has_manf_id:1;
174 u8 has_card_id:1; 175 u8 has_card_id:1;
175 u8 has_func_id:1; 176 u8 has_func_id:1;
176 u8 reserved:5; 177
178 u8 allow_func_id_match:1;
179 u8 reserved:4;
177 180
178 u8 func_id; 181 u8 func_id;
179 u16 manf_id; 182 u16 manf_id;
diff --git a/include/pcmcia/ss.h b/include/pcmcia/ss.h
index 67b867f31fe4..0f7aacc33fe9 100644
--- a/include/pcmcia/ss.h
+++ b/include/pcmcia/ss.h
@@ -15,10 +15,12 @@
15#ifndef _LINUX_SS_H 15#ifndef _LINUX_SS_H
16#define _LINUX_SS_H 16#define _LINUX_SS_H
17 17
18#include <linux/config.h>
19#include <linux/device.h>
20
18#include <pcmcia/cs_types.h> 21#include <pcmcia/cs_types.h>
19#include <pcmcia/cs.h> 22#include <pcmcia/cs.h>
20#include <pcmcia/bulkmem.h> 23#include <pcmcia/bulkmem.h>
21#include <linux/device.h>
22 24
23/* Definitions for card status flags for GetStatus */ 25/* Definitions for card status flags for GetStatus */
24#define SS_WRPROT 0x0001 26#define SS_WRPROT 0x0001
@@ -171,7 +173,7 @@ typedef struct window_t {
171 173
172struct config_t; 174struct config_t;
173struct pcmcia_callback; 175struct pcmcia_callback;
174 176struct user_info_t;
175 177
176struct pcmcia_socket { 178struct pcmcia_socket {
177 struct module *owner; 179 struct module *owner;
@@ -216,8 +218,9 @@ struct pcmcia_socket {
216 218
217 /* is set to one if resource setup is done using adjust_resource_info() */ 219 /* is set to one if resource setup is done using adjust_resource_info() */
218 u8 resource_setup_old:1; 220 u8 resource_setup_old:1;
221 u8 resource_setup_new:1;
219 222
220 u8 reserved:6; 223 u8 reserved:5;
221 224
222 /* socket operations */ 225 /* socket operations */
223 struct pccard_operations * ops; 226 struct pccard_operations * ops;
@@ -241,9 +244,32 @@ struct pcmcia_socket {
241 unsigned int thread_events; 244 unsigned int thread_events;
242 245
243 /* pcmcia (16-bit) */ 246 /* pcmcia (16-bit) */
244 struct pcmcia_bus_socket *pcmcia;
245 struct pcmcia_callback *callback; 247 struct pcmcia_callback *callback;
246 248
249#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)
250 struct list_head devices_list; /* PCMCIA devices */
251 u8 device_count; /* the number of devices, used
252 * only internally and subject
253 * to incorrectness and change */
254
255 struct {
256 u8 present:1, /* PCMCIA card is present in socket */
257 busy:1, /* "master" ioctl is used */
258 dead:1, /* pcmcia module is being unloaded */
259 device_add_pending:1, /* a pseudo-multifunction-device
260 * add event is pending */
261 reserved:4;
262 } pcmcia_state;
263
264 struct work_struct device_add; /* for adding further pseudo-multifunction
265 * devices */
266
267#ifdef CONFIG_PCMCIA_IOCTL
268 struct user_info_t *user;
269 wait_queue_head_t queue;
270#endif
271#endif
272
247 /* cardbus (32-bit) */ 273 /* cardbus (32-bit) */
248#ifdef CONFIG_CARDBUS 274#ifdef CONFIG_CARDBUS
249 struct resource * cb_cis_res; 275 struct resource * cb_cis_res;