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| author | Olof Johansson <olof@lixom.net> | 2013-02-12 18:20:19 -0500 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2013-02-12 18:20:19 -0500 |
| commit | b221498e5d276b4ea5a50ba545b75f8cf2c2edf5 (patch) | |
| tree | 55461b2678d331ce7f06cca728d5668f9ab7a1e1 /include | |
| parent | 0582b05366f39ea1024450f18cc801c7f42bbbbb (diff) | |
| parent | 967f84275ba74eac696f798ce1a780285170b5e7 (diff) | |
Merge branch 'kvm-arm/timer' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into next/virt
From Marc Zyngier, this branch enables virtual GIC and timer for KVM/ARM.
* 'kvm-arm/timer' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms:
ARM: KVM: arch_timers: Wire the init code and config option
ARM: KVM: arch_timers: Add timer world switch
ARM: KVM: arch_timers: Add guest timer core support
ARM: KVM: Add VGIC configuration option
ARM: KVM: VGIC initialisation code
ARM: KVM: VGIC control interface world switch
ARM: KVM: VGIC interrupt injection
ARM: KVM: vgic: retire queued, disabled interrupts
ARM: KVM: VGIC virtual CPU interface management
ARM: KVM: VGIC distributor handling
ARM: KVM: VGIC accept vcpu and dist base addresses from user space
ARM: KVM: Initial VGIC infrastructure code
ARM: KVM: Keep track of currently running vcpus
KVM: ARM: Introduce KVM_ARM_SET_DEVICE_ADDR ioctl
ARM: gic: add __ASSEMBLY__ guard to C definitions
ARM: gic: define GICH offsets for VGIC support
ARM: gic: add missing distributor defintions
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/irqchip/arm-gic.h | 33 | ||||
| -rw-r--r-- | include/uapi/linux/kvm.h | 8 |
2 files changed, 40 insertions, 1 deletions
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h index a67ca55e6f4e..3fd8e4290a1c 100644 --- a/include/linux/irqchip/arm-gic.h +++ b/include/linux/irqchip/arm-gic.h | |||
| @@ -20,16 +20,45 @@ | |||
| 20 | 20 | ||
| 21 | #define GIC_DIST_CTRL 0x000 | 21 | #define GIC_DIST_CTRL 0x000 |
| 22 | #define GIC_DIST_CTR 0x004 | 22 | #define GIC_DIST_CTR 0x004 |
| 23 | #define GIC_DIST_IGROUP 0x080 | ||
| 23 | #define GIC_DIST_ENABLE_SET 0x100 | 24 | #define GIC_DIST_ENABLE_SET 0x100 |
| 24 | #define GIC_DIST_ENABLE_CLEAR 0x180 | 25 | #define GIC_DIST_ENABLE_CLEAR 0x180 |
| 25 | #define GIC_DIST_PENDING_SET 0x200 | 26 | #define GIC_DIST_PENDING_SET 0x200 |
| 26 | #define GIC_DIST_PENDING_CLEAR 0x280 | 27 | #define GIC_DIST_PENDING_CLEAR 0x280 |
| 27 | #define GIC_DIST_ACTIVE_BIT 0x300 | 28 | #define GIC_DIST_ACTIVE_SET 0x300 |
| 29 | #define GIC_DIST_ACTIVE_CLEAR 0x380 | ||
| 28 | #define GIC_DIST_PRI 0x400 | 30 | #define GIC_DIST_PRI 0x400 |
| 29 | #define GIC_DIST_TARGET 0x800 | 31 | #define GIC_DIST_TARGET 0x800 |
| 30 | #define GIC_DIST_CONFIG 0xc00 | 32 | #define GIC_DIST_CONFIG 0xc00 |
| 31 | #define GIC_DIST_SOFTINT 0xf00 | 33 | #define GIC_DIST_SOFTINT 0xf00 |
| 32 | 34 | ||
| 35 | #define GICH_HCR 0x0 | ||
| 36 | #define GICH_VTR 0x4 | ||
| 37 | #define GICH_VMCR 0x8 | ||
| 38 | #define GICH_MISR 0x10 | ||
| 39 | #define GICH_EISR0 0x20 | ||
| 40 | #define GICH_EISR1 0x24 | ||
| 41 | #define GICH_ELRSR0 0x30 | ||
| 42 | #define GICH_ELRSR1 0x34 | ||
| 43 | #define GICH_APR 0xf0 | ||
| 44 | #define GICH_LR0 0x100 | ||
| 45 | |||
| 46 | #define GICH_HCR_EN (1 << 0) | ||
| 47 | #define GICH_HCR_UIE (1 << 1) | ||
| 48 | |||
| 49 | #define GICH_LR_VIRTUALID (0x3ff << 0) | ||
| 50 | #define GICH_LR_PHYSID_CPUID_SHIFT (10) | ||
| 51 | #define GICH_LR_PHYSID_CPUID (7 << GICH_LR_PHYSID_CPUID_SHIFT) | ||
| 52 | #define GICH_LR_STATE (3 << 28) | ||
| 53 | #define GICH_LR_PENDING_BIT (1 << 28) | ||
| 54 | #define GICH_LR_ACTIVE_BIT (1 << 29) | ||
| 55 | #define GICH_LR_EOI (1 << 19) | ||
| 56 | |||
| 57 | #define GICH_MISR_EOI (1 << 0) | ||
| 58 | #define GICH_MISR_U (1 << 1) | ||
| 59 | |||
| 60 | #ifndef __ASSEMBLY__ | ||
| 61 | |||
| 33 | struct device_node; | 62 | struct device_node; |
| 34 | 63 | ||
| 35 | extern struct irq_chip gic_arch_extn; | 64 | extern struct irq_chip gic_arch_extn; |
| @@ -45,4 +74,6 @@ static inline void gic_init(unsigned int nr, int start, | |||
| 45 | gic_init_bases(nr, start, dist, cpu, 0, NULL); | 74 | gic_init_bases(nr, start, dist, cpu, 0, NULL); |
| 46 | } | 75 | } |
| 47 | 76 | ||
| 77 | #endif /* __ASSEMBLY */ | ||
| 78 | |||
| 48 | #endif | 79 | #endif |
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h index 7f2360a46fc2..c70577cf67bc 100644 --- a/include/uapi/linux/kvm.h +++ b/include/uapi/linux/kvm.h | |||
| @@ -637,6 +637,7 @@ struct kvm_ppc_smmu_info { | |||
| 637 | #define KVM_CAP_PPC_BOOKE_WATCHDOG 83 | 637 | #define KVM_CAP_PPC_BOOKE_WATCHDOG 83 |
| 638 | #define KVM_CAP_PPC_HTAB_FD 84 | 638 | #define KVM_CAP_PPC_HTAB_FD 84 |
| 639 | #define KVM_CAP_ARM_PSCI 87 | 639 | #define KVM_CAP_ARM_PSCI 87 |
| 640 | #define KVM_CAP_ARM_SET_DEVICE_ADDR 88 | ||
| 640 | 641 | ||
| 641 | #ifdef KVM_CAP_IRQ_ROUTING | 642 | #ifdef KVM_CAP_IRQ_ROUTING |
| 642 | 643 | ||
| @@ -784,6 +785,11 @@ struct kvm_msi { | |||
| 784 | __u8 pad[16]; | 785 | __u8 pad[16]; |
| 785 | }; | 786 | }; |
| 786 | 787 | ||
| 788 | struct kvm_arm_device_addr { | ||
| 789 | __u64 id; | ||
| 790 | __u64 addr; | ||
| 791 | }; | ||
| 792 | |||
| 787 | /* | 793 | /* |
| 788 | * ioctls for VM fds | 794 | * ioctls for VM fds |
| 789 | */ | 795 | */ |
| @@ -869,6 +875,8 @@ struct kvm_s390_ucas_mapping { | |||
| 869 | #define KVM_ALLOCATE_RMA _IOR(KVMIO, 0xa9, struct kvm_allocate_rma) | 875 | #define KVM_ALLOCATE_RMA _IOR(KVMIO, 0xa9, struct kvm_allocate_rma) |
| 870 | /* Available with KVM_CAP_PPC_HTAB_FD */ | 876 | /* Available with KVM_CAP_PPC_HTAB_FD */ |
| 871 | #define KVM_PPC_GET_HTAB_FD _IOW(KVMIO, 0xaa, struct kvm_get_htab_fd) | 877 | #define KVM_PPC_GET_HTAB_FD _IOW(KVMIO, 0xaa, struct kvm_get_htab_fd) |
| 878 | /* Available with KVM_CAP_ARM_SET_DEVICE_ADDR */ | ||
| 879 | #define KVM_ARM_SET_DEVICE_ADDR _IOW(KVMIO, 0xab, struct kvm_arm_device_addr) | ||
| 872 | 880 | ||
| 873 | /* | 881 | /* |
| 874 | * ioctls for vcpu fds | 882 | * ioctls for vcpu fds |
