diff options
author | Paul Mundt <lethal@linux-sh.org> | 2006-12-04 04:17:28 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2006-12-05 20:45:40 -0500 |
commit | afbfb52e47273a440df33274452c603e8c332de2 (patch) | |
tree | 041dc70061a67e787b362959298e093830b4b4d7 /include | |
parent | c03c69610bfa728805deceeb624ee4268c722a5a (diff) |
sh: stacktrace/lockdep/irqflags tracing support.
Wire up all of the essentials for lockdep..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sh/irqflags.h | 123 | ||||
-rw-r--r-- | include/asm-sh/rwsem.h | 27 | ||||
-rw-r--r-- | include/asm-sh/system.h | 101 |
3 files changed, 150 insertions, 101 deletions
diff --git a/include/asm-sh/irqflags.h b/include/asm-sh/irqflags.h new file mode 100644 index 000000000000..9dedc1b693e3 --- /dev/null +++ b/include/asm-sh/irqflags.h | |||
@@ -0,0 +1,123 @@ | |||
1 | #ifndef __ASM_SH_IRQFLAGS_H | ||
2 | #define __ASM_SH_IRQFLAGS_H | ||
3 | |||
4 | static inline void raw_local_irq_enable(void) | ||
5 | { | ||
6 | unsigned long __dummy0, __dummy1; | ||
7 | |||
8 | __asm__ __volatile__ ( | ||
9 | "stc sr, %0\n\t" | ||
10 | "and %1, %0\n\t" | ||
11 | #ifdef CONFIG_CPU_HAS_SR_RB | ||
12 | "stc r6_bank, %1\n\t" | ||
13 | "or %1, %0\n\t" | ||
14 | #endif | ||
15 | "ldc %0, sr\n\t" | ||
16 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
17 | : "1" (~0x000000f0) | ||
18 | : "memory" | ||
19 | ); | ||
20 | } | ||
21 | |||
22 | static inline void raw_local_irq_disable(void) | ||
23 | { | ||
24 | unsigned long flags; | ||
25 | |||
26 | __asm__ __volatile__ ( | ||
27 | "stc sr, %0\n\t" | ||
28 | "or #0xf0, %0\n\t" | ||
29 | "ldc %0, sr\n\t" | ||
30 | : "=&z" (flags) | ||
31 | : /* no inputs */ | ||
32 | : "memory" | ||
33 | ); | ||
34 | } | ||
35 | |||
36 | static inline void set_bl_bit(void) | ||
37 | { | ||
38 | unsigned long __dummy0, __dummy1; | ||
39 | |||
40 | __asm__ __volatile__ ( | ||
41 | "stc sr, %0\n\t" | ||
42 | "or %2, %0\n\t" | ||
43 | "and %3, %0\n\t" | ||
44 | "ldc %0, sr\n\t" | ||
45 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
46 | : "r" (0x10000000), "r" (0xffffff0f) | ||
47 | : "memory" | ||
48 | ); | ||
49 | } | ||
50 | |||
51 | static inline void clear_bl_bit(void) | ||
52 | { | ||
53 | unsigned long __dummy0, __dummy1; | ||
54 | |||
55 | __asm__ __volatile__ ( | ||
56 | "stc sr, %0\n\t" | ||
57 | "and %2, %0\n\t" | ||
58 | "ldc %0, sr\n\t" | ||
59 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
60 | : "1" (~0x10000000) | ||
61 | : "memory" | ||
62 | ); | ||
63 | } | ||
64 | |||
65 | static inline unsigned long __raw_local_save_flags(void) | ||
66 | { | ||
67 | unsigned long flags; | ||
68 | |||
69 | __asm__ __volatile__ ( | ||
70 | "stc sr, %0\n\t" | ||
71 | "and #0xf0, %0\n\t" | ||
72 | : "=&z" (flags) | ||
73 | : /* no inputs */ | ||
74 | : "memory" | ||
75 | ); | ||
76 | |||
77 | return flags; | ||
78 | } | ||
79 | |||
80 | #define raw_local_save_flags(flags) \ | ||
81 | do { (flags) = __raw_local_save_flags(); } while (0) | ||
82 | |||
83 | static inline int raw_irqs_disabled_flags(unsigned long flags) | ||
84 | { | ||
85 | return (flags != 0); | ||
86 | } | ||
87 | |||
88 | static inline int raw_irqs_disabled(void) | ||
89 | { | ||
90 | unsigned long flags = __raw_local_save_flags(); | ||
91 | |||
92 | return raw_irqs_disabled_flags(flags); | ||
93 | } | ||
94 | |||
95 | static inline unsigned long __raw_local_irq_save(void) | ||
96 | { | ||
97 | unsigned long flags, __dummy; | ||
98 | |||
99 | __asm__ __volatile__ ( | ||
100 | "stc sr, %1\n\t" | ||
101 | "mov %1, %0\n\t" | ||
102 | "or #0xf0, %0\n\t" | ||
103 | "ldc %0, sr\n\t" | ||
104 | "mov %1, %0\n\t" | ||
105 | "and #0xf0, %0\n\t" | ||
106 | : "=&z" (flags), "=&r" (__dummy) | ||
107 | : /* no inputs */ | ||
108 | : "memory" | ||
109 | ); | ||
110 | |||
111 | return flags; | ||
112 | } | ||
113 | |||
114 | #define raw_local_irq_save(flags) \ | ||
115 | do { (flags) = __raw_local_irq_save(); } while (0) | ||
116 | |||
117 | static inline void raw_local_irq_restore(unsigned long flags) | ||
118 | { | ||
119 | if ((flags & 0xf0) != 0xf0) | ||
120 | raw_local_irq_enable(); | ||
121 | } | ||
122 | |||
123 | #endif /* __ASM_SH_IRQFLAGS_H */ | ||
diff --git a/include/asm-sh/rwsem.h b/include/asm-sh/rwsem.h index 9d2aea5e8488..4931ba817d73 100644 --- a/include/asm-sh/rwsem.h +++ b/include/asm-sh/rwsem.h | |||
@@ -25,11 +25,21 @@ struct rw_semaphore { | |||
25 | #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) | 25 | #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) |
26 | spinlock_t wait_lock; | 26 | spinlock_t wait_lock; |
27 | struct list_head wait_list; | 27 | struct list_head wait_list; |
28 | #ifdef CONFIG_DEBUG_LOCK_ALLOC | ||
29 | struct lockdep_map dep_map; | ||
30 | #endif | ||
28 | }; | 31 | }; |
29 | 32 | ||
33 | #ifdef CONFIG_DEBUG_LOCK_ALLOC | ||
34 | # define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } | ||
35 | #else | ||
36 | # define __RWSEM_DEP_MAP_INIT(lockname) | ||
37 | #endif | ||
38 | |||
30 | #define __RWSEM_INITIALIZER(name) \ | 39 | #define __RWSEM_INITIALIZER(name) \ |
31 | { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \ | 40 | { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \ |
32 | LIST_HEAD_INIT((name).wait_list) } | 41 | LIST_HEAD_INIT((name).wait_list) \ |
42 | __RWSEM_DEP_MAP_INIT(name) } | ||
33 | 43 | ||
34 | #define DECLARE_RWSEM(name) \ | 44 | #define DECLARE_RWSEM(name) \ |
35 | struct rw_semaphore name = __RWSEM_INITIALIZER(name) | 45 | struct rw_semaphore name = __RWSEM_INITIALIZER(name) |
@@ -39,6 +49,16 @@ extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); | |||
39 | extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); | 49 | extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); |
40 | extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); | 50 | extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); |
41 | 51 | ||
52 | extern void __init_rwsem(struct rw_semaphore *sem, const char *name, | ||
53 | struct lock_class_key *key); | ||
54 | |||
55 | #define init_rwsem(sem) \ | ||
56 | do { \ | ||
57 | static struct lock_class_key __key; \ | ||
58 | \ | ||
59 | __init_rwsem((sem), #sem, &__key); \ | ||
60 | } while (0) | ||
61 | |||
42 | static inline void init_rwsem(struct rw_semaphore *sem) | 62 | static inline void init_rwsem(struct rw_semaphore *sem) |
43 | { | 63 | { |
44 | sem->count = RWSEM_UNLOCKED_VALUE; | 64 | sem->count = RWSEM_UNLOCKED_VALUE; |
@@ -141,6 +161,11 @@ static inline void __downgrade_write(struct rw_semaphore *sem) | |||
141 | rwsem_downgrade_wake(sem); | 161 | rwsem_downgrade_wake(sem); |
142 | } | 162 | } |
143 | 163 | ||
164 | static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) | ||
165 | { | ||
166 | __down_write(sem); | ||
167 | } | ||
168 | |||
144 | /* | 169 | /* |
145 | * implement exchange and add functionality | 170 | * implement exchange and add functionality |
146 | */ | 171 | */ |
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index 3340126f4e0f..b1e42e7f998b 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h | |||
@@ -6,6 +6,7 @@ | |||
6 | * Copyright (C) 2002 Paul Mundt | 6 | * Copyright (C) 2002 Paul Mundt |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/irqflags.h> | ||
9 | #include <asm/types.h> | 10 | #include <asm/types.h> |
10 | 11 | ||
11 | /* | 12 | /* |
@@ -131,103 +132,6 @@ static inline unsigned long tas(volatile int *m) | |||
131 | 132 | ||
132 | #define set_mb(var, value) do { xchg(&var, value); } while (0) | 133 | #define set_mb(var, value) do { xchg(&var, value); } while (0) |
133 | 134 | ||
134 | /* Interrupt Control */ | ||
135 | #ifdef CONFIG_CPU_HAS_SR_RB | ||
136 | static inline void local_irq_enable(void) | ||
137 | { | ||
138 | unsigned long __dummy0, __dummy1; | ||
139 | |||
140 | __asm__ __volatile__("stc sr, %0\n\t" | ||
141 | "and %1, %0\n\t" | ||
142 | "stc r6_bank, %1\n\t" | ||
143 | "or %1, %0\n\t" | ||
144 | "ldc %0, sr" | ||
145 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
146 | : "1" (~0x000000f0) | ||
147 | : "memory"); | ||
148 | } | ||
149 | #else | ||
150 | static inline void local_irq_enable(void) | ||
151 | { | ||
152 | unsigned long __dummy0, __dummy1; | ||
153 | |||
154 | __asm__ __volatile__ ( | ||
155 | "stc sr, %0\n\t" | ||
156 | "and %1, %0\n\t" | ||
157 | "ldc %0, sr\n\t" | ||
158 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
159 | : "1" (~0x000000f0) | ||
160 | : "memory"); | ||
161 | } | ||
162 | #endif | ||
163 | |||
164 | static inline void local_irq_disable(void) | ||
165 | { | ||
166 | unsigned long __dummy; | ||
167 | __asm__ __volatile__("stc sr, %0\n\t" | ||
168 | "or #0xf0, %0\n\t" | ||
169 | "ldc %0, sr" | ||
170 | : "=&z" (__dummy) | ||
171 | : /* no inputs */ | ||
172 | : "memory"); | ||
173 | } | ||
174 | |||
175 | static inline void set_bl_bit(void) | ||
176 | { | ||
177 | unsigned long __dummy0, __dummy1; | ||
178 | |||
179 | __asm__ __volatile__ ("stc sr, %0\n\t" | ||
180 | "or %2, %0\n\t" | ||
181 | "and %3, %0\n\t" | ||
182 | "ldc %0, sr" | ||
183 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
184 | : "r" (0x10000000), "r" (0xffffff0f) | ||
185 | : "memory"); | ||
186 | } | ||
187 | |||
188 | static inline void clear_bl_bit(void) | ||
189 | { | ||
190 | unsigned long __dummy0, __dummy1; | ||
191 | |||
192 | __asm__ __volatile__ ("stc sr, %0\n\t" | ||
193 | "and %2, %0\n\t" | ||
194 | "ldc %0, sr" | ||
195 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
196 | : "1" (~0x10000000) | ||
197 | : "memory"); | ||
198 | } | ||
199 | |||
200 | #define local_save_flags(x) \ | ||
201 | __asm__("stc sr, %0; and #0xf0, %0" : "=&z" (x) :/**/: "memory" ) | ||
202 | |||
203 | #define irqs_disabled() \ | ||
204 | ({ \ | ||
205 | unsigned long flags; \ | ||
206 | local_save_flags(flags); \ | ||
207 | (flags != 0); \ | ||
208 | }) | ||
209 | |||
210 | static inline unsigned long local_irq_save(void) | ||
211 | { | ||
212 | unsigned long flags, __dummy; | ||
213 | |||
214 | __asm__ __volatile__("stc sr, %1\n\t" | ||
215 | "mov %1, %0\n\t" | ||
216 | "or #0xf0, %0\n\t" | ||
217 | "ldc %0, sr\n\t" | ||
218 | "mov %1, %0\n\t" | ||
219 | "and #0xf0, %0" | ||
220 | : "=&z" (flags), "=&r" (__dummy) | ||
221 | :/**/ | ||
222 | : "memory" ); | ||
223 | return flags; | ||
224 | } | ||
225 | |||
226 | #define local_irq_restore(x) do { \ | ||
227 | if ((x & 0x000000f0) != 0x000000f0) \ | ||
228 | local_irq_enable(); \ | ||
229 | } while (0) | ||
230 | |||
231 | /* | 135 | /* |
232 | * Jump to P2 area. | 136 | * Jump to P2 area. |
233 | * When handling TLB or caches, we need to do it from P2 area. | 137 | * When handling TLB or caches, we need to do it from P2 area. |
@@ -264,9 +168,6 @@ do { \ | |||
264 | : "=&r" (__dummy)); \ | 168 | : "=&r" (__dummy)); \ |
265 | } while (0) | 169 | } while (0) |
266 | 170 | ||
267 | /* For spinlocks etc */ | ||
268 | #define local_irq_save(x) x = local_irq_save() | ||
269 | |||
270 | static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) | 171 | static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) |
271 | { | 172 | { |
272 | unsigned long flags, retval; | 173 | unsigned long flags, retval; |