diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-03-23 11:59:37 -0500 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-03-23 11:59:37 -0500 |
| commit | 9c42954dfd50d02963cd453fb84bfef3967af2f0 (patch) | |
| tree | 2b267af6c65b7fbc7cced81997108acafeb7bcd4 /include | |
| parent | 7d420896256a4bffe44202f282fbdd4c74d779a8 (diff) | |
[ARM] Move enable_irq and disable_irq to assembler.h
5d25ac038a317d454a4321cba955f756400835a5 broke VFP builds due to
enable_irq not being defined as an assembly macro. Move it to
assembler.h so everyone can use it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/assembler.h | 27 |
1 files changed, 22 insertions, 5 deletions
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index f31ac92b6c7f..d53bafa9bf1c 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h | |||
| @@ -80,16 +80,33 @@ | |||
| 80 | instr regs | 80 | instr regs |
| 81 | 81 | ||
| 82 | /* | 82 | /* |
| 83 | * Save the current IRQ state and disable IRQs. Note that this macro | 83 | * Enable and disable interrupts |
| 84 | * assumes FIQs are enabled, and that the processor is in SVC mode. | ||
| 85 | */ | 84 | */ |
| 86 | .macro save_and_disable_irqs, oldcpsr | ||
| 87 | mrs \oldcpsr, cpsr | ||
| 88 | #if __LINUX_ARM_ARCH__ >= 6 | 85 | #if __LINUX_ARM_ARCH__ >= 6 |
| 86 | .macro disable_irq | ||
| 89 | cpsid i | 87 | cpsid i |
| 88 | .endm | ||
| 89 | |||
| 90 | .macro enable_irq | ||
| 91 | cpsie i | ||
| 92 | .endm | ||
| 90 | #else | 93 | #else |
| 91 | msr cpsr_c, #PSR_I_BIT | MODE_SVC | 94 | .macro disable_irq |
| 95 | msr cpsr_c, #PSR_I_BIT | SVC_MODE | ||
| 96 | .endm | ||
| 97 | |||
| 98 | .macro enable_irq | ||
| 99 | msr cpsr_c, #SVC_MODE | ||
| 100 | .endm | ||
| 92 | #endif | 101 | #endif |
| 102 | |||
| 103 | /* | ||
| 104 | * Save the current IRQ state and disable IRQs. Note that this macro | ||
| 105 | * assumes FIQs are enabled, and that the processor is in SVC mode. | ||
| 106 | */ | ||
| 107 | .macro save_and_disable_irqs, oldcpsr | ||
| 108 | mrs \oldcpsr, cpsr | ||
| 109 | disable_irq | ||
| 93 | .endm | 110 | .endm |
| 94 | 111 | ||
| 95 | /* | 112 | /* |
