Merge branch 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (31 commits)
  sh: Add support for AP-SH4AD-0A board.
  sh: Add support for AP-SH4A-3A board.
  sh: Add a new mach type for alpha project boards.
  serial: sh-sci: build fixes.
  sh: sh7372 SH4AL-DSP probe support
  sh: sh7366 Enable SDIO IRQs
  sh: sh7343 Enable SDIO IRQs
  sh: mach-ecovec24: enable runtime PM for SDHI
  sh: sh7723 / ap325rxa enable SDIO IRQs
  sh: sh7722 Enable SDIO IRQs
  sh: sh7724 Enable SDIO IRQs
  sh: Fix up legacy PTEA space attribute mapping.
  sh: Stub out legacy PCC pgprot encoding for X2 TLBs.
  sh: constify prefetch pointers.
  sh: Add a machvec callback for early memblock reservations.
  sh: update sh7757lcr_defconfig
  sh: add PVR probing for SH7757 3rd cut
  sh: Use device_initcall() instead of __initcall()
  sh: intc - convert board specific landisk code
  sh: Move init_landisk_IRQ to header file
  ...

2 files changed, 36 insertions, 23 deletions

diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
index 44fc5348fd5d..bf173502d744 100644
--- a/include/linux/mmc/sh_mmcif.h
+++ b/include/linux/mmc/sh_mmcif.h
@@ -104,6 +104,9 @@ static inline void sh_mmcif_writel(void __iomem *addr, int reg, u32 val)
 
 #define SH_MMCIF_BBS 512 /* boot block size */
 
+enum { MMCIF_PROGRESS_ENTER, MMCIF_PROGRESS_INIT,
+       MMCIF_PROGRESS_LOAD, MMCIF_PROGRESS_DONE };
+
 static inline void sh_mmcif_boot_cmd_send(void __iomem *base,
                                           unsigned long cmd, unsigned long arg)
 {
@@ -166,6 +169,17 @@ static inline int sh_mmcif_boot_do_read(void __iomem *base,
         unsigned long k;
         int ret = 0;
 
+        /* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */
+        sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL,
+                        CLK_ENABLE | CLKDIV_4 | SRSPTO_256 |
+                        SRBSYTO_29 | SRWDTO_29 | SCCSTO_29);
+
+        /* CMD9 - Get CSD */
+        sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000);
+
+        /* CMD7 - Select the card */
+        sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000);
+
         /* CMD16 - Set the block size */
         sh_mmcif_boot_cmd(base, 0x10400000, SH_MMCIF_BBS);
 
@@ -209,27 +223,4 @@ static inline void sh_mmcif_boot_init(void __iomem *base)
         sh_mmcif_boot_cmd(base, 0x03400040, 0x00010000);
 }
 
-static inline void sh_mmcif_boot_slurp(void __iomem *base,
-                                       unsigned char *buf,
-                                       unsigned long no_bytes)
-{
-        unsigned long tmp;
-
-        /* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */
-        sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL,
-                        CLK_ENABLE | CLKDIV_4 | SRSPTO_256 |
-                        SRBSYTO_29 | SRWDTO_29 | SCCSTO_29);
-
-        /* CMD9 - Get CSD */
-        sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000);
-
-        /* CMD7 - Select the card */
-        sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000);
-
-        tmp = no_bytes / SH_MMCIF_BBS;
-        tmp += (no_bytes % SH_MMCIF_BBS) ? 1 : 0;
-
-        sh_mmcif_boot_do_read(base, 512, tmp, buf);
-}
-
 #endif /* __SH_MMCIF_H__ */
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index baed2122c5a6..1630d9cae22a 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -8,6 +8,23 @@
  * Generic header for SuperH SCI(F) (used by sh/sh64/h8300 and related parts)
  */
 
+enum {
+        SCBRR_ALGO_1,           /* ((clk + 16 * bps) / (16 * bps) - 1) */
+        SCBRR_ALGO_2,           /* ((clk + 16 * bps) / (32 * bps) - 1) */
+        SCBRR_ALGO_3,           /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
+        SCBRR_ALGO_4,           /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
+        SCBRR_ALGO_5,           /* (((clk * 1000 / 32) / bps) - 1) */
+};
+
+#define SCSCR_TIE       (1 << 7)
+#define SCSCR_RIE       (1 << 6)
+#define SCSCR_TE        (1 << 5)
+#define SCSCR_RE        (1 << 4)
+#define SCSCR_REIE      (1 << 3)        /* not supported by all parts */
+#define SCSCR_TOIE      (1 << 2)        /* not supported by all parts */
+#define SCSCR_CKE1      (1 << 1)
+#define SCSCR_CKE0      (1 << 0)
+
 /* Offsets into the sci_port->irqs array */
 enum {
         SCIx_ERI_IRQ,
@@ -29,7 +46,12 @@ struct plat_sci_port {
         unsigned int    type;                   /* SCI / SCIF / IRDA */
         upf_t           flags;                  /* UPF_* flags */
         char            *clk;                   /* clock string */
+
+        unsigned int    scbrr_algo_id;          /* SCBRR calculation algo */
+        unsigned int    scscr;                  /* SCSCR initialization */
+
         struct device   *dma_dev;
+
 #ifdef CONFIG_SERIAL_SH_SCI_DMA
         unsigned int dma_slave_tx;
         unsigned int dma_slave_rx;