Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git

11 files changed, 105 insertions, 56 deletions

diff --git a/include/asm-i386/msi.h b/include/asm-i386/msi.h
index b85393094c83..f041d4495faf 100644
--- a/include/asm-i386/msi.h
+++ b/include/asm-i386/msi.h
@@ -10,13 +10,6 @@
 #include <mach_apic.h>
 
 #define LAST_DEVICE_VECTOR              232
-#define MSI_DEST_MODE                   MSI_LOGICAL_MODE
-#define MSI_TARGET_CPU_SHIFT            12
-
-#ifdef CONFIG_SMP
-#define MSI_TARGET_CPU          logical_smp_processor_id()
-#else
-#define MSI_TARGET_CPU  cpu_to_logical_apicid(first_cpu(cpu_online_map))
-#endif
+#define MSI_TARGET_CPU_SHIFT    12
 
 #endif /* ASM_MSI_H */
diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h
index 13250199976d..61d3ab9db70c 100644
--- a/include/asm-i386/smp.h
+++ b/include/asm-i386/smp.h
@@ -45,6 +45,8 @@ extern void unlock_ipi_call_lock(void);
 #define MAX_APICID 256
 extern u8 x86_cpu_to_apicid[];
 
+#define cpu_physical_id(cpu)    x86_cpu_to_apicid[cpu]
+
 #ifdef CONFIG_HOTPLUG_CPU
 extern void cpu_exit_clear(void);
 extern void cpu_uninit(void);
@@ -92,6 +94,10 @@ extern int __cpu_disable(void);
 extern void __cpu_die(unsigned int cpu);
 #endif /* !__ASSEMBLY__ */
 
+#else /* CONFIG_SMP */
+
+#define cpu_physical_id(cpu)            boot_cpu_physical_apicid
+
 #define NO_PROC_ID              0xFF            /* No processor magic marker */
 
 #endif
diff --git a/include/asm-ia64/kdebug.h b/include/asm-ia64/kdebug.h
index 4d376e1663f7..8b01a083dde6 100644
--- a/include/asm-ia64/kdebug.h
+++ b/include/asm-ia64/kdebug.h
@@ -22,6 +22,9 @@
  * 2005-Apr     Rusty Lynch <rusty.lynch@intel.com> and Anil S Keshavamurthy
  *              <anil.s.keshavamurthy@intel.com> adopted from
  *              include/asm-x86_64/kdebug.h
+ *
+ * 2005-Oct     Keith Owens <kaos@sgi.com>.  Expand notify_die to cover more
+ *              events.
  */
 #include <linux/notifier.h>
 
@@ -35,13 +38,36 @@ struct die_args {
         int signr;
 };
 
-int register_die_notifier(struct notifier_block *nb);
+extern int register_die_notifier(struct notifier_block *);
+extern int unregister_die_notifier(struct notifier_block *);
 extern struct notifier_block *ia64die_chain;
 
 enum die_val {
         DIE_BREAK = 1,
-        DIE_SS,
+        DIE_FAULT,
+        DIE_OOPS,
         DIE_PAGE_FAULT,
+        DIE_MACHINE_HALT,
+        DIE_MACHINE_RESTART,
+        DIE_MCA_MONARCH_ENTER,
+        DIE_MCA_MONARCH_PROCESS,
+        DIE_MCA_MONARCH_LEAVE,
+        DIE_MCA_SLAVE_ENTER,
+        DIE_MCA_SLAVE_PROCESS,
+        DIE_MCA_SLAVE_LEAVE,
+        DIE_MCA_RENDZVOUS_ENTER,
+        DIE_MCA_RENDZVOUS_PROCESS,
+        DIE_MCA_RENDZVOUS_LEAVE,
+        DIE_INIT_MONARCH_ENTER,
+        DIE_INIT_MONARCH_PROCESS,
+        DIE_INIT_MONARCH_LEAVE,
+        DIE_INIT_SLAVE_ENTER,
+        DIE_INIT_SLAVE_PROCESS,
+        DIE_INIT_SLAVE_LEAVE,
+        DIE_KDEBUG_ENTER,
+        DIE_KDEBUG_LEAVE,
+        DIE_KDUMP_ENTER,
+        DIE_KDUMP_LEAVE,
 };
 
 static inline int notify_die(enum die_val val, char *str, struct pt_regs *regs,
diff --git a/include/asm-ia64/mmu_context.h b/include/asm-ia64/mmu_context.h
index 8d6e72f7b08e..b5c65081a3aa 100644
--- a/include/asm-ia64/mmu_context.h
+++ b/include/asm-ia64/mmu_context.h
@@ -7,12 +7,13 @@
  */
 
 /*
- * Routines to manage the allocation of task context numbers.  Task context numbers are
- * used to reduce or eliminate the need to perform TLB flushes due to context switches.
- * Context numbers are implemented using ia-64 region ids.  Since the IA-64 TLB does not
- * consider the region number when performing a TLB lookup, we need to assign a unique
- * region id to each region in a process.  We use the least significant three bits in a
- * region id for this purpose.
+ * Routines to manage the allocation of task context numbers.  Task context
+ * numbers are used to reduce or eliminate the need to perform TLB flushes
+ * due to context switches.  Context numbers are implemented using ia-64
+ * region ids.  Since the IA-64 TLB does not consider the region number when
+ * performing a TLB lookup, we need to assign a unique region id to each
+ * region in a process.  We use the least significant three bits in aregion
+ * id for this purpose.
  */
 
 #define IA64_REGION_ID_KERNEL   0 /* the kernel's region id (tlb.c depends on this being 0) */
@@ -32,13 +33,17 @@
 struct ia64_ctx {
         spinlock_t lock;
         unsigned int next;      /* next context number to use */
-        unsigned int limit;     /* next >= limit => must call wrap_mmu_context() */
-        unsigned int max_ctx;   /* max. context value supported by all CPUs */
+        unsigned int limit;     /* available free range */
+        unsigned int max_ctx;   /* max. context value supported by all CPUs */
+                                /* call wrap_mmu_context when next >= max */
+        unsigned long *bitmap;  /* bitmap size is max_ctx+1 */
+        unsigned long *flushmap;/* pending rid to be flushed */
 };
 
 extern struct ia64_ctx ia64_ctx;
 DECLARE_PER_CPU(u8, ia64_need_tlb_flush);
 
+extern void mmu_context_init (void);
 extern void wrap_mmu_context (struct mm_struct *mm);
 
 static inline void
@@ -47,10 +52,10 @@ enter_lazy_tlb (struct mm_struct *mm, struct task_struct *tsk)
 }
 
 /*
- * When the context counter wraps around all TLBs need to be flushed because an old
- * context number might have been reused. This is signalled by the ia64_need_tlb_flush
- * per-CPU variable, which is checked in the routine below. Called by activate_mm().
- * <efocht@ess.nec.de>
+ * When the context counter wraps around all TLBs need to be flushed because
+ * an old context number might have been reused. This is signalled by the
+ * ia64_need_tlb_flush per-CPU variable, which is checked in the routine
+ * below. Called by activate_mm(). <efocht@ess.nec.de>
  */
 static inline void
 delayed_tlb_flush (void)
@@ -60,11 +65,9 @@ delayed_tlb_flush (void)
 
         if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) {
                 spin_lock_irqsave(&ia64_ctx.lock, flags);
-                {
-                        if (__ia64_per_cpu_var(ia64_need_tlb_flush)) {
-                                local_flush_tlb_all();
-                                __ia64_per_cpu_var(ia64_need_tlb_flush) = 0;
-                        }
+                if (__ia64_per_cpu_var(ia64_need_tlb_flush)) {
+                        local_flush_tlb_all();
+                        __ia64_per_cpu_var(ia64_need_tlb_flush) = 0;