diff options
| author | Dave Airlie <airlied@redhat.com> | 2011-10-27 12:15:10 -0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2011-10-27 12:15:10 -0400 |
| commit | 83f30d0e0343ad010afbc3523007b68e8b439694 (patch) | |
| tree | 7f24184e5560f9daa63c34fa37a8824694822313 /include | |
| parent | 9b553f72869584cc14d5724fbbc09f88de0f08de (diff) | |
Revert "drm/radeon/kms: add a new gem_wait ioctl with read/write flags"
This reverts commit d3ed74027f1dd197b7e08247a40d3bf9be1852b0.
Further upstream discussion between Thomas and Marek decided this needed
more work and driver specifics. So revert before it goes upstream.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/drm/radeon_drm.h | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h index 939b8547cc26..b65be6054a18 100644 --- a/include/drm/radeon_drm.h +++ b/include/drm/radeon_drm.h | |||
| @@ -509,7 +509,6 @@ typedef struct { | |||
| 509 | #define DRM_RADEON_GEM_SET_TILING 0x28 | 509 | #define DRM_RADEON_GEM_SET_TILING 0x28 |
| 510 | #define DRM_RADEON_GEM_GET_TILING 0x29 | 510 | #define DRM_RADEON_GEM_GET_TILING 0x29 |
| 511 | #define DRM_RADEON_GEM_BUSY 0x2a | 511 | #define DRM_RADEON_GEM_BUSY 0x2a |
| 512 | #define DRM_RADEON_GEM_WAIT 0x2b | ||
| 513 | 512 | ||
| 514 | #define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t) | 513 | #define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t) |
| 515 | #define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START) | 514 | #define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START) |
| @@ -551,7 +550,6 @@ typedef struct { | |||
| 551 | #define DRM_IOCTL_RADEON_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) | 550 | #define DRM_IOCTL_RADEON_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) |
| 552 | #define DRM_IOCTL_RADEON_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) | 551 | #define DRM_IOCTL_RADEON_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) |
| 553 | #define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy) | 552 | #define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy) |
| 554 | #define DRM_IOCTL_RADEON_GEM_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT, struct drm_radeon_gem_wait) | ||
| 555 | 553 | ||
| 556 | typedef struct drm_radeon_init { | 554 | typedef struct drm_radeon_init { |
| 557 | enum { | 555 | enum { |
| @@ -848,15 +846,6 @@ struct drm_radeon_gem_busy { | |||
| 848 | uint32_t domain; | 846 | uint32_t domain; |
| 849 | }; | 847 | }; |
| 850 | 848 | ||
| 851 | #define RADEON_GEM_NO_WAIT 0x1 | ||
| 852 | #define RADEON_GEM_USAGE_READ 0x2 | ||
| 853 | #define RADEON_GEM_USAGE_WRITE 0x4 | ||
| 854 | |||
| 855 | struct drm_radeon_gem_wait { | ||
| 856 | uint32_t handle; | ||
| 857 | uint32_t flags; /* one of RADEON_GEM_* */ | ||
| 858 | }; | ||
| 859 | |||
| 860 | struct drm_radeon_gem_pread { | 849 | struct drm_radeon_gem_pread { |
| 861 | /** Handle for the object being read. */ | 850 | /** Handle for the object being read. */ |
| 862 | uint32_t handle; | 851 | uint32_t handle; |
