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authorRony Efraim <ronye@mellanox.com>2013-05-08 18:22:35 -0400
committerDavid S. Miller <davem@davemloft.net>2013-05-11 19:12:44 -0400
commit7677fc965fba41d1386fa3b76a1f00303f02bb2d (patch)
tree1324b8af989563dea62f9bc7f952c411f8d8a2dd /include
parent4e8cf5b8a1da8dbe1ece5f084b99f5c902ea709b (diff)
net/mlx4: Strengthen VLAN tags/priorities enforcement in VST mode
Make sure that the following steps are taken: - drop packets sent by the VF with vlan tag - block packets with vlan tag which are steered to the VF - drop/block tagged packets when the policy is priority-tagged - make sure VLAN stripping for received packets is set - make sure force UP bit for the VF QP is set Use enum values for all the above instead of numerical bit offsets. Signed-off-by: Rony Efraim <ronye@mellanox.com> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mlx4/qp.h29
1 files changed, 27 insertions, 2 deletions
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h
index 67f46ad6920a..352eec9df1b8 100644
--- a/include/linux/mlx4/qp.h
+++ b/include/linux/mlx4/qp.h
@@ -126,7 +126,7 @@ struct mlx4_rss_context {
126 126
127struct mlx4_qp_path { 127struct mlx4_qp_path {
128 u8 fl; 128 u8 fl;
129 u8 reserved1[1]; 129 u8 vlan_control;
130 u8 disable_pkey_check; 130 u8 disable_pkey_check;
131 u8 pkey_index; 131 u8 pkey_index;
132 u8 counter_index; 132 u8 counter_index;
@@ -141,11 +141,32 @@ struct mlx4_qp_path {
141 u8 sched_queue; 141 u8 sched_queue;
142 u8 vlan_index; 142 u8 vlan_index;
143 u8 feup; 143 u8 feup;
144 u8 reserved3; 144 u8 fvl_rx;
145 u8 reserved4[2]; 145 u8 reserved4[2];
146 u8 dmac[6]; 146 u8 dmac[6];
147}; 147};
148 148
149enum { /* fl */
150 MLX4_FL_CV = 1 << 6,
151 MLX4_FL_ETH_HIDE_CQE_VLAN = 1 << 2
152};
153enum { /* vlan_control */
154 MLX4_VLAN_CTRL_ETH_TX_BLOCK_TAGGED = 1 << 6,
155 MLX4_VLAN_CTRL_ETH_RX_BLOCK_TAGGED = 1 << 2,
156 MLX4_VLAN_CTRL_ETH_RX_BLOCK_PRIO_TAGGED = 1 << 1, /* 802.1p priority tag */
157 MLX4_VLAN_CTRL_ETH_RX_BLOCK_UNTAGGED = 1 << 0
158};
159
160enum { /* feup */
161 MLX4_FEUP_FORCE_ETH_UP = 1 << 6, /* force Eth UP */
162 MLX4_FSM_FORCE_ETH_SRC_MAC = 1 << 5, /* force Source MAC */
163 MLX4_FVL_FORCE_ETH_VLAN = 1 << 3 /* force Eth vlan */
164};
165
166enum { /* fvl_rx */
167 MLX4_FVL_RX_FORCE_ETH_VLAN = 1 << 0 /* enforce Eth rx vlan */
168};
169
149struct mlx4_qp_context { 170struct mlx4_qp_context {
150 __be32 flags; 171 __be32 flags;
151 __be32 pd; 172 __be32 pd;
@@ -185,6 +206,10 @@ struct mlx4_qp_context {
185 u32 reserved5[10]; 206 u32 reserved5[10];
186}; 207};
187 208
209enum { /* param3 */
210 MLX4_STRIP_VLAN = 1 << 30
211};
212
188/* Which firmware version adds support for NEC (NoErrorCompletion) bit */ 213/* Which firmware version adds support for NEC (NoErrorCompletion) bit */
189#define MLX4_FW_VER_WQE_CTRL_NEC mlx4_fw_ver(2, 2, 232) 214#define MLX4_FW_VER_WQE_CTRL_NEC mlx4_fw_ver(2, 2, 232)
190 215