Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband into for-next

6 files changed, 341 insertions, 9 deletions

diff --git a/include/linux/mlx5/cq.h b/include/linux/mlx5/cq.h
index 2202c7f72b75..f6b17ac601bd 100644
--- a/include/linux/mlx5/cq.h
+++ b/include/linux/mlx5/cq.h
@@ -80,6 +80,7 @@ enum {
         MLX5_CQE_RESP_SEND_IMM  = 3,
         MLX5_CQE_RESP_SEND_INV  = 4,
         MLX5_CQE_RESIZE_CQ      = 5,
+        MLX5_CQE_SIG_ERR        = 12,
         MLX5_CQE_REQ_ERR        = 13,
         MLX5_CQE_RESP_ERR       = 14,
         MLX5_CQE_INVALID        = 15,
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 817a6fae6d2c..407bdb67fd4f 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -48,6 +48,8 @@ enum {
         MLX5_MAX_COMMANDS               = 32,
         MLX5_CMD_DATA_BLOCK_SIZE        = 512,
         MLX5_PCI_CMD_XPORT              = 7,
+        MLX5_MKEY_BSF_OCTO_SIZE         = 4,
+        MLX5_MAX_PSVS                   = 4,
 };
 
 enum {
@@ -116,6 +118,7 @@ enum {
         MLX5_MKEY_MASK_START_ADDR       = 1ull << 6,
         MLX5_MKEY_MASK_PD               = 1ull << 7,
         MLX5_MKEY_MASK_EN_RINVAL        = 1ull << 8,
+        MLX5_MKEY_MASK_EN_SIGERR        = 1ull << 9,
         MLX5_MKEY_MASK_BSF_EN           = 1ull << 12,
         MLX5_MKEY_MASK_KEY              = 1ull << 13,
         MLX5_MKEY_MASK_QPN              = 1ull << 14,
@@ -555,6 +558,23 @@ struct mlx5_cqe64 {
         u8              op_own;
 };
 
+struct mlx5_sig_err_cqe {
+        u8              rsvd0[16];
+        __be32          expected_trans_sig;
+        __be32          actual_trans_sig;
+        __be32          expected_reftag;
+        __be32          actual_reftag;
+        __be16          syndrome;
+        u8              rsvd22[2];
+        __be32          mkey;
+        __be64          err_offset;
+        u8              rsvd30[8];
+        __be32          qpn;
+        u8              rsvd38[2];
+        u8              signature;
+        u8              op_own;
+};
+
 struct mlx5_wqe_srq_next_seg {
         u8                      rsvd0[2];
         __be16                  next_wqe_index;
@@ -936,4 +956,27 @@ enum {
         MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO        = 1 <<  0
 };
 
+struct mlx5_allocate_psv_in {
+        struct mlx5_inbox_hdr   hdr;
+        __be32                  npsv_pd;
+        __be32                  rsvd_psv0;
+};
+
+struct mlx5_allocate_psv_out {
+        struct mlx5_outbox_hdr  hdr;
+        u8                      rsvd[8];
+        __be32                  psv_idx[4];
+};
+
+struct mlx5_destroy_psv_in {
+        struct mlx5_inbox_hdr   hdr;
+        __be32                  psv_number;
+        u8                      rsvd[4];
+};
+
+struct mlx5_destroy_psv_out {
+        struct mlx5_outbox_hdr  hdr;
+        u8                      rsvd[8];
+};
+
 #endif /* MLX5_DEVICE_H */
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index 130bc8d77fa5..93cef6313e72 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -401,6 +401,26 @@ struct mlx5_eq {
         struct mlx5_rsc_debug   *dbg;
 };
 
+struct mlx5_core_psv {
+        u32     psv_idx;
+        struct psv_layout {
+                u32     pd;
+                u16     syndrome;
+                u16     reserved;
+                u16     bg;
+                u16     app_tag;
+                u32     ref_tag;
+        } psv;
+};
+
+struct mlx5_core_sig_ctx {
+        struct mlx5_core_psv    psv_memory;
+        struct mlx5_core_psv    psv_wire;
+        struct ib_sig_err       err_item;
+        bool                    sig_status_checked;
+        bool                    sig_err_exists;
+        u32                     sigerr_count;
+};
 
 struct mlx5_core_mr {
         u64                     iova;
@@ -475,6 +495,13 @@ struct mlx5_srq_table {
         struct radix_tree_root  tree;
 };
 
+struct mlx5_mr_table {
+        /* protect radix tree
+         */
+        rwlock_t                lock;
+        struct radix_tree_root  tree;
+};
+
 struct mlx5_priv {
         char                    name[MLX5_MAX_NAME_LEN];
         struct mlx5_eq_table    eq_table;
@@ -504,6 +531,10 @@ struct mlx5_priv {
         struct mlx5_cq_table    cq_table;
         /* end: cq staff */
 
+        /* start: mr staff */
+        struct mlx5_mr_table    mr_table;
+        /* end: mr staff */
+
         /* start: alloc staff */
         struct mutex            pgdir_mutex;
         struct list_head        pgdir_list;
@@ -651,6 +682,11 @@ static inline void mlx5_vfree(const void *addr)
                 kfree(addr);
 }
 
+static inline u32 mlx5_base_mkey(const u32 key)
+{
+        return key & 0xffffff00u;
+}
+
 int mlx5_dev_init(struct mlx5_core_dev *dev, struct pci_dev *pdev);
 void mlx5_dev_cleanup(struct mlx5_core_dev *dev);
 int mlx5_cmd_init(struct mlx5_core_dev *dev);
@@ -685,6 +721,8 @@ int mlx5_core_query_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq,
                         struct mlx5_query_srq_mbox_out *out);
 int mlx5_core_arm_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq,
                       u16 lwm, int is_srq);
+void mlx5_init_mr_table(struct mlx5_core_dev *dev);
+void mlx5_cleanup_mr_table(struct mlx5_core_dev *dev);
 int mlx5_core_create_mkey(struct mlx5_core_dev *dev, struct mlx5_core_mr *mr,
                           struct mlx5_create_mkey_mbox_in *in, int inlen,
                           mlx5_cmd_cbk_t callback, void *context,
@@ -746,6 +784,9 @@ void mlx5_db_free(struct mlx5_core_dev *dev, struct mlx5_db *db);
 const char *mlx5_command_str(int command);
 int mlx5_cmdif_debugfs_init(struct mlx5_core_dev *dev);
 void mlx5_cmdif_debugfs_cleanup(struct mlx5_core_dev *dev);
+int mlx5_core_create_psv(struct mlx5_core_dev *dev, u32 pdn,
+                         int npsvs, u32 *sig_index);
+int mlx5_core_destroy_psv(struct mlx5_core_dev *dev, int psv_num);
 
 static inline u32 mlx5_mkey_to_idx(u32 mkey)
 {
diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h
index d51eff713549..f829ad80ff28 100644
--- a/include/linux/mlx5/qp.h
+++ b/include/linux/mlx5/qp.h
@@ -37,6 +37,9 @@
 #include <linux/mlx5/driver.h>
 
 #define MLX5_INVALID_LKEY       0x100
+#define MLX5_SIG_WQE_SIZE       (MLX5_SEND_WQE_BB * 5)
+#define MLX5_DIF_SIZE           8
+#define MLX5_STRIDE_BLOCK_OP    0x400
 
 enum mlx5_qp_optpar {
         MLX5_QP_OPTPAR_ALT_ADDR_PATH            = 1 << 0,
@@ -151,6 +154,11 @@ enum {
         MLX5_SND_DBR    = 1,
 };
 
+enum {
+        MLX5_FLAGS_INLINE       = 1<<7,
+        MLX5_FLAGS_CHECK_FREE   = 1<<5,
+};
+
 struct mlx5_wqe_fmr_seg {
         __be32                  flags;
         __be32                  mem_key;
@@ -278,6 +286,60 @@ struct mlx5_wqe_inline_seg {
         __be32  byte_count;
 };
 
+struct mlx5_bsf {
+        struct mlx5_bsf_basic {
+                u8              bsf_size_sbs;
+                u8              check_byte_mask;
+                union {
+                        u8      copy_byte_mask;
+                        u8      bs_selector;
+                        u8      rsvd_wflags;
+                } wire;
+                union {
+                        u8      bs_selector;
+                        u8      rsvd_mflags;
+                } mem;
+                __be32          raw_data_size;
+                __be32          w_bfs_psv;
+                __be32          m_bfs_psv;
+        } basic;
+        struct mlx5_bsf_ext {
+                __be32          t_init_gen_pro_size;
+                __be32          rsvd_epi_size;
+                __be32          w_tfs_psv;
+                __be32          m_tfs_psv;
+        } ext;
+        struct mlx5_bsf_inl {
+                __be32          w_inl_vld;
+                __be32          w_rsvd;
+                __be64          w_block_format;
+                __be32          m_inl_vld;
+                __be32          m_rsvd;
+                __be64          m_block_format;
+        } inl;
+};
+
+struct mlx5_klm {
+        __be32          bcount;
+        __be32          key;
+        __be64          va;
+};
+
+struct mlx5_stride_block_entry {
+        __be16          stride;
+        __be16          bcount;
+        __be32          key;
+        __be64          va;
+};
+
+struct mlx5_stride_block_ctrl_seg {
+        __be32          bcount_per_cycle;
+        __be32          op;
+        __be32          repeat_count;
+        u16             rsvd;
+        __be16          num_entries;
+};
+
 struct mlx5_core_qp {
         void (*event)           (struct mlx5_core_qp *, int);
         int                     qpn;
@@ -444,6 +506,11 @@ static inline struct mlx5_core_qp *__mlx5_qp_lookup(struct mlx5_core_dev *dev, u
         return radix_tree_lookup(&dev->priv.qp_table.tree, qpn);
 }
 
+static inline struct mlx5_core_mr *__mlx5_mr_lookup(struct mlx5_core_dev *dev, u32 key)
+{
+        return radix_tree_lookup(&dev->priv.mr_table.tree, key);
+}
+
 int mlx5_core_create_qp(struct mlx5_core_dev *dev,
                         struct mlx5_core_qp *qp,
                         struct mlx5_create_qp_mbox_in *in,
diff --git a/include/rdma/ib_umem.h b/include/rdma/ib_umem.h
index 9ee0d2e51b16..1ea0b65c4cfb 100644
--- a/include/rdma/ib_umem.h
+++ b/include/rdma/ib_umem.h
@@ -46,17 +46,12 @@ struct ib_umem {
         int                     page_size;
         int                     writable;
         int                     hugetlb;
-        struct list_head        chunk_list;
         struct work_struct      work;
         struct mm_struct       *mm;
         unsigned long           diff;
-};
-
-struct ib_umem_chunk {
-        struct list_head        list;
-        int                     nents;
-        int                     nmap;
-        struct scatterlist      page_list[0];
+        struct sg_table sg_head;
+        int             nmap;
+        int             npages;
 };
 
 #ifdef CONFIG_INFINIBAND_USER_MEM
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index 6793f32ccb58..82ab5c1e7605 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -122,7 +122,19 @@ enum ib_device_cap_flags {
         IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1<<22),
         IB_DEVICE_MEM_WINDOW_TYPE_2A    = (1<<23),
         IB_DEVICE_MEM_WINDOW_TYPE_2B    = (1<<24),
-        IB_DEVICE_MANAGED_FLOW_STEERING = (1<<29)
+        IB_DEVICE_MANAGED_FLOW_STEERING = (1<<29),
+        IB_DEVICE_SIGNATURE_HANDOVER    = (1<<30)
+};
+
+enum ib_signature_prot_cap {
+        IB_PROT_T10DIF_TYPE_1 = 1,
+        IB_PROT_T10DIF_TYPE_2 = 1 << 1,
+        IB_PROT_T10DIF_TYPE_3 = 1 << 2,
+};
+
+enum ib_signature_guard_cap {
+        IB_GUARD_T10DIF_CRC     = 1,
+        IB_GUARD_T10DIF_CSUM    = 1 << 1,
 };
 
 enum ib_atomic_cap {
@@ -172,6 +184,8 @@ struct ib_device_attr {
         unsigned int            max_fast_reg_page_list_len;
         u16                     max_pkeys;
         u8                      local_ca_ack_delay;
+        int                     sig_prot_cap;
+        int                     sig_guard_cap;
 };
 
 enum ib_mtu {
@@ -461,6 +475,130 @@ int ib_rate_to_mult(enum ib_rate rate) __attribute_const__;
  */
 int ib_rate_to_mbps(enum ib_rate rate) __attribute_const__;
 
+enum ib_mr_create_flags {
+        IB_MR_SIGNATURE_EN = 1,
+};
+
+/**
+ * ib_mr_init_attr - Memory region init attributes passed to routine
+ *     ib_create_mr.
+ * @max_reg_descriptors: max number of registration descriptors that
+ *     may be used with registration work requests.
+ * @flags: MR creation flags bit mask.
+ */
+struct ib_mr_init_attr {
+        int         max_reg_descriptors;
+        u32         flags;
+};
+
+enum ib_signature_type {
+        IB_SIG_TYPE_T10_DIF,
+};
+
+/**
+ * T10-DIF Signature types
+ * T10-DIF types are defined by SCSI
+ * specifications.
+ */
+enum ib_t10_dif_type {
+        IB_T10DIF_NONE,
+        IB_T10DIF_TYPE1,
+        IB_T10DIF_TYPE2,
+        IB_T10DIF_TYPE3
+};
+
+/**
+ * Signature T10-DIF block-guard types
+ * IB_T10DIF_CRC: Corresponds to T10-PI mandated CRC checksum rules.
+ * IB_T10DIF_CSUM: Corresponds to IP checksum rules.
+ */
+enum ib_t10_dif_bg_type {
+        IB_T10DIF_CRC,
+        IB_T10DIF_CSUM
+};
+
+/**
+ * struct ib_t10_dif_domain - Parameters specific for T10-DIF
+ *     domain.
+ * @type: T10-DIF type (0|1|2|3)
+ * @bg_type: T10-DIF block guard type (CRC|CSUM)
+ * @pi_interval: protection information interval.
+ * @bg: seed of guard computation.
+ * @app_tag: application tag of guard block
+ * @ref_tag: initial guard block reference tag.
+ * @type3_inc_reftag: T10-DIF type 3 does not state
+ *     about the reference tag, it is the user
+ *     choice to increment it or not.
+ */
+struct ib_t10_dif_domain {
+        enum ib_t10_dif_type    type;
+        enum ib_t10_dif_bg_type bg_type;
+        u16                     pi_interval;
+        u16                     bg;
+        u16                     app_tag;
+        u32                     ref_tag;
+        bool                    type3_inc_reftag;
+};
+
+/**
+ * struct ib_sig_domain - Parameters for signature domain
+ * @sig_type: specific signauture type
+ * @sig: union of all signature domain attributes that may
+ *     be used to set domain layout.
+ */
+struct ib_sig_domain {
+        enum ib_signature_type sig_type;
+        union {
+                struct ib_t10_dif_domain dif;
+        } sig;
+};
+
+/**
+ * struct ib_sig_attrs - Parameters for signature handover operation
+ * @check_mask: bitmask for signature byte check (8 bytes)
+ * @mem: memory domain layout desciptor.
+ * @wire: wire domain layout desciptor.
+ */
+struct ib_sig_attrs {
+        u8                      check_mask;
+        struct ib_sig_domain    mem;
+        struct ib_sig_domain    wire;
+};
+
+enum ib_sig_err_type {
+        IB_SIG_BAD_GUARD,
+        IB_SIG_BAD_REFTAG,
+        IB_SIG_BAD_APPTAG,
+};
+
+/**
+ * struct ib_sig_err - signature error descriptor
+ */
+struct ib_sig_err {
+        enum ib_sig_err_type    err_type;
+        u32                     expected;
+        u32                     actual;
+        u64                     sig_err_offset;
+        u32                     key;
+};
+
+enum ib_mr_status_check {
+        IB_MR_CHECK_SIG_STATUS = 1,
+};
+
+/**
+ * struct ib_mr_status - Memory region status container
+ *
+ * @fail_status: Bitmask of MR checks status. For each
+ *     failed check a corresponding status bit is set.
+ * @sig_err: Additional info for IB_MR_CEHCK_SIG_STATUS
+ *     failure.
+ */
+struct ib_mr_status {
+        u32                 fail_status;
+        struct ib_sig_err   sig_err;
+};
+
 /**
  * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate
  * enum.
@@ -644,6 +782,7 @@ enum ib_qp_create_flags {
         IB_QP_CREATE_IPOIB_UD_LSO               = 1 << 0,
         IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK   = 1 << 1,
         IB_QP_CREATE_NETIF_QP                   = 1 << 5,
+        IB_QP_CREATE_SIGNATURE_EN               = 1 << 6,
         /* reserve bits 26-31 for low level drivers' internal use */
         IB_QP_CREATE_RESERVED_START             = 1 << 26,
         IB_QP_CREATE_RESERVED_END               = 1 << 31,
@@ -808,6 +947,7 @@ enum ib_wr_opcode {
         IB_WR_MASKED_ATOMIC_CMP_AND_SWP,
         IB_WR_MASKED_ATOMIC_FETCH_AND_ADD,
         IB_WR_BIND_MW,
+        IB_WR_REG_SIG_MR,
         /* reserve values for low level drivers' internal use.
          * These values will not be used at all in the ib core layer.
          */
@@ -913,6 +1053,12 @@ struct ib_send_wr {
                         u32                      rkey;
                         struct ib_mw_bind_info   bind_info;
                 } bind_mw;
+                struct {
+                        struct ib_sig_attrs    *sig_attrs;
+                        struct ib_mr           *sig_mr;
+                        int                     access_flags;
+                        struct ib_sge          *prot;
+                } sig_handover;
         } wr;
         u32                     xrc_remote_srq_num;     /* XRC TGT QPs only */
 };
@@ -1407,6 +1553,9 @@ struct ib_device {
         int                        (*query_mr)(struct ib_mr *mr,
                                                struct ib_mr_attr *mr_attr);
         int                        (*dereg_mr)(struct ib_mr *mr);
+        int                        (*destroy_mr)(struct ib_mr *mr);
+        struct ib_mr *             (*create_mr)(struct ib_pd *pd,
+                                                struct ib_mr_init_attr *mr_init_attr);
         struct ib_mr *             (*alloc_fast_reg_mr)(struct ib_pd *pd,
                                                int max_page_list_len);
         struct ib_fast_reg_page_list * (*alloc_fast_reg_page_list)(struct ib_device *device,
@@ -1455,6 +1604,8 @@ struct ib_device {
                                                   *flow_attr,
                                                   int domain);
         int                        (*destroy_flow)(struct ib_flow *flow_id);
+        int                        (*check_mr_status)(struct ib_mr *mr, u32 check_mask,
+                                                      struct ib_mr_status *mr_status);
 
         struct ib_dma_mapping_ops   *dma_ops;
 
@@ -2250,6 +2401,25 @@ int ib_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr);
  */
 int ib_dereg_mr(struct ib_mr *mr);
 
+
+/**
+ * ib_create_mr - Allocates a memory region that may be used for
+ *     signature handover operations.
+ * @pd: The protection domain associated with the region.
+ * @mr_init_attr: memory region init attributes.
+ */
+struct ib_mr *ib_create_mr(struct ib_pd *pd,
+                           struct ib_mr_init_attr *mr_init_attr);
+
+/**
+ * ib_destroy_mr - Destroys a memory region that was created using
+ *     ib_create_mr and removes it from HW translation tables.
+ * @mr: The memory region to destroy.
+ *
+ * This function can fail, if the memory region has memory windows bound to it.
+ */
+int ib_destroy_mr(struct ib_mr *mr);
+
 /**
  * ib_alloc_fast_reg_mr - Allocates memory region usable with the
  *   IB_WR_FAST_REG_MR send work request.
@@ -2435,4 +2605,19 @@ static inline int ib_check_mr_access(int flags)
         return 0;
 }
 
+/**
+ * ib_check_mr_status: lightweight check of MR status.
+ *     This routine may provide status checks on a selected
+ *     ib_mr. first use is for signature status check.
+ *
+ * @mr: A memory region.
+ * @check_mask: Bitmask of which checks to perform from
+ *     ib_mr_status_check enumeration.
+ * @mr_status: The container of relevant status checks.
+ *     failed checks will be indicated in the status bitmask
+ *     and the relevant info shall be in the error item.
+ */
+int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
+                       struct ib_mr_status *mr_status);
+
 #endif /* IB_VERBS_H */