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authorLinus Walleij <linus.walleij@stericsson.com>2010-11-29 07:52:19 -0500
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-12-03 11:35:30 -0500
commit593cd8711221c9661dbf9beb2fb42fecca03e693 (patch)
tree6f335d79b029a0e238f737b1cfb00b1fdba2ff63 /include
parent4ad916bca7c372110815e77c2db95fb2eb2f8ab3 (diff)
mtd: FSMC NAND use the PrimeCell identifier macros
The FSMC actually has a standard ARM PrimeCell ID register, and the "revision" part of that register contains the thing that the code is looking at. Reuse the infrastructure from the AMBA bus abstraction and rid local defines. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/fsmc.h19
1 files changed, 0 insertions, 19 deletions
diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h
index e210b87e6cd6..96e8e67a053e 100644
--- a/include/linux/mtd/fsmc.h
+++ b/include/linux/mtd/fsmc.h
@@ -115,25 +115,6 @@ struct fsmc_regs {
115#define FSMC_THOLD_4 (4 << 16) 115#define FSMC_THOLD_4 (4 << 16)
116#define FSMC_THIZ_1 (1 << 24) 116#define FSMC_THIZ_1 (1 << 24)
117 117
118/* peripid2 register definitions */
119#define FSMC_REVISION_MSK (0xf)
120#define FSMC_REVISION_SHFT (0x4)
121
122#define FSMC_VER1 1
123#define FSMC_VER2 2
124#define FSMC_VER3 3
125#define FSMC_VER4 4
126#define FSMC_VER5 5
127#define FSMC_VER6 6
128#define FSMC_VER7 7
129#define FSMC_VER8 8
130
131static inline uint32_t get_fsmc_version(struct fsmc_regs *regs)
132{
133 return (readl(&regs->peripid2) >> FSMC_REVISION_SHFT) &
134 FSMC_REVISION_MSK;
135}
136
137/* 118/*
138 * There are 13 bytes of ecc for every 512 byte block in FSMC version 8 119 * There are 13 bytes of ecc for every 512 byte block in FSMC version 8
139 * and it has to be read consecutively and immediately after the 512 120 * and it has to be read consecutively and immediately after the 512