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authorMagnus Damm <damm@opensource.se>2010-05-18 10:42:51 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-05-31 00:11:41 -0400
commit487d9fc5016529d7d77dfe35b666fd3a090e2953 (patch)
tree2cfcd7ed5bcbd6d8768f233770382a1378292f84 /include
parentb34bce45530ca897aea35915e0e42eb3c8047b52 (diff)
sh: prepare MMCIF driver header file
Update the MMCIF driver to include register information and register access functions in the header file. The MMCIF boot code builds on top of this. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mmc/sh_mmcif.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
index aafe832f18aa..e079c6beeb98 100644
--- a/include/linux/mmc/sh_mmcif.h
+++ b/include/linux/mmc/sh_mmcif.h
@@ -14,6 +14,9 @@
14#ifndef __SH_MMCIF_H__ 14#ifndef __SH_MMCIF_H__
15#define __SH_MMCIF_H__ 15#define __SH_MMCIF_H__
16 16
17#include <linux/platform_device.h>
18#include <linux/io.h>
19
17/* 20/*
18 * MMCIF : CE_CLK_CTRL [19:16] 21 * MMCIF : CE_CLK_CTRL [19:16]
19 * 1000 : Peripheral clock / 512 22 * 1000 : Peripheral clock / 512
@@ -36,4 +39,33 @@ struct sh_mmcif_plat_data {
36 u32 ocr; 39 u32 ocr;
37}; 40};
38 41
42#define MMCIF_CE_CMD_SET 0x00000000
43#define MMCIF_CE_ARG 0x00000008
44#define MMCIF_CE_ARG_CMD12 0x0000000C
45#define MMCIF_CE_CMD_CTRL 0x00000010
46#define MMCIF_CE_BLOCK_SET 0x00000014
47#define MMCIF_CE_CLK_CTRL 0x00000018
48#define MMCIF_CE_BUF_ACC 0x0000001C
49#define MMCIF_CE_RESP3 0x00000020
50#define MMCIF_CE_RESP2 0x00000024
51#define MMCIF_CE_RESP1 0x00000028
52#define MMCIF_CE_RESP0 0x0000002C
53#define MMCIF_CE_RESP_CMD12 0x00000030
54#define MMCIF_CE_DATA 0x00000034
55#define MMCIF_CE_INT 0x00000040
56#define MMCIF_CE_INT_MASK 0x00000044
57#define MMCIF_CE_HOST_STS1 0x00000048
58#define MMCIF_CE_HOST_STS2 0x0000004C
59#define MMCIF_CE_VERSION 0x0000007C
60
61extern inline u32 sh_mmcif_readl(void __iomem *addr, int reg)
62{
63 return readl(addr + reg);
64}
65
66extern inline void sh_mmcif_writel(void __iomem *addr, int reg, u32 val)
67{
68 writel(val, addr + reg);
69}
70
39#endif /* __SH_MMCIF_H__ */ 71#endif /* __SH_MMCIF_H__ */