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authorKumar Gala <galak@kernel.crashing.org>2006-12-11 00:15:47 -0500
committerKumar Gala <galak@kernel.crashing.org>2006-12-11 00:15:47 -0500
commit45d8e7aaf47668550fdb6c2d3abbe42f48a76df2 (patch)
tree6884852ff83c8c8b7d09883783587e1db43ca9d4 /include
parentc99767974ebd2a719d849fdeaaa1674456f5283f (diff)
[POWERPC] Only export __mtdcr/__mfdcr if CONFIG_PPC_DCR is set
On 85xx we don't build in dcr support because the core doesn't implement the instructions. This caused problems when building an 85xx kernel. Additionally made it so we only build __mtdcr/__mfdcr if we are CONFIG_PPC_DCR_NATIVE. The 85xx build issue wasPointed out by Dai Haruki. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-powerpc/dcr-native.h37
-rw-r--r--include/asm-powerpc/dcr.h2
-rw-r--r--include/asm-ppc/reg_booke.h36
3 files changed, 39 insertions, 36 deletions
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h
index fd4a5f5e33d1..d7a1bc1551c6 100644
--- a/include/asm-powerpc/dcr-native.h
+++ b/include/asm-powerpc/dcr-native.h
@@ -20,8 +20,7 @@
20#ifndef _ASM_POWERPC_DCR_NATIVE_H 20#ifndef _ASM_POWERPC_DCR_NATIVE_H
21#define _ASM_POWERPC_DCR_NATIVE_H 21#define _ASM_POWERPC_DCR_NATIVE_H
22#ifdef __KERNEL__ 22#ifdef __KERNEL__
23 23#ifndef __ASSEMBLY__
24#include <asm/reg.h>
25 24
26typedef struct {} dcr_host_t; 25typedef struct {} dcr_host_t;
27 26
@@ -32,7 +31,41 @@ typedef struct {} dcr_host_t;
32#define dcr_read(host, dcr_n) mfdcr(dcr_n) 31#define dcr_read(host, dcr_n) mfdcr(dcr_n)
33#define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value) 32#define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value)
34 33
34/* Device Control Registers */
35void __mtdcr(int reg, unsigned int val);
36unsigned int __mfdcr(int reg);
37#define mfdcr(rn) \
38 ({unsigned int rval; \
39 if (__builtin_constant_p(rn)) \
40 asm volatile("mfdcr %0," __stringify(rn) \
41 : "=r" (rval)); \
42 else \
43 rval = __mfdcr(rn); \
44 rval;})
45
46#define mtdcr(rn, v) \
47do { \
48 if (__builtin_constant_p(rn)) \
49 asm volatile("mtdcr " __stringify(rn) ",%0" \
50 : : "r" (v)); \
51 else \
52 __mtdcr(rn, v); \
53} while (0)
54
55/* R/W of indirect DCRs make use of standard naming conventions for DCRs */
56#define mfdcri(base, reg) \
57({ \
58 mtdcr(base ## _CFGADDR, base ## _ ## reg); \
59 mfdcr(base ## _CFGDATA); \
60})
61
62#define mtdcri(base, reg, data) \
63do { \
64 mtdcr(base ## _CFGADDR, base ## _ ## reg); \
65 mtdcr(base ## _CFGDATA, data); \
66} while (0)
35 67
68#endif /* __ASSEMBLY__ */
36#endif /* __KERNEL__ */ 69#endif /* __KERNEL__ */
37#endif /* _ASM_POWERPC_DCR_NATIVE_H */ 70#endif /* _ASM_POWERPC_DCR_NATIVE_H */
38 71
diff --git a/include/asm-powerpc/dcr.h b/include/asm-powerpc/dcr.h
index 473f2c7fd892..b66c5e6941f0 100644
--- a/include/asm-powerpc/dcr.h
+++ b/include/asm-powerpc/dcr.h
@@ -20,6 +20,7 @@
20#ifndef _ASM_POWERPC_DCR_H 20#ifndef _ASM_POWERPC_DCR_H
21#define _ASM_POWERPC_DCR_H 21#define _ASM_POWERPC_DCR_H
22#ifdef __KERNEL__ 22#ifdef __KERNEL__
23#ifdef CONFIG_PPC_DCR
23 24
24#ifdef CONFIG_PPC_DCR_NATIVE 25#ifdef CONFIG_PPC_DCR_NATIVE
25#include <asm/dcr-native.h> 26#include <asm/dcr-native.h>
@@ -38,5 +39,6 @@ extern unsigned int dcr_resource_len(struct device_node *np,
38 unsigned int index); 39 unsigned int index);
39#endif /* CONFIG_PPC_MERGE */ 40#endif /* CONFIG_PPC_MERGE */
40 41
42#endif /* CONFIG_PPC_DCR */
41#endif /* __KERNEL__ */ 43#endif /* __KERNEL__ */
42#endif /* _ASM_POWERPC_DCR_H */ 44#endif /* _ASM_POWERPC_DCR_H */
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h
index 602fbadeaf48..a263fc1e65c4 100644
--- a/include/asm-ppc/reg_booke.h
+++ b/include/asm-ppc/reg_booke.h
@@ -9,41 +9,9 @@
9#ifndef __ASM_PPC_REG_BOOKE_H__ 9#ifndef __ASM_PPC_REG_BOOKE_H__
10#define __ASM_PPC_REG_BOOKE_H__ 10#define __ASM_PPC_REG_BOOKE_H__
11 11
12#ifndef __ASSEMBLY__ 12#include <asm/dcr.h>
13/* Device Control Registers */
14void __mtdcr(int reg, unsigned int val);
15unsigned int __mfdcr(int reg);
16#define mfdcr(rn) \
17 ({unsigned int rval; \
18 if (__builtin_constant_p(rn)) \
19 asm volatile("mfdcr %0," __stringify(rn) \
20 : "=r" (rval)); \
21 else \
22 rval = __mfdcr(rn); \
23 rval;})
24
25#define mtdcr(rn, v) \
26do { \
27 if (__builtin_constant_p(rn)) \
28 asm volatile("mtdcr " __stringify(rn) ",%0" \
29 : : "r" (v)); \
30 else \
31 __mtdcr(rn, v); \
32} while (0)
33
34/* R/W of indirect DCRs make use of standard naming conventions for DCRs */
35#define mfdcri(base, reg) \
36({ \
37 mtdcr(base ## _CFGADDR, base ## _ ## reg); \
38 mfdcr(base ## _CFGDATA); \
39})
40
41#define mtdcri(base, reg, data) \
42do { \
43 mtdcr(base ## _CFGADDR, base ## _ ## reg); \
44 mtdcr(base ## _CFGDATA, data); \
45} while (0)
46 13
14#ifndef __ASSEMBLY__
47/* Performance Monitor Registers */ 15/* Performance Monitor Registers */
48#define mfpmr(rn) ({unsigned int rval; \ 16#define mfpmr(rn) ({unsigned int rval; \
49 asm volatile("mfpmr %0," __stringify(rn) \ 17 asm volatile("mfpmr %0," __stringify(rn) \